Prep for 0.3.1 release

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@389 42af7a65-404d-4744-a932-0658087f49c3

ChangeLog

@@ -69,3 +69,164 @@
 	* Some Documentation updates
 	* Added support for the Neuros OSD / DM320
 
+0.2.2 2007-03-26 Gregory Nutt <spudmonkey@racsa.co.cr>
+	* Created the configs/ directory; separated board configuration
+	  from processor architecture logic
+	* Add memory leak detection test to examples/ostest
+	* Corrected memory leak in OS pthread join logic
+	* Corrected memory leaks in examples/ostest due to failures
+	  to join or detach from pthreads.
+	* Added pthread_once(), pthread_kill(), pthread_sigmask()
+	* Added pthread_barrierattr_*() APIs
+	* Added pthread_barrier_init(), pthread_barrier_destroy(), and
+	  pthread_barrier_wait();
+	* Added pthread barrier test
+	* Added protection so that errno cannot be modified from
+	  interrupt handling.
+	* sched_setparam(), sched_setscheduler() now correctly set
+	  errno; pthread_setscheduler() now returns the correct errno.
+	* Added pthread_setschedprio().
+	* Added directories to hold board-specific header files
+	* Added directories to hold board-specific drivers
+
+0.2.3 2007-03-29 Gregory Nutt <spudmonkey@racsa.co.cr>
+
+	* mq_receive and mq_send now return errno's appropriately
+	* mq_receive and mq_send are now correctly awakened by signals.
+	* Fixed an unmatched sched_lock/unlock pair in task_delete().
+	* sched_lock must be called in _exit() because operation of
+	  task_delete() can cause pending tasks to be merged and a
+	  context switch to occur.
+	* Added mq_timedreceive() and mq_timedsend()
+	* signal mask is now inherited by both child tasks and threads.
+	* Improved sharebility of stdout among pthreads (only).  Nothing
+	  was broken, but by moving the mutual exclusion logic to a
+	  higher level, the printf output is more readable.
+	* Fixed a bug in file system cleanup:  A list was being deleted
+	  before the buffers contained in the list.
+	* Fixed a bug in the wait-for-message-queue-not-empty logic.
+	* Added a test of timed mqueue operations; detected and corrected
+	  some mqueue errors.
+	* Identified and corrected a race condition associated with
+	  pthread_join.  In the failure condition, memory was being
+	  deallocated while still in use.
+
+0.2.4 2007-04-28 Gregory Nutt <spudmonkey@racsa.co.cr>
+
+	* Verfied c5471 build under Cygwin on WinXP
+	* Makesystem changes to better support different SoCs.
+	* Made arch/c5471/include and arch/dm320/include identical in
+	  preparation for merging into arch/arm
+	* Logic from arch/c5471 and arch/dm320 combined into arch/arm.
+	  arch/c5471 and arch/dm320 are deprecated and will be removed
+	  when the new c5471 and dm320 logic is verified.
+
+0.2.5 2007-05-19 Gregory Nutt <spudmonkey@racsa.co.cr>
+
+	* Corrected some build/configuration issues introduced with the
+	  last release.
+	* Added support for the NXP 214x processor on the mcu123.com lpc214x
+	  development board (untested)
+	* Added support for block devices.
+	* Simulated target now exports a VFAT filesystem
+	* Begin support for VFAT filesystem (missing functionalit)
+	* Added mount() and umount()
+	* Fix bug in memcmp return value
+	* Fix errors in timeslice calculation (several places)
+	* Added missing irqrestore() in timer_deletall().
+	* close() was not closing the underlying device.
+	* Added fsync()
+	* Added strspn() and strcspn()
+
+0.2.6 2007-05-26 Gregory Nutt <spudmonkey@racsa.co.cr>
+
+	* Added unlink(), mkdir(), rmdir(), and rename()
+	* Fixed several serious FAT errors with oflags handling (&& instead of &)
+	* Added FAT support for unlink(), mkdir(), rmdir(), and rename
+	* Added FAT support for opendir(), closedir(), readdir(), seekdir(),
+	  telldir(), rewindir().
+	* Fixed ARM compilation errors introduced in 0.2.5 (that is what I get
+	  for only testing on the simulation).
+
+0.2.7 2007-06-09 Gregory Nutt <spudmonkey@racsa.co.cr>
+
+	* Added stat() to fs layer and to FAT
+	* Fixed reference counting errors associated with mounted filesystems
+	* Added fat_getattrib() and fat_setattrib()
+	* Added statfs() to fs layer and to FAT
+	* Correct file name extension in tools/zipme.sh
+	* Fix error in dependencies in 8051/2 Makefile
+	* sched/Makefile: Don't build sleep() or usleep() if signals are disabled
+	* sched/sched_setparam.c: Remove redundant disabling of interrupts
+	* sched/usleep.c: Fixed nsec calculation
+	* lib/lib_strcspn.c: Function incorrectly named strspn().
+	* examples/ostest/main.c:  Errors in SDCC version of a memcpy() call
+	* examples/ostest/sighand.c: Don't call fflush() if streams are disabled
+	* include/limits.h, include/time.h, sched/clock_internal.h: A support for
+	  using selectable system timer frequency.
+	* Fixed error in mountpoint related conditional compilation introduced
+	  in 0.2.5
+	* Restructured some Makefiles to better handle enabling and disabling
+	  NuttX features without having so much conditional compilation in the
+	  source files.
+	* tools/mkconfig.c: No longer depends on asprintf() and _GNU_SOURCE and
+	  so should now build in non-GNU, non-GLIBC environments.
+	* include/nuttx/compiler.h: Fix for using SDCC with the Z80.
+	* include/assert.h & arch/pjrc-8051/src/up_assert.c: SDCC does support
+	  __FILE__and __LINE__ (not tested)
+	* examples/ostest/barrier.c: Don't call usleep() when signals are
+	  disabled.
+
+0.2.8 2007-07-02 Gregory Nutt <spudmonkey@racsa.co.cr>
+	* tools/Makefile.mkconfig: Under Cygwin, executable has a different name
+	* tools/mkdeps.sh & arch/arm/src/Makefile: Corrected a problem makeing dependencies
+	* tools/zipme.sh: Force directory name to be nuttx-xx.yy.zz
+	* fs/fs_opendir.c: Correct errors in semaphore usage that can cause deadlock.
+	* lib/lib_getopt.c: Added getopt() support
+	* examples/nsh/:  NSH now supports cat, mount, umount, and mkdir.  ls supports
+	  -l -s, and -R
+	* Added basic OS support to manage environment variables:  environment
+	  storage, cloning on task creation, sharing on pthread creation, destruction
+	  on thread/task exit.
+	* Add environment variables APIs:  environ, getenv, putenv, clearenv, setenv,
+	  unsetenv
+	* Correct an error in realloc() when the block is extended "down" in memory.
+	  In this case, the old memory contents need to be copied to the new location
+	  and an allocated bit was not being set.
+	* examples/ostest/: Added an environment variable test.
+	* examples/nsh/: Break into several files.
+	* lib/: Added strrchr, basename, dirname
+	* examples/nsh/: Add cp, rm, rmdir, set, unset commands. echo will now print
+	  environment variables.
+
+0.3.0 2007-11-06 Gregory Nutt <spudmonkey@racsa.co.cr>
+
+	* Imported uIP into the tree (see
+	   http://www.sics.se/~adam/uip/index.php/Main_Page)
+	* Adding socket(), bind(), connect()
+	* Added snprintf()
+	* Added send() and sendto(); integrate write() and close() with socket descriptors.
+        * Added recv() and recvfrom().
+	* Added getsockopt() and setsockopt()
+	* Documentation updated to address socket interfaces.
+	* Implemented receive timeouts via setsockopt(SO_RCVTIMEO).
+	* Provide support for multiple network devices
+	* Implement socket ioctl() calls to set addresses
+	* Added listen() and accept()
+	* Added DM90x0 ethernet driver
+	* ARP timer is now built into the network layer
+	* Basic client functionality verified: socket(), bind(), connect(), recv(), send().
+
+0.3.1 2007-11-19 Gregory Nutt <spudmonkey@racsa.co.cr>
+
+	* Separated net/uip/uip.c into several functions in several files.
+	* Corrected a TCP problem where packets were dropped because there was no
+	  recv() in place but the packet was being ACKed.  There are still TCP
+	  recv buffering issues, but this is part of a larger buffering issue.
+	* Basic server functionality verified: listen(), accept()
+	* Fix DM90x0 driver problem that caused TX overruns
+	* Add strncmp()
+	* Added TCP/IP read-ahead buffer to minimize failed ACKs and packet loss.
+
+0.3.2 2007-xx-xx Gregory Nutt <spudmonkey@racsa.co.cr>
+

Documentation/NuttX.html

@@ -8,7 +8,7 @@
   <tr align="center" bgcolor="#e4e4e4">
     <td>
       <h1><big><font color="#3c34ec"><i>NuttX RTOS</i></font></big></h1>
-      <p>Last Updated: March 21, 2007</p>
+      <p>Last Updated: November 19, 2007</p>
     </td>
   </tr>
 </table>
@@ -97,10 +97,13 @@
   <td>
     <p>
       The goal is to provide most standard POSIX OS interfaces to support
-      a rich multi-threaded development environment.
+      a rich, multi-threaded development environment for deeply embedded
+      processors.
     </p>
-      NON-GOALS: (1) It is not a goal to provide OS subsystems such
-      as network or USB (but these could obviously be added).
+      NON-GOALS: (1) It is not a goal to provide the rich level of OS
+      features like those provided with Linux.
+      Small footprint is more important than features.
+      Standard compliance is more important than small footprint.
       (2) There is no MMU-based support for processes.
       At present, NuttX assumes a flat address space.
     </p>
@@ -180,9 +183,31 @@
 </table>
 
 <p>
-   The third release of NuttX (nuttx-0.1.2) is avalable for download
+   The 13th release of NuttX (nuttx-0.3.0) is available for download
    from the <a href="http://sourceforge.net/project/showfiles.php?group_id=189573">SourceForge</a>
    website.
+   The change log associated with the release is available <a href="#currentrelease">here</a>.
+   Unreleased changes after this release are avalable in CVS.
+   These unreleased changes are listed <a href="#pendingchanges">here</a>.
+</p>
+<p>
+  NuttX 0.3.1 is the second release containing the integration of a network
+  subsystem and the uIP TCP/IP, UDP, and ICMP stacks based on
+  <a href="http://www.sics.se/~adam/uip/index.php/Main_Page">uIP</a>
+  into NuttX.
+</p>
+<p>
+  Many network-related problems have been fixed from version 0.3.0
+  and the implementation has matured significantly.
+  However, the level of network reliability is probably still at the
+  pre-alpha or early level.
+  It is sufficiently complete that you may begin to perform some network
+  integration and is exepcted to achieve beta level of reliability over
+  the next few releases.
+</p>
+<p>
+  The baseline functionality of NuttX continues to mature and remains at
+  post-beta (as long as the network is not used).
 </p>
 
 <table width ="100%">
@@ -234,10 +259,25 @@
     </p>
    </td>
 </tr>
+<tr>
+  <td><br></td>
+  <td>
+    <p>
+      <b>NXP LPC214x</b>.
+      Support is provided for the NXP LPC214x family of processors.  In particular,
+      support is provided for the mcu123.com lpc214x evaluation board (LPC2148).
+      This port also used the GNU arm-eld toolchain*.
+    </p>
+    <p>
+      <b>STATUS:</b>
+        Initial coding of this port code complete but has not yet been verified.
+    </p>
+  </td>
+</tr>
 <tr>
   <td valign="top"><img src="favicon.ico"></td>
   <td bgcolor="#5eaee1">
-    <b>ARM9EJS</b>.
+    <b>ARM926EJS</b>.
   </td>
 </tr>
 <tr>
@@ -252,7 +292,7 @@
     </p>
     <p>
       <b>STATUS:</b>
-      This port is code complete but totally untested due to hardware issues with my OSD.
+        This port is complete and verified.
     </p>
    </td>
 </tr>
@@ -275,6 +315,8 @@
       This port is complete but not stable with timer interrupts enabled.
       There seems to be some issue when the stack pointer enters into the indirect IRAM
       address space during interrupt handling.
+      This architecture has not been built in some time will likely have some compilation
+      problems because of SDCC compiler differences.
     </p>
    </td>
 </tr>
@@ -306,7 +348,7 @@ is available that be used to build a NuttX-compatible arm-elf toolchain.</blockq
 </table>
 
 <ul>
-<p><b>C5471 (Arm7)</b>
+<p><b>C5471 (ARM7)</b>
   The build for this ARM7 target that includes most of the OS features and
   a broad range of OS tests.  The size of this executable as given by the
   Linux <tt>size</tt> command is (3/9/07):
@@ -315,6 +357,15 @@ is available that be used to build a NuttX-compatible arm-elf toolchain.</blockq
    text    data     bss     dec     hex filename
   53272     428    3568   57268    dfb4 nuttx
 </pre>
+<p><b>DM320 (ARM9)</b>
+  This build for the ARM9 target includes a signficant subset of OS
+  features, ethernet driver and full TCP/IP, UDP and (minimal) ICMP
+  stacks (via uIP). (11/8/07)
+</p>
+<pre>
+   text    data     bss     dec     hex filename
+  49472     296    3972   53740    d1ec nuttx
+</pre>
 <p><b>87C52</b>
   A reduced functionality OS test for the 8052 target requires only
   about 18-19Kb:
@@ -358,14 +409,43 @@ Other memory:
   </tr>
 </table>
 
+<center><table width ="80%">
+<tr>
+  <td><img src="favicon.ico"></td>
+   <td>
+      <a href="#olderreleases">Change Logs for Older Releases</a><br>
+   </td>
+</tr>
+<tr>
+  <td><img src="favicon.ico"></td>
+   <td>
+      <a href="#currentrelease">ChangeLog for Current Release</a><br>
+   </td>
+</tr>
+<tr>
+  <td><img src="favicon.ico"></td>
+   <td>
+      <a href="#pendingchanges">Unreleased Changes</a>
+   </td>
+</tr>
+</table></center>
+
+<table width ="100%">
+  <tr bgcolor="#e4e4e4">
+  <td>
+    <a name="olderreleases">Change Logs for Older Releases</a>
+  </td>
+  </tr>
+</table>
+
 <ul><pre>
-0.1.0 2007-03-09  Gregory Nutt <spudmonkey@racsa.co.cr>
+0.1.0 2007-03-09  Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
 
 	* Initial Release
 	* Support for Linux user mode simulation and TI
 	  TMS320C5471 (Arm7) provided
 
-0.1.1 2007-03-14  Gregory Nutt <spudmonkey@racsa.co.cr>
+0.1.1 2007-03-14  Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
 
 	* Corrected an error in interrupt level context switching
 	  for C5471
@@ -393,7 +473,7 @@ Other memory:
 	  issue when SP enters indirect address space.
 	* Documentation updates
 
-0.1.2 2007-03-19  Gregory Nutt <spudmonkey@racsa.co.cr>
+0.1.2 2007-03-19  Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
 
 	* Add dirent.h, opendir(), readdir(), closedir(), etc.
 	* Add strerror()
@@ -418,7 +498,7 @@ Other memory:
 	  cause various problems
 	* Added a test for roundrobin scheduler.
 
-0.2.1 2007-03-22  Gregory Nutt <spudmonkey@racsa.co.cr>
+0.2.1 2007-03-22  Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
 
 	* Fix error in handing signed decimal in vsprintf().
 	* Major restructuring of header files to get closer to
@@ -430,6 +510,186 @@ Other memory:
 	* Some Documentation updates
 	* Added support for the Neuros OSD / DM320
 
+0.2.2 2007-03-26 Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
+	* Created the configs/ directory; separated board configuration
+	  from processor architecture logic
+	* Add memory leak detection test to examples/ostest
+	* Corrected memory leak in OS pthread join logic
+	* Corrected memory leaks in examples/ostest due to failures
+	  to join or detach from pthreads.
+	* Added pthread_once(), pthread_kill(), pthread_sigmask()
+	* Added pthread_barrierattr_*() APIs
+	* Added pthread_barrier_init(), pthread_barrier_destroy(), and
+	  pthread_barrier_wait();
+	* Added pthread barrier test
+	* Added protection so that errno cannot be modified from
+	  interrupt handling.
+	* sched_setparam(), sched_setscheduler() now correctly set
+	  errno; pthread_setscheduler() now returns the correct errno.
+	* Added pthread_setschedprio().
+	* Added directories to hold board-specific header files
+	* Added directories to hold board-specific drivers
+
+0.2.3 2007-03-29 Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
+
+	* mq_receive and mq_send now return errno's appropriately
+	* mq_receive and mq_send are now correctly awakened by signals.
+	* Fixed an unmatched sched_lock/unlock pair in task_delete().
+	* sched_lock must be called in _exit() because operation of
+	  task_delete() can cause pending tasks to be merged and a
+	  context switch to occur.
+	* Added mq_timedreceive() and mq_timedsend()
+	* signal mask is now inherited by both child tasks and threads.
+	* Improved sharebility of stdout among pthreads (only).  Nothing
+	  was broken, but by moving the mutual exclusion logic to a
+	  higher level, the printf output is more readable.
+	* Fixed a bug in file system cleanup:  A list was being deleted
+	  before the buffers contained in the list.
+	* Fixed a bug in the wait-for-message-queue-not-empty logic.
+	* Added a test of timed mqueue operations; detected and corrected
+	  some mqueue errors.
+	* Identified and corrected a race condition associated with
+	  pthread_join.  In the failure condition, memory was being
+	  deallocated while still in use.
+
+0.2.4 2007-04-28 Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
+
+	* Verfied c5471 build under Cygwin on WinXP
+	* Makesystem changes to better support different SoCs.
+	* Made arch/c5471/include and arch/dm320/include identical in
+	  preparation for merging into arch/arm
+	* Logic from arch/c5471 and arch/dm320 combined into arch/arm.
+	  arch/c5471 and arch/dm320 are deprecated and will be removed
+	  when the new c5471 and dm320 logic is verified.
+
+0.2.5 2007-05-19 Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
+
+	* Corrected some build/configuration issues introduced with the
+	  last release.
+	* Added support for the NXP 214x processor on the mcu123.com lpc214x
+	  development board (untested)
+	* Added support for block devices.
+	* Simulated target now exports a VFAT filesystem
+	* Begin support for VFAT filesystem (missing functionalit)
+	* Added mount() and umount()
+	* Fix bug in memcmp return value
+	* Fix errors in timeslice calculation (several places)
+	* Added missing irqrestore() in timer_deletall().
+	* close() was not closing the underlying device.
+	* Added fsync()
+	* Added strspn() and strcspn()
+
+0.2.6 2007-05-26 Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
+
+	* Added unlink(), mkdir(), rmdir(), and rename()
+	* Fixed several serious FAT errors with oflags handling (&& instead of &)
+	* Added FAT support for unlink(), mkdir(), rmdir(), and rename
+	* Added FAT support for opendir(), closedir(), readdir(), seekdir(),
+	  telldir(), rewindir().
+	* Fixed ARM compilation errors introduced in 0.2.5 (that is what I get
+	  for only testing on the simulation).
+
+0.2.7 2007-06-09 Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
+
+	* Added stat() to fs layer and to FAT
+	* Fixed reference counting errors associated with mounted filesystems
+	* Added fat_getattrib() and fat_setattrib()
+	* Added statfs() to fs layer and to FAT
+	* Correct file name extension in tools/zipme.sh
+	* Fix error in dependencies in 8051/2 Makefile
+	* sched/Makefile: Don't build sleep() or usleep() if signals are disabled
+	* sched/sched_setparam.c: Remove redundant disabling of interrupts
+	* sched/usleep.c: Fixed nsec calculation
+	* lib/lib_strcspn.c: Function incorrectly named strspn().
+	* examples/ostest/main.c:  Errors in SDCC version of a memcpy() call
+	* examples/ostest/sighand.c: Don't call fflush() if streams are disabled
+	* include/limits.h, include/time.h, sched/clock_internal.h: A support for
+	  using selectable system timer frequency.
+	* Fixed error in mountpoint related conditional compilation introduced
+	  in 0.2.5
+	* Restructured some Makefiles to better handle enabling and disabling
+	  NuttX features without having so much conditional compilation in the
+	  source files.
+	* tools/mkconfig.c: No longer depends on asprintf() and _GNU_SOURCE and
+	  so should now build in non-GNU, non-GLIBC environments.
+	* include/nuttx/compiler.h: Fix for using SDCC with the Z80.
+	* include/assert.h & arch/pjrc-8051/src/up_assert.c: SDCC does support
+	  __FILE__and __LINE__ (not tested)
+	* examples/ostest/barrier.c: Don't call usleep() when signals are
+	  disabled.
+
+0.2.8 2007-07-02 Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
+	* tools/Makefile.mkconfig: Under Cygwin, executable has a different name
+	* tools/mkdeps.sh & arch/arm/src/Makefile: Corrected a problem makeing dependencies
+	* tools/zipme.sh: Force directory name to be nuttx-xx.yy.zz
+	* fs/fs_opendir.c: Correct errors in semaphore usage that can cause deadlock.
+	* lib/lib_getopt.c: Added getopt() support
+	* examples/nsh/:  NSH now supports cat, mount, umount, and mkdir.  ls supports
+	  -l -s, and -R
+	* Added basic OS support to manage environment variables:  environment
+	  storage, cloning on task creation, sharing on pthread creation, destruction
+	  on thread/task exit.
+	* Add environment variables APIs:  environ, getenv, putenv, clearenv, setenv,
+	  unsetenv
+	* Correct an error in realloc() when the block is extended "down" in memory.
+	  In this case, the old memory contents need to be copied to the new location
+	  and an allocated bit was not being set.
+	* examples/ostest/: Added an environment variable test.
+	* examples/nsh/: Break into several files.
+	* lib/: Added strrchr, basename, dirname
+	* examples/nsh/: Add cp, rm, rmdir, set, unset commands. echo will now print
+	  environment variables.
+
+0.3.0 2007-11-06 Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
+
+	* Imported uIP into the tree (see
+	   http://www.sics.se/~adam/uip/index.php/Main_Page)
+	* Adding socket(), bind(), connect()
+	* Added snprintf()
+	* Added send() and sendto(); integrate write() and close() with socket descriptors.
+        * Added recv() and recvfrom().
+	* Added getsockopt() and setsockopt()
+	* Documentation updated to address socket interfaces.
+	* Implemented receive timeouts via setsockopt(SO_RCVTIMEO).
+	* Provide support for multiple network devices
+	* Implement socket ioctl() calls to set addresses
+	* Added listen() and accept()
+	* Added DM90x0 ethernet driver
+	* ARP timer is now built into the network layer
+	* Basic client functionality verified: socket(), bind(), connect(), recv(), send().
+</pre></ul>
+
+<table width ="100%">
+  <tr bgcolor="#e4e4e4">
+  <td>
+    <a name="currentrelease">ChangeLog for Current Release</a>
+  </td>
+  </tr>
+</table>
+
+<pre><ul>
+0.3.1 2007-11-19 Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
+
+	* Separated net/uip/uip.c into several functions in several files.
+	* Corrected a TCP problem where packets were dropped because there was no
+	  recv() in place but the packet was being ACKed.  There are still TCP
+	  recv buffering issues, but this is part of a larger buffering issue.
+	* Basic server functionality verified: listen(), accept()
+	* Fix DM90x0 driver problem that caused TX overruns
+	* Add strncmp()
+	* Added TCP/IP read-ahead buffer to minimize failed ACKs and packet loss.
+</pre></ul>
+
+<table width ="100%">
+  <tr bgcolor="#e4e4e4">
+  <td>
+    <a name="pendingchanges">Unreleased Changes</a>
+  </td>
+  </tr>
+</table>
+
+<pre><ul>
+0.3.2 2007-xx-xx Gregory Nutt &lt;spudmonkey@racsa.co.cr&gt;
 </pre></ul>
 
 <table width ="100%">

Makefile

@@ -37,34 +37,141 @@ TOPDIR		= ${shell pwd}
 -include ${TOPDIR}/.config
 -include ${TOPDIR}/Make.defs
 
+# Process architecture and board-specific directories
+
 ARCH_DIR	= arch/$(CONFIG_ARCH)
 ARCH_SRC	= $(ARCH_DIR)/src
+ARCH_INC	= $(ARCH_DIR)/include
+BOARD_DIR	= configs/$(CONFIG_ARCH_BOARD)
 
-SUBDIRS		= sched lib $(ARCH_SRC) mm fs drivers examples/$(CONFIG_EXAMPLE)
+# FSDIRS depend on file descriptor support; NONFSDIRS do not
+#   (except for parts of FSDIRS).  We will exclude FSDIRS
+#   from the build if file descriptor support is disabled
+
+NONFSDIRS	= sched lib $(ARCH_SRC) mm examples/$(CONFIG_EXAMPLE)
+FSDIRS		= fs drivers
+
+ifeq ($(CONFIG_NET),y)
+NONFSDIRS	+= net netutils
+endif
+
+# CLEANDIRS are the directories that will clean in.  These are
+#   all directories that we know about.
+# MAKEDIRS are the directories in which we will build targets
+
+CLEANDIRS	= $(NONFSDIRS) $(FSDIRS)
+
+ifeq ($(CONFIG_NFILE_DESCRIPTORS),0)
+MAKEDIRS	= $(NONFSDIRS)
+else
+MAKEDIRS	= $(NONFSDIRS) $(FSDIRS)
+endif
+
+# LINKLIBS is the list of NuttX libraries that is passed to the
+#   processor-specific Makefile to build the final target.
+#   Libraries in FSDIRS are excluded if file descriptor support
+#   is disabled.
 
 LINKLIBS	= sched/libsched$(LIBEXT) $(ARCH_SRC)/libarch$(LIBEXT) mm/libmm$(LIBEXT) \
-		  fs/libfs$(LIBEXT) drivers/libdrivers$(LIBEXT) lib/liblib$(LIBEXT) \
-		  examples/$(CONFIG_EXAMPLE)/lib$(CONFIG_EXAMPLE)$(LIBEXT)
+		  lib/liblib$(LIBEXT) examples/$(CONFIG_EXAMPLE)/lib$(CONFIG_EXAMPLE)$(LIBEXT)
 
+ifneq ($(CONFIG_NFILE_DESCRIPTORS),0)
+LINKLIBS	+= fs/libfs$(LIBEXT) drivers/libdrivers$(LIBEXT) 
+endif
+
+ifeq ($(CONFIG_NET),y)
+LINKLIBS	+= net/libnet$(LIBEXT) netutils/libnetutils$(LIBEXT) 
+endif
+
+# This is the name of the final target
 BIN		= nuttx$(EXEEXT)
 
 all: $(BIN)
 .PHONY: clean context clean_context distclean
 
+# Build the mkconfig tool used to create include/nuttx/config.h
 tools/mkconfig:
 	$(MAKE) -C tools -f Makefile.mkconfig TOPDIR=$(TOPDIR)  mkconfig
 
-include/nuttx/config.h: $(ARCH_DIR)/defconfig tools/mkconfig
-	tools/mkconfig $(ARCH_DIR) > include/nuttx/config.h
+# Create the include/nuttx/config.h file
+include/nuttx/config.h: $(TOPDIR)/.config tools/mkconfig
+	tools/mkconfig $(TOPDIR) > include/nuttx/config.h
 
-include/arch: include/nuttx/config.h
-	ln -sf $(TOPDIR)/$(ARCH_DIR)/include include/arch
+# link the arch/<arch-name>/include dir to include/arch
+include/arch: Make.defs
+	@if [ -h include/arch ]; then \
+		rm -f include/arch ; \
+	else \
+		if [ -e include/arch ]; then \
+			echo "include/arch exists but is not a symbolic link" ; \
+			exit 1 ; \
+		fi ; \
+	fi
+	@ln -s $(TOPDIR)/$(ARCH_DIR)/include include/arch
 
-context: check_context include/nuttx/config.h include/arch
+# Link the configs/<board-name>/include dir to include/arch/board
+include/arch/board: Make.defs include/arch
+	@if [ -h include/arch/board ]; then \
+			rm -f include/arch/board ; \
+	else \
+		if [ -e include/arch/board ]; then \
+			echo "include/arch/board exists but is not a symbolic link" ; \
+			exit 1 ; \
+		fi ; \
+	fi
+	@ln -s $(TOPDIR)/$(BOARD_DIR)/include include/arch/board
+
+# Link the configs/<board-name>/src dir to arch/<arch-name>/src/board
+$(ARCH_SRC)/board: Make.defs
+	@if [ -h $(ARCH_SRC)/board ]; then \
+		rm -f $(ARCH_SRC)/board ; \
+	else \
+		if [ -e $(ARCH_SRC)/board ]; then \
+			echo "$(ARCH_SRC)/board exists but is not a symbolic link" ; \
+			exit 1 ; \
+		fi ; \
+	fi
+	@ln -s $(TOPDIR)/$(BOARD_DIR)/src $(ARCH_SRC)/board
+
+# Link arch/<arch-name>/include/<chip-name> to arch/<arch-name>/include/chip
+$(ARCH_SRC)/chip: Make.defs
+ifneq ($(CONFIG_ARCH_CHIP),)
+	@if [ -h $(ARCH_SRC)/chip ]; then \
+		rm -f $(ARCH_SRC)/chip ; \
+	else \
+		if [ -e $(ARCH_SRC)/chip ]; then \
+			echo "$(ARCH_SRC)/chip exists but is not a symbolic link" ; \
+			exit 1 ; \
+		fi ; \
+	fi
+	@ln -s $(CONFIG_ARCH_CHIP) $(ARCH_SRC)/chip
+endif
+
+# Link arch/<arch-name>/src/<chip-name> to arch/<arch-name>/src/chip
+$(ARCH_INC)/chip: Make.defs
+ifneq ($(CONFIG_ARCH_CHIP),)
+	@if [ -e $(ARCH_INC)/chip ]; then \
+		if [ -h $(ARCH_INC)/chip ]; then \
+			rm -f $(ARCH_INC)/chip ; \
+		else \
+			echo "$(ARCH_INC)/chip exists but is not a symbolic link" ; \
+			exit 1 ; \
+		fi ; \
+	fi
+	@ln -s $(CONFIG_ARCH_CHIP) $(ARCH_INC)/chip
+endif
+
+dirlinks: include/arch include/arch/board $(ARCH_SRC)/board $(ARCH_SRC)/chip $(ARCH_INC)/chip
+
+context: check_context include/nuttx/config.h dirlinks
 
 clean_context:
-	rm -f include/nuttx/config.h
-	rm -f include/arch
+	@rm -f include/nuttx/config.h include/arch
+	@if [ -h include/arch ]; then rm -f include/arch ; fi
+	@if [ -h $(ARCH_INC)/board ]; then rm -f $(ARCH_INC)/board ; fi
+	@if [ -h $(ARCH_SRC)/board ]; then rm -f $(ARCH_SRC)/board ; fi
+	@if [ -h $(ARCH_INC)/chip ]; then rm -f $(ARCH_INC)/chip ; fi
+	@if [ -h $(ARCH_SRC)/chip ]; then rm -f $(ARCH_SRC)/chip ; fi
 
 check_context:
 	@if [ ! -e ${TOPDIR}/.config -o ! -e ${TOPDIR}/Make.defs ]; then \
@@ -85,6 +192,12 @@ $(ARCH_SRC)/libarch$(LIBEXT): context
 mm/libmm$(LIBEXT): context
 	$(MAKE) -C mm TOPDIR=$(TOPDIR) libmm$(LIBEXT)
 
+net/libnet$(LIBEXT): context
+	$(MAKE) -C net TOPDIR=$(TOPDIR) libnet$(LIBEXT)
+
+netutils/libnetutils$(LIBEXT): context
+	$(MAKE) -C netutils TOPDIR=$(TOPDIR) libnetutils$(LIBEXT)
+
 fs/libfs$(LIBEXT): context
 	$(MAKE) -C fs TOPDIR=$(TOPDIR) libfs$(LIBEXT)
 
@@ -98,23 +211,30 @@ $(BIN):	context depend $(LINKLIBS)
 	$(MAKE) -C $(ARCH_SRC) TOPDIR=$(TOPDIR) LINKLIBS="$(LINKLIBS)" $(BIN)
 
 depend:
-	@for dir in $(SUBDIRS) ; do \
+	@for dir in $(MAKEDIRS) ; do \
 		$(MAKE) -C $$dir TOPDIR=$(TOPDIR) depend ; \
 	done
 
-clean:
-	@for dir in $(SUBDIRS) ; do \
-		$(MAKE) -C $$dir TOPDIR=$(TOPDIR) clean ; \
+subdir_clean:
+	@for dir in $(CLEANDIRS) ; do \
+		if [ -e $$dir/Makefile ]; then \
+			$(MAKE) -C $$dir TOPDIR=$(TOPDIR) clean ; \
+		fi \
 	done
 	$(MAKE) -C tools -f Makefile.mkconfig TOPDIR=$(TOPDIR) clean
 	$(MAKE) -C mm -f Makefile.test TOPDIR=$(TOPDIR) clean
+
+clean: subdir_clean
 	rm -f $(BIN) $(BIN).* mm_test *.map *~
 
-distclean: clean clean_context
-	@for dir in $(SUBDIRS) ; do \
-		$(MAKE) -C $$dir TOPDIR=$(TOPDIR) distclean ; \
+subdir_distclean:
+	@for dir in $(CLEANDIRS) ; do \
+		if [ -e $$dir/Makefile ]; then \
+			$(MAKE) -C $$dir TOPDIR=$(TOPDIR) distclean ; \
+		fi \
 	done
-	$(MAKE) -C examples/$(CONFIG_EXAMPLE) TOPDIR=$(TOPDIR) distclean
+
+distclean: clean subdir_distclean clean_context
 	rm -f Make.defs setenv.sh .config
 
 

ReleaseNotes

@@ -1,19 +1,23 @@
-Nuttx-0.2.1
+nuttx-0.3.1
 ^^^^^^^^^^^
 
-This is the fourth relese of NuttX.  This release adds adds
-support for a new platform, restructures many header files,
-and adds a few new features:
+This is the 13th release of NuttX and the second release containing
+the integration of a network subsystem and the uIP TCP/IP, UDP, and
+ICMP stacks into NuttX (see http://www.sics.se/~adam/uip/index.php/Main_Page).
 
-(1) Support for Neuros OSD / DM320
-(2) Restructuring of header files for better POSIX compliance
-(3) Added kill()
-(4) Added POSIX timers
-(5) bugfixes and documentation updates
+Many network-related problems have been fixed and the implementation
+has matured significantly.  However, the level of network reliability
+is probably still at the pre-alpha or early level.  It is sufficiently
+complete that you may begin to perform some network integration and
+is exepcted to achieve beta level of reliability over the next few
+releases.
 
-This release has been verified on the Linux user-mode platform,
-the  Spectrum Digital TMS320C5471 EVM, and the Neuros OSD  using
-the test program under examples/ostest.  Because of the stability
-of these tests, the project status has been upgraded to 'beta.'
+The baseline functionality of NuttX continues to mature and remains at
+post-beta (as long as the network is not used).
 
-This tarball contains a complete CVS snapshot from March 22, 2007.
+See the ChangeLog for a complete list of changes.
+
+This release has been verified only on the Neuros OSD (DM320 ARM9)
+platform using the DM90x0 driver.
+
+This tarball contains a complete CVS snapshot from November 19, 2007.

TODO

@@ -1,59 +1,95 @@
 NuttX TODO List
 ^^^^^^^^^^^^^^^
 
-Task/Scheduler
-^^^^^^^^^^^^^^
-
+o Task/Scheduler
 - When a tasks exits, shouldn't all of its child pthreads also be terminated?
 - Should task_delete() cause atexit() function to be called?
 - Implement sys/mman.h and functions
 - Implement sys/wait.h and functions
 - Implement priority inheritance
-- Implement vfork().  Could be tricky because of stack references.
-- Make the system timer frequency configurable via defconfig.  See:
-   _POSIX_CLOCKRES_MIN in limits.h
-   CLK_TCK in time.h
-   Definitions in sched/clock_internal.h
+- Consider implementing wait, waitpid, waitid.  At present, a parent has
+  no information about child tasks.
+- Several APIs do not set errno.  Need to review all APIs.
 
 o Memory Managment
 - Add an option to free all memory allocated by a task when the task exits.
-  This may not be worth the overhead for a deeply embedded system.
+  This is probably not be worth the overhead for a deeply embedded system.
+- Current logic adapts size_t for 16-bit address machines vs. 32-bit address
+  machines.  But a small memory option should also be provided so that
+  the small offset option can be used with 32-bit machines that have small
+  RAM memories (like the lpc2148)
 
 o Signals
-- 'Standard' signals and signal actions are not supported.  Does this
-  make since in a deeply embedded system?
+- 'Standard' signals and signal actions are not supported.
 
 o pthreads
-- pthread_cancel():  Should implemenent cancellation points and pthread_testcancel()
+- pthread_cancel():  Should implement cancellation points and pthread_testcancel()
+
+o C++ Support
+- Need to call static constructors
+
+o Network
+- Did not implement send() and sendto() timeouts.  Option is setable via setsockopt,
+  but is not implemented.
+- netutils/telnetd (and maybe others) are seriously broken.
+  Need to be re-written to use listen() and accept()
+- Should implement SOCK_RAW
+- accept() and recvfrom() need to return connection address
+- Performance Improvements (uIP is not very fast):
+- Improve performance by stimulating the driver to accept new TX data before the
+  next polling interval.
+  Add a txail callback into driver to eliminate send delays.  Since we want to
+  support multiple network devices, this means we will have to add some infrastructure
+  to map to device.
+- uIP polling issues:
+  (1) Current logic will not support multiple ethernet drivers.  Each driver should
+      poll on TCP connections connect on the network supported by the driver; UDP
+      polling should respond with TX data only if the UDP packet is intended for the
+      the network supported by the driver.
+  (2) If there were multiple drivers, polling would occur at double the rate.i
+  Fix by using bound IP address in TCP connection (lipaddr) and verifying that it
+  is in the subnet served by the driver.
+- uIP/Socket callback logic is not thread safe. This means that a socket cannot be
+  used concurrently by two threads.  Minimal fix:  Add mutex to support exclusion.
+
+o USB
+- Implement USB device support
+- Implement USB bulk device
 
 o Libraries
+- sscanf() and lib_vsprintf() do not support floating point values.
+- The definition of environ in stdlib.h is bogus and will not work as it should.  This
+  is because the underlying representation of the environment is not an arry of pointers.
 
 o File system
-- This probabaly needs some rethinking.
-- Add some concept like mount points to handle mounted "real" filesystems.
-
-o Console Output
+- Add chmod(), truncate().
+- FAT32: long file names
 
 o Documentation
-- Document fs & driver logic
-- Document filesystem, library
+- Document fs/ & driver/ logic
+- Document C-library APIs
 
 o Build system
-- Something leaves garbage link 'include' in arch/*/include
-- Separate configurations from architectures.  arch/* contains
-  generic logic.  Like arch/armnommu, arch/arm, arch/805x, etc.
-  config/* has like config/pjrc-8052, config/c5471, etc.
+- Some names under arch are still incorrect.  These should be processor architecture
+  names:  pjrc-8051 should be 805x
+- configs/pjrc-8051 should be configs/pjrc-87c52
+- Dependencies do not work correctly under configs/<board>/src (same as arch/<arch>/src/board).
 
 o Applications & Tests
 
 o C5471
-- At present, there is a failure in the examples/ostest POSIX timer
-  test when CONFIG_DEBUG is enabled.  This is almost certainly yet
-  another case where printf (or its kin) are being called from a 
-  sensitive area in the OS.
+
+o DM320
+- It seems that when a lot of debug statements are added, the system no
+  longer boots.  There could be some issue with the bootloader or with
+  the programming of the SDRAM MMU regions.
+
+o LPC214x
+- Finish bringup
+- Add MMC and USB support
 
 o pjrc-8052 / MCS51
-* Current status:
+- Current status:
   - Basic OS task management seems OK
   - Fails when interrupts enabled.  The stack pointer is around 0x6e
     before the failure occurs.  It looks like some issue when the
@@ -70,5 +106,3 @@ o pjrc-8052 / MCS51
   pthread_create.c at 330
   sighand.c at 225 and 244
 
-o DM320
-- In progress

arch/README.txt

@@ -11,161 +11,65 @@ Table of Contents
 Architecture-Specific Code
 ^^^^^^^^^^^^^^^^^^^^^^^^^^
 
-The file include/nuttx/arch.h identifies all of the APIs that must
-be provided by the architecture specific logic.  (It also includes
+The NuttX configuration consists of:
+
+o Processor architecture specific files.  These are the files contained
+  in the arch/<arch-name>/ directory discussed in this README.
+
+o Chip/SoC specific files.  Each processor processor architecture
+  is embedded in chip or System-on-a-Chip (SoC) architecture.  The
+  full chip architecture includes the processor architecture plus
+  chip-specific interrupt logic, general purpose I/O (GIO) logic, and
+  specialized, internal peripherals (such as UARTs, USB, etc.).
+
+  These chip-specific files are contained within chip-specific
+  sub-directories in the arch/<arch-name>/ directory and are selected
+  via the CONFIG_ARCH_name selection
+
+o Board specific files.  In order to be usable, the chip must be
+  contained in a board environment.  The board configuration defines
+  additional properties of the board including such things as
+  peripheral LEDs, external peripherals (such as network, USB, etc.).
+
+  These board-specific configuration files can be found in the
+  configs/<board-name>/ sub-directories.
+
+This README will address the processor architecture specific files
+that are contained in the arch/<arch-name>/ directory. The file
+include/nuttx/arch.h identifies all of the APIs that must
+be provided by this architecture specific logic.  (It also includes
 arch/<arch-name>/arch.h as described below).
 
 Directory Structure
 ^^^^^^^^^^^^^^^^^^^
 
-The arch directory contains architecture specific logic.  Each architecture must
-provide a subdirectory <arch-name> under arch/ with the folling characteristics:
+The arch directory contains architecture specific logic.  The complete
+board port in is defined by the architecture-specific code in this
+directory (plus the board-specific configurations in the config/
+subdirectory).  Each architecture must provide a subdirectory <arch-name>
+under arch/ with the following characteristics:
 
 
-	<arch-name>
-	|-- Make.defs
-	|-- defconfig
-	|-- setenv.sh
-	|-- include
+	<arch-name>/
+	|-- include/
+	|   |--<chip-name>/
+	|   |  `-- (chip-specific header files)
+	|   |--<other-chips>/
 	|   |-- arch.h
 	|   |-- irq.h
 	|   `-- types.h
-	`-- src
+	`-- src/
+	    |--<chip-name>/
+	    |  `-- (chip-specific source files)
+	    |--<other-chips>/
 	    |-- Makefile
 	    `-- (architecture-specific source files)
 
 Summary of Files
 ^^^^^^^^^^^^^^^^
 
-Make.defs -- This makefile fragment provides architecture and
-  tool-specific build options.  It will be included by all other
-  makefiles in the build (once it is installed).  This make fragment
-  should define:
-
-	Tools: CC, LD, AR, NM, OBJCOPY, OBJDUMP
-	Tool options: CFLAGS, LDFLAGS
-
-  When this makefile fragment runs, it will be passed TOPDIR which
-  is the path to the root directory of the build.  This makefile
-  fragment may include ${TOPDIR}/.config to perform configuration
-  specific settings.  For example, the CFLAGS will most likely be
-  different if CONFIG_DEBUG=y.
-
-defconfig -- This is a configuration file similar to the Linux
-  configuration file.  In contains varialble/value pairs like:
-
-	CONFIG_VARIABLE=value
-
-  This configuration file will be used at build time:
-
-    (1) as a makefile fragment included in other makefiles, and
-    (2) to generate include/nuttx/config.h which is included by
-        most C files in the system.
-
-  The following variables are recognized by the build (you may
-  also include architecture-specific settings).
-
-	Architecture selection:
-
-		CONFIG_ARCH - identifies the arch subdirectory
-		CONFIG_ARCH_name - for use in C code
-
-	General OS setup
-
-		CONFIG_EXAMPLE - identifies the subdirectory in examples
-		  that will be used in the build
-		CONFIG_DEBUG - enables built-in debug options
-		CONFIG_DEBUG_VERBOSE - enables verbose debug output
-		CONFIG_HAVE_LOWPUTC - architecture supports low-level, boot
-		  time console output
-		CONFIG_MM_REGIONS - If the architecture includes multiple
-		  regions of memory to allocate from, this specifies the
-		  number of memory regions that the memory manager must
-		  handle and enables the API mm_addregion(start, end);
-		CONFIG_RR_INTERVAL - The round robin timeslice will be set
-		  this number of milliseconds;  Round robin scheduling can
-		  be disabled by setting this value to zero.
-		CONFIG_SCHED_INSTRUMENTATION - enables instrumentation in 
-		  scheduler to monitor system performance
-		CONFIG_TASK_NAME_SIZE - Spcifies that maximum size of a
-		  task name to save in the TCB.  Useful if scheduler
-		  instrumentation is selected.  Set to zero to disable.
-		CONFIG_START_YEAR, CONFIG_START_MONTH, CONFIG_START_DAY -
-		  Used to initialize the internal time logic.
-		CONFIG_JULIAN_TIME - Enables Julian time conversions
-		CONFIG_DEV_CONSOLE - Set if architecture-specific logic
-		  provides /dev/console.  Enables stdout, stderr, stdin.
-
-	The following can be used to disable categories of APIs supported
-	by the OS.  If the compiler supports weak functions, then it
-	should not be necessary to disable functions unless you want to
-	restrict usage of those APIs.
-
-	There are certain dependency relationships in these features.
-
-	o mq_notify logic depends on signals to awaken tasks
-	  waiting for queues to become full or empty.
-	o pthread_condtimedwait() depends on signals to wake
-	  up waiting tasks.
-
-		CONFIG_DISABLE_CLOCK, CONFIG_DISABLE_POSIX_TIMERS, CONFIG_DISABLE_PTHREAD.
-		CONFIG_DISABLE_SIGNALS, CONFIG_DISABLE_MQUEUE
-
-
-	Misc libc settings
-
-		CONFIG_NOPRINTF_FIELDWIDTH - sprintf-related logic is a
-		   little smaller if we do not support fieldwidthes
-
-	Allow for architecture optimized implementations
-
-		The architecture can provide optimized versions of the
-		following to improve sysem performance
-
-		CONFIG_ARCH_MEMCPY, CONFIG_ARCH_MEMCMP, CONFIG_ARCH_MEMMOVE
-		CONFIG_ARCH_MEMSET, CONFIG_ARCH_STRCMP, CONFIG_ARCH_STRCPY
-		CONFIG_ARCH_STRNCPY, CONFIG_ARCH_STRLEN, CONFIG_ARCH_BZERO
-		CONFIG_ARCH_KMALLOC, CONFIG_ARCH_KZMALLOC, CONFIG_ARCH_KFREE
-
-	Sizes of configurable things (0 disables)
-
-		CONFIG_MAX_TASKS - The maximum number of simultaneously
-		  active tasks.  This value must be a power of two.
-		CONFIG_NPTHREAD_KEYS - The number of items of thread-
-		  specific data that can be retained
-		CONFIG_NFILE_DESCRIPTORS - The maximum number of file
-		  descriptors (one for each open)
-		CONFIG_NFILE_STREAMS - The maximum number of streams that
-		  can be fopen'ed
-		CONFIG_NAME_MAX - The maximum size of a file name.
-		CONFIG_STDIO_BUFFER_SIZE - Size of the buffer to allocate
-		  on fopen. (Only if CONFIG_NFILE_STREAMS > 0)
-		CONFIG_NUNGET_CHARS - Number of characters that can be
-		  buffered by ungetc() (Only if CONFIG_NFILE_STREAMS > 0)
-		CONFIG_PREALLOC_MQ_MSGS - The number of pre-allocated message
-		  structures.  The system manages a pool of preallocated
-		  message structures to minimize dynamic allocations
-		CONFIG_MQ_MAXMSGSIZE - Message structures are allocated with
-		  a fixed payload size given by this settin (does not include
-		  other message structure overhead.
-		CONFIG_PREALLOC_WDOGS - The number of pre-allocated watchdog
-		  structures.  The system manages a pool of preallocated
-		  watchdog structures to minimize dynamic allocations
-
-	Stack and heap information
-
-		CONFIG_BOOT_FROM_FLASH - Some configurations support XIP
-		  operation from FLASH.
-		CONFIG_STACK_POINTER - The initial stack pointer
-		CONFIG_PROC_STACK_SIZE - The size of the initial stack
-		CONFIG_PTHREAD_STACK_MIN - Minimum pthread stack size
-		CONFIG_PTHREAD_STACK_DEFAULT - Default pthread stack size
-		CONFIG_HEAP_BASE - The beginning of the heap
-		CONFIG_HEAP_SIZE - The size of the heap
-
-setenv.sh -- This is a script that you can include that will be installed at
-  the toplevel of the directory structure and can be sourced to set any
-  necessary environment variables.
+include/<chip-name>/
+  This sub-directory contains chip-specific header files.
 
 include/arch.h
   This is a hook for any architecture specific definitions that may
@@ -206,6 +110,9 @@ include/irq.h
   This file must also define NR_IRQS, the total number of IRQs supported
   by the board.
 
+src/<chip-name>/
+  This sub-directory contains chip-specific source files.
+
 src/Makefile
   This makefile will be executed to build the targets src/libup.a and
   src/up_head.o.  The up_head.o file holds the entry point into the system
@@ -222,40 +129,47 @@ arch/sim
     This port does not support interrupts or a real timer (and hence no
     round robin scheduler)  Otherwise, it is complete.
 
-arch/c5471
-    TI TMS320C5471 (also called TMS320DM180 or just C5471).
-    NuttX operates on the ARM7 of this dual core processor. This port
-    uses the Spectrum Digital evaluation board with a GNU arm-elf toolchain*.
-    This port is complete, verified, and included in the NuttX release.
+arch/arm
+    This directory holds common ARM architectures.  At present, this includes
+    the following subdirectories:
 
-arch/dm320
-    TI TMS320DM320 (also called just DM320).
-    NuttX operates on the ARM9EJS of this dual core processor.
-    This port uses the Neuros OSD with a GNU arm-elf toolchain*:
-    see http://wiki.neurostechnology.com/index.php/Developer_Welcome .
-    STATUS: This port is code complete but totally untested due to
-    hardware issues with my OSD.
+    arch/arm/include and arch/arm/common
+        Common ARM logic.
+
+    arch/arm/include/c5471 and arch/arm/src/c5471
+        TI TMS320C5471 (also called TMS320DM180 or just C5471).
+        NuttX operates on the ARM7 of this dual core processor. This port
+        complete, verified, and included in the NuttX release 0.1.1.
+
+    arch/arm/include/dm320 and arch/arm/src/dm320
+        TI TMS320DM320 (also called just DM320).
+        NuttX operates on the ARM9EJS of this dual core processor.  This port
+        complete, verified, and included in the NuttX release 0.2.1.
+
+    arch/arm/include/lpc214x and arch/arm/src/lpc214x
+        These directories provide support for NXP LPC214x family of
+        processors.
+        STATUS: This port is in progress and should be available in the
+        nuttx-0.2.5 release.
+
+arch/m68322
+    A work in progress.
+    STATUS:  Stalled for the moment.
 
 arch/pjrc-8051
-    8051 Microcontroller.  This port uses the PJRC 87C52 development system
-    and the SDCC toolchain.   This port is not quite ready for prime time.
+    8051 Microcontroller.  This port is not quite ready for prime time.
+
+The following architecture directories are deprecated.  They have been
+replaced by the logic in arm/arm and will deleted when arch/arm is fully
+verified.
+
+arch/c5471
+    Replaced with arch/arm/include/c5471 and arch/arm/src/c5471
+
+arch/dm320
+    Replaced with arch/arm/include/dm320 and arch/arm/src/dm320
 
 Other ports for the for the TI TMS320DM270 and for MIPS are in various states
 of progress
 
-Configuring NuttX
-^^^^^^^^^^^^^^^^^
-
-Configuring NuttX requires only copying
-
-  arch/<arch-name>/Make.def to ${TOPDIR}/Make.defs
-  arch/<arch-name>/setenv.sh to ${TOPDIR}/setenv.sh
-  arch/<arch-name>/defconfig to ${TOPDIR}/.config
-
-There is a script that automates these steps.  The following steps will
-accomplish the same configuration:
-
-  cd tools
-  ./configure.sh <arch-name>
-
 

arch/arm/include/arch.h

@@ -1,5 +1,5 @@
 /************************************************************
- * os_external.h
+ * arch/arch.h
  *
  *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
@@ -33,28 +33,35 @@
  *
  ************************************************************/
 
-#ifndef __OS_EXTERNAL_H
-#define __OS_EXTERNAL_H
+/* This file should never be included directed but, rather,
+ * only indirectly through nuttx/arch.h
+ */
+
+#ifndef __ARCH_ARCH_H
+#define __ARCH_ARCH_H
 
 /************************************************************
  * Included Files
  ************************************************************/
 
-#include <nuttx/config.h>
-#include <pthread.h>
-#include <sched.h>
-#include <nuttx/compiler.h>
-
 /************************************************************
  * Definitions
  ************************************************************/
 
 /************************************************************
- * Global Function Prototypes
+ * Inline functions
  ************************************************************/
 
 /************************************************************
- * Global Function Prototypes
+ * Public Types
+ ************************************************************/
+
+/************************************************************
+ * Public Variables
+ ************************************************************/
+
+/************************************************************
+ * Public Function Prototypes
  ************************************************************/
 
 #ifdef __cplusplus
@@ -64,28 +71,10 @@ extern "C" {
 #define EXTERN extern
 #endif
 
-/* These are functions that must be supplied by the application */
-
-EXTERN void   weak_function user_initialize(void);
-EXTERN int    user_start(int argc, char *argv[]);
-
-/* Functions contained in os_task.c *************************/
-
-EXTERN void   os_start(void); /* OS entry point called by boot logic */
-
-/* Functions contained in mm_initialize.c *******************/
-
-EXTERN void   mm_initialize(FAR void *heap_start, size_t heap_size);
-EXTERN void   mm_addregion(FAR void *heapstart, size_t heapsize);
-
-/* Functions contained in mm_sem.c **************************/
-
-EXTERN int mm_trysemaphore(void);
-EXTERN void mm_givesemaphore(void);
-
 #undef EXTERN
 #ifdef __cplusplus
 }
 #endif
 
-#endif /* __OS_EXTERNAL_H */
+#endif /* __ARCH_ARCH_H */
+

arch/arm/include/c5471/irq.h

@@ -0,0 +1,105 @@
+/************************************************************
+ * arch/c5471/irq.h
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+/* This file should never be included directed but, rather,
+ * only indirectly through nuttx/irq.h
+ */
+
+#ifndef __ARCH_C5471_IRQ_H
+#define __ARCH_C5471_IRQ_H
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+/************************************************************
+ * Definitions
+ ************************************************************/
+
+/* C5471 Interrupts */
+
+#define C5471_IRQ_TIMER0         0
+#define C5471_IRQ_TIMER1         1
+#define C5471_IRQ_TIMER2         2
+#define C5471_IRQ_GPIO0          3
+#define C5471_IRQ_ETHER          4
+#define C5471_IRQ_KBGPIO_0_7     5
+#define C5471_IRQ_UART           6
+#define C5471_IRQ_UART_IRDA      7
+#define C5471_IRQ_KBGPIO_8_15    8
+#define C5471_IRQ_GPIO3          9
+#define C5471_IRQ_GPIO2         10
+#define C5471_IRQ_I2C           11
+#define C5471_IRQ_GPIO1         12
+#define C5471_IRQ_SPI           13
+#define C5471_IRQ_GPIO_4_19     14
+#define C5471_IRQ_API           15
+
+#define C5471_IRQ_WATCHDOG      C5471_IRQ_TIMER0
+#define C5471_IRQ_SYSTIMER      C5471_IRQ_TIMER2
+#define NR_IRQS                 (C5471_IRQ_API+1)
+
+/************************************************************
+ * Public Types
+ ************************************************************/
+
+/************************************************************
+ * Inline functions
+ ************************************************************/
+
+/************************************************************
+ * Public Variables
+ ************************************************************/
+
+/************************************************************
+ * Public Function Prototypes
+ ************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif /* __ARCH_C5471_IRQ_H */
+

arch/arm/include/dm320/irq.h

@@ -0,0 +1,134 @@
+/************************************************************
+ * arch/dm320/irq.h
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+/* This file should never be included directed but, rather,
+ * only indirectly through nuttx/irq.h
+ */
+
+#ifndef __ARCH_DM320_IRQ_H
+#define __ARCH_DM320_IRQ_H
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+/************************************************************
+ * Definitions
+ ************************************************************/
+
+/* DM320 Interrupts */
+
+#define DM320_IRQ_TMR0      0 /* IRQ0:  Timer 0 Interrupt */
+#define DM320_IRQ_TMR1      1 /* IRQ1:  Timer 1 Interrupt */
+#define DM320_IRQ_TMR2      2 /* IRQ2:  Timer 2 Interrupt (CCD timer 0) */
+#define DM320_IRQ_TMR3      3 /* IRQ3:  Timer 3 Interrupt (CCD timer 1) */
+#define DM320_IRQ_CCDVD0    4 /* IRQ4:  CCD VD Interrupt #0 */
+#define DM320_IRQ_CCDVD1    5 /* IRQ5:  CCD VD Interrupt #1 */
+#define DM320_IRQ_CCDWEN    6 /* IRQ6:  CCD WEN Interrupt */
+#define DM320_IRQ_VENC      7 /* IRQ7:  Video Encoder Interrupt */
+#define DM320_IRQ_SP0       8 /* IRQ8:  Serial Port 0 Interrupt (with DMA) */
+#define DM320_IRQ_SP1       9 /* IRQ9:  Serial Port 1 Interrupt */
+#define DM320_IRQ_EXTHOST  10 /* IRQ10: External host interrupt */
+#define DM320_IRQ_IMGBUF   11 /* IRQ11: Image Buffer */
+#define DM320_IRQ_UART0    12 /* IRQ12: UART0 Interrupt */
+#define DM320_IRQ_UART1    13 /* IRQ13: UART1 Interrupt */
+#define DM320_IRQ_USB0     14 /* IRQ14: USB 0 Interrupt (DMA) */
+#define DM320_IRQ_USB1     15 /* IRQ15: USB 1 Interrupt (Core) */
+#define DM320_IRQ_VLYNQ    16 /* IRQ16: VLYNQ Interrupt */
+#define DM320_IRQ_MTC0     17 /* IRQ17: Memory Traffic Controller 0 (DMA) */
+#define DM320_IRQ_MTC1     18 /* IRQ18: Memory Traffic Controller 1 (CFC_RDY) */
+#define DM320_IRQ_MMCSD0   19 /* IRQ19: MMC/SD or MS 0 Interrupt */
+#define DM320_IRQ_MMCSD1   20 /* IRQ20: MMC/SD or MS 1 Interrupt */
+#define DM320_IRQ_EXT0     21 /* IRQ21: External Interrupt #0 (GIO0) */
+#define DM320_IRQ_EXT1     22 /* IRQ22: External Interrupt #1 (GIO1) */
+#define DM320_IRQ_EXT2     23 /* IRQ23: External Interrupt #2 (GIO2) */
+#define DM320_IRQ_EXT3     24 /* IRQ24: External Interrupt #3 (GIO3) */
+#define DM320_IRQ_EXT4     25 /* IRQ25: External Interrupt #4 (GIO4) */
+#define DM320_IRQ_EXT5     26 /* IRQ26: External Interrupt #5 (GIO5) */
+#define DM320_IRQ_EXT6     27 /* IRQ27: External Interrupt #6 (GIO6) */
+#define DM320_IRQ_EXT7     28 /* IRQ28: External Interrupt #7 (GIO7) */
+#define DM320_IRQ_EXT8     29 /* IRQ29: External Interrupt #8 (GIO8) */
+#define DM320_IRQ_EXT9     30 /* IRQ30: External Interrupt #9 (GIO9) */
+#define DM320_IRQ_EXT10    31 /* IRQ31: External Interrupt #10 (GIO10) */
+#define DM320_IRQ_EXT11    32 /* IRQ32: External Interrupt #11 (GIO11) */
+#define DM320_IRQ_EXT12    33 /* IRQ33: External Interrupt #12 (GIO12) */
+#define DM320_IRQ_EXT13    34 /* IRQ34: External Interrupt #13 (GIO13) */
+#define DM320_IRQ_EXT14    35 /* IRQ35: External Interrupt #14 (GIO14) */
+#define DM320_IRQ_EXT15    36 /* IRQ36: External Interrupt #15 (GIO15) */
+#define DM320_IRQ_PREV0    37 /* IRQ37: Preview Engine 0 (Preview Over) */
+#define DM320_IRQ_PREV1    38 /* IRQ38: Preview Engine 1 (Preview Historgram Over) */
+#define DM320_IRQ_WDT      39 /* IRQ39: Watchdog Timer Interrupt */
+#define DM320_IRQ_I2C      40 /* IRQ40: I2C Interrupt */
+#define DM320_IRQ_CLKC     41 /* IRQ41: Clock controller Interrupt (wake up) */
+#define DM320_IRQ_E2ICE    42 /* IRQ42: Embedded ICE Interrupt */
+#define DM320_IRQ_ARMCOMRX 43 /* IRQ43: ARMCOMM Receive Interrupt */
+#define DM320_IRQ_ARMCOMTX 44 /* IRQ44: ARMCOMM Transmit Interrupt */
+#define DM320_IRQ_RSV      45 /* IRQ45: Reserved Interrupt */
+
+#define DM320_IRQ_SYSTIMER DM320_IRQ_TMR0
+#define NR_IRQS            (DM320_IRQ_RSV+1)
+
+/************************************************************
+ * Public Types
+ ************************************************************/
+
+/************************************************************
+ * Inline functions
+ ************************************************************/
+
+/************************************************************
+ * Public Variables
+ ************************************************************/
+
+/************************************************************
+ * Public Function Prototypes
+ ************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif /* __ARCH_DM320_IRQ_H */
+

arch/arm/include/irq.h

@@ -0,0 +1,227 @@
+/************************************************************
+ * arch/irq.h
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+/* This file should never be included directed but, rather,
+ * only indirectly through nuttx/irq.h
+ */
+
+#ifndef __ARCH_IRQ_H
+#define __ARCH_IRQ_H
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+#include <nuttx/irq.h>
+#include <arch/chip/irq.h>
+
+/************************************************************
+ * Definitions
+ ************************************************************/
+
+/* IRQ Stack Frame Format:
+ *
+ * Context is always saved/restored in the same way:
+ *
+ *   (1) stmia rx, {r0-r14}
+ *   (2) then the PC and CPSR
+ *
+ * This results in the following set of indices that
+ * can be used to access individual registers in the
+ * xcp.regs array:
+ */
+
+#define REG_R0              (0)
+#define REG_R1              (1)
+#define REG_R2              (2)
+#define REG_R3              (3)
+#define REG_R4              (4)
+#define REG_R5              (5)
+#define REG_R6              (6)
+#define REG_R7              (7)
+#define REG_R8              (8)
+#define REG_R9              (9)
+#define REG_R10             (10)
+#define REG_R11             (11)
+#define REG_R12             (12)
+#define REG_R13             (13)
+#define REG_R14             (14)
+#define REG_R15             (15)
+#define REG_CPSR            (16)
+
+#define XCPTCONTEXT_REGS    (17)
+#define XCPTCONTEXT_SIZE    (4 * XCPTCONTEXT_REGS)
+
+#define REG_A1              REG_R0
+#define REG_A2              REG_R1
+#define REG_A3              REG_R2
+#define REG_A4              REG_R3
+#define REG_V1              REG_R4
+#define REG_V2              REG_R5
+#define REG_V3              REG_R6
+#define REG_V4              REG_R7
+#define REG_V5              REG_R8
+#define REG_V6              REG_R9
+#define REG_V7              REG_R10
+#define REG_SB              REG_R9
+#define REG_SL              REG_R10
+#define REG_FP              REG_R11
+#define REG_IP              REG_R12
+#define REG_SP              REG_R13
+#define REG_LR              REG_R14
+#define REG_PC              REG_R15
+
+/************************************************************
+ * Public Types
+ ************************************************************/
+
+/* This struct defines the way the registers are stored.  We
+ * need to save:
+ *
+ *  1	CPSR
+ *  7	Static registers, v1-v7 (aka r4-r10)
+ *  1	Frame pointer, fp (aka r11)
+ *  1	Stack pointer, sp (aka r13)
+ *  1	Return address, lr (aka r14)
+ * ---
+ * 11	(XCPTCONTEXT_USER_REG)
+ *
+ * On interrupts, we also need to save:
+ *  4	Volatile registers, a1-a4 (aka r0-r3)
+ *  1	Scratch Register, ip (aka r12)
+ *---
+ *  5	(XCPTCONTEXT_IRQ_REGS)
+ *
+ * For a total of 17 (XCPTCONTEXT_REGS)
+ */
+
+#ifndef __ASSEMBLY__
+struct xcptcontext
+{
+  /* The following function pointer is non-zero if there
+   * are pending signals to be processed.
+   */
+
+  void *sigdeliver; /* Actual type is sig_deliver_t */
+
+  /* These are saved copies of LR and CPSR used during
+   * signal processing.
+   */
+
+  uint32 saved_pc;
+  uint32 saved_cpsr;
+
+  /* Register save area */
+
+  uint32 regs[XCPTCONTEXT_REGS];
+};
+#endif
+
+/************************************************************
+ * Inline functions
+ ************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/* Save the current interrupt enable state & disable IRQs */
+
+static inline irqstate_t irqsave(void)
+{
+  unsigned int flags;
+  unsigned int temp;
+  __asm__ __volatile__
+    (
+     "\tmrs    %0, cpsr\n"
+     "\torr    %1, %0, #128\n"
+     "\tmsr    cpsr_c, %1"
+     : "=r" (flags), "=r" (temp)
+     :
+     : "memory");
+  return flags;
+}
+
+/* Restore saved IRQ & FIQ state */
+
+static inline void irqrestore(irqstate_t flags)
+{
+  __asm__ __volatile__
+    (
+     "msr    cpsr_c, %0"
+     :
+     : "r" (flags)
+     : "memory");
+}
+
+static inline void system_call(swint_t func, int parm1,
+			       int parm2, int parm3)
+{
+  __asm__ __volatile__
+    (
+     "mov\tr0,%0\n\t"
+     "mov\tr1,%1\n\t"
+     "mov\tr2,%2\n\t"
+     "mov\tr3,%3\n\t"
+     "swi\t0x900001\n\t"
+     :
+     : "r" ((long)(func)),  "r" ((long)(parm1)),
+       "r" ((long)(parm2)), "r" ((long)(parm3))
+     : "r0", "r1", "r2", "r3", "lr");
+}
+#endif
+
+/************************************************************
+ * Public Variables
+ ************************************************************/
+
+/************************************************************
+ * Public Function Prototypes
+ ************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif /* __ARCH_IRQ_H */
+

arch/arm/include/limits.h

@@ -0,0 +1,75 @@
+/************************************************************
+ * limits.h
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+#ifndef __ARCH_LIMITS_H
+#define __ARCH_LIMITS_H
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+/************************************************************
+ * Definitions
+ ************************************************************/
+
+#define CHAR_BIT        8
+#define SCHAR_MIN	0x80
+#define SCHAR_MAX	0x7f
+#define UCHAR_MAX	0xff
+
+/* These could be different on machines where char is unsigned */
+
+#define CHAR_MIN	SCHAR_MIN
+#define CHAR_MAX	SCHAR_MAX
+
+#define SHRT_MIN	0x8000
+#define SHRT_MAX	0x7fff
+#define USHRT_MAX	0xffff
+
+#define INT_MIN         0x80000000
+#define INT_MAX         0x7fffffff
+#define UINT_MAX	0xffffffff
+
+/* These change on 32-bit and 64-bit platforms */
+
+#define LONG_MAX	0x80000000
+#define LONG_MIN	0x7fffffff
+#define ULONG_MAX	0xffffffff
+
+#define LLONG_MAX	0x8000000000000000
+#define LLONG_MIN	0x7fffffffffffffff
+#define ULLONG_MAX	0xffffffffffffffff
+
+#endif /* __ARCH_LIMITS_H */

arch/arm/include/lpc214x/irq.h

@@ -0,0 +1,126 @@
+/****************************************************************************
+ * arch/lpc214x/irq.h
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/* This file should never be included directed but, rather,
+ * only indirectly through nuttx/irq.h
+ */
+
+#ifndef __ARCH_LPC214X_IRQ_H
+#define __ARCH_LPC214X_IRQ_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/* LPC214X Interrupts */
+
+#define LPC214X_WDT_IRQ        0 /* Watchdog */
+#define LPC214X_RESERVED_IRQ   1 /* SWI only */
+#define LPC214X_DBGCOMMRX_IRQ  2 /* Embedded debug */
+#define LPC214X_DBGCOMMTX_IRQ  3 /* Embedded debug */
+#define LPC214X_TIMER0_IRQ     4 /* Timer 0 */
+#define LPC214X_TIMER1_IRQ     5 /* Timer 1 */
+#define LPC214X_UART0_IRQ      6 /* UART 0 */
+#define LPC214X_UART1_IRQ      7 /* UART 1 */
+#define LPC214X_PWM0_IRQ       8 /* PWM 0 */
+#define LPC214X_I2C0_IRQ       9 /* I2C 0 */
+#define LPC214X_SPI0_IRQ      10 /* SPI 0 */
+#define LPC214X_SPI1_IRQ      11 /* SPI 1 */
+#define LPC214X_PLL_IRQ       12 /* PLL Lock IRQ */
+#define LPC214X_RTC_IRQ       13 /* Real Time Clock */
+#define LPC214X_EINT0_IRQ     14 /* External interrupt 0 */
+#define LPC214X_EINT1_IRQ     15 /* External interrupt 1 */
+#define LPC214X_EINT2_IRQ     16 /* External interrupt 2 */
+#define LPC214X_EINT3_IRQ     17 /* External interrupt 3 */
+#define LPC214X_ADC0_IRQ      18 /* ADC 0 */
+#define LPC214X_I2C1_IRQ      19 /* I2C 1 */
+#define LPC214X_BOD_IRQ       20 /* Brown Out Detect */
+#define LPC214X_ADC1_IRQ      21 /* ADC 1 */
+#define LPC214X_USB_IRQ       22 /* USB */
+
+#define LPC214X_IRQ_SYSTIMER  LPC214X_TIMER0_IRQ
+#define NR_IRQS               23
+
+/* There are 16 vectored interrupts.  If vectored interrupts are enabled, the
+ * following will be used by the system.
+ */
+
+#define LPC214X_SYSTEMER_VEC  0 /* System timer */
+
+/****************************************************************************
+ * Public Types
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+typedef void (*vic_vector_t)(uint32 *regs);
+#endif
+
+/****************************************************************************
+ * Inline functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Variables
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+#ifndef __ASSEMBLY__
+#ifdef __cplusplus
+#define EXTERN extern "C"
+extern "C" {
+#else
+#define EXTERN extern
+#endif
+
+#ifndef CONFIG_VECTORED_INTERRUPTS
+EXTERN void up_attach_vector(int irq, int vector, vic_vector_t handler);
+EXTERN void up_detach_vector(int vector);
+#endif
+
+#undef EXTERN
+#ifdef __cplusplus
+}
+#endif
+#endif
+
+#endif /* __ARCH_LPC214X_IRQ_H */
+

arch/arm/include/serial.h

@@ -0,0 +1,61 @@
+/************************************************************
+ * arch/serial.h
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+#ifndef __ARCH_SERIAL_H
+#define __ARCH_SERIAL_H
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+/************************************************************
+ * Definitions
+ ************************************************************/
+
+/* IOCTL commands supported by the ARM serial driver */
+
+#define TIOCSBRK        0x5401  /* BSD compatibility */
+#define TIOCCBRK        0x5402  /* " " "           " */
+#define TIOCSERGSTRUCT  0x5403  /* Get up_dev_t for port */
+
+/************************************************************
+ * Public Data
+ ************************************************************/
+
+/************************************************************
+ * Public Functions
+ ************************************************************/
+
+#endif /* __ARCH_SERIAL_H */

arch/arm/include/types.h

@@ -0,0 +1,82 @@
+/************************************************************
+ * arch/types.h
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+/* This file should never be included directed but, rather,
+ * only indirectly through sys/types.h
+ */
+
+#ifndef __ARCH_TYPES_H
+#define __ARCH_TYPES_H
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+/************************************************************
+ * Definitions
+ ************************************************************/
+
+/************************************************************
+ * Type Declarations
+ ************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/* These are the sizes of the standard GNU types */
+
+typedef char sbyte;
+typedef unsigned char ubyte;
+typedef unsigned char uint8;
+typedef unsigned char boolean;
+typedef short sint16;
+typedef unsigned short uint16;
+typedef int sint32;
+typedef unsigned int uint32;
+typedef long long sint64;
+typedef unsigned long long uint64;
+
+/* This is the size of the interrupt state save returned by
+ * irqsave()
+ */
+
+typedef unsigned int irqstate_t;
+
+#endif /* __ASSEMBLY__ */
+
+/************************************************************
+ * Global Function Prototypes
+ ************************************************************/
+
+#endif /* __ARCH_TYPES_H */

arch/arm/include/watchdog.h

@@ -0,0 +1,63 @@
+/************************************************************
+ * watchdog.h
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+#ifndef __ARCH_WATCHDOG_H
+#define __ARCH_WATCHDOG_H
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+/************************************************************
+ * Definitions
+ ************************************************************/
+
+/* IOCTL commands supported by the C5471 watchdog driver */
+
+#define WDIOC_KEEPALIVE 0x5701  /* Restart the watchdog timer */
+
+/************************************************************
+ * Private Data
+ ************************************************************/
+
+/************************************************************
+ * Private Functions
+ ************************************************************/
+
+/************************************************************
+ * Public Functions
+ ************************************************************/
+
+#endif /* __ARCH_WATCHDOG_H */

arch/arm/src/Makefile

@@ -0,0 +1,124 @@
+############################################################################
+# Makefile
+#
+#   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name Gregory Nutt nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+-include $(TOPDIR)/Make.defs
+-include chip/Make.defs
+
+MKDEP 		= $(TOPDIR)/tools/mkdeps.sh
+ARCH_SRCDIR	= $(TOPDIR)/arch/$(CONFIG_ARCH)/src
+CFLAGS		+= -I$(ARCH_SRCDIR)/chip -I$(ARCH_SRCDIR)/common -I$(TOPDIR)/sched
+
+HEAD_AOBJ	= $(HEAD_ASRC:.S=$(OBJEXT))
+
+ASRCS		= $(CHIP_ASRCS) $(CMN_ASRCS)
+AOBJS		= $(ASRCS:.S=$(OBJEXT))
+
+CSRCS		= $(CHIP_CSRCS) $(CMN_CSRCS)
+COBJS		= $(CSRCS:.c=$(OBJEXT))
+
+SRCS		= $(ASRCS) $(CSRCS)
+OBJS		= $(AOBJS) $(COBJS)
+
+LDFLAGS		= $(ARCHSCRIPT)
+EXTRA_LIBS	=
+
+LINKLIBS	=
+LDPATHES	= $(addprefix -L$(TOPDIR)/,$(dir $(LINKLIBS)))
+LDLIBS		= $(patsubst lib%,-l%,$(basename $(notdir $(LINKLIBS))))
+
+BOARDDIR	= $(TOPDIR)/arch/$(CONFIG_ARCH)/src/board
+
+LIBGCC		= ${shell $(CC) -print-libgcc-file-name}
+
+VPATH		= chip:common
+
+all: $(HEAD_OBJ) libarch$(LIBEXT)
+
+$(AOBJS) $(HEAD_AOBJ): %$(OBJEXT): %.S
+	$(CC) -c $(CFLAGS) -D__ASSEMBLY__ $< -o $@
+
+$(COBJS): %$(OBJEXT): %.c
+	$(CC) -c $(CFLAGS) $< -o $@
+
+libarch$(LIBEXT): $(OBJS)
+	@( for obj in $(OBJS) ; do \
+		$(AR) $@ $${obj} || \
+			{ echo "$(AR) $@ $obj FAILED!" ; exit 1 ; } ; \
+	done ; )
+
+board/libboard$(LIBEXT):
+	$(MAKE) -C board TOPDIR=$(TOPDIR) libboard$(LIBEXT)
+
+nuttx: $(HEAD_AOBJ) board/libboard$(LIBEXT)
+	$(LD) --entry=__start $(LDFLAGS) $(LDPATHES) -L$(BOARDDIR) -o $(TOPDIR)/$@ $(HEAD_AOBJ) \
+		--start-group $(LDLIBS) -lboard --end-group $(EXTRA_LIBS) $(LIBGCC) 
+	@$(NM) $(TOPDIR)/$@ | \
+	grep -v '\(compiled\)\|\(\$(OBJEXT)$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
+	sort > $(TOPDIR)/System.map
+	@export vflashstart=`$(OBJDUMP) --all-headers $(TOPDIR)/$@ | grep _vflashstart | cut -d' ' -f1`;  \
+	if [ ! -z "$$vflashstart" ]; then \
+		$(OBJCOPY) --adjust-section-vma=.vector=0x$$vflashstart $(TOPDIR)/$@ $(TOPDIR)/$@.flashimage; \
+		mv $(TOPDIR)/$@.flashimage $(TOPDIR)/$@; \
+	fi
+ifeq ($(CONFIG_RRLOAD_BINARY),y)
+	@$(TOPDIR)/tools/mkimage.sh --Prefix $(CROSSDEV) $(TOPDIR)/$@ $(TOPDIR)/$@.rr
+	@if [ -w /tftpboot ] ; then \
+		cp -f $(TOPDIR)/$@.rr /tftpboot/$@.rr.${CONFIG_ARCH}; \
+	fi
+endif
+
+.depend: Makefile chip/Make.defs $(SRCS)
+	@if [ -e board/Makefile ]; then \
+		$(MAKE) -C board TOPDIR=$(TOPDIR) depend ; \
+	fi
+	$(MKDEP) --dep-path chip --dep-path common $(CC) -- $(CFLAGS) -- $(SRCS) >Make.dep
+	@touch $@
+
+depend: .depend
+
+clean:
+	@if [ -e board/Makefile ]; then \
+		$(MAKE) -C board TOPDIR=$(TOPDIR) clean ; \
+	fi
+	@rm -f libarch$(LIBEXT) *~
+	@if [ ! -z "$(OBJEXT)" ]; then rm -f *$(OBJEXT); fi
+
+distclean: clean
+	@if [ -e board/Makefile ]; then \
+		$(MAKE) -C board TOPDIR=$(TOPDIR) distclean ; \
+	fi
+	@rm -f Make.dep .depend
+
+-include Make.dep

arch/arm/src/c5471/Make.defs

@@ -0,0 +1,48 @@
+############################################################################
+# c5471/Make.defs
+#
+#   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+#   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# 1. Redistributions of source code must retain the above copyright
+#    notice, this list of conditions and the following disclaimer.
+# 2. Redistributions in binary form must reproduce the above copyright
+#    notice, this list of conditions and the following disclaimer in
+#    the documentation and/or other materials provided with the
+#    distribution.
+# 3. Neither the name Gregory Nutt nor the names of its contributors may be
+#    used to endorse or promote products derived from this software
+#    without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+# POSSIBILITY OF SUCH DAMAGE.
+#
+############################################################################
+
+HEAD_ASRC	= up_nommuhead.S
+
+CMN_ASRCS	= up_saveusercontext.S up_fullcontextrestore.S
+CMN_CSRCS	= up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c \
+		  up_createstack.c up_dataabort.c up_mdelay.c up_udealy.c up_doirq.c \
+		  up_exit.c up_idle.c up_initialize.c up_initialstate.c \
+		  up_interruptcontext.c up_prefetchabort.c up_releasepending.c \
+		  up_releasestack.c up_reprioritizertr.c up_schedulesigaction.c \
+		  up_sigdeliver.c up_syscall.c up_unblocktask.c \
+		  up_undefinedinsn.c up_usestack.c
+
+CHIP_ASRCS	= c5471_lowputc.S c5471_vectors.S
+CHIP_CSRCS	= c5471_irq.c c5471_serial.c c5471_timerisr.c c5471_watchdog.c

arch/arm/src/c5471/c5471_irq.c

@@ -0,0 +1,242 @@
+/************************************************************
+ * c5471/c5471_irq.c
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include <nuttx/irq.h>
+#include "up_arch.h"
+#include "os_internal.h"
+#include "up_internal.h"
+
+/************************************************************
+ * Definitions
+ ************************************************************/
+
+#define ILR_EDGESENSITIVE 0x00000020
+#define ILR_PRIORITY      0x0000001E
+
+/************************************************************
+ * Public Data
+ ************************************************************/
+
+uint32 *current_regs;
+
+/************************************************************
+ * Private Data
+ ************************************************************/
+
+/* The value of _vflashstart is defined in ld.script.  It
+ * could be hard-coded because we know that correct IRAM
+ * area is 0xffc00000.
+ */
+
+extern int _svectors; /* Type does not matter */
+
+/* The C5471 has FLASH at the low end of memory.  The
+ * rrload bootloaer will catch all interrupts and re-vector
+ * them to vectors stored in IRAM.  The following table is
+ * used to initialize those vectors.
+ */
+
+static up_vector_t g_vectorinittab[] =
+{
+  (up_vector_t)NULL,
+  up_vectorundefinsn,
+  up_vectorswi,
+  up_vectorprefetch,
+  up_vectordata,
+  up_vectoraddrexcptn,
+  up_vectorirq,
+  up_vectorfiq
+};
+#define NVECTORS ((sizeof(g_vectorinittab)) / sizeof(up_vector_t))
+
+/************************************************************
+ * Private Functions
+ ************************************************************/
+
+/************************************************************
+ * Name: up_ackirq
+ *
+ * Description:
+ *   Acknowlede the IRQ.Bit 0 of the Interrupt Control
+ *   Register ==  New IRQ agreement (NEW_IRQ_AGR). Reset IRQ
+ *   output. Clear source IRQ register. Enables a new IRQ
+ *   generation. Reset by internal logic.
+ *
+ ************************************************************/
+
+static inline void up_ackirq(unsigned int irq)
+{
+  uint32 reg;
+  reg = getreg32(SRC_IRQ_REG);              /* Insure appropriate IT_REG bit clears */
+  putreg32(reg | 0x00000001, INT_CTRL_REG); /* write the NEW_IRQ_AGR bit. */
+}
+
+/************************************************************
+ * Name: up_ackfiq
+ *
+ * Description:
+ *   Acknowledge the FIQ.  Bit 1 of the Interrupt Control
+ *   Register ==  New FIQ agreement (NEW_FIQ_AGR). Reset FIQ
+ *   output. Clear source FIQ register. Enables a new FIQ
+ *   generation. Reset by internal logic.
+ *
+ ************************************************************/
+
+static inline void up_ackfiq(unsigned int irq)
+{
+  uint32 reg;
+  reg = getreg32(SRC_FIQ_REG);              /* Insure appropriate IT_REG bit clears */
+  putreg32(reg | 0x00000002, INT_CTRL_REG); /* write the NEW_FIQ_AGR bit. */
+}
+
+/************************************************************
+ * Name: up_vectorinitialize
+ ************************************************************/
+
+static inline void up_vectorinitialize(void)
+{
+  up_vector_t *src  = g_vectorinittab;
+  up_vector_t *dest = (up_vector_t*)&_svectors;
+  int i;
+
+  for (i = 0; i < NVECTORS; i++)
+    {
+      *dest++ = *src++;
+    }
+}
+
+/************************************************************
+ * Public Funtions
+ ************************************************************/
+
+/************************************************************
+ * Name: up_irqinitialize
+ ************************************************************/
+
+void up_irqinitialize(void)
+{
+  /* Disable all interrupts. */
+
+  putreg32(0x0000ffff, MASK_IT_REG);
+
+  /* Clear any pending interrupts */
+
+  up_ackirq(0);
+  up_ackfiq(0);
+  putreg32(0x00000000, IT_REG);
+
+  /* Override hardware defaults */
+
+  putreg32(ILR_EDGESENSITIVE | ILR_PRIORITY, ILR_IRQ2_REG);
+  putreg32(ILR_EDGESENSITIVE | ILR_PRIORITY, ILR_IRQ4_REG);
+  putreg32(ILR_PRIORITY,                     ILR_IRQ6_REG);
+  putreg32(ILR_EDGESENSITIVE | ILR_PRIORITY, ILR_IRQ15_REG);
+
+  /* Initialize hardware interrupt vectors */
+
+  up_vectorinitialize();
+  current_regs = NULL;
+
+  /* And finally, enable interrupts */
+
+#ifndef CONFIG_SUPPRESS_INTERRUPTS
+  irqrestore(SVC_MODE | PSR_F_BIT);
+#endif
+}
+
+/************************************************************
+ * Name: up_disable_irq
+ *
+ * Description:
+ *   Disable the IRQ specified by 'irq'
+ *
+ ************************************************************/
+
+void up_disable_irq(int irq)
+{
+  if ((unsigned)irq < NR_IRQS)
+    {
+      uint32 reg = getreg32(MASK_IT_REG);
+      putreg32(reg | (1 << irq), MASK_IT_REG);
+    }
+}
+
+/************************************************************
+ * Name: up_enable_irq
+ *
+ * Description:
+ *   Enable the IRQ specified by 'irq'
+ *
+ ************************************************************/
+
+void up_enable_irq(int irq)
+{
+  if ((unsigned)irq < NR_IRQS)
+    {
+      uint32 reg = getreg32(MASK_IT_REG);
+      putreg32(reg & ~(1 << irq), MASK_IT_REG);
+    }
+}
+
+/************************************************************
+ * Name: up_maskack_irq
+ *
+ * Description:
+ *   Mask the IRQ and acknowledge it
+ *
+ ************************************************************/
+
+void up_maskack_irq(int irq)
+{
+  uint32 reg = getreg32(INT_CTRL_REG);
+
+  /* Mask the interrupt */
+
+  reg = getreg32(MASK_IT_REG);
+  putreg32(reg | (1 << irq), MASK_IT_REG);
+
+  /* Set the NEW_IRQ_AGR bit.  This clears the IRQ src register
+   * enables generation of a new IRQ.
+   */
+
+  reg = getreg32(INT_CTRL_REG);
+  putreg32(reg | 0x00000001, INT_CTRL_REG); /* write the NEW_IRQ_AGR bit. */
+}

arch/arm/src/c5471/c5471_lowputc.S

@@ -0,0 +1,127 @@
+/**************************************************************************
+ * c5471/c5471_lowputc.S
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ **************************************************************************/
+
+/**************************************************************************
+ * Included Files
+ **************************************************************************/
+
+#include <nuttx/config.h>
+#include "up_internal.h"
+#include "up_arch.h"
+
+/**************************************************************************
+ * Private Definitions
+ **************************************************************************/
+
+/**************************************************************************
+ * Private Types
+ **************************************************************************/
+
+/**************************************************************************
+ * Private Function Prototypes
+ **************************************************************************/
+
+/**************************************************************************
+ * Global Variables
+ **************************************************************************/
+
+/**************************************************************************
+ * Private Variables
+ **************************************************************************/
+
+/**************************************************************************
+ * Private Functions
+ **************************************************************************/
+
+/**************************************************************************
+ * Public Functions
+ **************************************************************************/
+
+/**************************************************************************
+ * Name: up_lowputc
+ **************************************************************************/
+
+/* This assembly language version has the advantage that it can does not
+ * require a C stack and uses only r0-r1.  Hence it can be used during
+ * early boot phases.
+ */
+
+	.text
+	.global	up_lowputc
+	.type	up_lowputc, function
+up_lowputc:
+	/* On entry, r0 holds the character to be printed */
+
+#ifdef CONFIG_SERIAL_IRDA_CONSOLE
+	ldr	r2, =UART_IRDA_BASE	/* r2=IRDA UART base */
+#else
+	ldr	r2, =UART_MODEM_BASE	/* r2=Modem UART base */
+#endif
+
+	/* Poll bit 0 of the UART_SSR register.  When the bit
+	 * is clear, the TX FIFO is no longer full
+	 */
+
+1:	ldr	r1, [r2, #UART_SSR_OFFS]
+	tst	r1, #UART_SSR_TXFULL
+	bne	1b
+
+	/* Send the character by writing it into the UART_THR
+	 * register.
+	 */
+
+	str     r0, [r2, #UART_THR_OFFS]
+
+	/* Wait for the tranmsit holding regiser (THR) to be
+	 * emptied. This is detemined when bit 6 of the LSR
+	 * is set.
+	 */
+
+2:	ldr     r1, [r2, #UART_LSR_OFFS]
+	tst     r1, #0x00000020
+	beq     2b
+
+	/* If the character that we just sent was a linefeed,
+	 * then send a carriage return as well.
+	 */
+
+	teq     r0, #'\n'
+	moveq   r0, #'\r'
+	beq     1b
+
+	/* And return */
+
+	mov     pc, lr
+

arch/arm/src/c5471/c5471_timerisr.c

@@ -0,0 +1,125 @@
+/************************************************************
+ * c5471/c5471_timerisr.c
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include <debug.h>
+#include <nuttx/arch.h>
+#include "clock_internal.h"
+#include "up_internal.h"
+#include "up_arch.h"
+
+/************************************************************
+ * Definitions
+ ************************************************************/
+
+/* We want the general purpose timer running at the rate
+ * MSEC_PER_TICK. The C5471 clock is 47.5MHz and we're using
+ * a timer PTV value of 3 (3 == divide incoming frequency by
+ * 16) which then yields a 16 bitCLKS_PER_INT value
+ * of 29687.
+ *
+ *   47500000 / 16 = 2968750 clocks/sec
+ *   2968750 / 100 = 29687   clocks/ 100Hz interrupt
+ *
+ */
+
+#define CLKS_PER_INT       29687
+#define CLKS_PER_INT_SHIFT 5
+#define AR                 0x00000010
+#define ST                 0x00000008
+#define PTV                0x00000003
+
+/************************************************************
+ * Private Types
+ ************************************************************/
+
+/************************************************************
+ * Private Function Prototypes
+ ************************************************************/
+
+/************************************************************
+ * Global Functions
+ ************************************************************/
+
+/************************************************************
+ * Function:  up_timerisr
+ *
+ * Description:
+ *   The timer ISR will perform a variety of services for
+ *   various portions of the systems.
+ *
+ ************************************************************/
+
+int up_timerisr(int irq, uint32 *regs)
+{
+   /* Process timer interrupt */
+
+   sched_process_timer();
+   return 0;
+}
+
+/************************************************************
+ * Function:  up_timerinit
+ *
+ * Description:
+ *   This function is called during start-up to initialize
+ *   the timer interrupt.
+ *
+ ************************************************************/
+
+void up_timerinit(void)
+{
+  uint32 val;
+
+  up_disable_irq(C5471_IRQ_SYSTIMER);
+
+  /* Start the general purpose timer running in auto-reload mode
+   * so that an interrupt is generated at the rate MSEC_PER_TICK.
+   */
+
+  val = ((CLKS_PER_INT-1) << CLKS_PER_INT_SHIFT) | AR | ST | PTV;
+  putreg32(val, C5471_TIMER2_CTRL);
+
+  /* Attach and enable the timer interrupt */
+
+  irq_attach(C5471_IRQ_SYSTIMER, (xcpt_t)up_timerisr);
+  up_enable_irq(C5471_IRQ_SYSTIMER);
+}
+

arch/arm/src/c5471/c5471_vectors.S

@@ -0,0 +1,449 @@
+/********************************************************************
+ * c5471/c5471_vectors.S
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************/
+
+/********************************************************************
+ * Included Files
+ ********************************************************************/
+
+#include <nuttx/config.h>
+#include <nuttx/irq.h>
+#include "up_arch.h"
+
+/********************************************************************
+ * Definitions
+ ********************************************************************/
+
+/********************************************************************
+ * Global Data
+ ********************************************************************/
+
+	.data
+g_irqtmp:
+	.word	0		/* Saved lr */
+	.word	0		/* Saved spsr */
+g_undeftmp:
+	.word	0		/* Saved lr */
+	.word	0		/* Saved spsr */
+g_aborttmp:
+	.word	0		/* Saved lr */
+	.word	0		/* Saved spsr */
+
+/********************************************************************
+ * Assembly Macros
+ ********************************************************************/
+
+/********************************************************************
+ * Private Functions
+ ********************************************************************/
+
+	.text
+
+/********************************************************************
+ * Public Functions
+ ********************************************************************/
+
+	.text
+
+/********************************************************************
+ * Name: up_vectorirq
+ *
+ * Description:
+ *   Interrupt excetpion. Entered in IRQ mode with spsr = SVC
+ *   CPSR, lr = SVC PC
+ ********************************************************************/
+
+	.globl	up_vectorirq
+	.type	up_vectorirq, %function
+up_vectorirq:
+	/* On entry, we are in IRQ mode.  We are free to use
+	 * the IRQ mode r13 and r14.
+         *
+	 */
+
+	ldr	r13, .Lirqtmp
+	sub	lr, lr, #4
+	str	lr, [r13]			@ save lr_IRQ
+	mrs	lr, spsr
+	str	lr, [r13, #4]			@ save spsr_IRQ
+
+	/* Then switch back to SVC mode */
+
+	bic	lr, lr, #MODE_MASK	/* Keep F and T bits */
+	orr	lr, lr, #(SVC_MODE | PSR_I_BIT)
+	msr	cpsr_c, lr		/* Switch to SVC mode */
+
+	/* Create a context structure.  First set aside a stack frame
+	 * and store r0-r12 into the frame.
+	 */
+
+	sub	sp, sp, #XCPTCONTEXT_SIZE
+	stmia	sp, {r0-r12}		/* Save the SVC mode regs */
+
+	/* Get the correct values of r13(sp) and r14(lr) in r1 and r2 */
+
+	add	r1, sp, #XCPTCONTEXT_SIZE
+	mov	r2, r14
+
+	/* Get the values for r15(pc) and CPSR in r3 and r4 */
+
+	ldr	r0, .Lirqtmp		/* Points to temp storage */
+	ldmia	r0, {r3, r4}		/* Recover r1=lr_IRQ, r2=spsr_IRQ */
+
+	add	r0, sp, #(4*REG_SP)	/* Offset to pc, cpsr storage */
+	stmia	r0, {r1-r4}
+
+	/* Now decode the interrupt */
+
+#if 0
+	ldr	lr, =SRC_IRQ_BIN_REG	/* Fetch encoded IRQ */
+	ldr	r0, [lr]
+	and	r0, r0, #0x0f		/* Valid range is 0..15 */
+
+	/* Problems here... cannot read SRC_IRQ_BIN_REQ (and/or
+	 * SRC_IRQ_REQ because this will clear edge triggered
+	 * interrupts.  Plus, no way to validate spurious
+	 * interrupt.
+	 */
+#else
+	ldr	r6, =SRC_IRQ_REG
+	ldr     r6, [r6]		/* Get source IRQ reg */
+	mov     r0, #0			/* Assume IRQ0_IRQ set */
+.Lmorebits:
+	tst     r6, #1			/* Is IRQ set? */
+	bne     .Lhaveirq		/* Yes... we have the IRQ */
+	add     r0, r0, #1		/* Setup next IRQ */
+	mov     r6, r6, lsr #1		/* Shift right one */
+	cmp     r0, #16			/* Only 16 valid bits */
+	bcc     .Lmorebits		/* Keep until we have looked
+					 * at all bits */
+	b	.Lnoirqset		/* If we get here, there is
+					 * no pending interrupt */
+.Lhaveirq:
+#endif
+	/* Then call the IRQ handler with interrupt disabled. */
+
+	mov	fp, #0			/* Init frame pointer */
+	mov	r1, sp			/* Get r1=xcp */
+	bl	up_doirq		/* Call the handler */
+
+	/* Restore the CPSR, SVC modr registers and return */
+.Lnoirqset:
+	ldr	r0, [sp, #(4*REG_CPSR)]	/* Setup the SVC mode SPSR */
+	msr	spsr, r0
+	ldmia	sp, {r0-r15}^		/* Return */
+
+.Lirqtmp:
+	.word	g_irqtmp
+
+	.align	5
+
+/********************************************************************
+ * Function: up_vectorswi
+ * 
+ * Description:
+ *   SWI interrupt. We enter the SWI in SVC mode
+ ********************************************************************/
+
+	.globl	up_vectorswi
+	.type	up_vectorswi, %function
+up_vectorswi:
+
+	/* The c547x rrload bootloader intemediates all
+	 * interrupts.  For the* case of the SWI, it mucked
+	 * with the stack to create some temporary registers.
+	 * We'll have to recover from this mucking here.
+	 */
+
+	ldr	r14, [sp,#-0x4]		/* rrload workaround */
+
+	/* Create a context structure.  First set aside a stack frame
+	 * and store r0-r12 into the frame.
+	 */
+
+	sub	sp, sp, #XCPTCONTEXT_SIZE
+	stmia	sp, {r0-r12}		/* Save the SVC mode regs */
+
+	/* Get the correct values of r13(sp), r14(lr), r15(pc)
+	 * and CPSR in r1-r4 */
+
+	add	r1, sp, #XCPTCONTEXT_SIZE
+	mov	r2, r14			/* R14 is altered on return from SWI */
+	mov	r3, r14			/* Save r14 as the PC as well */
+	mrs	r4, spsr		/* Get the saved CPSR */
+
+	add	r0, sp, #(4*REG_SP)	/* Offset to pc, cpsr storage */
+	stmia	r0, {r1-r4}
+
+	/* Then call the SWI handler with interrupt disabled.
+	 * void up_syscall(struct xcptcontext *xcp)
+	 */
+
+	mov	fp, #0			/* Init frame pointer */
+	mov	r0, sp			/* Get r0=xcp */
+	bl	up_syscall		/* Call the handler */
+
+	/* Restore the CPSR, SVC modr registers and return */
+
+	ldr	r0, [sp, #(4*REG_CPSR)]	/* Setup the SVC mode SPSR */
+	msr	spsr, r0
+	ldmia	sp, {r0-r15}^		/* Return */
+
+	.align	5
+
+/********************************************************************
+ * Name: up_vectordata
+ *
+ * Description:
+ *   Data abort Exception dispatcher. Give control to data
+ *   abort handler.  This function is entered in ABORT mode
+ *   with spsr = SVC CPSR, lr = SVC PC
+ *
+ ********************************************************************/
+	
+	.globl	up_vectordata
+	.type	up_vectordata, %function
+up_vectordata:
+	/* On entry we are free to use the ABORT mode registers
+	 * r13 and r14
+	 */
+
+	ldr	r13, .Ldaborttmp	/* Points to temp storage */
+	sub	lr, lr, #8		/* Fixup return */
+	str	lr, [r13]		/* Save in temp storage */
+	mrs	lr, spsr		/* Get SPSR */
+	str	lr, [r13, #4]		/* Save in temp storage */
+
+	/* Then switch back to SVC mode */
+
+	bic	lr, lr, #MODE_MASK	/* Keep F and T bits */
+	orr	lr, lr, #(SVC_MODE | PSR_I_BIT)
+	msr	cpsr_c, lr		/* Switch to SVC mode */
+
+	/* Create a context structure.  First set aside a stack frame
+	 * and store r0-r12 into the frame.
+	 */
+
+	sub	sp, sp, #XCPTCONTEXT_SIZE
+	stmia	sp, {r0-r12}		/* Save the SVC mode regs */
+
+	/* Get the correct values of r13(sp) and r14(lr) in r1 and r2 */
+
+	add	r1, sp, #XCPTCONTEXT_SIZE
+	mov	r2, r14
+
+	/* Get the values for r15(pc) and CPSR in r3 and r4 */
+
+	ldr	r0, .Ldaborttmp		/* Points to temp storage */
+	ldmia	r0, {r3, r4}		/* Recover r1=lr_IRQ, r2=spsr_IRQ */
+
+	add	r0, sp, #(4*REG_SP)	/* Offset to pc, cpsr storage */
+	stmia	r0, {r1-r4}
+
+	/* Then call the data abort handler with interrupt disabled.
+	 * void up_dataabort(struct xcptcontext *xcp)
+	 */
+
+	mov	fp, #0			/* Init frame pointer */
+	mov	r0, sp			/* Get r0=xcp */
+	bl	up_dataabort		/* Call the handler */
+
+	/* Restore the CPSR, SVC modr registers and return */
+
+	ldr	r0, [sp, #(4*REG_CPSR)]	/* Setup the SVC mode SPSR */
+	msr	spsr_cxsf, r0
+	ldmia	sp, {r0-r15}^		/* Return */
+
+.Ldaborttmp:
+	.word	g_aborttmp
+
+	.align	5
+
+/********************************************************************
+ * Name: up_vectorprefetch
+ *
+ * Description:
+ *    Prefetch abort exception.  Entered in ABT mode with
+ *    spsr = SVC CPSR, lr = SVC PC
+ ********************************************************************/
+	
+	.globl	up_vectorprefetch
+	.type	up_vectorprefetch, %function
+up_vectorprefetch:
+	/* On entry we are free to use the ABORT mode registers
+	 * r13 and r14
+	 */
+
+	ldr	r13, .Lpaborttmp	/* Points to temp storage */
+	sub	lr, lr, #4		/* Fixup return */
+	str	lr, [r13]		/* Save in temp storage */
+	mrs	lr, spsr		/* Get SPSR */
+	str	lr, [r13, #4]		/* Save in temp storage */
+
+	/* Then switch back to SVC mode */
+
+	bic	lr, lr, #MODE_MASK	/* Keep F and T bits */
+	orr	lr, lr, #(SVC_MODE | PSR_I_BIT)
+	msr	cpsr_c, lr		/* Switch to SVC mode */
+
+	/* Create a context structure.  First set aside a stack frame
+	 * and store r0-r12 into the frame.
+	 */
+
+	sub	sp, sp, #XCPTCONTEXT_SIZE
+	stmia	sp, {r0-r12}		/* Save the SVC mode regs */
+
+	/* Get the correct values of r13(sp) and r14(lr) in r1 and r2 */
+
+	add	r1, sp, #XCPTCONTEXT_SIZE
+	mov	r2, r14
+
+	/* Get the values for r15(pc) and CPSR in r3 and r4 */
+
+	ldr	r0, .Lpaborttmp		/* Points to temp storage */
+	ldmia	r0, {r3, r4}		/* Recover r1=lr_IRQ, r2=spsr_IRQ */
+
+	add	r0, sp, #(4*REG_SP)	/* Offset to pc, cpsr storage */
+	stmia	r0, {r1-r4}
+
+	/* Then call the prefetch abort handler with interrupt disabled.
+	 * void up_prefetchabort(struct xcptcontext *xcp)
+	 */
+
+	mov	fp, #0			/* Init frame pointer */
+	mov	r0, sp			/* Get r0=xcp */
+	bl	up_prefetchabort	/* Call the handler */
+
+	/* Restore the CPSR, SVC modr registers and return */
+
+	ldr	r0, [sp, #(4*REG_CPSR)]	/* Setup the SVC mode SPSR */
+	msr	spsr_cxsf, r0
+	ldmia	sp, {r0-r15}^		/* Return */
+
+.Lpaborttmp:
+	.word	g_aborttmp
+
+	.align	5
+
+/********************************************************************
+ * Name: up_vectorundefinsn
+ *
+ * Description:
+ *   Undefined instruction entry exception.  Entered in
+ *   UND mode, spsr = SVC  CPSR, lr = SVC PC
+ *
+ ********************************************************************/
+	
+	.globl	up_vectorundefinsn
+	.type	up_vectorundefinsn, %function
+up_vectorundefinsn:
+	/* On entry we are free to use the UND mode registers
+	 * r13 and r14
+	 */
+
+	ldr	r13, .Lundeftmp		/* Points to temp storage */
+	str	lr, [r13]		/* Save in temp storage */
+	mrs	lr, spsr		/* Get SPSR */
+	str	lr, [r13, #4]		/* Save in temp storage */
+
+	/* Then switch back to SVC mode */
+
+	bic	lr, lr, #MODE_MASK	/* Keep F and T bits */
+	orr	lr, lr, #(SVC_MODE | PSR_I_BIT)
+	msr	cpsr_c, lr		/* Switch to SVC mode */
+
+	/* Create a context structure.  First set aside a stack frame
+	 * and store r0-r12 into the frame.
+	 */
+
+	sub	sp, sp, #XCPTCONTEXT_SIZE
+	stmia	sp, {r0-r12}		/* Save the SVC mode regs */
+
+	/* Get the correct values of r13(sp) and r14(lr) in r1 and r2 */
+
+	add	r1, sp, #XCPTCONTEXT_SIZE
+	mov	r2, r14
+
+	/* Get the values for r15(pc) and CPSR in r3 and r4 */
+
+	ldr	r0, .Lundeftmp		/* Points to temp storage */
+	ldmia	r0, {r3, r4}		/* Recover r1=lr_IRQ, r2=spsr_IRQ */
+
+	add	r0, sp, #(4*REG_SP)	/* Offset to pc, cpsr storage */
+	stmia	r0, {r1-r4}
+
+	/* Then call the undef insn handler with interrupt disabled.
+	 * void up_undefinedinsn(struct xcptcontext *xcp)
+	 */
+
+	mov	fp, #0			/* Init frame pointer */
+	mov	r0, sp			/* Get r0=xcp */
+	bl	up_undefinedinsn	/* Call the handler */
+
+	/* Restore the CPSR, SVC modr registers and return */
+
+	ldr	r0, [sp, #(4*REG_CPSR)]	/* Setup the SVC mode SPSR */
+	msr	spsr_cxsf, r0
+	ldmia	sp, {r0-r15}^		/* Return */
+
+.Lundeftmp:
+	.word	g_undeftmp
+
+	.align	5
+
+/********************************************************************
+ * Name: up_vectorfiq
+ *
+ * Description:
+ *   Shouldn't happen
+ ********************************************************************/
+
+	.globl	up_vectorfiq
+	.type	up_vectorfiq, %function
+up_vectorfiq:
+	subs	pc, lr, #4
+
+/********************************************************************
+ *  Name: up_vectoraddrexcption
+ *
+ * Description:
+ *   Shouldn't happen
+ *
+ ********************************************************************/
+
+	.globl	up_vectoraddrexcptn
+	.type	up_vectoraddrexcptn, %function
+up_vectoraddrexcptn:
+	b	up_vectoraddrexcptn
+	.end

arch/arm/src/c5471/c5471_watchdog.c

@@ -0,0 +1,392 @@
+/**************************************************************************
+ * c5471/c5471_watchdog.c
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ **************************************************************************/
+
+/**************************************************************************
+ * Included Files
+ **************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include <stdio.h>
+#include <debug.h>
+#include <errno.h>
+#include <nuttx/fs.h>
+#include <nuttx/irq.h>
+#include <arch/watchdog.h>
+#include "up_arch.h"
+
+/**************************************************************************
+ * Definitions
+ **************************************************************************/
+
+#undef CONFIG_SOFTWARE_TEST
+#undef CONFIG_SOFTWARE_REBOOT
+#undef CONFIG_WATCHDOG_STRICT
+
+#define MAX_WDT_USEC           353200
+#define MAX_PRESCALER          256
+#define C5471_TIMER_STOP       0
+
+#define C5471_TIMER_PRESCALER  0x07          /* Bits 0-2: Prescale value */
+#define C5471_TIMER_STARTBIT   (1 << 3)      /* Bit 3: Start timer bit */
+#define C5471_TIMER_AUTORELOAD (1 << 4)      /* Bit 4: Auto-reload timer */
+#define C5471_TIMER_LOADTIM    (0xffff << 5) /* Bits 20-5: Load timer value */
+#define C5471_TIMER_MODE       (1 << 21)     /* Bit 21: Timer mode */
+#define C5471_DISABLE_VALUE1   (0xf5 << 22)  /* Bits 29-22: WD disable */
+#define C5471_DISABLE_VALUE2   (0xa0 << 22)
+
+#define CLOCK_KHZ              47500
+#define CLOCK_MHZx2            95
+
+/* Macros to manage access to to watchdog timer macros */
+
+#define c5471_wdt_cntl  (*(volatile uint32*)C5471_TIMER0_CTRL)
+#define c5471_wdt_count (*(volatile uint32*)C5471_TIMER0_CNT)
+
+/**************************************************************************
+ * Private Types
+ **************************************************************************/
+
+/**************************************************************************
+ * Private Function Prototypes
+ **************************************************************************/
+
+/* Local implementation of timer interface */
+
+static inline unsigned int wdt_prescaletoptv(unsigned int prescale);
+
+static int     wdt_setusec(uint32 usec);
+static int     wdt_interrupt(int irq, void *context);
+
+static int     wdt_open(struct file *filep);
+static int     wdt_close(struct file *filep);
+static ssize_t wdt_read(struct file *filep, char *buffer, size_t buflen);
+static ssize_t wdt_write(struct file *filep, const char *buffer, size_t buflen);
+static int     wdt_ioctl(struct file *filep, int cmd, uint32 arg);
+
+/**************************************************************************
+ * Private Data
+ **************************************************************************/
+
+static boolean g_wdtopen;
+
+struct file_operations g_wdtops =
+{
+  .open  = wdt_open,
+  .close = wdt_close,
+  .read  = wdt_read,
+  .write = wdt_write,
+  .ioctl = wdt_ioctl,
+};
+
+/**************************************************************************
+ * Private Functions
+ **************************************************************************/
+
+/**************************************************************************
+ * Name: wdt_prescaletoptv
+ **************************************************************************/
+
+static inline unsigned int wdt_prescaletoptv(unsigned int prescale)
+{
+  unsigned int ptv = 0;
+
+  if (prescale > 255)
+    {
+      ptv = 7;
+    }
+  else
+    {
+      unsigned int value = prescale >> 1;
+
+      /* 0: 0-2
+       * 1: 3-4
+       * 2: 5-8
+       * 3: 9-16
+       * 4: 17-32
+       * 5: 33-64
+       * 6: 65-128
+       * 7: 129-
+       */
+
+      while (value > 1)
+        {
+          value >>= 1;
+          ptv++;
+        }
+    }
+
+  dbg("prescale=%d -> ptv=%d\n", prescale, ptv);
+  return ptv;
+}
+
+/**************************************************************************
+ * Name: wdt_setusec
+ **************************************************************************/
+
+static int wdt_setusec(uint32 usec)
+{
+  /* prescaler: clock / prescaler = #clock ticks per counter in ptv
+   * divisor:   #counts until the interrupt comes.
+   */
+
+  uint32 prescaler = MAX_PRESCALER;
+  uint32 divisor   = 1;
+  uint32 mode;
+
+  dbg("usec=%d\n", usec);
+
+  /* Calculate a value of prescaler and divisor that will be able
+   * to count to the usec.  It may not be exact or the best
+   * possible set, but it's a quick and simple algorithm.
+   *
+   *    divisor max = 0x10000
+   *    prescaler max = MAX_PRESCALER
+   */
+
+  do
+    {
+      divisor = (CLOCK_MHZx2 * usec) / (prescaler * 2);
+      dbg("divisor=0x%x prescaler=0x%x\n", divisor, prescaler);
+
+      if (divisor >= 0x10000)
+        {
+          if (prescaler == MAX_PRESCALER)
+            { 
+              /* This is the max possible ~2.5 seconds. */
+
+              dbg("prescaler=0x%x too big!\n", prescaler);
+              return ERROR;
+            }
+
+          prescaler <<= 1;
+          if (prescaler > MAX_PRESCALER)
+            {
+              prescaler = MAX_PRESCALER;
+            }
+        }
+    }
+  while (divisor >= 0x10000);
+
+  dbg("prescaler=0x%x divisor=0x%x\n", prescaler, divisor);
+
+  mode  = wdt_prescaletoptv(prescaler);
+  mode &= ~C5471_TIMER_AUTORELOAD; /* One shot mode. */
+  mode |= divisor << 5;
+  dbg("mode=0x%x\n", mode);
+
+  c5471_wdt_cntl = mode;
+
+  /* Now start the watchdog */
+
+  c5471_wdt_cntl |= C5471_TIMER_STARTBIT;
+  dbg("cntl_timer=0x%x\n", c5471_wdt_cntl);
+
+  return 0;
+}
+
+/**************************************************************************
+ * Private Functions
+ **************************************************************************/
+
+/**************************************************************************
+ * Name: wdt_interrupt
+ **************************************************************************/
+
+static int wdt_interrupt(int irq, void *context)
+{
+  dbg("expired\n");
+
+#if defined(CONFIG_SOFTWARE_REBOOT)
+#  if defined(CONFIG_SOFTWARE_TEST)
+  dbg("  Test only\n");
+#  else
+  dbg("  Re-booting\n");
+#    warning "Add logic to reset CPU here"
+#  endif
+#else
+  dbg("  No reboot\n");
+#endif
+  return OK;
+}
+
+/**************************************************************************
+ * Name: wdt_read
+ **************************************************************************/
+
+static ssize_t wdt_read(struct file *filep, char *buffer, size_t buflen)
+{
+  /* We are going to return "NNNNNNNN NNNNNNNN."  The followig logic will
+   * not work if the user provides a buffer smaller than 18 bytes.
+   */
+
+  dbg("buflen=%d\n", buflen);
+  if (buflen >= 18)
+    {
+      sprintf(buffer, "#08x %08x\n", c5471_wdt_cntl, c5471_wdt_count);
+      return 18;
+    }
+  return 0;
+}
+
+/**************************************************************************
+ * Name: wdt_write
+ **************************************************************************/
+
+static ssize_t wdt_write(struct file *filep, const char *buffer, size_t buflen)
+{
+  dbg("buflen=%d\n", buflen);
+  if (buflen)
+    {
+      /* Reset the timer to the maximum delay */
+
+      wdt_setusec(MAX_WDT_USEC);
+      return 1;
+    }
+
+  return 0;
+}
+
+/**************************************************************************
+ * Name: wdt_ioctl
+ **************************************************************************/
+
+static int wdt_ioctl(struct file *filep, int cmd, uint32 arg)
+{
+  dbg("ioctl Call: cmd=0x%x arg=0x%x", cmd, arg);
+
+  /* Process the the IOCTL command (see arch/watchdog.h) */
+
+  switch(cmd)
+    {
+    case WDIOC_KEEPALIVE:
+      wdt_setusec(MAX_WDT_USEC);
+      break;
+
+    default:
+      *get_errno_ptr() = ENOTTY;
+      return ERROR;
+    }
+
+  return OK;
+}
+
+/**************************************************************************
+ * Name: wdt_open
+ **************************************************************************/
+
+static int wdt_open(struct file *filep)
+{
+  dbg("");
+
+  if (g_wdtopen)
+    {
+      *get_errno_ptr() = EBUSY;
+    }
+
+  /* This will automatically load the timer with its max
+   * count and start it running.
+   */
+
+  c5471_wdt_cntl = C5471_DISABLE_VALUE1;
+  c5471_wdt_cntl = C5471_DISABLE_VALUE2;
+
+  g_wdtopen = TRUE;
+  return OK;
+}
+
+/**************************************************************************
+ * Name: wdt_close
+ **************************************************************************/
+
+static int wdt_close(struct file *filep)
+{
+  dbg("");
+
+  /* The task controlling the watchdog has terminated.  Take the timer
+   *  the
+   * watchdog in interrupt mode -- we are going to reset unless the
+   * reopened again soon.
+   */
+
+#ifndef CONFIG_WATCHDOG_STRICT
+  c5471_wdt_cntl = C5471_TIMER_MODE;
+#endif
+
+  g_wdtopen = FALSE;
+  return 0;
+}
+
+/**************************************************************************
+ * Public Functions
+ **************************************************************************/
+
+/**************************************************************************
+ * Name: up_wdtinit
+ **************************************************************************/
+
+int up_wdtinit(void)
+{
+  int ret;
+
+  dbg("C547x Watchdog Driver\n");
+
+  /* Register as /dev/wdt */
+
+  ret = register_driver("/dev/wdt", &g_wdtops, 0666, NULL);
+  if (ret)
+    {
+      return ERROR;
+    }
+
+  /* Register for an interrupt level callback through wdt_interrupt */
+
+  dbg("Attach to IRQ=%d\n", C5471_IRQ_WATCHDOG);
+
+  /* Make sure that the timer is stopped */
+
+  c5471_wdt_cntl = C5471_TIMER_STOP;
+
+  /* Request the interrupt. */
+
+  ret = irq_attach(C5471_IRQ_WATCHDOG, wdt_interrupt);
+  if (ret)
+    {
+      unregister_driver("/dev/wdt");
+      return ERROR;
+    }
+
+  return OK;
+}

arch/arm/src/c5471/chip.h

@@ -0,0 +1,319 @@
+/************************************************************
+ * c5471/chip.h
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+#ifndef __C5471_CHIP_H
+#define __C5471_CHIP_H
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+/************************************************************
+ * Definitions
+ ************************************************************/
+
+/* UARTs ****************************************************/
+
+#define UART_IRDA_BASE         0xffff0800
+#define UART_MODEM_BASE        0xffff1000
+#define UARTn_IO_RANGE         0x00000800
+
+/* Common UART Registers.  Expressed as offsets from the BASE address */
+
+#define UART_RHR_OFFS          0x00000000 /* Rcv Holding Register */
+#define UART_THR_OFFS          0x00000004 /* Xmit Holding Register */
+#define UART_FCR_OFFS          0x00000008 /* FIFO Control Register */
+#define UART_RFCR_OFFS         0x00000008 /* Rcv FIFO Control Register */
+#define UART_TFCR_OFFS         0x00000008 /* Xmit FIFO Control Register */
+#define UART_SCR_OFFS          0x0000000c /* Status Control Register */
+#define UART_LCR_OFFS          0x00000010 /* Line Control Register */
+#define UART_LSR_OFFS          0x00000014 /* Line Status Register */
+#define UART_SSR_OFFS          0x00000018 /* Supplementary Status Register */
+#define UART_MCR_OFFS          0x0000001c /* Modem Control Register */
+#define UART_MSR_OFFS          0x00000020 /* Modem Status Register */
+#define UART_IER_OFFS          0x00000024 /* Interrupt Enable Register */
+#define UART_ISR_OFFS          0x00000028 /* Interrupt Status Register */
+#define UART_EFR_OFFS          0x0000002c /* Enhanced Feature Register */
+#define UART_XON1_OFFS         0x00000030 /* XON1 Character Register */
+#define UART_XON2_OFFS         0x00000034 /* XON2 Character Register */
+#define UART_XOFF1_OFFS        0x00000038 /* XOFF1 Character Register */
+#define UART_XOFF2_OFFS        0x0000003c /* XOFF2 Character Register */
+#define UART_SPR_OFFS          0x00000040 /* Scratch-pad Register */
+#define UART_DIV_115K_OFFS     0x00000044 /* Divisor for baud generation */
+#define UART_DIV_BIT_RATE_OFFS 0x00000048 /* For baud rate generation */
+#define UART_TCR_OFFS          0x0000004c /* Transmission Control Register */
+#define UART_TLR_OFFS          0x00000050 /* Trigger Level Register */
+#define UART_MDR_OFFS          0x00000054 /* Mode Definition Register */
+
+/* Registers available only for the IrDA UART (absolute address). */
+
+#define UART_IRDA_MDR1         0xffff0854 /* Mode Definition Register 1 */
+#define UART_IRDA_MDR2         0xffff0858 /* Mode Definition Register 2 */
+#define UART_IRDA_TXFLL        0xffff085c /* LS Xmit Frame Length Register */
+#define UART_IRDA_TXFLH        0xffff0860 /* MS Xmit Frame Length Register */
+#define UART_IRDA_RXFLL        0xffff0864 /* LS Rcvd Frame Length Register */
+#define UART_IRDA_RXFLH        0xffff0868 /* MS Rcvd Frame Length Register */
+#define UART_IRDA_SFLSR        0xffff086c /* Status FIFO Line Status Reg */
+#define UART_IRDA_SFREGL       0xffff0870 /* LS Status FIFO Register */
+#define UART_IRDA_SFREGH       0xffff0874 /* MS Status FIFO Register */
+#define UART_IRDA_BLR          0xffff0878 /* Begin of File Length Register */
+#define UART_IRDA_PULSE_WIDTH  0xffff087c /* Pulse Width Register */
+#define UART_IRDA_ACREG        0xffff0880 /* Auxiliary Control Register */
+#define UART_IRDA_PULSE_START  0xffff0884 /* Start time of pulse */
+#define UART_IRDA_RX_W_PTR     0xffff0888 /* RX FIFO write pointer */
+#define UART_IRDA_RX_R_PTR     0xffff088c /* RX FIFO read pointer */
+#define UART_IRDA_TX_W_PTR     0xffff0890 /* TX FIFO write pointer */
+#define UART_IRDA_TX_R_PTR     0xffff0894 /* TX FIFO read pointer */
+#define UART_IRDA_STATUS_W_PTR 0xffff0898 /* Write pointer of status FIFO */
+#define UART_IRDA_STATUS_R_PTR 0xffff089c /* Read pointer of status FIFO */
+#define UART_IRDA_RESUME       0xffff08a0 /* Resume register */
+#define UART_IRDA_MUX          0xffff08a4 /* Selects UART_IRDA output mux */
+
+/* Registers available for the Modem UART (absolute addresses) */
+
+#define UART_MODEM_MDR         0xffff1054 /* Mode Definition Register */
+#define UART_MODEM_UASR        0xffff1058 /* UART Auto-baud Status Register */
+#define UART_MODEM_RDPTR_URX   0xffff105c /* RX FIFO Read Pointer Register */
+#define UART_MODEM_WRPTR_URX   0xffff1060 /* RX FIFO Write Pointer Register */
+#define UART_MODEM_RDPTR_UTX   0xffff1064 /* TX FIFO Read Pointer Register */
+#define UART_MODEM_WRPTR_UTX   0xffff1068 /* TX FIFO Write Pointer Register */
+
+/* UART Settings ********************************************/
+
+/* Miscellaneous UART settings. */
+
+#define UART_RX_FIFO_NOEMPTY 0x00000001
+#define UART_SSR_TXFULL      0x00000001
+#define UART_LSR_TREF        0x00000020
+
+#define UART_XMIT_FIFO_SIZE      64
+#define UART_IRDA_XMIT_FIFO_SIZE 64
+
+/* UART_LCR Register */
+                                        /* Bits 31-7: Reserved */
+#define UART_LCR_BOC         0x00000040 /* Bit 6: Break Control */
+                                        /* Bit 5: Parity Type 2 */
+#define UART_LCR_PAREVEN     0x00000010 /* Bit 4: Parity Type 1 */
+#define UART_LCR_PARODD      0x00000000
+#define UART_LCR_PAREN       0x00000008 /* Bit 3: Paity Enable */
+#define UART_LCR_PARDIS      0x00000000
+#define UART_LCR_2STOP       0x00000004 /* Bit 2: Number of stop bits */
+#define UART_LCR_1STOP       0x00000000
+#define UART_LCR_5BITS       0x00000000 /* Bits 0-1: Word-length */
+#define UART_LCR_6BITS       0x00000001
+#define UART_LCR_7BITS       0x00000002
+#define UART_LCR_8BITS       0x00000003
+
+#define UART_FCR_FTL         0x00000000
+#define UART_FCR_FIFO_EN     0x00000001
+#define UART_FCR_TX_CLR      0x00000002
+#define UART_FCR_RX_CLR      0x00000004
+
+#define UART_IER_RECVINT     0x00000001
+#define UART_IER_XMITINT     0x00000002
+#define UART_IER_LINESTSINT  0x00000004
+#define UART_IER_MODEMSTSINT 0x00000008 /* IrDA UART only */
+#define UART_IER_XOFFINT     0x00000020
+#define UART_IER_RTSINT      0x00000040 /* IrDA UART only */
+#define UART_IER_CTSINT      0x00000080 /* IrDA UART only */
+#define UART_IER_INTMASK     0x000000ff
+
+#define BAUD_115200          0x00000001
+#define BAUD_57600           0x00000002
+#define BAUD_38400           0x00000003
+#define BAUD_19200           0x00000006
+#define BAUD_9600            0x0000000C
+#define BAUD_4800            0x00000018
+#define BAUD_2400            0x00000030
+#define BAUD_1200            0x00000060
+
+#define MDR_UART_MODE        0x00000000  /* Both IrDA and Modem UARTs */
+#define MDR_SIR_MODE         0x00000001  /* IrDA UART only */
+#define MDR_AUTOBAUDING_MODE 0x00000002  /* Modem UART only */
+#define MDR_RESET_MODE       0x00000007  /* Both IrDA and Modem UARTs */
+
+/* SPI ******************************************************/
+
+#define MAX_SPI 3
+
+#define SPI_REGISTER_BASE    0xffff2000
+
+/* GIO ******************************************************/
+
+#define MAX_GIO (35)
+
+#define GIO_REGISTER_BASE    0xffff2800
+
+#define GPIO_IO              0xffff2800 /* Writeable when I/O is configured
+					 * as an output; reads value on I/O
+					 * pin when I/O is configured as an
+					 * input */
+#define GPIO_CIO             0xffff2804 /* GPIO configuration register */
+#define GPIO_IRQA            0xffff2808 /* In conjunction with GPIO_IRQB
+					 * determines the behavior when GPIO
+					 * pins configured as input IRQ */
+#define GPIO_IRQB            0xffff280c /* Determines the behavior when GPIO
+					 * pins configured as input IRQ */
+#define GPIO_DDIO            0xffff2810 /* Delta Detect Register
+					 * (detects changes in the I/O pins) */
+#define GPIO_EN              0xffff2814 /* Selects register for muxed GPIOs */
+
+#define KGIO_REGISTER_BASE   0xffff2900
+
+#define KBGPIO_IO            0xffff2900 /* Keyboard I/O bits: Writeable
+					 * when KBGPIO is configured as an
+					 * output; reads value on I/O pin
+					 * when KBGPIO is configured as an
+					 * input */
+#define KBGPIO_CIO           0xffff2904 /* KBGPIO configuration register */
+#define KBGPIO_IRQA          0xffff2908 /* In conjunction with KBGPIO_IRQB
+					 * determines the behavior when
+					 * KBGPIO pins configured as input
+					 * IRQ */
+#define KBGPIO_IRQB          0xffff290c /* In conjunction with KBGPIO_IRQA
+					 * determines the behavior when
+					 * KBGPIO pins configured as input
+					 * IRQ */
+#define KBGPIO_DDIO          0xffff2910 /* Delta Detect Register (detects
+					 * changes in the KBGPIO pins) */
+#define KBGPIO_EN            0xffff2914 /* Selects register for muxed
+					 * KBGPIOs */
+
+/* Timers ***************************************************/
+
+#define C5471_TIMER0_CTRL    0xffff2a00
+#define C5471_TIMER0_CNT     0xffff2a04
+#define C5471_TIMER1_CTRL    0xffff2b00
+#define C5471_TIMER1_CNT     0xffff2b04
+#define C5471_TIMER2_CTRL    0xffff2c00
+
+#define C5471_TIMER2_CNT     0xffff2c04
+
+/* Interrupts */
+
+#define HAVE_SRC_IRQ_BIN_REG 0
+
+#define INT_FIRST_IO         0xffff2d00
+#define INT_IO_RANGE         0x5C
+
+#define IT_REG               0xffff2d00
+#define MASK_IT_REG          0xffff2d04
+#define SRC_IRQ_REG          0xffff2d08
+#define SRC_FIQ_REG          0xffff2d0c
+#define SRC_IRQ_BIN_REG      0xffff2d10
+#define INT_CTRL_REG         0xffff2d18
+
+#define ILR_IRQ0_REG         0xffff2d1C /*  0-Timer 0       */
+#define ILR_IRQ1_REG         0xffff2d20 /*  1-Timer 1       */
+#define ILR_IRQ2_REG         0xffff2d24 /*  2-Timer 2       */
+#define ILR_IRQ3_REG         0xffff2d28 /*  3-GPIO0         */
+#define ILR_IRQ4_REG         0xffff2d2c /*  4-Ethernet      */
+#define ILR_IRQ5_REG         0xffff2d30 /*  5-KBGPIO[7:0]   */
+#define ILR_IRQ6_REG         0xffff2d34 /*  6-Uart   serial */
+#define ILR_IRQ7_REG         0xffff2d38 /*  7-Uart   IRDA   */
+#define ILR_IRQ8_REG         0xffff2d3c /*  8-KBGPIO[15:8]  */
+#define ILR_IRQ9_REG         0xffff2d40 /*  9-GPIO3         */
+#define ILR_IRQ10_REG        0xffff2d44 /* 10-GPIO2         */
+#define ILR_IRQ11_REG        0xffff2d48 /* 11-I2C           */
+#define ILR_IRQ12_REG        0xffff2d4c /* 12-GPIO1         */
+#define ILR_IRQ13_REG        0xffff2d50 /* 13-SPI           */
+#define ILR_IRQ14_REG        0xffff2d54 /* 14-GPIO[19:4]    */
+#define ILR_IRQ15_REG        0xffff2d58 /* 15-API           */
+
+/* I2C ******************************************************/
+
+#define MAX_I2C 1
+
+/* API ******************************************************/
+
+#define DSPRAM_BASE          0xffe00000  /* DSPRAM base address */
+#define DSPRAM_END           0xffe03fff
+
+/* This is the API address range in the DSP address space. */
+
+#define DSPMEM_DSP_START     0x2000
+#define DSPMEM_DSP_END       0x3fff
+
+/* This is the API address range in the ARM address space. */
+
+#define DSPMEM_ARM_START     DSPRAM_BASE /* Defined in hardware.h */
+#define DSPMEM_ARM_END       DSPRAM_END
+
+/* DSPMEM_IN_RANGE is a generic macro to test is a value is within
+ * a range of values.
+ */
+
+#define DSPMEM_IN_RANGE(addr, start, end) \
+  ((((__u32)(addr)) >= (start)) && (((__u32)(addr)) <= (end)))
+
+/* DSPMEM_ADDR_ALIGNED verifies that a potential DSP address is
+ * properly word aligned.
+ */
+
+#define DSPMEM_ADDR_ALIGNED(addr, cpu) ((((__u32)(addr)) & 1) == 0)
+
+/* DSPMEM_DSP_ADDR checks if a DSP address lies in within the
+ * DSP's API address range.
+ */
+
+#define DSPMEM_DSP_ADDR(addr, cpu) \
+  DSPMEM_IN_RANGE(addr, DSPMEM_DSP_START, DSPMEM_DSP_END)
+
+/* DSPMEM_ARM_ADDR checks if a ARM address lies in within the
+ * ARM's API address range.
+ */
+
+#define DSPMEM_ARM_ADDR(addr) \
+  DSPMEM_IN_RANGE(addr, DSPMEM_ARM_START, DSPMEM_ARM_END)
+
+/* DSPMEM_DSP_TO_ARM maps a DSP API address into an ARM API address */
+
+#define DSPMEM_DSP_TO_ARM(addr, cpu) \
+  ((((__u32)(addr) - DSPMEM_DSP_START) << 1) + DSPMEM_ARM_START)
+
+/* DSPMEM_ARM_TO_DSP maps an ARM API address into a DSP API address */
+
+#define DSPMEM_ARM_TO_DSP(addr) \
+  ((((__u32)(addr) - DSPMEM_ARM_START) >> 1) + DSPMEM_DSP_START)
+
+/************************************************************
+ * Inline Functions
+ ************************************************************/
+
+/************************************************************
+ * Public Function Prototypes
+ ************************************************************/
+
+#endif  /* __C5471_CHIP_H */

arch/arm/src/common/arm.h

@@ -0,0 +1,254 @@
+/************************************************************************************
+ * common/arm.h
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARM_H
+#define __ARM_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+# include <sys/types.h>
+#endif
+
+/**************************************************************************
+ * Conditional Compilation
+ **************************************************************************/
+
+#undef CONFIG_ALIGNMENT_TRAP
+#undef CONFIG_DCACHE_WRITETHROUGH
+#undef CONFIG_CACHE_ROUND_ROBIN
+#undef CONFIG_DCACHE_DISABLE
+#undef CONFIG_ICACHE_DISABLE
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/* ARM9EJS **************************************************************************/
+
+/* PSR bits */
+
+#define MODE_MASK       0x0000001f
+#define USR26_MODE      0x00000000
+#define FIQ26_MODE      0x00000001
+#define IRQ26_MODE      0x00000002
+#define SVC26_MODE      0x00000003
+#define USR_MODE        0x00000010
+#define FIQ_MODE        0x00000011
+#define IRQ_MODE        0x00000012
+#define SVC_MODE        0x00000013
+#define ABT_MODE        0x00000017
+#define UND_MODE        0x0000001b
+#define MODE32_BIT      0x00000010
+#define SYSTEM_MODE     0x0000001f
+#define PSR_T_BIT       0x00000020
+#define PSR_F_BIT       0x00000040
+#define PSR_I_BIT       0x00000080
+#define PSR_J_BIT       0x01000000
+#define PSR_Q_BIT       0x08000000
+#define PSR_V_BIT       0x10000000
+#define PSR_C_BIT       0x20000000
+#define PSR_Z_BIT       0x40000000
+#define PSR_N_BIT       0x80000000
+
+/* CR1 bits (CP#15 CR1) */
+
+#define CR_M            0x00000001 /* MMU enable                          */
+#define CR_A            0x00000002 /* Alignment abort enable              */
+#define CR_C            0x00000004 /* Dcache enable                       */
+#define CR_W            0x00000008 /* Write buffer enable                 */
+#define CR_P            0x00000010 /* 32-bit exception handler            */
+#define CR_D            0x00000020 /* 32-bit data address range           */
+#define CR_L            0x00000040 /* Implementation defined              */
+#define CR_B            0x00000080 /* Big endian                          */
+#define CR_S            0x00000100 /* System MMU protection               */
+#define CR_R            0x00000200 /* ROM MMU protection                  */
+#define CR_F            0x00000400 /* Implementation defined              */
+#define CR_Z            0x00000800 /* Implementation defined              */
+#define CR_I            0x00001000 /* Icache enable                       */
+#define CR_V            0x00002000 /* Vectors relocated to 0xffff0000     */
+#define CR_RR           0x00004000 /* Round Robin cache replacement       */
+#define CR_L4           0x00008000 /* LDR pc can set T bit                */
+#define CR_DT           0x00010000
+#define CR_IT           0x00040000
+#define CR_ST           0x00080000
+#define CR_FI           0x00200000 /* Fast interrupt (lower latency mode) */
+#define CR_U            0x00400000 /* Unaligned access operation          */
+#define CR_XP           0x00800000 /* Extended page tables                */
+#define CR_VE           0x01000000 /* Vectored interrupts                 */
+
+/* Hardware page table definitions.
+ *
+ * Level 1 Descriptor (PMD)
+ *
+ * Common definitions.
+ */
+
+#define PMD_TYPE_MASK       0x00000003  /* Bits 1:0:   Type of descriptor */
+#define PMD_TYPE_FAULT      0x00000000
+#define PMD_TYPE_COARSE     0x00000001
+#define PMD_TYPE_SECT       0x00000002
+#define PMD_TYPE_FINE       0x00000003
+                                    /* Bits 3:2:   Depends on descriptor */
+#define PMD_BIT4            0x00000010  /* Bit  4:     Must be one */
+#define PMD_DOMAIN_MASK     0x000001e0  /* Bits 8:5:   Domain control bits */
+#define PMD_DOMAIN(x)       ((x) << 5)
+#define PMD_PROTECTION      0x00000200  /* Bit 9:      v5 only */
+                                    /* Bits 31:10: Depend on descriptor */
+
+/* Level 1 Section Descriptor.  Section descriptors allow fast, single
+ * level mapping between 1Mb address regions.
+ */
+                                        /* Bits 1:0:   Type of mapping */
+#define PMD_SECT_BUFFERABLE 0x00000004  /* Bit  2:     1=bufferable */
+#define PMD_SECT_CACHEABLE  0x00000008  /* Bit  3:     1=cacheable */
+                                        /* Bit  4:     Common, must be one */
+                                        /* Bits 8:5:   Common domain control */
+                                        /* Bit  9:     Common protection */
+#define PMD_SECT_AP_MASK    0x00000c00  /* Bits 11:10: Access permission */
+#define PMD_SECT_AP_WRITE   0x00000400
+#define PMD_SECT_AP_READ    0x00000800
+                                        /* Bits 19:20: Should be zero */
+#define PMD_SECT_TEX_MASK   0xfff00000  /* Bits 31:20: v5, Physical page */
+#define PMD_SECT_APX        0x00008000  /* Bit  15:    v6 only */
+#define PMD_SECT_S          0x00010000  /* Bit  16:    v6 only */
+#define PMD_SECT_nG         0x00020000  /* Bit  17:    v6 only */
+
+#define PMD_SECT_UNCACHED   (0)
+#define PMD_SECT_BUFFERED   (PMD_SECT_BUFFERABLE)
+#define PMD_SECT_WT         (PMD_SECT_CACHEABLE)
+#define PMD_SECT_WB         (PMD_SECT_CACHEABLE|PMD_SECT_BUFFERABLE)
+#define PMD_SECT_MINICACHE  (PMD_SECT_TEX(1)|PMD_SECT_CACHEABLE)
+#define PMD_SECT_WBWA       (PMD_SECT_TEX(1)|PMD_SECT_CACHEABLE|PMD_SECT_BUFFERABLE)
+
+/* Level 1 Coarse Table Descriptor.  Coarse Table Descriptors support
+ * two level mapping between 16Kb memory regions.
+ */
+                                        /* Bits 1:0:   Type of mapping */
+                                        /* Bits 3:2:   Should be zero */
+                                        /* Bit  4:     Common, must be one */
+                                        /* Bits 8:5:   Common domain control */
+                                        /* Bits 9:     Should be zero */
+#define PMD_COARSE_TEX_MASK 0xfffffc00  /* Bits 31:10: v5, Physical page */
+
+/* Level 1 Fine Table Descriptor.  Coarse Table Descriptors support
+ * two level mapping between 4Kb memory regions.
+ */
+
+                                        /* Bits 1:0:   Type of mapping */
+                                        /* Bits 3:2:   Should be zero */
+                                        /* Bit  4:     Common, must be one */
+                                        /* Bits 8:5:   Common domain control */
+                                        /* Bits 11:9:  Should be zero */
+#define PMD_FINE_TEX_MASK   0xfffff000  /* Bits 31:12: v5, Physical page */
+
+/* Level 2 Table Descriptor (PTE).  -- All tables */
+
+#define PTE_TYPE_MASK       (3 << 0)    /* Bits: 1:0:  Type of mapping */
+#define PTE_TYPE_FAULT      (0 << 0)    /*   None */
+#define PTE_TYPE_LARGE      (1 << 0)    /*   64Kb of memory */
+#define PTE_TYPE_SMALL      (2 << 0)    /*    4Kb of memory */
+#define PTE_TYPE_TINY       (3 << 0)    /*    1Kb of memory (v5)*/
+#define PTE_BUFFERABLE      (1 << 2)    /* Bit  2:     1=bufferable */
+#define PTE_CACHEABLE       (1 << 3)    /* Bit  3:     1=cacheable */
+                                        /* Bits 31:4:  Depend on type */
+
+/* Large page -- 64Kb */
+                                         /* Bits: 1:0:  Type of mapping */
+                                         /* Bits: 3:2:  Bufferable/cacheable */
+#define PTE_LARGE_AP_MASK    (0xff << 4) /* Bits 11:4   Access permissions */
+#define PTE_LARGE_AP_UNO_SRO (0x00 << 4)
+#define PTE_LARGE_AP_UNO_SRW (0x55 << 4)
+#define PTE_LARGE_AP_URO_SRW (0xaa << 4)
+#define PTE_LARGE_AP_URW_SRW (0xff << 4)
+                                         /* Bits 15:12: Should be zero */
+#define PTE_LARGE_TEX_MASK   0xffff0000  /* Bits 31:16: v5, Physical page */
+
+/* Small page -- 4Kb */
+
+                                         /* Bits: 1:0:  Type of mapping */
+                                         /* Bits: 3:2:  Bufferable/cacheable */
+#define PTE_SMALL_AP_MASK    (0xff << 4) /* Bits: 11:4: Access permissions */
+#define PTE_SMALL_AP_UNO_SRO (0x00 << 4)
+#define PTE_SMALL_AP_UNO_SRW (0x55 << 4)
+#define PTE_SMALL_AP_URO_SRW (0xaa << 4)
+#define PTE_SMALL_AP_URW_SRW (0xff << 4)
+#define PTE_SMALL_TEX_MASK   0xfffff000  /* Bits: 31:12: Physical page */
+
+/* Tiny page -- 1Kb */
+
+                                        /* Bits: 1:0:  Type of mapping */
+                                        /* Bits: 3:2:  Bufferable/cacheable */
+#define PTE_EXT_AP_MASK      (3 << 4)   /* Bits: 5:4:  Access persions */
+#define PTE_EXT_AP_UNO_SRO   (0 << 4)
+#define PTE_EXT_AP_UNO_SRW   (1 << 4)
+#define PTE_EXT_AP_URO_SRW   (2 << 4)
+#define PTE_EXT_AP_URW_SRW   (3 << 4)
+                                        /* Bits: 9:6:  Should be zero */
+#define PTE_TINY_TEX_MASK    0xfffffc00 /* Bits: 31:10: Physical page */
+
+/* Default MMU flags for memory and IO */
+
+#define MMU_MEMFLAGS \
+  (PMD_TYPE_SECT|PMD_SECT_WB|PMD_BIT4|PMD_SECT_AP_WRITE|PMD_SECT_AP_READ)
+
+#define MMU_IOFLAGS \
+  (PMD_TYPE_SECT|PMD_BIT4|PMD_SECT_AP_WRITE|PMD_SECT_AP_READ)
+
+#define MMU_L1_VECTORFLAGS   (PMD_TYPE_COARSE|PMD_BIT4)
+#define MMU_L2_VECTORFLAGS   (PTE_TYPE_SMALL|PTE_SMALL_AP_UNO_SRW)
+
+/* Mapped section size */
+
+#define SECTION_SIZE          (1 << 20)   /* 1Mb */
+
+/* We place the page tables 16K below the beginning of .text.  The
+ * following value is assume to be the (virtual) start address of
+ * .text.
+ */
+
+#define PGTABLE_SIZE          0x00004000
+
+/************************************************************************************
+ * Inline Functions
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#endif
+
+#endif  /* __ARM_H */

arch/arm/src/common/up_allocateheap.c

@@ -0,0 +1,79 @@
+/************************************************************
+ * common/up_allocateheap.c
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include <debug.h>
+#include <nuttx/arch.h>
+#include "up_arch.h"
+#include "up_internal.h"
+
+/************************************************************
+ * Private Definitions
+ ************************************************************/
+
+/************************************************************
+ * Private Data
+ ************************************************************/
+
+/************************************************************
+ * Private Functions
+ ************************************************************/
+
+/************************************************************
+ * Public Functions
+ ************************************************************/
+
+/************************************************************
+ * Name: up_allocate_heap
+ *
+ * Description:
+ *   The heap may be statically allocated by
+ *   defining CONFIG_HEAP_BASE and CONFIG_HEAP_SIZE.  If these
+ *   are not defined, then this function will be called to
+ *   dynamically set aside the heap region.
+ *
+ ************************************************************/
+
+void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
+{
+  up_ledon(LED_HEAPALLOCATE);
+  *heap_start = (FAR void*)g_heapbase;
+  *heap_size = CONFIG_DRAM_END - g_heapbase;
+}

arch/arm/src/common/up_arch.h

@@ -0,0 +1,92 @@
+/************************************************************************************
+ * common/up_arch.h
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __UP_ARCH_H
+#define __UP_ARCH_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+#ifndef __ASSEMBLY__
+# include <sys/types.h>
+#endif
+
+#include "arm.h"
+#include <arch/board/board.h>
+#include "chip.h"
+
+/************************************************************************************
+ * Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Inline Functions
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+# define getreg8(a)           (*(volatile ubyte *)(a))
+# define putreg8(v,a)         (*(volatile ubyte *)(a) = (v))
+# define getreg32(a)          (*(volatile uint32 *)(a))
+# define putreg32(v,a)        (*(volatile uint32 *)(a) = (v))
+
+/* Some compiler options will convert short loads and stores into byte loads
+ * and stores.  We don't want this to happen for IO reads and writes!
+ */
+
+/* # define getreg16(a)       (*(volatile uint16 *)(a)) */
+static inline uint16 getreg16(unsigned int addr)
+{
+  uint16 retval;
+ __asm__ __volatile__("\tldrh %0, [%1]\n\t" : "=r"(retval) : "r"(addr));
+  return retval;
+}
+
+/* define putreg16(v,a)       (*(volatile uint16 *)(a) = (v)) */
+static inline void putreg16(uint16 val, unsigned int addr)
+{
+ __asm__ __volatile__("\tstrh %0, [%1]\n\t": : "r"(val), "r"(addr));
+}
+
+/* Most DM320 registers are 16-bits wide */
+
+#define getreg(a)   getreg16(1)
+#define putreg(v,a) putreg16(v,a)
+
+#endif
+
+#endif  /* __UP_ARCH_H */

arch/arm/src/common/up_assert.c

@@ -0,0 +1,228 @@
+/************************************************************
+ * common/up_assert.c
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <stdlib.h>
+#include <assert.h>
+#include <debug.h>
+
+#include <nuttx/irq.h>
+#include <nuttx/arch.h>
+
+#include "up_arch.h"
+#include "os_internal.h"
+#include "up_internal.h"
+
+/************************************************************
+ * Definitions
+ ************************************************************/
+
+/* Output debug info if stack dump is selected -- even if 
+ * debug is not selected.
+ */
+
+#ifdef CONFIG_ARCH_STACKDUMP
+# undef  lldbg
+# define lldbg lib_lowprintf
+#endif
+
+/************************************************************
+ * Private Data
+ ************************************************************/
+
+/************************************************************
+ * Private Functions
+ ************************************************************/
+
+/************************************************************
+ * Name: up_getsp
+ ************************************************************/
+
+/* I don't know if the builtin to get SP is enabled */
+
+static inline uint32 up_getsp(void)
+{
+  uint32 sp;
+  __asm__
+  (
+    "\tmov %0, sp\n\t"
+    : "=r"(sp)
+  );
+  return sp;
+}
+
+/************************************************************
+ * Name: up_stackdump
+ ************************************************************/
+
+#ifdef CONFIG_ARCH_STACKDUMP
+static void up_stackdump(void)
+{
+  _TCB *rtcb        = (_TCB*)g_readytorun.head;
+  uint32 sp         = up_getsp();
+  uint32 stack_base;
+  uint32 stack_size;
+
+  if (rtcb->pid == 0)
+    {
+      stack_base = g_heapbase - 4;
+      stack_size = CONFIG_PROC_STACK_SIZE;
+    }
+  else
+    {
+      stack_base = (uint32)rtcb->adj_stack_ptr;
+      stack_size = (uint32)rtcb->adj_stack_size;
+    }
+
+  lldbg("stack_base: %08x\n", stack_base);
+  lldbg("stack_size: %08x\n", stack_size);
+  lldbg("sp:         %08x\n", sp);
+
+  if (sp >= stack_base || sp < stack_base - stack_size)
+    {
+      lldbg("ERROR: Stack pointer is not within allocated stack\n");
+      return;
+    }
+  else
+    {
+      uint32 stack = sp & ~0x1f;
+
+      for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
+        {
+          uint32 *ptr = (uint32*)stack;
+          lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+                 stack, ptr[0], ptr[1], ptr[2], ptr[3],
+                 ptr[4], ptr[5], ptr[6], ptr[7]);
+        }
+    }
+
+  if (current_regs)
+    {
+      int regs;
+
+      for (regs = REG_R0; regs <= REG_R15; regs += 8)
+        {
+          uint32 *ptr = (uint32*)&current_regs[regs];
+          lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
+                 regs, ptr[0], ptr[1], ptr[2], ptr[3],
+                 ptr[4], ptr[5], ptr[6], ptr[7]);
+        }
+      lldbg("CPSR: %08x\n", current_regs[REG_CPSR]);
+    }
+}
+#else
+# define up_stackdump()
+#endif
+
+/************************************************************
+ * Name: _up_assert
+ ************************************************************/
+
+static void _up_assert(int errorcode) /* __attribute__ ((noreturn)) */
+{
+  /* Are we in an interrupt handler or the idle task? */
+
+  if (current_regs || ((_TCB*)g_readytorun.head)->pid == 0)
+    {
+       (void)irqsave();
+        for(;;)
+          {
+#ifdef CONFIG_ARCH_LEDS
+            up_ledon(LED_PANIC);
+            up_mdelay(250);
+            up_ledoff(LED_PANIC);
+            up_mdelay(250);
+#endif
+          }
+    }
+  else
+    {
+      exit(errorcode);
+    }
+}
+
+/************************************************************
+ * Public Funtions
+ ************************************************************/
+
+/************************************************************
+ * Name: up_assert
+ ************************************************************/
+
+void up_assert(const ubyte *filename, int lineno)
+{
+#if CONFIG_TASK_NAME_SIZE > 0
+  _TCB *rtcb = (_TCB*)g_readytorun.head;
+#endif
+
+  up_ledon(LED_ASSERTION);
+#if CONFIG_TASK_NAME_SIZE > 0
+  lldbg("Assertion failed at file:%s line: %d task: %s\n",
+        filename, lineno, rtcb->name);
+#else
+  lldbg("Assertion failed at file:%s line: %d\n",
+        filename, lineno);
+#endif
+  up_stackdump();
+  _up_assert(EXIT_FAILURE);
+}
+
+/************************************************************
+ * Name: up_assert_code
+ ************************************************************/
+
+void up_assert_code(const ubyte *filename, int lineno, int errorcode)
+{
+#if CONFIG_TASK_NAME_SIZE > 0
+  _TCB *rtcb = (_TCB*)g_readytorun.head;
+#endif
+
+  up_ledon(LED_ASSERTION);
+#if CONFIG_TASK_NAME_SIZE > 0
+  lldbg("Assertion failed at file:%s line: %d task: %s error code: %d\n",
+        filename, lineno, rtcb->name, errorcode);
+#else
+  lldbg("Assertion failed at file:%s line: %d error code: %d\n",
+        filename, lineno, errorcode);
+#endif
+  up_stackdump();
+  _up_assert(errorcode);
+}

arch/arm/src/common/up_blocktask.c

@@ -0,0 +1,164 @@
+/************************************************************
+ * common/up_blocktask.c
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include <sched.h>
+#include <debug.h>
+#include <nuttx/arch.h>
+#include "os_internal.h"
+#include "up_internal.h"
+
+/************************************************************
+ * Private Definitions
+ ************************************************************/
+
+/************************************************************
+ * Private Data
+ ************************************************************/
+
+/************************************************************
+ * Private Funtions
+ ************************************************************/
+
+/************************************************************
+ * Public Funtions
+ ************************************************************/
+
+/************************************************************
+ * Name: up_block_task
+ *
+ * Description:
+ *   The currently executing task at the head of
+ *   the ready to run list must be stopped.  Save its context
+ *   and move it to the inactive list specified by task_state.
+ *
+ * Inputs:
+ *   tcb: Refers to a task in the ready-to-run list (normally
+ *     the task at the the head of the list).  It most be
+ *     stopped, its context saved and moved into one of the
+ *     waiting task lists.  It it was the task at the head
+ *     of the ready-to-run list, then a context to the new
+ *     ready to run task must be performed.
+ *   task_state: Specifies which waiting task list should be
+ *     hold the blocked task TCB.
+ *
+ ************************************************************/
+
+void up_block_task(_TCB *tcb, tstate_t task_state)
+{
+  /* Verify that the context switch can be performed */
+
+  if ((tcb->task_state < FIRST_READY_TO_RUN_STATE) ||
+      (tcb->task_state > LAST_READY_TO_RUN_STATE))
+    {
+      PANIC(OSERR_BADBLOCKSTATE);
+    }
+  else
+    {
+      _TCB *rtcb = (_TCB*)g_readytorun.head;
+      boolean switch_needed;
+
+      /* Remove the tcb task from the ready-to-run list.  If we
+       * are blocking the task at the head of the task list (the
+       * most likely case), then a context switch to the next
+       * ready-to-run task is needed. In this case, it should
+       * also be true that rtcb == tcb.
+       */
+
+      switch_needed = sched_removereadytorun(tcb);
+
+      /* Add the task to the specified blocked task list */
+
+      sched_addblocked(tcb, (tstate_t)task_state);
+
+      /* If there are any pending tasks, then add them to the g_readytorun
+       * task list now
+       */
+
+      if (g_pendingtasks.head)
+        {
+          switch_needed |= sched_mergepending();
+        }
+
+      /* Now, perform the context switch if one is needed */
+
+      if (switch_needed)
+        {
+          /* Are we in an interrupt handler? */
+
+          if (current_regs)
+            {
+              /* Yes, then we have to do things differently.
+               * Just copy the current_regs into the OLD rtcb.
+               */
+
+               up_copystate(rtcb->xcp.regs, current_regs);
+
+              /* Restore the exception context of the rtcb at the (new) head 
+               * of the g_readytorun task list.
+               */
+
+              rtcb = (_TCB*)g_readytorun.head;
+
+              /* Then switch contexts */
+
+              up_copystate(current_regs, rtcb->xcp.regs);
+            }
+
+          /* Copy the user C context into the TCB at the (old) head of the
+           * g_readytorun Task list. if up_saveusercontext returns a non-zero
+           * value, then this is really the previously running task restarting!
+           */
+
+          else if (!up_saveusercontext(rtcb->xcp.regs))
+            {
+              /* Restore the exception context of the rtcb at the (new) head 
+               * of the g_readytorun task list.
+               */
+
+              rtcb = (_TCB*)g_readytorun.head;
+
+              /* Then switch contexts */
+
+              up_fullcontextrestore(rtcb->xcp.regs);
+            }
+        }
+    }
+}

arch/arm/src/common/up_cache.S

@@ -0,0 +1,74 @@
+/********************************************************************
+ * common/up_cache.S
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************/
+
+/********************************************************************
+ * Included Files
+ ********************************************************************/
+
+#include <nuttx/config.h>
+#include "up_internal.h"
+#include "up_arch.h"
+
+/********************************************************************
+ * Definitions
+ ********************************************************************/
+
+#define CACHE_DLINESIZE    32
+
+/********************************************************************
+ * Assembly Macros
+ ********************************************************************/
+
+/**************************************************************************
+ * Name: up_flushicache
+ **************************************************************************/
+
+/* Esure coherency between the Icache and the Dcache in the region described 
+ * by r0=start and r1=end.
+ */
+	.globl	up_flushicache
+	.type	up_flushicache,%function
+up_flushicache:
+	bic	r0, r0, #CACHE_DLINESIZE - 1
+1:	mcr	p15, 0, r0, c7, c10, 1		/* Clean D entry */
+	mcr	p15, 0, r0, c7, c5, 1		/* Invalidate I entry */
+	add	r0, r0, #CACHE_DLINESIZE
+	cmp	r0, r1
+	blo	1b
+	mcr	p15, 0, r0, c7, c10, 4		/* Drain WB */
+	mov	pc, lr
+	.size	up_flushicache, .-up_flushicache
+	.end
+

arch/arm/src/common/up_copystate.c

@@ -0,0 +1,75 @@
+/************************************************************
+ * common/up_copystate.c
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include "os_internal.h"
+#include "up_internal.h"
+
+/************************************************************
+ * Definitions
+ ************************************************************/
+
+/************************************************************
+ * Private Data
+ ************************************************************/
+
+/************************************************************
+ * Private Functions
+ ************************************************************/
+
+/************************************************************
+ * Public Funtions
+ ************************************************************/
+
+/************************************************************
+ * Name: up_undefinedinsn
+ ************************************************************/
+
+/* A little faster than most memcpy's */
+
+void up_copystate(uint32 *dest, uint32 *src)
+{
+  int i;
+  for (i = 0; i < XCPTCONTEXT_REGS; i++)
+    {
+      *dest++ = *src++;
+    }
+}
+

arch/arm/src/common/up_createstack.c

@@ -0,0 +1,128 @@
+/************************************************************
+ * common/up_createstack.c
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include <sched.h>
+#include <debug.h>
+#include <nuttx/kmalloc.h>
+#include <nuttx/arch.h>
+#include "up_arch.h"
+#include "up_internal.h"
+
+/************************************************************
+ * Private Types
+ ************************************************************/
+
+/************************************************************
+ * Private Function Prototypes
+ ************************************************************/
+
+/************************************************************
+ * Global Functions
+ ************************************************************/
+
+/************************************************************
+ * Name: up_create_stack
+ *
+ * Description:
+ *   Allocate a stack for a new thread and setup
+ *   up stack-related information in the TCB.
+ *
+ *   The following TCB fields must be initialized:
+ *   adj_stack_size: Stack size after adjustment for hardware,
+ *     processor, etc.  This value is retained only for debug
+ *     purposes.
+ *   stack_alloc_ptr: Pointer to allocated stack
+ *   adj_stack_ptr: Adjusted stack_alloc_ptr for HW.  The
+ *     initial value of the stack pointer.
+ *
+ * Inputs:
+ *   tcb: The TCB of new task
+ *   stack_size:  The requested stack size.  At least this much
+ *     must be allocated.
+ ************************************************************/
+
+STATUS up_create_stack(_TCB *tcb, size_t stack_size)
+{
+  if (tcb->stack_alloc_ptr &&
+      tcb->adj_stack_size != stack_size)
+    {
+      sched_free(tcb->stack_alloc_ptr);
+      tcb->stack_alloc_ptr = NULL;
+    }
+
+   if (!tcb->stack_alloc_ptr)
+     {
+       tcb->stack_alloc_ptr = (uint32 *)kzmalloc(stack_size);
+     }
+
+   if (tcb->stack_alloc_ptr)
+     {
+       size_t top_of_stack;
+       size_t size_of_stack;
+
+       /* The Arm7Tdmi uses a push-down stack:  the stack grows
+	* toward loweraddresses in memory.  The stack pointer
+	* register, points to the lowest, valid work address
+	* (the "top" of the stack).  Items on the stack are
+	* referenced as positive word offsets from sp.
+	*/
+
+       top_of_stack = (uint32)tcb->stack_alloc_ptr + stack_size - 4;
+
+       /* The Arm7Tdmi stack must be aligned at word (4 byte)
+	* boundaries. If necessary top_of_stack must be rounded
+	* down to the next boundary
+	*/
+
+       top_of_stack &= ~3;
+       size_of_stack = top_of_stack - (uint32)tcb->stack_alloc_ptr + 4;
+
+       /* Save the adjusted stack values in the _TCB */
+
+       tcb->adj_stack_ptr  = (uint32*)top_of_stack;
+       tcb->adj_stack_size = size_of_stack;
+
+       up_ledon(LED_STACKCREATED);
+       return OK;
+     }
+
+   return ERROR;
+}

arch/arm/src/common/up_dataabort.c

@@ -0,0 +1,81 @@
+/************************************************************
+ * common/up_dataabort.c
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include <debug.h>
+#include <nuttx/irq.h>
+#include "os_internal.h"
+#include "up_internal.h"
+
+/************************************************************
+ * Definitions
+ ************************************************************/
+
+/* Output debug info if stack dump is selected -- even if 
+ * debug is not selected.
+ */
+
+#ifdef CONFIG_ARCH_STACKDUMP
+# undef  lldbg
+# define lldbg lib_lowprintf
+#endif
+
+/************************************************************
+ * Private Data
+ ************************************************************/
+
+/************************************************************
+ * Private Functions
+ ************************************************************/
+
+/************************************************************
+ * Public Funtions
+ ************************************************************/
+
+/************************************************************
+ * Name: up_dataabort
+ ************************************************************/
+
+void up_dataabort(uint32 *regs)
+{
+  lldbg("Data abort at 0x%x\n", regs[REG_PC]);
+  current_regs = regs;
+  PANIC(OSERR_ERREXCEPTION);
+}

arch/arm/src/common/up_doirq.c

@@ -0,0 +1,104 @@
+/************************************************************
+ * common/up_doirq.c
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include <nuttx/irq.h>
+#include <nuttx/arch.h>
+#include <assert.h>
+#include "up_arch.h"
+#include "os_internal.h"
+#include "up_internal.h"
+
+/************************************************************
+ * Definitions
+ ************************************************************/
+
+/************************************************************
+ * Public Data
+ ************************************************************/
+
+/************************************************************
+ * Private Data
+ ************************************************************/
+
+/************************************************************
+ * Private Functions
+ ************************************************************/
+
+/************************************************************
+ * Public Funtions
+ ************************************************************/
+
+void up_doirq(int irq, uint32* regs)
+{
+  up_ledon(LED_INIRQ);
+#ifdef CONFIG_SUPPRESS_INTERRUPTS
+  PANIC(OSERR_ERREXCEPTION);
+#else
+  if ((unsigned)irq < NR_IRQS)
+    {
+       /* Current regs non-zero indicates that we are processing
+        * an interrupt; current_regs is also used to manage
+        * interrupt level context switches.
+        */
+
+       current_regs = regs;
+
+       /* Mask and acknowledge the interrupt */
+
+       up_maskack_irq(irq);
+
+       /* Deliver the IRQ */
+
+       irq_dispatch(irq, regs);
+
+       /* Indicate that we are no long in an interrupt handler */
+
+       current_regs = NULL;
+
+       /* Unmask the last interrupt (global interrupts are still
+        * disabled.
+        */
+
+       up_enable_irq(irq);
+    }
+  up_ledoff(LED_INIRQ);
+#endif
+}

arch/arm/src/common/up_exit.c

@@ -0,0 +1,188 @@
+/************************************************************
+ * common/up_exit.c
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include <sched.h>
+#include <debug.h>
+#include <nuttx/arch.h>
+#include "os_internal.h"
+#include "up_internal.h"
+
+#ifdef CONFIG_DUMP_ON_EXIT
+#include <nuttx/fs.h>
+#endif
+
+/************************************************************
+ * Private Definitions
+ ************************************************************/
+
+/************************************************************
+ * Private Data
+ ************************************************************/
+
+/************************************************************
+ * Private Funtions
+ ************************************************************/
+
+/************************************************************
+ * Name: _up_dumponexit
+ *
+ * Description:
+ *   Dump the state of all tasks whenever on task exits.  This
+ *   is debug instrumentation that was added to check file-
+ *   related reference counting but could be useful again
+ *   sometime in the future.
+ *
+ ************************************************************/
+
+#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
+static void _up_dumponexit(FAR _TCB *tcb, FAR void *arg)
+{
+  int i;
+  dbg("  TCB=%p name=%s\n", tcb, tcb->argv[0]);
+  if (tcb->filelist)
+    {
+      dbg("    filelist refcount=%d\n",
+          tcb->filelist->fl_crefs);
+
+      for (i = 0; i < CONFIG_NFILE_DESCRIPTORS; i++)
+        {
+          struct inode *inode = tcb->filelist->fl_files[i].f_inode;
+          if (inode)
+            {
+              dbg("      fd=%d refcount=%d\n",
+                  i, inode->i_crefs);
+            }
+        }
+    }
+
+  if (tcb->streams)
+    {
+      dbg("    streamlist refcount=%d\n",
+          tcb->streams->sl_crefs);
+
+      for (i = 0; i < CONFIG_NFILE_STREAMS; i++)
+        {
+          struct file_struct *filep = &tcb->streams->sl_streams[i];
+          if (filep->fs_filedes >= 0)
+            {
+              dbg("      fd=%d nbytes=%d\n",
+                  filep->fs_filedes,
+                  filep->fs_bufpos - filep->fs_bufstart);
+            }
+        }
+    }
+}
+#endif
+
+/************************************************************
+ * Public Funtions
+ ************************************************************/
+
+/************************************************************
+ * Name: _exit
+ *
+ * Description:
+ *   This function causes the currently executing task to cease
+ *   to exist.  This is a special case of task_delete().
+ *
+ ************************************************************/
+
+void _exit(int status)
+{
+  _TCB* tcb = (_TCB*)g_readytorun.head;
+
+  /* Disable interrupts.  They will be restored when the next
+   * task is started.
+   */
+
+  (void)irqsave();
+
+  lldbg("TCB=%p exitting\n", tcb);
+
+#if defined(CONFIG_DUMP_ON_EXIT) && defined(CONFIG_DEBUG)
+  dbg("Other tasks:\n");
+  sched_foreach(_up_dumponexit, NULL);
+#endif
+
+  /* Remove the tcb task from the ready-to-run list.  We can
+   * ignore the return value because we know that a context
+   * switch is needed.
+   */
+
+  (void)sched_removereadytorun(tcb);
+
+  /* We are not in a bad stack-- the head of the ready to run task list
+   * does not correspond to the thread that is running.  Disabling pre-
+   * emption on this TCB should be enough to keep things stable.
+   */
+
+  sched_lock();
+
+  /* Move the TCB to the specified blocked task list and delete it */
+
+  sched_addblocked(tcb, TSTATE_TASK_INACTIVE);
+  task_delete(tcb->pid);
+
+  /* If there are any pending tasks, then add them to the g_readytorun
+   * task list now
+   */
+
+  if (g_pendingtasks.head)
+    {
+      (void)sched_mergepending();
+    }
+
+  /* Now calling sched_unlock() should have no effect */
+
+  sched_unlock();
+
+  /* Now, perform the context switch to the new ready-to-run task at the
+   * head of the list.
+   */
+
+  tcb = (_TCB*)g_readytorun.head;
+  lldbg("New Active Task TCB=%p\n", tcb);
+
+  /* Then switch contexts */
+
+  up_fullcontextrestore(tcb->xcp.regs);
+}
+

arch/arm/src/common/up_fullcontextrestore.S

@@ -0,0 +1,117 @@
+/**************************************************************************
+ * common/up_fullcontextrestore.S
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ **************************************************************************/
+
+/**************************************************************************
+ * Included Files
+ **************************************************************************/
+
+#include <nuttx/irq.h>
+#include "up_internal.h"
+
+/**************************************************************************
+ * Private Definitions
+ **************************************************************************/
+
+/**************************************************************************
+ * Private Types
+ **************************************************************************/
+
+/**************************************************************************
+ * Private Function Prototypes
+ **************************************************************************/
+
+/**************************************************************************
+ * Global Variables
+ **************************************************************************/
+
+/**************************************************************************
+ * Private Variables
+ **************************************************************************/
+
+/**************************************************************************
+ * Private Functions
+ **************************************************************************/
+
+/**************************************************************************
+ * Public Functions
+ **************************************************************************/
+
+/**************************************************************************
+ * Name: up_fullcontextrestore
+ **************************************************************************/
+
+	.globl	up_fullcontextrestore
+	.type	up_fullcontextrestore, function
+up_fullcontextrestore:
+
+	/* On entry, a1 (r0) holds address of the register save area */
+
+	/* Recover all registers except for r0, r1, R15, and CPSR */
+
+	add	r1, r0, #(4*REG_R2)	/* Offset to REG_R2 storage */
+	ldmia	r1, {r2-r14}		/* Recover registers */
+
+	/* Create a stack frame to hold the PC */
+
+	sub	sp, sp, #(3*4)		/* Frame for three registers */
+	ldr	r1, [r0, #(4*REG_R0)]	/* Fetch the stored r0 value */
+	str	r1, [sp]		/* Save it at the top of the stack */
+	ldr	r1, [r0, #(4*REG_R1)]	/* Fetch the stored r1 value */
+	str	r1, [sp, #4]		/* Save it in the stack */
+	ldr	r1, [r0, #(4*REG_PC)]	/* Fetch the stored pc value */
+	str	r1, [sp, #8]		/* Save it at the bottom of the frame */
+
+	/* Now we can restore the CPSR.  We wait until we are completely
+	 * finished with the context save data to do this. Restore the CPSR
+	 * may re-enable and interrupts and we couldt be in a context
+	 * where save structure is only protected by interrupts being disabled.
+         */
+
+	ldr	r1, [r0, #(4*REG_CPSR)]	/* Fetch the stored CPSR value */
+	msr	cpsr, r1		/* Set the CPSR */
+
+	/* Now recover r0 and r1 */
+
+	ldr	r0, [sp]
+	ldr	r1, [sp, #4]
+	add	sp, sp, #(2*4)
+
+	/* Then return to the address at the stop of the stack,
+	 * destroying the stack frame
+	 */
+
+	ldr	pc, [sp], #4
+	.size up_fullcontextrestore, . - up_fullcontextrestore
+

arch/arm/src/common/up_head.S

@@ -0,0 +1,324 @@
+/********************************************************************
+ * common/up_head.S
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************/
+
+/********************************************************************
+ * Included Files
+ ********************************************************************/
+
+#include <nuttx/config.h>
+#include "up_internal.h"
+#include "up_arch.h"
+
+/**************************************************************************
+ * Conditional Compilation
+ **************************************************************************/
+
+#undef ALIGNMENT_TRAP
+#undef CPU_DCACHE_WRITETHROUGH
+#undef CPU_CACHE_ROUND_ROBIN
+#undef CPU_DCACHE_DISABLE
+#undef CPU_ICACHE_DISABLE
+
+/********************************************************************
+ * Definitions
+ ********************************************************************/
+
+/* The physical address of the beginning of SDRAM is provided by
+ * CONFIG_DRAM_START.  The size of installed SDRAM is provided by
+ * CONFIG_DRAM_SIZE.  The virtual address of SDRAM is provided by
+ * CONFIG_DRAM_VSTART.
+ */
+
+#define NSDRAM_SECTIONS (CONFIG_DRAM_SIZE >> 20)
+
+/********************************************************************
+ * Assembly Macros
+ ********************************************************************/
+
+/* Since the page table is closely related to the NuttX base
+ * address, we can convert the page table base address to the
+ * base address of the section containing both.
+ */
+
+	.macro	mksection, section, pgtable
+	bic	\section, \pgtable, #0x000ff000
+	.endm
+
+/* This macro will modify r0, r1, r2 and r14 */
+
+#ifdef CONFIG_DEBUG
+	.macro	showprogress, code
+	mov	r0, #\code
+	bl	up_lowputc
+	.endm
+#else
+	.macro	showprogress, code
+	.endm
+#endif
+
+/********************************************************************
+ * Name: __start
+ ********************************************************************/
+
+/* We assume the bootloader has already initialized most of the h/w for
+ * us and that only leaves us having to do some os specific things
+ * below.
+ */
+	.text
+        .global __start
+	.type	__start, #function
+__start:
+	/* Make sure that we are in SVC mode with all IRQs disabled */
+
+	mov	r0, #(SVC_MODE | PSR_I_BIT | PSR_F_BIT)
+	msr	cpsr_c, r0
+
+	/* Clear the 16K level 1 page table */
+
+	ldr	r4, .LCppgtable		/* r4=phys. page table */
+	mov	r0, r4
+	mov	r1, #0
+	add	r2, r0, #PGTABLE_SIZE
+.Lpgtableclear:
+	str	r1, [r0], #4
+	str	r1, [r0], #4
+	str	r1, [r0], #4
+	str	r1, [r0], #4
+	teq	r0, r2
+	bne	.Lpgtableclear
+
+	/* Create identity mapping for first MB section to support
+	 * this startup logic executing out of the physical address
+	 * space.  This identity mapping will be removed by .Lvstart
+	 * (see below).
+	 */
+
+	mksection r0, r4			/* r0=phys. base section */
+	ldr	r1, .LCmmuflags		/* FLGS=MMU_MEMFLAGS */
+	add	r3, r1, r0		/* r3=flags + base */
+	str	r3, [r4, r0, lsr #18]	/* identity mapping */
+
+	/* Create a "normal" single section mapping for the first
+	 * MB of memory.  Now, we have the first 1MB mapping to
+	 * both phyical and virtual addresses.  The reset of the
+	 * SDRAM mapping will be completed in .Lvstart once we have
+	 * moved the physical mapping out of the way.
+	 */
+
+	ldr	r2, .LCvpgtable		/* r2=virt. page table */
+	mksection r0, r2			/* r0=virt. base section */
+	str	r3, [r4, r0, lsr #18]	/* identity mapping */
+
+	/* The following logic will set up the ARM926 for normal operation */
+
+	mov	r0, #0
+	mcr	p15, 0, r0, c7, c7		/* Invalidate I,D caches */
+	mcr	p15, 0, r0, c7, c10, 4	/* Drain write buffer */
+	mcr	p15, 0, r0, c8, c7		/* Invalidate I,D TLBs */
+	mcr	p15, 0, r4, c2, c0		/* Load page table pointer */
+
+#ifdef CPU_DCACHE_WRITETHROUGH
+	mov	r0, #4			/* Disable write-back on caches explicitly */
+	mcr	p15, 7, r0, c15, c0, 0
+#endif 
+
+	/* Enable the MMU and caches
+	 * lr = Resume at .Lvstart with the MMU enabled
+	 */
+
+	ldr	lr, .LCvstart			/* Abs. virtual address */
+
+	mov	r0, #0x1f			/* Domains 0, 1 = client */
+	mcr	p15, 0, r0, c3, c0		/* Load domain access register */
+	mrc	p15, 0, r0, c1, c0		/* Get control register */
+	
+	/* Clear bits (see start.h) */
+
+	bic	r0, r0, #(CR_R|CR_F|CR_Z)
+	bic	r0, r0, #(CR_A|CR_C|CR_W)
+	bic	r0, r0, #(CR_I)
+
+	/* Set bits (see start.h) */
+
+	orr	r0, r0, #(CR_M|CR_P|CR_D)
+	orr	r0, r0, #(CR_S|CR_V)
+
+#ifdef CPU_CACHE_ROUND_ROBIN
+	orr	r0, r0, #(CR_RR)
+#endif
+#ifndef CPU_DCACHE_DISABLE
+	orr	r0, r0, #(CR_C)
+#endif
+#ifndef CPU_ICACHE_DISABLE
+	orr	r0, r0, #(CR_I)
+#endif
+#ifdef ALIGNMENT_TRAP
+	orr	r0, r0, #(CR_A)
+#endif
+	mcr	p15, 0, r0, c1, c0, 0		/* write control reg */
+
+	/* Get TMP=2 Processor ID register */
+
+	mrc	p15, 0, r1, c0, c0, 0		/* read id reg */
+	mov	r1, r1
+	mov	r1, r1
+
+	mov	pc, lr
+
+/**************************************************************************
+ * PC_Relative Data
+ **************************************************************************/
+
+	/* These addresses are all virtual address */
+	
+	.type	.LCvstart, %object
+.LCvstart:
+	.long	.Lvstart
+	.type	.LCmmuflags, %object
+.LCmmuflags:
+	.long	MMU_MEMFLAGS
+	.type	.LCppagetable, %object
+.LCppgtable:
+	.long	CONFIG_DRAM_START  /* Physical start of DRAM */
+	.type	.LCvpagetable, %object
+.LCvpgtable:
+	.long	CONFIG_DRAM_VSTART /* Virtual start of DRAM */
+	.size	_start, .-_start
+
+/**************************************************************************
+ * Name: .Lvstart
+ **************************************************************************/
+
+/* The following is executed after the MMU has been enabled. This uses
+ * absolute addresses; this is not position independent.
+ */
+	.align	5
+	.local	.Lvstart
+	.type	.Lvstart, %function
+.Lvstart:
+
+	/* Remove the temporary null mapping */
+
+	ldr	r4, .LCvpgtable		/* r4=virtual page table */
+	ldr	r1, .LCppgtable		/* r1=phys. page table */
+	mksection r3, r1			/* r2=phys. base addr */
+	mov	r0, #0			/* flags + base = 0 */
+	str	r0, [r4, r3, lsr #18]	/* Undo identity mapping */
+
+	/* Now setup the pagetables for our normal SDRAM mappings
+	 * mapped region.  We round NUTTX_START_VADDR down to the
+	 * nearest megabyte boundary.
+	 */
+
+	ldr	r1, .LCmmuflags		/* FLGS=MMU_MEMFLAGS */
+	add	r3, r3, r1		/* r3=flags + base */
+
+	add	r0, r4, #(NUTTX_START_VADDR & 0xff000000) >> 18
+	bic	r2, r3, #0x00f00000
+	str	r2, [r0]
+
+	add	r0, r0, #(NUTTX_START_VADDR & 0x00f00000) >> 18
+	str	r3, [r0], #4
+
+	/* Now map the remaining NSDRAM_SECTIONS-1 SDRAM sections */
+
+	.rept	NSDRAM_SECTIONS-1
+	add	r3, r3, #SECTION_SIZE
+	str	r3, [r0], #4
+	.endr
+
+	/* Zero BSS and set up the stack pointer */
+
+	adr	r0, .Linitparms
+	ldmia	r0, {r0, r1, sp}
+
+	/* Clear the frame pointer and .bss */
+
+	mov     fp, #0
+
+.Lbssinit:	
+	cmp     r0, r1		       /* Clear up to _bss_end_ */
+	strcc	fp, [r0],#4
+	bcc	.Lbssinit
+
+	/* Perform early C-level initialization */
+
+	bl	up_boot
+
+	/* Set up the LEDs */
+
+#ifdef CONFIG_ARCH_LEDS
+	bl	up_ledinit
+#endif
+	/* Perform early serial initialization */
+
+#ifdef CONFIG_DEV_CONSOLE
+	bl      up_earlyserialinit
+#endif
+
+	/* Finally branch to the OS entry point */
+
+	mov	lr, #0
+	b	os_start
+
+	/* Variables:
+	 * _sbss is the start of the BSS region (see ld.script)
+	 * _ebss is the end of the BSS regsion (see ld.script)
+	 * The idle task stack starts at the end of BSS and is
+	 * of size CONFIG_PROC_STACK_SIZE.  The heap continues
+	 * from there until the end of memory.  See g_heapbase
+	 * below.
+	 */
+
+.Linitparms:
+	.long	_sbss
+	.long	_ebss
+	.long	_ebss+CONFIG_PROC_STACK_SIZE-4
+	.size	.Lvstart, .-.Lvstart
+
+	/* This global variable is unsigned long g_heapbase and is
+	 * exported from here only because of its coupling to .Linitparms
+	 * above.
+	 */
+
+	.data
+	.align	4
+	.globl	g_heapbase
+	.type	g_heapbase, object
+g_heapbase:
+	.long	_ebss+CONFIG_PROC_STACK_SIZE
+	.size	g_heapbase, .-g_heapbase
+	.end
+

arch/arm/src/common/up_idle.c

@@ -0,0 +1,87 @@
+/************************************************************
+ * common/up_idle.c
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include <nuttx/arch.h>
+#include "up_internal.h"
+
+/************************************************************
+ * Private Definitions
+ ************************************************************/
+
+/************************************************************
+ * Private Data
+ ************************************************************/
+
+/************************************************************
+ * Private Funtions
+ ************************************************************/
+
+/************************************************************
+ * Public Funtions
+ ************************************************************/
+
+/************************************************************
+ * Name: up_idle
+ *
+ * Description:
+ *   up_idle() is the logic that will be executed when their
+ *   is no other ready-to-run task.  This is processor idle
+ *   time and will continue until some interrupt occurs to
+ *   cause a context switch from the idle task.
+ *
+ *   Processing in this state may be processor-specific. e.g.,
+ *   this is where power management operations might be
+ *   performed.
+ *
+ ************************************************************/
+
+void up_idle(void)
+{
+#if defined(CONFIG_SUPPRESS_INTERRUPTS) || defined(CONFIG_SUPPRESS_TIMER_INTS)
+  /* If the system is idle and there are no timer interrupts,
+   * then process "fake" timer interrupts. Hopefully, something
+   * will wake up.
+   */
+
+  sched_process_timer();
+#endif
+}
+

arch/arm/src/common/up_initialize.c

@@ -0,0 +1,142 @@
+/****************************************************************************
+ * common/up_initialize.c
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include <debug.h>
+#include <nuttx/arch.h>
+#include <nuttx/fs.h>
+#include "up_arch.h"
+#include "up_internal.h"
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/* Define to enable timing loop calibration */
+
+#undef CONFIG_ARM_CALIBRATION
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_calibratedelay
+ *
+ * Description:
+ *   Delay loops are provided for short timing loops.  This function, if
+ *   enabled, will just wait for 100 seconds.  Using a stopwatch, you can
+ *   can then determine if the timing loops are properly calibrated.
+ *
+ ****************************************************************************/
+
+#if defined(CONFIG_ARM_CALIBRATION) & defined(CONFIG_DEBUG)
+static void up_calibratedelay(void)
+{
+  int i;
+  lldbg("Beginning 100s delay\n");
+  for (i = 0; i < 100; i++)
+    {
+      up_mdelay(1000);
+    }
+  lldbg("End 100s delay\n");
+}
+#else
+# define up_calibratedelay()
+#endif
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_initialize
+ *
+ * Description:
+ *   up_initialize will be called once during OS initialization after the
+ *   basic OS services have been initialized.  The architecture specific
+ *   details of initializing the OS will be handled here.  Such things as
+ *   setting up interrupt service routines, starting the clock, and
+ *   registering device drivers are some of the things that are different
+ *   for each processor and hardware platform.
+ *
+ *   up_initialize is called after the OS initialized but before the user
+ *   initialization logic has been started and before the libraries have
+ *   been initialized.  OS services and driver services are available.
+ *
+ ****************************************************************************/
+
+void up_initialize(void)
+{
+  /* Initialize global variables */
+
+  current_regs = NULL;
+
+  /* Calibrate the timing loop */
+
+  up_calibratedelay();
+
+  /* Initialize the interrupt subsystem */
+
+  up_irqinitialize();
+
+  /* Initialize the system timer interrupt */
+
+#if !defined(CONFIG_SUPPRESS_INTERRUPTS) && !defined(CONFIG_SUPPRESS_TIMER_INTS)
+  up_timerinit();
+#endif
+
+  /* Register devices */
+
+  devnull_register();   /* Standard /dev/null */
+
+  /* Initialize the serial device driver */
+
+  up_serialinit();
+
+  /* Initialize the netwok */
+
+  up_netinitialize();
+  up_ledon(LED_IRQSENABLED);
+}

arch/arm/src/common/up_initialstate.c

@@ -0,0 +1,91 @@
+/************************************************************
+ * common/up_initialstate.c
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include <string.h>
+#include <nuttx/arch.h>
+#include "up_internal.h"
+#include "up_arch.h"
+
+/************************************************************
+ * Private Definitions
+ ************************************************************/
+
+/************************************************************
+ * Private Data
+ ************************************************************/
+
+/************************************************************
+ * Private Funtions
+ ************************************************************/
+
+/************************************************************
+ * Public Funtions
+ ************************************************************/
+
+/************************************************************
+ * Name: up_initial_state
+ *
+ * Description:
+ *   A new thread is being started and a new TCB
+ *   has been created. This function is called to initialize
+ *   the processor specific portions of the new TCB.
+ *
+ *   This function must setup the intial architecture registers
+ *   and/or  stack so that execution will begin at tcb->start
+ *   on the next context switch.
+ *
+ ************************************************************/
+
+void up_initial_state(_TCB *tcb)
+{
+  struct xcptcontext *xcp = &tcb->xcp;
+
+  /* Initialize the initial exception register context structure */
+
+  memset(xcp, 0, sizeof(struct xcptcontext));
+  xcp->regs[REG_SP]   = (uint32)tcb->adj_stack_ptr;
+  xcp->regs[REG_PC]   = (uint32)tcb->start;
+#ifdef CONFIG_SUPPRESS_INTERRUPTS
+  xcp->regs[REG_CPSR] = SVC_MODE | PSR_I_BIT | PSR_F_BIT;
+#else
+  xcp->regs[REG_CPSR] = SVC_MODE | PSR_F_BIT;
+#endif
+}

arch/arm/src/common/up_internal.h

@@ -0,0 +1,168 @@
+/************************************************************
+ * common/up_internal.h
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+#ifndef __UP_INTERNAL_H
+#define __UP_INTERNAL_H
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+/************************************************************
+ * Definitions
+ ************************************************************/
+
+/* Bring-up debug configurations.  These are here (vs defconfig)
+ * because these should only be controlled during low level
+ * board bring-up and not part of normal platform configuration.
+ */
+
+#undef  CONFIG_SUPPRESS_INTERRUPTS    /* Do not enable interrupts */
+#undef  CONFIG_SUPPRESS_TIMER_INTS    /* No timer */
+#undef  CONFIG_SUPPRESS_SERIAL_INTS   /* Console will poll */
+#undef  CONFIG_SUPPRESS_UART_CONFIG   /* Do not reconfig UART */
+#define CONFIG_DUMP_ON_EXIT         1 /* Dump task state on exit */
+
+/************************************************************
+ * Public Types
+ ************************************************************/
+
+#ifndef __ASSEMBLY__
+typedef void (*up_vector_t)(void);
+#endif
+
+/************************************************************
+ * Public Variables
+ ************************************************************/
+
+#ifndef __ASSEMBLY__
+/* This holds a references to the current interrupt level
+ * register storage structure.  If is non-NULL only during
+ * interrupt processing.
+ */
+
+extern uint32 *current_regs;
+
+/* This is the beginning of heap as provided from up_head.S.
+ * This is the first address in DRAM after the loaded
+ * program+bss+idle stack.  The end of the heap is
+ * CONFIG_DRAM_END
+ */
+
+extern uint32 g_heapbase;
+#endif
+
+/************************************************************
+ * Inline Functions
+ ************************************************************/
+
+
+/************************************************************
+ * Public Functions
+ ************************************************************/
+
+#ifndef __ASSEMBLY__
+
+/* Defined in files with the same name as the function */
+
+extern void up_boot(void);
+extern void up_copystate(uint32 *dest, uint32 *src);
+extern void up_dataabort(uint32 *regs);
+extern void up_decodeirq(uint32 *regs);
+extern void up_doirq(int irq, uint32 *regs);
+extern void up_fullcontextrestore(uint32 *regs) __attribute__ ((noreturn));
+extern void up_irqinitialize(void);
+extern void up_prefetchabort(uint32 *regs);
+extern int  up_saveusercontext(uint32 *regs);
+extern void up_sigdeliver(void);
+extern void up_syscall(uint32 *regs);
+extern int  up_timerisr(int irq, uint32 *regs);
+extern void up_undefinedinsn(uint32 *regs);
+
+#ifdef CONFIG_DEBUG
+extern void up_lowputc(char ch);
+#else
+# define up_lowputc(ch)
+#endif
+
+/* Defined in up_vectors.S */
+
+extern void up_vectorundefinsn(void);
+extern void up_vectorswi(void);
+extern void up_vectorprefetch(void);
+extern void up_vectordata(void);
+extern void up_vectoraddrexcptn(void);
+extern void up_vectorirq(void);
+extern void up_vectorfiq(void);
+
+/* Defined in up_serial.c */
+
+extern void up_earlyserialinit(void);
+extern void up_serialinit(void);
+
+/* Defined in up_watchdog.c */
+
+extern void up_wdtinit(void);
+
+/* Defined in up_timerisr.c */
+
+extern void up_timerinit(void);
+
+/* Defined in up_irq.c */
+
+extern void up_maskack_irq(int irq);
+
+/* Defined in board/up_leds.c */
+
+#ifdef CONFIG_ARCH_LEDS
+extern void up_ledinit(void);
+extern void up_ledon(int led);
+extern void up_ledoff(int led);
+#else
+# define up_ledinit()
+# define up_ledon(led)
+# define up_ledoff(led)
+#endif
+
+/* Defined in board/up_network.c */
+
+#ifdef CONFIG_NET
+extern void up_netinitialize(void);
+#else
+# define up_netinitialize()
+#endif
+#endif /* __ASSEMBLY__ */
+
+#endif  /* __UP_INTERNAL_H */

arch/arm/src/common/up_interruptcontext.c

@@ -0,0 +1,68 @@
+/************************************************************
+ * common/up_interruptcontext.c
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include <nuttx/arch.h>
+#include <nuttx/irq.h>
+#include "up_internal.h"
+
+/************************************************************
+ * Private Types
+ ************************************************************/
+
+/************************************************************
+ * Private Function Prototypes
+ ************************************************************/
+
+/************************************************************
+ * Global Functions
+ ************************************************************/
+
+/************************************************************
+ * Name: up_interrupt_context
+ *
+ * Description: Return TRUE is we are currently executing in
+ * the interrupt handler context.
+ ************************************************************/
+
+boolean up_interrupt_context(void)
+{
+   return current_regs != NULL;
+}

arch/arm/src/common/up_mdelay.c

@@ -0,0 +1,90 @@
+/****************************************************************************
+ * common/up_mdelay.c
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+#include <nuttx/arch.h>
+
+/****************************************************************************
+ * Definitions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Variables
+ ****************************************************************************/
+
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: up_mdelay
+ *
+ * Description:
+ *   Delay inline for the requested number of milliseconds.
+ *   *** NOT multi-tasking friendly ***
+ *
+ * ASSUMPTIONS:
+ *   The setting CONFIG_BOARD_LOOPSPERMSEC has been calibrated
+ *
+ ****************************************************************************/
+
+void up_mdelay(unsigned int milliseconds)
+{
+  volatile int i;
+  volatile int j;
+
+  for (i = 0; i < milliseconds; i++)
+    {
+        for (j = 0; j < CONFIG_BOARD_LOOPSPERMSEC; j++)
+          {
+          }
+    }
+}

arch/arm/src/common/up_nommuhead.S

@@ -0,0 +1,162 @@
+/********************************************************************
+ * common/up_nommuhead.S
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ********************************************************************/
+
+/********************************************************************
+ * Included Files
+ ********************************************************************/
+
+#include <nuttx/config.h>
+#include "up_internal.h"
+#include "up_arch.h"
+
+/********************************************************************
+ * Macros
+ ********************************************************************/
+
+	/* This macro will modify r0, r1, r2 and r14 */
+
+#ifdef CONFIG_DEBUG
+	.macro	showprogress, code
+	mov	r0, #\code
+	bl	up_lowputc
+	.endm
+#else
+	.macro	showprogress, code
+	.endm
+#endif
+
+/********************************************************************
+ * OS Entry Point
+ ********************************************************************/
+
+/* We assume the bootloader has already initialized most of the h/w for
+ * us and that only leaves us having to do some os specific things
+ * below.
+ */
+	.text
+        .global __start
+	.type	__start, #function
+__start:
+
+	/* First, setup initial processor mode */
+
+	mov	r0, #(SVC_MODE | PSR_I_BIT | PSR_F_BIT )
+	msr	cpsr, r0
+
+	showprogress 'A'
+
+	/* Setup system stack (and get the BSS range) */
+
+	adr	r0, LC0
+	ldmia   r0, {r4, r5, sp}
+
+	/* Clear system BSS section */
+
+	mov	r0, #0
+1:	cmp	r4, r5
+	strcc	r0, [r4], #4
+	bcc	1b
+
+	showprogress 'B'
+
+	/* Copy system .data sections to new home in RAM. */
+
+#ifdef CONFIG_BOOT_FROM_FLASH
+
+	adr	r3, LC2
+	ldmia	r3, {r0, r1, r2}
+
+1:	ldmia	r0!, {r3 - r10}
+	stmia	r1!, {r3 - r10}
+	cmp	r1, r2
+	blt	1b
+
+#endif
+	/* Perform early serial initialization */
+
+	mov	fp, #0
+	bl	up_earlyserialinit
+
+#ifdef CONFIG_DEBUG
+	mov	r0, #'C'
+	bl	up_putc
+	mov	r0, #'\n'
+	bl	up_putc
+#endif
+	/* Initialize onboard LEDs */
+
+#ifdef CONFIG_ARCH_LEDS
+	bl	up_ledinit
+#endif
+
+	/* Then jump to OS entry */
+
+	b	os_start
+
+	/* Variables:
+	 * _sbss is the start of the BSS region (see ld.script)
+	 * _ebss is the end of the BSS regsion (see ld.script)
+	 * The idle task stack starts at the end of BSS and is
+	 * of size CONFIG_PROC_STACK_SIZE.  The heap continues
+	 * from there until the end of memory.  See g_heapbase
+	 * below.
+	 */
+
+LC0:	.long	_sbss
+	.long	_ebss
+	.long	_ebss+CONFIG_PROC_STACK_SIZE-4
+
+#ifdef CONFIG_BOOT_FROM_FLASH
+LC2:	.long	_eronly	/* Where .data defaults are stored in FLASH */
+	.long	_sdata	/* Where .data needs to reside in SDRAM */
+	.long	_edata
+#endif
+	.size	__start, .-__start
+
+	/* This global variable is unsigned long g_heapbase and is
+	 * exported from here only because of its coupling to LCO
+	 * above.
+	 */
+
+	.data
+	.align	4
+	.globl	g_heapbase
+	.type	g_heapbase, object
+g_heapbase:
+	.long	_ebss+CONFIG_PROC_STACK_SIZE
+	.size	g_heapbase, .-g_heapbase
+
+	.end
+

arch/arm/src/common/up_prefetchabort.c

@@ -0,0 +1,81 @@
+/************************************************************
+ * common/up_prefetchabort.c
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include <debug.h>
+#include <nuttx/irq.h>
+#include "os_internal.h"
+#include "up_internal.h"
+
+/************************************************************
+ * Definitions
+ ************************************************************/
+
+/* Output debug info if stack dump is selected -- even if 
+ * debug is not selected.
+ */
+
+#ifdef CONFIG_ARCH_STACKDUMP
+# undef  lldbg
+# define lldbg lib_lowprintf
+#endif
+
+/************************************************************
+ * Private Data
+ ************************************************************/
+
+/************************************************************
+ * Private Functions
+ ************************************************************/
+
+/************************************************************
+ * Public Funtions
+ ************************************************************/
+
+/************************************************************
+ * Name: up_prefetchabort
+ ************************************************************/
+
+void up_prefetchabort(uint32 *regs)
+{
+  lldbg("Prefetch abort at 0x%x\n", regs[REG_PC]);
+  current_regs = regs;
+  PANIC(OSERR_ERREXCEPTION);
+}

arch/arm/src/common/up_releasepending.c

@@ -0,0 +1,131 @@
+/************************************************************
+ * common/up_releasepending.c
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include <sched.h>
+#include <debug.h>
+#include <nuttx/arch.h>
+#include "os_internal.h"
+#include "up_internal.h"
+
+/************************************************************
+ * Private Definitions
+ ************************************************************/
+
+/************************************************************
+ * Private Data
+ ************************************************************/
+
+/************************************************************
+ * Private Funtions
+ ************************************************************/
+
+/************************************************************
+ * Public Funtions
+ ************************************************************/
+
+/************************************************************
+ * Name: up_release_pending
+ *
+ * Description:
+ *   Release and ready-to-run tasks that have
+ *   collected in the pending task list.  This can call a
+ *   context switch if a new task is placed at the head of
+ *   the ready to run list.
+ *
+ ************************************************************/
+
+void up_release_pending(void)
+{
+  _TCB *rtcb = (_TCB*)g_readytorun.head;
+
+  lldbg("From TCB=%p\n", rtcb);
+
+  /* Merge the g_pendingtasks list into the g_readytorun task list */
+
+  /* sched_lock(); */
+  if (sched_mergepending())
+    {
+      /* The currently active task has changed!  We will need to
+       * switch contexts.  First check if we are operating in
+       * interrupt context:
+       */
+
+      if (current_regs)
+        {
+          /* Yes, then we have to do things differently.
+           * Just copy the current_regs into the OLD rtcb.
+           */
+
+           up_copystate(rtcb->xcp.regs, current_regs);
+
+          /* Restore the exception context of the rtcb at the (new) head 
+           * of the g_readytorun task list.
+           */
+
+          rtcb = (_TCB*)g_readytorun.head;
+          lldbg("New Active Task TCB=%p\n", rtcb);
+
+          /* Then switch contexts */
+
+          up_copystate(current_regs, rtcb->xcp.regs);
+        }
+
+      /* Copy the exception context into the TCB of the task that
+       * was currently active. if up_saveusercontext returns a non-zero
+       * value, then this is really the previously running task 
+       * restarting!
+       */
+
+      else if (!up_saveusercontext(rtcb->xcp.regs))
+        {
+          /* Restore the exception context of the rtcb at the (new) head 
+           * of the g_readytorun task list.
+           */
+
+          rtcb = (_TCB*)g_readytorun.head;
+          lldbg("New Active Task TCB=%p\n", rtcb);
+
+           /* Then switch contexts */
+
+          up_fullcontextrestore(rtcb->xcp.regs);
+        }
+    }
+}

arch/arm/src/common/up_releasestack.c

@@ -0,0 +1,78 @@
+/************************************************************
+ * common/up_releasestack.c
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include <sched.h>
+#include <debug.h>
+#include <nuttx/arch.h>
+#include "os_internal.h"
+#include "up_internal.h"
+
+/************************************************************
+ * Private Types
+ ************************************************************/
+
+/************************************************************
+ * Private Function Prototypes
+ ************************************************************/
+
+/************************************************************
+ * Global Functions
+ ************************************************************/
+
+/************************************************************
+ * Name: up_release_stack
+ *
+ * Description:
+ *   A task has been stopped. Free all stack
+ *   related resources retained int the defunct TCB.
+ *
+ ************************************************************/
+
+void up_release_stack(_TCB *dtcb)
+{
+  if (dtcb->stack_alloc_ptr)
+    {
+      sched_free(dtcb->stack_alloc_ptr);
+      dtcb->stack_alloc_ptr = NULL;
+    }
+
+  dtcb->adj_stack_size = 0;
+}

arch/arm/src/common/up_reprioritizertr.c

@@ -0,0 +1,179 @@
+/************************************************************
+ * common/up_reprioritizertr.c
+ *
+ *   Copyright (C) 2007 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name Gregory Nutt nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************/
+
+/************************************************************
+ * Included Files
+ ************************************************************/
+
+#include <nuttx/config.h>
+#include <sys/types.h>
+#include <sched.h>
+#include <debug.h>
+#include <nuttx/arch.h>
+#include "os_internal.h"
+#include "up_internal.h"
+
+/************************************************************
+ * Private Definitions
+ ************************************************************/
+
+/************************************************************
+ * Private Data
+ ************************************************************/
+
+/************************************************************
+ * Private Funtions
+ ************************************************************/
+
+/************************************************************
+ * Public Funtions
+ ************************************************************/
+
+/************************************************************
+ * Name: up_reprioritize_rtr
+ *
+ * Description:
+ *   Called when the priority of a running or
+ *   ready-to-run task changes and the reprioritization will 
+ *   cause a context switch.  Two cases:
+ *
+ *   1) The priority of the currently running task drops and the next
+ *      task in the ready to run list has priority.
+ *   2) An idle, ready to run task's priority has been raised above the
+ *      the priority of the current, running task and it now has the
+ *      priority.
+ *
+ * Inputs:
+ *   tcb: The TCB of the task that has been reprioritized
+ *   priority: The new task priority
+ *
+ ************************************************************/
+
+void up_reprioritize_rtr(_TCB *tcb, ubyte priority)
+{
+  /* Verify that the caller is sane */
+
+  if (tcb->task_state < FIRST_READY_TO_RUN_STATE ||
+      tcb->task_state > LAST_READY_TO_RUN_STATE ||
+      priority < SCHED_PRIORITY_MIN || 
+      priority > SCHED_PRIORITY_MAX)
+    {
+       PANIC(OSERR_BADREPRIORITIZESTATE);
+    }
+  else
+    {
+      _TCB *rtcb = (_TCB*)g_readytorun.head;
+      boolean switch_needed;
+
+      lldbg("TCB=%p PRI=%d\n", tcb, priority);
+
+      /* Remove the tcb task from the ready-to-run list.
+       * sched_removereadytorun will return TRUE if we just
+       * remove the head of the ready to run list.
+       */
+
+      switch_needed = sched_removereadytorun(tcb);
+
+      /* Setup up the new task priority */
+
+      tcb->sched_priority = (ubyte)priority;
+
+      /* Return the task to the specified blocked task list.
+       * sched_addreadytorun will return TRUE if the task was
+       * added to the new list.  We will need to perform a context
+       * switch only if the EXCLUSIVE or of the two calls is non-zero
+       * (i.e., one and only one the calls changes the head of the
+       * ready-to-run list).
+       */
+
+      switch_needed ^= sched_addreadytorun(tcb);
+
+      /* Now, perform the context switch if one is needed */
+
+      if (switch_needed)
+        {
+          /* If we are going to do a context switch, then now is the right
+           * time to add any pending tasks back into the ready-to-run list.
+           * task list now
+           */
+
+          if (g_pendingtasks.head)
+            {
+              sched_mergepending();
+            }
+
+         /* Are we in an interrupt handler? */
+
+          if (current_regs)
+            {
+              /* Yes, then we have to do things differently.
+               * Just copy the current_regs into the OLD rtcb.
+               */
+
+               up_copystate(rtcb->xcp.regs, current_regs);
+
+              /* Restore the exception context of the rtcb at the (new) head 
+               * of the g_readytorun task list.
+               */
+
+              rtcb = (_TCB*)g_readytorun.head;
+              lldbg("New Active Task TCB=%p\n", rtcb);
+
+              /* Then switch contexts */
+
+              up_copystate(current_regs, rtcb->xcp.regs);
+            }
+
+          /* Copy the exception context into the TCB at the (old) head of the
+           * g_readytorun Task list. if up_saveusercontext returns a non-zero
+           * value, then this is really the previously running task restarting!
+           */
+
+          else if (!up_saveusercontext(rtcb->xcp.regs))
+            {
+              /* Restore the exception context of the rtcb at the (new) head 
+               * of the g_readytorun task list.
+               */
+
+              rtcb = (_TCB*)g_readytorun.head;
+              lldbg("New Active Task TCB=%p\n", rtcb);
+
+              /* Then switch contexts */
+
+              up_fullcontextrestore(rtcb->xcp.regs);
+            }
+        }
+    }
+}