e5a0dcd0f9
USB host drivers: Change all parmeters named class to usbclass to avoid C++ conflicts
2015-01-11 08:05:09 -06:00
b75c43f6ef
Tiva Timer: Fix a typo
2015-01-10 12:42:39 -06:00
3c06976ba7
Tiva Timer: Implements configuration of the 32-bit RTC timer
2015-01-10 12:41:15 -06:00
c0e1dc3b8a
Tiva Timer: Add support for RTC match interrupts
2015-01-10 12:22:37 -06:00
a2a5c47d9d
Tive Timer: Add support for ADC trigger generation from one-shot and periodic timers for timeout and match evetns
2015-01-10 10:07:56 -06:00
2eeca96330
Tiva Timer: Add support to set the match regiser(s) relative to the timer counter (and prescale) registers. Enable match interrupts. These are one time interruprts: After the match interrupt is dispatched, further match interrupts are disabled
2015-01-10 08:34:39 -06:00
2871677362
Tiva Timer: Add support for input clock prescaler in 16-bit one-shot/periodic modes
2015-01-09 16:49:00 -06:00
df48abcc47
Tiva Timer: Add logic to acknowledge Tiva Timer interrupts
2015-01-09 15:01:49 -06:00
9ae597c441
Tive System Control: Add logic to configure the alternatie clock source (ALTCLK). Needed by the Tiva timer module
2015-01-09 14:10:31 -06:00
7384857658
Tiva Timer: Add more interrupt management logic
2015-01-09 13:29:03 -06:00
626d6cdab4
Tiva Timer: Add functions to set match registers; Add logic to select count direction
2015-01-09 12:05:26 -06:00
8552b2f679
Tiva Timer: Add interfaces to start/stop timers and to set the interval load registers.
2015-01-09 11:07:52 -06:00
d5d3a23ac3
Tiva Timers: Add framework to support tmer interrupts
2015-01-09 10:21:59 -06:00
1193b4aa55
STM32 SDIO: Don't let architectures select CONFIG_MMCSD_SDIOWAIT_WRCOMPLETE unless they have implemented SDIOWAIT_WRCOMPLETE
2015-01-08 17:47:34 -06:00
09bd382697
Tiva Timer: Partial support for 16- and 32-bit, oneshot and periodic timer configurations
2015-01-08 13:44:10 -06:00
58818e1afd
Tiva Timer: Add support to select alternate clock source and 32-bit register concatenation mode.
2015-01-08 11:08:54 -06:00
d3bc0b7223
Tiva Timer: Add register level debug support
2015-01-08 10:14:38 -06:00
6c612cf967
Tiva Timer: Add basic framework to configure timers. Incomplete on initial commit
2015-01-08 09:47:38 -06:00
92dc58c376
Tiva Timer: SYNC regiser is only available on GPTM0
2015-01-08 08:07:31 -06:00
e55df605a8
Tiva Timer: Update timer register bit definitions for the LM4F
2015-01-08 08:03:47 -06:00
1ed2956ad5
Tiva Timer: Extend timer register definitions to handle other chips
2015-01-08 07:56:00 -06:00
1ace391fcf
MMCSD SDIO: Add support for a new SDWAIT_WRCOMPLETE condition. The previous logic used a busy-wait loop to pool the card R1 start to determine when the card was ready for the next transfer. That busy-wait can be quite long -- hundreds of milliseconds. And alternative is to look the the SD D0 pin which will change state when the card is no longer busy.
...
This logic implements a change the avoids the busy-wait poll by reconfiguring the SD D0 pin as a GPIO interrupt, then waiting for the card to becom ready without taking up CPU cycles.
This change is conditioned on CONFIG_MMCSD_SDIOWATI_WRCOMPLETE and is currenlty only implemented for the STM32 SDIO driver.
From David Sidrane
2015-01-08 06:23:42 -06:00
5c68f0dd34
Tiva Timer: Missed one register bit field definition
2015-01-07 12:03:08 -06:00
9eb693845e
TM4C129X Timer: Completes timer register definition header file
2015-01-07 11:43:56 -06:00
81afc06f54
TM4C129X Timer: Add some missing addresses and some of the register bit definitions. Still incomplete
2015-01-07 10:07:47 -06:00
28a52cbd23
TM4C129X Timer: Update addresses in the timer register definitions file. Still missing bit field definitions
2015-01-07 08:57:48 -06:00
0748291ce9
Tiva IRQs: Fix IRQ control logic; was limited to only 64 IRQs. That is a problem for higher numbered IRQs on many platforms
2015-01-06 10:49:47 -06:00
c429a4d93f
Tiva I2C: For TM4C, high speed mode is now configurable (but disabled as EXPERIMENTAL)
2015-01-06 10:48:08 -06:00
10b349bd1a
Tiva PHY Interrupts: Need to read the PHY interrupt status register in order to clear the pending PHY interrupt
2015-01-05 15:12:45 -06:00
52c4334429
Tiva: Fixes to support building Tiva TM4C129X I2C driver
2015-01-05 13:15:40 -06:00
67aeab7105
Tiva: Update I2C register definitions to include support for the TM4C129X
2015-01-05 13:08:07 -06:00
c4f64c72c8
Tiva Ethernet: Add support for PHY interrupts
2015-01-03 13:16:26 -06:00
40113f0b93
Tiva Ethernet: Configure external PHY interrupt pin
2015-01-03 10:59:12 -06:00
a7e0acbc6f
Tiva Ethernet: Removed logic that holds the PHY and re-ordered some reset logic. Can not ping the DK
2015-01-03 09:28:54 -06:00
15f0a046fd
Tive Ethernet: Wait for EMAC to come out of reset before accessing any registers
2015-01-03 06:52:19 -06:00
6bb12a34dc
Tiva serial: Add volatile to fix a wait loop that was not waiting; CR really should preced LF in CR-LF expansion
2015-01-02 14:05:42 -06:00
28d44e1b30
Cosmetic changes
2015-01-02 13:59:47 -06:00
b828741900
Tiva: Fix typos in conditional compilation
2015-01-02 13:59:30 -06:00
91a92fc538
Tiva Ethernet: Add lots of debug output for testing
2015-01-02 13:10:25 -06:00
ce3dac34b2
Tiva: If peripheral ready register not available, then lets say the peripheral is ready
2015-01-02 12:58:20 -06:00
194e5a9600
Tiva: Wait for the console UART to be ready before configuring it
2015-01-02 12:57:41 -06:00
47b8ce855e
Tiva Ethernet: Fix compile problem when debug enabled
2015-01-02 12:04:22 -06:00
86dc1726aa
Tiva GPIO: Fix a compiler error when debug is enabled with TM4C129X
2015-01-02 11:53:02 -06:00
9688a9aacb
Tiva Ethernet: MMC interrupts need to be disable initially
2015-01-02 11:40:48 -06:00
ea3895c2e8
Tiva Ethernet: Update DMA BUSMODE settings based on TI example code
2015-01-02 11:10:41 -06:00
67699b8cae
Tiva Ethernet: Update PHY initialization
2015-01-02 10:11:57 -06:00
a97d304d1a
STM32 RTC: Add Kconfig options needed with the preceding commit
2015-01-02 06:45:45 -06:00
7b89f64b37
stm32-rtc: Add support for the internal low speed clock (LSI)
...
Some boards do not have the external 32khz oscillator installed, for those boards we must fallback to the crummy to the crummy internal RC clock. Turn on by defining CONFIG_RTC_LSICLOCK.
From Kevin Hester <kevinh@geeksville.com > via Lorenz Meier.
2015-01-02 06:32:40 -06:00
367af5c65d
Cosmetic update to some comments
2015-01-02 06:07:56 -06:00
adb9ac6c60
Cosmetic change to file formatting
2015-01-01 15:55:33 -06:00
Gregory Nutt