This adds ability for read and write operations to work with messages
aligned to configured number of bytes. This has few different use
cases.
The alignment is specified as unsigned integer and can be changed with
ioctl command CANIOC_SET_MSGALIGN. The current value can be queried by
CANIOC_GET_MSGALIGN command.
The default value for the message alignment is 1. This will provide
behavior consistent with current one. Thus messages are placed to the
buffer right after data of the previous one. The same applies for
writes.
The special alignment value 0 disables read and write of multiple frames. Thus
read will always return at most one message and write will always write
only one message even if larger buffer size is provided.
Another use case is if message alignment is set to exactly message
representation size (`sizeof(struct can_msg_s)`). This allows writing
and reading arrays of messages.
Other values provide even more advanced and specialized use cases, such
as optimizations if architecture has to emulate some non-aligned
accesses, there alignment of for example 4 bytes could provide
performance boost.
The original motivation behind this is was compatibility with socket
CAN. It is easier to port applications to NuttX's CAN driver if only one
frame is provided at the time. This solution was suggested by Pavel Pisa
<pisa@fel.cvut.cz> as a more versatile variant of plain boolean
disabling the multiple frame retrieval.
Signed-off-by: Karel Kočí <kkoci@elektroline.cz>
This is just a simple typo (missing underscore) in the definition. I am
fixing the documentation instead to make it consistent instead of
breaking an API.
Signed-off-by: Karel Kočí <kkoci@elektroline.cz>
These macros are commonly provided on BSD systems. They are not part of
C nor POSIX but these types of operations can be required in drivers
implementation as well as in user space. The operations themself are
simple but kind of cryptic when placed in the code as is. Thus having
macro with an appropriate name is beneficial.
The use of BSD naming here is only to cling to at least some other
implementation instead of creating completelly NuttX specific one.
Kudos to @hartmannathan for the source code documentation.
Signed-off-by: Karel Kočí <kkoci@elektroline.cz>
If the task is blocked waiting for a event, then that task must
be unblocked when a signal is received.
Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
This commit adds initial high level overview of the NuttX
make-based build system. It documents:
* Tools used during the build process
* Mechanisms set in place during the build process
Signed-off-by: Luchian Mihai <luchiann.mihai@gmail.com>
In multi-core environment where NuttX runs on each core, if one core
sets the RTC time, the RTC value gotten on other cores is incorrect.
This is caused by clock_gettime(CLOCK_MONOTONIC) function used to get
elapsed time, which uses a core-specific global varaiable g_basetime
as the base time.
To fix this, update the g_basetime from the backup SRAM that can be
shared between cores in setting/getting the RTC time.
Signed-off-by: SPRESENSE <41312067+SPRESENSE@users.noreply.github.com>
Currently, nuttx_generate_kconfig() can only parse subdirectories
under apps/. This patch extends its capability to also parse
external directories referenced from the apps tree.
Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
Currently, nuttx_generate_kconfig() allows a subdirectory to have
either a handwritten sub-Kconfig or a generated menu Kconfig, but
not both.
This patch enables support for having both a sub-Kconfig and a
generated menu Kconfig within the same subdirectory.
Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
Add a function imx9_lpspi_select_cs to assert CS at the start of
an SPI transfer and keep it asserted until called again to
de-assert it. This can be called by board-provided imx9_lpspi_select,
in case the CS needs to be controlled via the LPSPI block and not
GPIO.
The TCR register CONT (continue) bit is asserted to prevent CS toggling
during the transfer, and the PCS bits are set to mark the correct CS
Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
According to the TRM, only bits 24-25 are reserved for chip select, and
the maximum number of internal chip selects is 3 (on LPSPI4 bus only).
Fix the TCR_PCS_MASK and remove extra definitions.
Signed-off-by: Jukka Laitinen <jukka.laitinen@tii.ae>
This commit fixed oneshot callback for non-tickless using tick-aligned
absolute oneshot interfaces.
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
Current timer hardware supports both absolute and relative count timers. Without an absolute count timer interface, setting an alarm timer might incur additional overhead in obtaining the current time, resulting in performance degradation and inaccurate timing.
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
This commit introduce new clockdevice interfaces for oneshot.
- It can represent both `timer` and `alarm`.
- It simplifies the implementation of timer driver. Timer driver do not need considering the time conversion between clock count, tick and timespec.
- It sets timer align to the tick boundary to improve timer accuracy.
- It can avoid using 64-bit division during timer expiration interrupt, improves performance and reduces interrupt latency.
- It considers almost all multiplication overflow problems in time conversion without processing at the driver.
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
Directly downloading the Git repository is inconvenient for local debugging.
This will allow to automatically download external packages from the Internet.
If not set, the repo need to be download will need to provide them manually,
otherwise an error will occur and the build will be aborted.
Add `USE_NXTMPDIR_ESP_REPO_DIRECTLY`, with this we can use
`USE_NXTMPDIR_ESP_REPO_DIRECTLY=y make` which can directly use esp-hal-3rdparty
under nxtmpdir without CLONE, CHECK_COMMITSHA, reset, checkout and update. Just
`cp -rf nxtmpdir/esp-hal-3rdparty chip/$(ESP_HAL_3RDPARTY_REPO)`.
Signed-off-by: v-tangmeng <v-tangmeng@xiaomi.com>
Adds a device ID to ee25xx_initialize, which is stored in the
ee25xx_dev_s structure. This ID is used when calling SPI_SELECT.
The implementation is based on the handling of the chip select in
mtd/ramtron.c
This change is NOT backward compatible: the function signature has changed
Signed-off-by: Antoine Juckler <6445757+ajuckler@users.noreply.github.com>
Adds a device ID to at25ee_initialize, which is stored in the
at25ee_dev_s structure. This ID is used when calling SPI_SELECT.
The implementation is based on the handling of the chip select in
mtd/ramtron.c
This change is NOT backward compatible: the function signature has changed
Signed-off-by: Antoine Juckler <6445757+ajuckler@users.noreply.github.com>
As reported by a user in Discord channel selection BMI160 with SPI
interface still showing the I2C configuration. This patch fixes it.
Signed-off-by: Alan C. Assis <acassis@gmail.com>
- Updated information about the RA4M1 microcontroller capabilities, including the General Purpose Timer (GPT).
- Added information about the PWM driver support for the Arduino R4 Minima board using the GPT timer.
Signed-off-by: leocafonso <leocafonso@gmail.com>
- Added PWM support on Arduino R4 Minima board.
This board has 5 PWM channels available using the GPT timer from the RA4M1 microcontroller.
- Added a pwm config file to enable PWM supporting GTP2 GTIOCB on P102.
Signed-off-by: leocafonso <leocafonso@gmail.com>
- Added PWM driver support for the RA4M1 microcontroller using the GPT timer.
- This driver supports Saw-wave mode and one of the two output channels (A or B).
- Added necessary configurations in CMakeLists.txt, Kconfig, and Make.defs.
- Created new header file for GPT.
Signed-off-by: leocafonso <leocafonso@gmail.com>
This commit added the clkcnt abstraction.
Clkcnt is used to abstract the cycle counter of hardware timer, which can represent almost all existing timers. Time conversion through API provided by clkcnt can avoid any timing conversion problem (multiplication overflow, division precision loss, etc.).
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
This commit added support for pure function attributes and compile-time
constant condition.
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
If the initial value of the MSR_IA32_TSC_ADJUST register is not 0 (may be modified by BIOS or bootloader), it may cause timing errors. This commit addressed the issue.
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
On newer x86 CPUs, the MSR_IA32_TSC_ADJUST register is utilized to fine-tune the offset of the Time Stamp Counter (TSC). This commit introduces support for MSR_IA32_TSC_ADJUST and enhances the TSC tickless
driver, optimizing its performance.
Signed-off-by: ouyangxiangzhen <ouyangxiangzhen@xiaomi.com>
