Add a new license configuration option for components that have
custom permissive licenses which are not covered by the standard
license options (BSD, MIT, GPL, etc.).
This option allows projects to explicitly opt-in to using components
with custom permissive licenses that allow free use, modification,
and distribution but may have specific attribution or notice
requirements.
Also update the License Setup documentation section to include
this new option.
Signed-off-by: makejian <makejian@xiaomi.com>
This patch introduces the foundational PTP (Precision Time Protocol) clock
driver framework for NuttX, enabling precise time synchronization support
based on IEEE 1588 standard.
Key changes include:
1. New PTP clock driver infrastructure:
- Added drivers/timers/ptp_clock.c implementing upper-half driver
- Created include/nuttx/timers/ptp_clock.h with PTP clock interfaces
- Implemented upper/lower half driver architecture for hardware abstraction
2. Core functionality:
- Clock time get/set operations (gettime, settime)
- Frequency adjustment support (adjtime, adjfine)
- Phase adjustment capabilities
- System-device cross-timestamping for precise synchronization
3. IOCTL commands:
- PTP_CLOCK_SETTIME/GETTIME for time manipulation
- PTP_CLOCK_GETRES for resolution queries
- PTP_CLOCK_ADJTIME for time adjustment
- PTP_CLOCK_GETCAPS for capability queries
- PTP_SYS_OFFSET* for system offset measurements
4. Supporting structures:
- struct ptp_lowerhalf_s: lower-half driver interface
- struct ptp_clock_caps: clock capabilities descriptor
- struct ptp_sys_offset: system time offset measurement
- Added timex structures in include/sys/timex.h for ADJ_* operations
5. Build system integration:
- Added CONFIG_PTP_CLOCK Kconfig option
- Updated CMakeLists.txt and Make.defs
- Added PTPCLK debug macros in include/debug.h
This framework provides the base for PTP clock implementations, allowing
hardware-specific drivers to register and provide precise time services
through a standardized interface.
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
1. Remove STACKCHECK_SOFTWARE config,
2. Do sp value checking when STACKCHECK_MARGIN == 0,
3. Do margin-based stack check when STACKCHECK_MARGIN > 0,
4. Disable stack check when STACKCHECK_MARGIN == -1
Signed-off-by: Chengdong Wang <wangchengdong@lixiang.com>
Added two detection methods:
1. Determine by detecting the number of bytes specified at the bottom of the stack.
2. Check if the `sp` register is out of bounds.
Co-authored-by: Chengdong Wang <wangchengdong@lixiang.com>
Signed-off-by: guoshengyuan1 <guoshengyuan1@xiaomi.com>
Renaming "modlib" to "libelf" is more in line with the implementation content,
which makes it easier for individual developers to understand the capabilities of this module.
CONFIG_LIBC_MODLIB -> CONFIG_LIBC_ELF
Signed-off-by: chao an <anchao.archer@bytedance.com>
1. enable CONFIG_BUILTIN_COMPILER_RT to built libclang_rt.builtins-xxx.a and no longer use the compiler's built-in
2. Modify clang version acquisition to get two decimal points
3. It has been ported to support four architectures: ARM, ARM64, RISCV, and x86_64, among which ARM has been validated
Signed-off-by: wangmingrong1 <wangmingrong1@xiaomi.com>
Need to start up a new to setup special registers use
`arm_pic_setupxcp`.
Note that CONFIG_BUILD_PIC compiles the entire NuttX image
as position-independent(PIC), enable CONFIG_PIC to load PIC
application code.
Signed-off-by: anjiahao <anjiahao@xiaomi.com>
virtio is a framework to implement the virtio drivers
vhost (Virtual Host) is a framework to implement the virtio devices
With the virtio and vhost framework, we can use the virtio drivers
and vhost drivers to implement the cross-core communication.
Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
Because kconfiglib recognizes MODULE configuration but not modules attributes,
and kconfig-frontend is compatible with the latest modules attributes of Linux,
we can only use the old version to use MODULE configuration plus options modules to be compatible with both.
Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
maintains the same semantics as Kernel’s module build
and compatible with Kconfiglib implementation.
The problem of kconfiglib not being able to use tri-states is this:
linux is here torvalds/linux@6dd85ff
The module option is extracted from one of the triate three states into a MODULE keyword.
Kconfiglib supports the default implementation of module to be MODULE for compatibility with the linux kernel, and triate degenerates into bool two states
Refer to this code: https://github.com/ulfalizer/Kconfiglib/blob/061e71f7d78cb057762d88de088055361863deff/kconfiglib.py#L4274-L4284
Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
Create the nuttx.asm in the disassembly format using the objdump program.
NOTE:
'>', objdump doesn't take arguments for output file,
but result is printed to standard out, and is redirected.
Signed-off-by: fanjiangang <fanjiangang@lixiang.com>
Signed-off-by: chao an <anchao@lixiang.com>
Cmake build provide absolute paths to compile files. If __FILE__
macros are used in the source code(ASSERT), the binary will be occupied
by many invalid paths.
This saves some memory, stops leaking user locations in binaries, makes
failure logs more deterministic and most importantly makes builds more
deterministic.
Debuggers usually have a path mapping feature to ensure the files are
still found.
Test config sabre-6quad/citest:
Before:
$ size build/nuttx
text data bss dec hex filename
279309 908 13652 293869 47bed build/nuttx
After:
$ size build/nuttx
text data bss dec hex filename
269313 908 13652 283873 454e1 build/nuttx
Signed-off-by: chao an <anchao@lixiang.com>
Squashed commits:
1. Porting prior PCI work in place of jailhouse code
At this point the PCI enumeration works for x86_64 including over
pci-pci bridges.
Running QEMU with this configuration we see the bridge and the
device on the bridge. It also detected the qemu test device
qemu-system-x86_64 \
-cpu host,+pcid,+x2apic,+tsc-deadline,+xsave,+rdrand \
--enable-kvm -smp 1 -m 2G -cdrom boot.iso --nographic -no-reboot \
-device pci-testdev \
-device pci-bridge,id=bridge0,chassis_nr=2 \
-device e1000,bus=bridge0,addr=0x3
qemu_pci_init: Initializing PCI Bus
pci_probe_device: [00:00.0] Found 8086:1237, class/revision 06000002
pci_probe_device: [00:01.1] Found 8086:7010, class/revision 01018000
pci_probe_device: [00:01.2] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:01.3] Found 8086:7113, class/revision 06800003
pci_probe_device: [00:01.4] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:01.5] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:01.6] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:01.7] Found ffff:ffff, class/revision ffffffff
pci_probe_device: [00:02.0] Found 1234:1111, class/revision 03000002
pci_probe_device: [00:03.0] Found 8086:100e, class/revision 02000003
pci_probe_device: [00:04.0] Found 1b36:0005, class/revision 00ff0000
pci_probe_device: [00:04.0] Probing
pci_check_pci_bridge: [00:05.0] Found Bridge
pci_probe_device: [01:03.0] Found 8086:100e, class/revision 02000003
pci_probe_device: [00:05.0] Found 1b36:0001, class/revision 06040000
2. Remove unused CONFIG_PCI_MAX_BDF option
3. Add a workaround for Jailhouse pci scanning
4. Extend BAR parsing and handle PIO and MMIO for pci-testdev
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
5. PCI: Add initial support for QEMU 'edu' test device
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
6. Bring up PCI later in boot process
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
7. Add ISR and DMA support to QEMU edu test pci device
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
8. Fix bad function prototype definition in qemu_edu
9. intel64: Add a pci test configuration and instructions
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
10. PCI: Fix issue in identification of 64bit bar
Signed-off-by: Brennan Ashton <bashton@brennanashton.com>
Squashed commits:
1. x86_64: qemu: implement pci-e functions and enumerate pci-e devices on boot
2. virt: add qemu pci-testdev driver
3. pcie: types array should be null terminated
4. pcie: enable don't take flags, hardcoded enabling flags
5. pcie: checking bar > 4 for 64bit bars are sufficient
6. pcie: qemu: remove not used header
7. pcie: qemu: return -EINVAL if buffer argument is NULL
8. pcie: make pcie enumerate routine as common instead of architecture dependent
9. pcie: cosmetic changes to fit check tools
10. pcie: create MSI/MSIX related marcos and simplify the msi/msix routines
The lower-half implementation of the RMT character driver based on
Espressif HAL enables using the RMT peripheral of ESP32, ESP32-S2
and ESP32-S3 as a common xtensa-based Espressif driver.
The RMT packages on Espressif SoCs are 4-byte long and are known as
"items". Please check the Techinal Reference Manual of the chip to
obtain more details.
When the user selects the debug features it will enable
the Debug Errors, Warning and Info by default avoiding
the issue: https://github.com/apache/nuttx/issues/10452
User still need to enable individual debug for each
subsystem, so this patch didn't increase binary size.
Allows the debug behavior to be specified as part of the board, architecture or chip configuration. This is useful when using out-of tree custom board configurations.
Port based on arch/arm/nrf53.
Modem not fully supported yet. At the moment, initialization and AT interface work.
Sockets and GNSS interface will be added later.
makejian
Bowen Wang
dongjiuzhu1
Geoffroy Du Prey
wangchengdong
guoshengyuan1
simbit18
nuttxs
wangmingrong1
chao an
anjiahao
cuiziwei
ligd
wangjianyu3
xuxin19
Shoukui Zhang
liaoao
fanjiangang
chao an
yanghuatao
raiden00pl
Yanfeng Liu
Brennan Ashton
Yang Chung-Fan
Tiago Medicci Serrano
chao an
Philippe Leduc
likun17
Alan Carvalho de Assis
Stuart Ianna
xucheng5
yinshengkai
yangshuyong
Xiang Xiao
Victor Benso