SAM4E-EK: Add an EMAC driver. Initial commit is just a quick port of the SAMA5D3 EMAC driver

arch/arm/src/sam34/Kconfig

@@ -349,6 +349,8 @@ config SAM34_EMAC
 	bool "Ethernet MAC (EMAC)"
 	default n
 	depends on ARCH_CHIP_SAM3X || ARCH_CHIP_SAM3A || ARCH_CHIP_SAM4E
+	select NETDEVICES
+	select ARCH_HAVE_PHY
 
 config SAM34_FREQM
 	bool "Frequency Meter (FREQM)"
@@ -688,7 +690,7 @@ config SAM34_RC32K
 endmenu # AT91SAM3/4 Clock Configuration
 endif # ARCH_CHIP_SAM4L
 
-menu "External Memory Configuration"
+menu "AT91SAM3/4 External Memory Configuration"
 
 config ARCH_HAVE_EXTNAND
 	bool
@@ -830,7 +832,7 @@ config SAM34_EXTSRAM1HEAP
 endif # SAM34_EXTSRAM1
 endmenu # External Memory Configuration
 
-comment "AT91SAM3/4 GPIO Interrupt Configuration"
+menu "AT91SAM3/4 GPIO Interrupt Configuration"
 
 config GPIO_IRQ
 	bool "GPIO pin interrupts"
@@ -867,6 +869,218 @@ config GPIOF_IRQ
 	depends on ARCH_CHIP_SAM3X || ARCH_CHIP_SAM3A
 
 endif # GPIO_IRQ
+endmenu # AT91SAM3/4 GPIO Interrupt Configuration
+
+if SAM34_EMAC
+
+menu "AT91SAM3/4 EMAC device driver options"
+
+config SAM34_EMAC_NRXBUFFERS
+	int "Number of RX buffers"
+	default 16
+	---help---
+		EMAC buffer memory is segmented into 128 byte units (not
+		configurable).  This setting provides the number of such 128 byte
+		units used for reception.  This is also equal to the number of RX
+		descriptors that will be allocated  The selected value must be an
+		even power of 2.
+
+config SAM34_EMAC_NTXBUFFERS
+	int "Number of TX buffers"
+	default 8
+	---help---
+		EMAC buffer memory is segmented into full Ethernet packets (size
+		NET_BUFSIZE bytes).  This setting provides the number of such packets
+		that can be in flight.  This is also equal to the number of TX
+		descriptors that will be allocated.
+
+config SAM34_EMAC_PREALLOCATE
+	bool "Preallocate buffers"
+	default n
+	---help---
+		Buffer an descriptor many may either be allocated from the memory
+		pool or pre-allocated to lie in .bss.  This options selected pre-
+		allocated buffer memory.
+
+config SAM34_EMAC_NBC
+	bool "Disable Broadcast"
+	default n
+	---help---
+		Select to disable receipt of broadcast packets.
+
+config SAM34_EMAC_PHYADDR
+	int "PHY address"
+	default 1
+	---help---
+		The 5-bit address of the PHY on the board.  Default: 1
+
+config SAM34_EMAC_PHYINIT
+	bool "Board-specific PHY Initialization"
+	default n
+	---help---
+		Some boards require specialized initialization of the PHY before it can be used.
+		This may include such things as configuring GPIOs, resetting the PHY, etc.  If
+		SAM34_EMAC_PHYINIT is defined in the configuration then the board specific logic must
+		provide sam_phyinitialize();  The SAM34 EMAC driver will call this function
+		one time before it first uses the PHY.
+
+choice
+	prompt "PHY interface"
+	default SAM34_EMAC_MII
+
+config SAM34_EMAC_MII
+	bool "MII"
+	---help---
+		Support Ethernet MII interface (vs RMII).
+
+config SAM34_EMAC_RMII
+	bool "RMII"
+	depends on !ARCH_CHIP_SAM4E
+	---help---
+		Support Ethernet RMII interface (vs MII).
+
+endchoice # PHY interface
+
+config SAM34_EMAC_CLAUSE45
+	bool "Clause 45 MII"
+	depends on SAM34_EMAC_MII
+	---help---
+		MDIO was originally defined in Clause 22 of IEEE RFC802.3. In the
+		original specification, a single MDIO interface is able to access up
+		to 32 registers in 32 different PHY devices.  To meet the needs the
+		expanding needs of 10-Gigabit Ethernet devices, Clause 45 of the
+		802.3ae specification provided the following additions to MDIO:
+
+		- Ability to access 65,536 registers in 32 different devices on
+		  32 different ports
+		- Additional OP-code and ST-code for Indirect Address register
+		  access for 10 Gigabit Ethernet
+		- End-to-end fault signaling
+		- Multiple loopback points
+		- Low voltage electrical specification
+
+		By default, Clause 22 PHYs will be supported unless this option is
+		selected.
+
+config SAM34_EMAC_AUTONEG
+	bool "Use autonegotiation"
+	default y
+	---help---
+		Use PHY autonegotiation to determine speed and mode
+
+config SAM34_EMAC_ETHFD
+	bool "Full duplex"
+	default n
+	depends on !SAM34_EMAC_AUTONEG
+	---help---
+		If SAM34_EMAC_AUTONEG is not defined, then this may be defined to select full duplex
+		mode. Default: half-duplex
+
+config SAM34_EMAC_ETH100MBPS
+	bool "100 Mbps"
+	default n
+	depends on !SAM34_EMAC_AUTONEG
+	---help---
+		If SAM34_EMAC_AUTONEG is not defined, then this may be defined to select 100 MBps
+		speed.  Default: 10 Mbps
+
+config SAM34_EMAC_PHYSR
+	int "PHY Status Register Address (decimal)"
+	depends on SAM34_EMAC_AUTONEG
+	---help---
+		This must be provided if SAM34_EMAC_AUTONEG is defined.  The PHY status register
+		address may diff from PHY to PHY.  This configuration sets the address of
+		the PHY status register.
+
+config SAM34_EMAC_PHYSR_ALTCONFIG
+	bool "PHY Status Alternate Bit Layout"
+	default n
+	depends on SAM34_EMAC_AUTONEG
+	---help---
+		Different PHYs present speed and mode information in different ways.  Some
+		will present separate information for speed and mode (this is the default).
+		Those PHYs, for example, may provide a 10/100 Mbps indication and a separate
+		full/half duplex indication. This options selects an alternative representation
+		where speed and mode information are combined.  This might mean, for example,
+		separate bits for 10HD, 100HD, 10FD and 100FD.
+
+config SAM34_EMAC_PHYSR_SPEED
+	hex "PHY Speed Mask"
+	depends on SAM34_EMAC_AUTONEG && !SAM34_EMAC_PHYSR_ALTCONFIG
+	---help---
+		This must be provided if SAM34_EMAC_AUTONEG is defined.  This provides bit mask
+		for isolating the 10 or 100MBps speed indication.
+
+config SAM34_EMAC_PHYSR_100MBPS
+	hex "PHY 100Mbps Speed Value"
+	depends on SAM34_EMAC_AUTONEG && !SAM34_EMAC_PHYSR_ALTCONFIG
+	---help---
+		This must be provided if SAM34_EMAC_AUTONEG is defined.  This provides the value
+		of the speed bit(s) indicating 100MBps speed.
+
+config SAM34_EMAC_PHYSR_MODE
+	hex "PHY Mode Mask"
+	depends on SAM34_EMAC_AUTONEG && !SAM34_EMAC_PHYSR_ALTCONFIG
+	---help---
+		This must be provided if SAM34_EMAC_AUTONEG is defined.  This provide bit mask
+		for isolating the full or half duplex mode bits.
+
+config SAM34_EMAC_PHYSR_FULLDUPLEX
+	hex "PHY Full Duplex Mode Value"
+	depends on SAM34_EMAC_AUTONEG && !SAM34_EMAC_PHYSR_ALTCONFIG
+	---help---
+		This must be provided if SAM34_EMAC_AUTONEG is defined.  This provides the
+		value of the mode bits indicating full duplex mode.
+
+config SAM34_EMAC_PHYSR_ALTMODE
+	hex "PHY Mode Mask"
+	depends on SAM34_EMAC_AUTONEG && SAM34_EMAC_PHYSR_ALTCONFIG
+	---help---
+		This must be provided if SAM34_EMAC_AUTONEG is defined.  This provide bit mask
+		for isolating the speed and full/half duplex mode bits.
+
+config SAM34_EMAC_PHYSR_10HD
+	hex "10MBase-T Half Duplex Value"
+	depends on SAM34_EMAC_AUTONEG && SAM34_EMAC_PHYSR_ALTCONFIG
+	---help---
+		This must be provided if SAM34_EMAC_AUTONEG is defined.  This is the value
+		under the bit mask that represents the 10Mbps, half duplex setting.
+
+config SAM34_EMAC_PHYSR_100HD
+	hex "100Base-T Half Duplex Value"
+	depends on SAM34_EMAC_AUTONEG && SAM34_EMAC_PHYSR_ALTCONFIG
+	---help---
+		This must be provided if SAM34_EMAC_AUTONEG is defined.  This is the value
+		under the bit mask that represents the 100Mbps, half duplex setting.
+
+config SAM34_EMAC_PHYSR_10FD
+	hex "10Base-T Full Duplex Value"
+	depends on SAM34_EMAC_AUTONEG && SAM34_EMAC_PHYSR_ALTCONFIG
+	---help---
+		This must be provided if SAM34_EMAC_AUTONEG is defined.  This is the value
+		under the bit mask that represents the 10Mbps, full duplex setting.
+
+config SAM34_EMAC_PHYSR_100FD
+	hex "100Base-T Full Duplex Value"
+	depends on SAM34_EMAC_AUTONEG && SAM34_EMAC_PHYSR_ALTCONFIG
+	---help---
+		This must be provided if SAM34_EMAC_AUTONEG is defined.  This is the value
+		under the bit mask that represents the 100Mbps, full duplex setting.
+
+config SAM34_EMAC_REGDEBUG
+	bool "Register-Level Debug"
+	default n
+	depends on DEBUG
+	---help---
+		Enable very low-level register access debug.  Depends on DEBUG.
+
+config SAM34_EMAC_ISETH0
+	bool
+	default y if !SAM34_EMAC || !SAM34_GMAC_ISETH0
+	default n if SAM34_EMAC && SAM34_GMAC_ISETH0
+
+endmenu # EMAC device driver options
+endif # SAM34_EMAC
 
 if SAM34_WDT
 comment "AT91SAM3/4 Watchdog Configuration"|

arch/arm/src/sam34/Make.defs

@@ -104,6 +104,10 @@ ifeq ($(CONFIG_SAM34_PDCA),y)
 CHIP_CSRCS += sam4l_pdca.c
 endif
 
+ifeq ($(CONFIG_SAM34_EMAC),y)
+CHIP_CSRCS += sam_emac.c
+endif
+
 ifeq ($(CONFIG_SAM34_HSMCI),y)
 CHIP_CSRCS += sam_hsmci.c
 endif

arch/arm/src/sam34/sam4e_periphclks.h

@@ -52,8 +52,8 @@
 
 #define sam_enableperiph0(s)       putreg32((1 << (s)), SAM_PMC_PCER0)
 #define sam_enableperiph1(s)       putreg32((1 << ((s) - 32)), SAM_PMC_PCER1)
-#define sam_disableperiph0(s)      putreg32((1 << (s)), SAM_PMC_PDER0)
+#define sam_disableperiph0(s)      putreg32((1 << (s)), SAM_PMC_PCDR0)
-#define sam_disableperiph1(s)      putreg32((1 << ((s) - 32)), SAM_PMC_PDER1)
+#define sam_disableperiph1(s)      putreg32((1 << ((s) - 32)), SAM_PMC_PCDR1)
 
 #define sam_supc_enableclk()       sam_enableperiph0(SAM_PID_SUPC)
 #define sam_rstc_enableclk()       sam_enableperiph0(SAM_PID_RSTC)

arch/arm/src/sam34/sam_cmcc.h

@@ -125,5 +125,12 @@ void sam_cmcc_invalidateall(void);
 #endif
 
 #endif /* __ASSEMBLY__ */
+#else /* CONFIG_SAM34_CMCC */
+
+/* Stubs so that we don't have to put condition compilation in driver source */
+
+#  define sam_cmcc_invalidate(start, end)
+#  define sam_cmcc_invalidateall()
+
 #endif /* CONFIG_SAM34_CMCC */
 #endif /* __ARCH_ARM_SRC_SAM34_SAM_CMCC_H */

arch/arm/src/sam34/sam_emac.h

@@ -0,0 +1,120 @@
+/************************************************************************************
+ * arch/arm/src/sam34/sam_ethernet.h
+ *
+ *   Copyright (C) 2014 Gregory Nutt. All rights reserved.
+ *   Author: Gregory Nutt <gnutt@nuttx.org>
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ * 3. Neither the name NuttX nor the names of its contributors may be
+ *    used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ ************************************************************************************/
+
+#ifndef __ARCH_ARM_SRC_SAM34_SAM_ETHERNET_H
+#define __ARCH_ARM_SRC_SAM34_SAM_ETHERNET_H
+
+/************************************************************************************
+ * Included Files
+ ************************************************************************************/
+
+#include <nuttx/config.h>
+
+#include "chip.h"
+#include "chip/sam_emac.h"
+
+#ifdef CONFIG_SAM34_EMAC
+
+/************************************************************************************
+ * Pre-processor Definitions
+ ************************************************************************************/
+
+/************************************************************************************
+ * Public Functions
+ ************************************************************************************/
+
+#ifndef __ASSEMBLY__
+
+#undef EXTERN
+#if defined(__cplusplus)
+#define EXTERN extern "C"
+extern "C"
+{
+#else
+#define EXTERN extern
+#endif
+
+/****************************************************************************
+ * Function: up_netinitialize
+ *
+ * Description:
+ *   Initialize the EMAC driver.  Also prototyped in up_internal.h.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   OK on success; Negated errno on failure.
+ *
+ * Assumptions:
+ *   Called very early in the initialization sequence.
+ *
+ ****************************************************************************/
+
+void up_netinitialize(void);
+
+/************************************************************************************
+ * Function: sam_phy_boardinitialize
+ *
+ * Description:
+ *   Some boards require specialized initialization of the PHY before it can be used.
+ *   This may include such things as configuring GPIOs, resetting the PHY, etc.  If
+ *   CONFIG_SAM34_PHYINIT is defined in the configuration then the board specific
+ *   logic must provide sam_phyinitialize();  The SAM34 Ethernet driver will call
+ *   this function one time before it first uses the PHY.
+ *
+ * Parameters:
+ *   intf - Always zero for now.
+ *
+ * Returned Value:
+ *   OK on success; Negated errno on failure.
+ *
+ * Assumptions:
+ *
+ ************************************************************************************/
+
+#ifdef CONFIG_SAM34_PHYINIT
+int sam_phy_boardinitialize(int intf);
+#endif
+
+#undef EXTERN
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* __ASSEMBLY__ */
+#endif /* CONFIG_SAM34_EMAC */
+#endif /* __ARCH_ARM_SRC_SAM34_SAM_ETHERNET_H */
+