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arch/arm/src/max326xx: Add initial clock configuration logic. Needs verification.

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This commit is contained in:
Gregory Nutt
2018-11-18 16:41:07 -06:00
parent 054db14dd2
commit fe0209eec2
18 changed files with 636 additions and 38 deletions
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arch/arm/src/max326xx/Make.defs
+10 -11
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@@ -40,14 +40,14 @@ HEAD_ASRC =
CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
CMN_ASRCS += up_testset.S up_fetchadd.S vfork.S
CMN_CSRCS = up_assert.c up_blocktask.c up_copyfullstate.c up_createstack.c
CMN_CSRCS += up_doirq.c up_exit.c up_hardfault.c up_initialize.c
CMN_CSRCS += up_initialstate.c up_interruptcontext.c up_mdelay.c
CMN_CSRCS += up_memfault.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_stackframe.c
CMN_CSRCS += up_svcall.c up_trigger_irq.c up_unblocktask.c up_udelay.c
CMN_CSRCS += up_usestack.c up_vfork.c
CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copyfullstate.c
CMN_CSRCS += up_createstack.c up_doirq.c up_exit.c up_hardfault.c
CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
CMN_CSRCS += up_mdelay.c up_memfault.c up_modifyreg8.c up_modifyreg16.c
CMN_CSRCS += up_modifyreg32.c up_releasepending.c up_releasestack.c
CMN_CSRCS += up_reprioritizertr.c up_schedulesigaction.c up_sigdeliver.c
CMN_CSRCS += up_stackframe.c up_svcall.c up_trigger_irq.c up_unblocktask.c
CMN_CSRCS += up_udelay.c up_usestack.c up_vfork.c
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
CMN_ASRCS += up_lazyexception.S
@@ -80,15 +80,14 @@ endif
# Common MAX326XX Source Files
CHIP_ASRCS =
CHIP_CSRCS = max326_start.c max326_clockconfig.c max326_irq.c max326_clrpend.c
CHIP_CSRCS += max326_allocateheap.c
CHIP_CSRCS = max326_start.c max326_irq.c max326_clrpend.c
# Source Files for the MAX32620 and MAX32630
# Source Files for the MAX32660
ifeq ($(CONFIG_ARCH_FAMILY_MAX32660),y)
CHIP_CSRCS += max32660_lowputc.c max32660_gpio.c
CHIP_CSRCS += max32660_clockconfig.c max32660_lowputc.c max32660_gpio.c
endif
# Configuration-Dependent Source Files
arch/arm/src/max326xx/chip/max326_flc.h
+1 -1
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@@ -44,7 +44,7 @@
#if defined(CONFIG_ARCH_FAMILY_MAX32620) || defined(CONFIG_ARCH_FAMILY_MAX32630)
# include "chip/max32620_30_flc.h"
#if defined(CONFIG_ARCH_FAMILY_MAX32660)
#elif defined(CONFIG_ARCH_FAMILY_MAX32660)
# include "chip/max32660_flc.h"
#else
# error "Unsupported MAX326XX family"
arch/arm/src/max326xx/chip/max326_gcr.h
+3
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@@ -126,6 +126,7 @@
#define GCR_CLKCTRL_X32KEN (1 << 17) /* Bit 17: 32.768kHz External Oscillator Enable */
#define GCR_CLKCTRL_HIRCEN (1 << 18) /* Bit 18: High-Frequency Internal Oscillator (HFIO) Enable */
#define GCR_CLKCTRL_X32KRDY (1 << 25) /* Bit 25: 32.768kHz External Oscillator Ready Status */
#define GCR_CLKCTRL_HIRCRDY (1 << 26) /* Bit 26: High-Frequency Internal Oscillator Ready */
#define GCR_CLKCTRL_LIRC8KRDY (1 << 29) /* Bit 29: 8kHz Internal Oscillator Ready Status */
/* Power Management Register */
@@ -156,6 +157,8 @@
/* Memory Clock Control */
#define GCR_MEMCTRL_FWS_SHIFT (0) /* Bits 0-2: Flash Wait States */
#define GCR_MEMCTRL_FWS_MASK (7 << GCR_MEMCTRL_FWS_SHIFT)
# define GCR_MEMCTRL_FWS(n) ((uint32_t)(n) << GCR_MEMCTRL_FWS_SHIFT)
#define GCR_MEMCTRL_RAM0LS (1 << 8) /* Bit 8: System RAM 0 Light Sleep Enable */
#define GCR_MEMCTRL_RAM1LS (1 << 9) /* Bit 9: System RAM 1 Light Sleep Enable */
#define GCR_MEMCTRL_RAM2LS (1 << 10) /* Bit 10: System RAM 2 Light Sleep Enable */
arch/arm/src/max326xx/chip/max326_gpio.h
+1 -1
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@@ -44,7 +44,7 @@
#if defined(CONFIG_ARCH_FAMILY_MAX32620) || defined(CONFIG_ARCH_FAMILY_MAX32630)
# include "chip/max32620_30_gpio.h"
#if defined(CONFIG_ARCH_FAMILY_MAX32660)
#elif defined(CONFIG_ARCH_FAMILY_MAX32660)
# include "chip/max32660_gpio.h"
#else
# error "Unsupported MAX326XX family"
arch/arm/src/max326xx/chip/max326_memorymap.h
+1 -1
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@@ -44,7 +44,7 @@
#if defined(CONFIG_ARCH_FAMILY_MAX32620) || defined(CONFIG_ARCH_FAMILY_MAX32630)
# include "chip/max32620_30_memorymap.h"
#if defined(CONFIG_ARCH_FAMILY_MAX32660)
#elif defined(CONFIG_ARCH_FAMILY_MAX32660)
# include "chip/max32660_memorymap.h"
#else
# error "Unsupported MAX326XX family"
arch/arm/src/max326xx/chip/max326_pinmux.h
+1 -1
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@@ -44,7 +44,7 @@
#if defined(CONFIG_ARCH_FAMILY_MAX32620) || defined(CONFIG_ARCH_FAMILY_MAX32630)
# include "chip/max32620_30_pinmux.h"
#if defined(CONFIG_ARCH_FAMILY_MAX32660)
#elif defined(CONFIG_ARCH_FAMILY_MAX32660)
# include "chip/max32660_pinmux.h"
#else
# error "Unsupported MAX326XX family"
arch/arm/src/max326xx/chip/max326_pwrseq.h
+1
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@@ -75,6 +75,7 @@
* Enable for BACKUP Mode */
#define PWRSEQ_LPCTRL_OVR_SHIFT (4) /* Output Voltage Range */
#define PWRSEQ_LPCTRL_OVR_MASK (3 << PWRSEQ_LPCTRL_OVR_SHIFT)
# define PWRSEQ_LPCTRL_OVR(n) ((uint32_t)(n) << PWRSEQ_LPCTRL_OVR_SHIFT)
# define PWRSEQ_LPCTRL_OVR_1p1V (2 << PWRSEQ_LPCTRL_OVR_SHIFT) /* VCORE=1.1V fINTCLK=96MHz */
# define PWRSEQ_LPCTRL_OVR_1p0V (1 << PWRSEQ_LPCTRL_OVR_SHIFT) /* VCORE=1.0V fINTCLK=48MHz */
# define PWRSEQ_LPCTRL_OVR_0p9V (0 << PWRSEQ_LPCTRL_OVR_SHIFT) /* VCORE=0.9V fINTCLK=24MHz */
arch/arm/src/max326xx/chip/max326_rtc.h
+1 -1
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@@ -44,7 +44,7 @@
#if defined(CONFIG_ARCH_FAMILY_MAX32620) || defined(CONFIG_ARCH_FAMILY_MAX32630)
# include "chip/max32620_30_rtc.h"
#if defined(CONFIG_ARCH_FAMILY_MAX32660)
#elif defined(CONFIG_ARCH_FAMILY_MAX32660)
# include "chip/max32660_rtc.h"
#else
# error "Unsupported MAX326XX family"
arch/arm/src/max326xx/chip/max326_tmr.h
+1 -1
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@@ -44,7 +44,7 @@
#if defined(CONFIG_ARCH_FAMILY_MAX32620) || defined(CONFIG_ARCH_FAMILY_MAX32630)
# include "chip/max32620_30_tmr.h"
#if defined(CONFIG_ARCH_FAMILY_MAX32660)
#elif defined(CONFIG_ARCH_FAMILY_MAX32660)
# include "chip/max32660_tmr.h"
#else
# error "Unsupported MAX326XX family"
arch/arm/src/max326xx/chip/max326_uart.h
+1 -1
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@@ -44,7 +44,7 @@
#if defined(CONFIG_ARCH_FAMILY_MAX32620) || defined(CONFIG_ARCH_FAMILY_MAX32630)
# include "chip/max32620_30_uart.h"
#if defined(CONFIG_ARCH_FAMILY_MAX32660)
#elif defined(CONFIG_ARCH_FAMILY_MAX32660)
# include "chip/max32660_uart.h"
#else
# error "Unsupported MAX326XX family"
arch/arm/src/max326xx/chip/max326_wdt.h
+1 -1
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@@ -44,7 +44,7 @@
#if defined(CONFIG_ARCH_FAMILY_MAX32620) || defined(CONFIG_ARCH_FAMILY_MAX32630)
# include "chip/max32620_30_wdt.h"
#if defined(CONFIG_ARCH_FAMILY_MAX32660)
#elif defined(CONFIG_ARCH_FAMILY_MAX32660)
# include "chip/max32660_wdt.h"
#else
# error "Unsupported MAX326XX family"
arch/arm/src/max326xx/common/max326_clrpend.c
+1 -1
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@@ -73,7 +73,7 @@ void max326_clrpend(int irq)
{
putreg32(1 << (irq - MAX326_IRQ_EXTINT), NVIC_IRQ0_31_CLRPEND);
}
else if (irq < MAX326_IRQ_NIRQS)
else if (irq < MAX326_IRQ_NVECTORS)
{
putreg32(1 << (irq - MAX326_IRQ_EXTINT - 32), NVIC_IRQ32_63_CLRPEND);
}
arch/arm/src/max326xx/common/max326_start.c
-11
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@@ -71,17 +71,6 @@
# define showprogress(c)
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/* This describes the initial PLL configuration */
static const struct clock_setup_s g_initial_clock_setup =
{
#warning Missing logic
};
/****************************************************************************
* Private Functions
****************************************************************************/
arch/arm/src/max326xx/max32660/max32660_clockconfig.c
+585
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File diff suppressed because it is too large Load Diff
arch/arm/src/max326xx/max32660/max32660_clockconfig.h
+1 -2
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@@ -60,7 +60,7 @@ enum clock_source_e
/* This structure can be used to define a clock configuration.
*
* Fhfio Determined by Output Voltage Range.
* Fsysoc Determined by source clock selection.
* Fsysosc Determined by source clock selection.
* Fsysclk = Fsysclk / (2^psc)
* Fpclk = Fsysclk / 2
*/
@@ -90,5 +90,4 @@ extern "C"
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_MAX326XX_MAX_32660_MAX32660_CLOCKCONFIG_H */
arch/arm/src/max326xx/max326_clockconfig.h
+24 -4
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@@ -51,7 +51,7 @@
#if defined(CONFIG_ARCH_FAMILY_MAX32620) || defined(CONFIG_ARCH_FAMILY_MAX32630)
# include "max32620_30/max32620_30_clockconfig.h"
#if defined(CONFIG_ARCH_FAMILY_MAX32660)
#elif defined(CONFIG_ARCH_FAMILY_MAX32660)
# include "max32660/max32660_clockconfig.h"
#else
# error "Unsupported MAX326XX family"
@@ -76,6 +76,16 @@ extern "C"
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/* This describes the initial clock configuration. g_initial_clock_setup
* must be provided by MCU-specific logic.
*/
EXTERN const struct clock_setup_s g_initial_clock_setup;
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
@@ -89,7 +99,7 @@ extern "C"
* clocking using the settings in board.h. This function also performs
* other low-level chip as necessary.
*
*****************************************************************************/
****************************************************************************/
void max326_clockconfig(FAR const struct clock_setup_s *clocksetup);
@@ -99,7 +109,7 @@ void max326_clockconfig(FAR const struct clock_setup_s *clocksetup);
* Description:
* Return the High-Frequency Internal Oscillator (HFIO) frequency.
*
*****************************************************************************/
****************************************************************************/
uint32_t max326_hfio_frequency(void);
@@ -109,10 +119,20 @@ uint32_t max326_hfio_frequency(void);
* Description:
* Return the current CPU frequency.
*
*****************************************************************************/
****************************************************************************/
uint32_t max326_cpu_frequency(void);
/****************************************************************************
* Name: max326_pclk_frequency
*
* Description:
* Return the current peripheral clock frequency.
*
****************************************************************************/
uint32_t max326_pclk_frequency(void);
#undef EXTERN
#if defined(__cplusplus)
}
arch/arm/src/max326xx/max326_gpio.h
+1 -1
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@@ -55,7 +55,7 @@
#if defined(CONFIG_ARCH_FAMILY_MAX32620) || defined(CONFIG_ARCH_FAMILY_MAX32630)
# include "max32620_30/max32620_30_gpio.h"
#if defined(CONFIG_ARCH_FAMILY_MAX32660)
#elif defined(CONFIG_ARCH_FAMILY_MAX32660)
# include "max32660/max32660_gpio.h"
#else
# error "Unsupported MAX326XX family"
configs/max32660-evsys/include/board.h
+2
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@@ -48,6 +48,8 @@
/* Clocking *****************************************************************/
#define BOARD_HAVE_X32K 1 /* Have external 32.786KHz crystal oscialltor */
/* LED definitions **********************************************************/
/* The MAX32660-EVSYS board has a single red LED is connected to GPIO P0.13