Updates to the PIC32 USB driver (still kind of buggy); Fix for STM32 CAN2 -- Need to enable CAN1 clocking to use CAN2

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4493 42af7a65-404d-4744-a932-0658087f49c3

ChangeLog

@@ -2573,3 +2573,9 @@
 	  the deadlock.
 	* arch/arm/src/stm32/stm32_pm*.c: Add basic STM32 power management logic
 	  that will eventually be used to implement low power states.
+	* arch/arm/src/stm32/stm32f*0xx_rcc.c:  In order to use CAN2, both CAN1 and
+	  CAN2 clocking must be enabled.
+	* arch/mips/src/pic32mx/picm32mx-usbdev.c:  Several stall-related fixes so that
+	  the USB device driver can used the the mass storage class (which does a LOT
+	  of stalling as part of its normal protocol).  I suspect that there are still
+	  outstanding issues with the USB driver and stalling.

TODO

@@ -1259,9 +1259,9 @@ o MIPS (arch/mips)
   Title:       PIC32MX USB MASS STORAGE
   Description: A USB device-side driver has been written for the PIC3MX and
                is partially tested.  It does not, however, seem to work with the
-               mass storage device.  This is probably due to errors in how endpoint
-               stalls are handled since the mass storage protocol depends on stalls
-               to indicate the end-of-data.
+               mass storage device.  I believe that these are timing-related
+               errors in how endpoint stalls are handled since the mass storage
+               protocol depends on stalls to indicate the end-of-data.
   Status:      Open
   Priority:    Medium
 

arch/arm/src/stm32/stm32f10xxx_rcc.c

@@ -287,9 +287,9 @@ static inline void rcc_enableapb1(void)
 #endif
 
 #ifdef CONFIG_STM32_CAN2
-  /* CAN2 clock enable */
+  /* CAN2 clock enable.  NOTE: CAN2 needs CAN1 clock as well. */
 
-  regval |= RCC_APB1ENR_CAN2EN;
+  regval |= (RCC_APB1ENR_CAN1EN | RCC_APB1ENR_CAN2EN);
 #endif
 
 #ifdef CONFIG_STM32_BKP

arch/arm/src/stm32/stm32f20xxx_rcc.c

@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/stm32/stm32f20xxx_rcc.c
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -420,9 +420,9 @@ static inline void rcc_enableapb1(void)
 #endif
 
 #if CONFIG_STM32_CAN2
-  /* CAN 2 clock enable */
+  /* CAN2 clock enable.  NOTE: CAN2 needs CAN1 clock as well. */
 
-  regval |= RCC_APB1ENR_CAN2EN;
+  regval |= (RCC_APB1ENR_CAN1EN | RCC_APB1ENR_CAN2EN);
 #endif
 
   /* Power interface clock enable.  The PWR block is always enabled so that

arch/arm/src/stm32/stm32f40xxx_rcc.c

@@ -420,9 +420,9 @@ static inline void rcc_enableapb1(void)
 #endif
 
 #ifdef CONFIG_STM32_CAN2
-  /* CAN 2 clock enable */
+  /* CAN2 clock enable.  NOTE: CAN2 needs CAN1 clock as well. */
 
-  regval |= RCC_APB1ENR_CAN2EN;
+  regval |= (RCC_APB1ENR_CAN1EN | RCC_APB1ENR_CAN2EN);
 #endif
 
   /* Power interface clock enable.  The PWR block is always enabled so that

configs/pic32-starterkit/README.txt

@@ -1168,8 +1168,9 @@ Where <subdir> is one of the following:
       nsh> msconn
 
     NOTE:  This modification is experimental and does not yet
-    work properly!  My hunch is that the USB device driver won't
-    support MSC -- probably because the required MSC stall
+    work properly!  I can only occasionally get Windows to mount
+    the RAM disk.  I think there are still a few lurking bugs in
+    USB device driver -- probably because the required MSC stall
     handling. However, this configuration is worth remembering
     for future USB MSC testing.
 

drivers/usbdev/usbmsc_scsi.c

@@ -1683,6 +1683,7 @@ static int usbmsc_cmdparsestate(FAR struct usbmsc_dev_s *priv)
       usbtrace(TRACE_CLSERROR(USBMSC_TRACEERR_CMDPARSEWRREQLISTEMPTY), 0);
       return -ENOMEM;
     }
+
   DEBUGASSERT(privreq->req && privreq->req->buf);
   buf                = privreq->req->buf;
 
@@ -2332,9 +2333,9 @@ static int usbmsc_cmdfinishstate(FAR struct usbmsc_dev_s *priv)
               usleep (100000);
               (void)EP_STALL(priv->epbulkin);
 
- 	      /* now wait for stall to go away .... */
+              /* now wait for stall to go away .... */
 
- 	      usleep (100000);
+              usleep (100000);
 #else
               (void)EP_STALL(priv->epbulkin);
 #endif