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Make some spacing comply better with coding standard

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This commit is contained in:
Gregory Nutt
2015-10-06 17:28:32 -06:00
parent 281c6cc704
commit fc3ed64864
33 changed files with 392 additions and 335 deletions
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arch/arm/src/armv6-m/up_assert.c
+1 -1
View File
@@ -125,7 +125,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
{
uint32_t *ptr = (uint32_t*)stack;
uint32_t *ptr = (uint32_t *)stack;
lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
arch/arm/src/c5471/c5471_ethernet.c
+32 -23
View File
@@ -1815,7 +1815,7 @@ static int c5471_txavail(struct net_driver_s *dev)
/* If so, then poll uIP for new XMIT data */
(void)devif_poll(&c5471->c_dev, c5471_txpoll);
}
}
}
irqrestore(flags);
@@ -1912,7 +1912,8 @@ static void c5471_eimreset (struct c5471_driver_s *c5471)
/* Assert nRESET to reset the board's PHY0/1 chips */
putreg32((CLKM_CTL_RST_EXT_RESET|CLKM_CTL_RST_LEAD_RESET), CLKM_CTL_RST);
putreg32((CLKM_CTL_RST_EXT_RESET | CLKM_CTL_RST_LEAD_RESET),
CLKM_CTL_RST);
up_mdelay(2);
/* Release the peripheral nRESET signal */
@@ -1960,7 +1961,8 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
else
val = EIM_TXDESC_WRAP_FIRST;
val |= EIM_TXDESC_OWN_HOST|EIM_TXDESC_INTRE|EIM_TXDESC_PADCRC|EIM_PACKET_BYTES;
val |= EIM_TXDESC_OWN_HOST | EIM_TXDESC_INTRE | EIM_TXDESC_PADCRC |
EIM_PACKET_BYTES;
putreg32(val, desc);
desc += sizeof(uint32_t);
@@ -1986,7 +1988,8 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
else
val = EIM_RXDESC_WRAP_FIRST;
val |= EIM_RXDESC_OWN_ENET|EIM_RXDESC_INTRE|EIM_RXDESC_PADCRC|EIM_PACKET_BYTES;
val |= EIM_RXDESC_OWN_ENET | EIM_RXDESC_INTRE | EIM_RXDESC_PADCRC |
EIM_PACKET_BYTES;
putreg32(val, desc);
desc += sizeof(uint32_t);
@@ -2015,7 +2018,8 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
else
val = EIM_TXDESC_WRAP_FIRST;
val |= EIM_TXDESC_OWN_HOST|EIM_TXDESC_INTRE|EIM_TXDESC_PADCRC|EIM_PACKET_BYTES;
val |= EIM_TXDESC_OWN_HOST | EIM_TXDESC_INTRE | EIM_TXDESC_PADCRC |
EIM_PACKET_BYTES;
putreg32(val, desc);
desc += sizeof(uint32_t);
@@ -2044,7 +2048,8 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
else
val = EIM_RXDESC_WRAP_FIRST;
val |= EIM_RXDESC_OWN_ENET|EIM_RXDESC_INTRE|EIM_RXDESC_PADCRC|EIM_PACKET_BYTES;
val |= EIM_RXDESC_OWN_ENET | EIM_RXDESC_INTRE | EIM_RXDESC_PADCRC |
EIM_PACKET_BYTES;
putreg32(val, desc);
desc += sizeof(uint32_t);
@@ -2069,9 +2074,10 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
#if 0
putreg32(EIM_FILTER_UNICAST, EIM_CPU_FILTER);
#else
// putreg32(EIM_FILTER_LOGICAL|EIM_FILTER_UNICAST|EIM_FILTER_MULTICAST|
// putreg32(EIM_FILTER_LOGICAL | EIM_FILTER_UNICAST | EIM_FILTER_MULTICAST |
// EIM_FILTER_BROADCAST, EIM_CPU_FILTER);
putreg32(EIM_FILTER_UNICAST|EIM_FILTER_MULTICAST|EIM_FILTER_BROADCAST, EIM_CPU_FILTER);
putreg32(EIM_FILTER_UNICAST | EIM_FILTER_MULTICAST | EIM_FILTER_BROADCAST,
EIM_CPU_FILTER);
#endif
/* Disable all Ethernet interrupts */
@@ -2081,11 +2087,12 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
/* Setup the EIM control register */
#if 1
putreg32(EIM_CTRL_ENET0_EN|EIM_CTRL_RXENET0_EN|EIM_CTRL_TXENET0_EN|
EIM_CTRL_RXCPU_EN|EIM_CTRL_TXCPU_EN, EIM_CTRL);
putreg32(EIM_CTRL_ENET0_EN | EIM_CTRL_RXENET0_EN | EIM_CTRL_TXENET0_EN |
EIM_CTRL_RXCPU_EN | EIM_CTRL_TXCPU_EN, EIM_CTRL);
#else
putreg32(EIM_CTRL_ENET0_EN|EIM_CTRL_ENET0_FLW|EIM_CTRL_RXENET0_EN|
EIM_CTRL_TXENET0_EN|EIM_CTRL_RXCPU_EN|EIM_CTRL_TXCPU_EN, EIM_CTRL);
putreg32(EIM_CTRL_ENET0_EN | EIM_CTRL_ENET0_FLW | EIM_CTRL_RXENET0_EN |
EIM_CTRL_TXENET0_EN | EIM_CTRL_RXCPU_EN | EIM_CTRL_TXCPU_EN,
EIM_CTRL);
#endif
#if 1
@@ -2103,9 +2110,11 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
/* Setup the ENET0 mode register */
#if 1
putreg32(ENET_MODE_RJCT_SFE|ENET_MODE_MWIDTH|ENET_MODE_FULLDUPLEX, ENET0_MODE);
putreg32(ENET_MODE_RJCT_SFE | ENET_MODE_MWIDTH | ENET_MODE_FULLDUPLEX,
ENET0_MODE);
#else
putreg32(ENET_MODE_RJCT_SFE|ENET_MODE_MWIDTH|ENET_MODE_HALFDUPLEX, ENET0_MODE);
putreg32(ENET_MODE_RJCT_SFE | ENET_MODE_MWIDTH | ENET_MODE_HALFDUPLEX,
ENET0_MODE);
#endif
putreg32(0x00000000, ENET0_BOFFSEED);
@@ -2114,7 +2123,7 @@ static void c5471_eimconfig(struct c5471_driver_s *c5471)
putreg32(0x00000000, ENET0_VTYPE);
#if 0
putreg32(ENET_ADR_BROADCAST|ENET_ADR_PROMISCUOUS, ENET0_ADRMODE_EN);
putreg32(ENET_ADR_BROADCAST | ENET_ADR_PROMISCUOUS, ENET0_ADRMODE_EN);
#else
/* The CPU port is not PROMISCUOUS, it wants a no-promiscuous address
* match yet the SWITCH receives packets from the PROMISCUOUS ENET0
@@ -2239,19 +2248,19 @@ void up_netinitialize(void)
/* Initialize the driver structure */
memset(g_c5471, 0, CONFIG_C5471_NET_NINTERFACES*sizeof(struct c5471_driver_s));
g_c5471[0].c_dev.d_ifup = c5471_ifup; /* I/F down callback */
g_c5471[0].c_dev.d_ifdown = c5471_ifdown; /* I/F up (new IP address) callback */
g_c5471[0].c_dev.d_txavail = c5471_txavail; /* New TX data callback */
g_c5471[0].c_dev.d_ifup = c5471_ifup; /* I/F down callback */
g_c5471[0].c_dev.d_ifdown = c5471_ifdown; /* I/F up (new IP address) callback */
g_c5471[0].c_dev.d_txavail = c5471_txavail; /* New TX data callback */
#ifdef CONFIG_NET_IGMP
g_c5471[0].c_dev.d_addmac = c5471_addmac; /* Add multicast MAC address */
g_c5471[0].c_dev.d_rmmac = c5471_rmmac; /* Remove multicast MAC address */
g_c5471[0].c_dev.d_addmac = c5471_addmac; /* Add multicast MAC address */
g_c5471[0].c_dev.d_rmmac = c5471_rmmac; /* Remove multicast MAC address */
#endif
g_c5471[0].c_dev.d_private = (void*)g_c5471; /* Used to recover private state from dev */
g_c5471[0].c_dev.d_private = (void *)g_c5471; /* Used to recover private state from dev */
/* Create a watchdog for timing polling for and timing of transmisstions */
g_c5471[0].c_txpoll = wd_create(); /* Create periodic poll timer */
g_c5471[0].c_txtimeout = wd_create(); /* Create TX timeout timer */
g_c5471[0].c_txpoll = wd_create(); /* Create periodic poll timer */
g_c5471[0].c_txtimeout = wd_create(); /* Create TX timeout timer */
/* Register the device with the OS so that socket IOCTLs can be performed */
arch/arm/src/c5471/c5471_irq.c
+1 -1
View File
@@ -135,7 +135,7 @@ static inline void up_ackfiq(unsigned int irq)
static inline void up_vectorinitialize(void)
{
up_vector_t *src = g_vectorinittab;
up_vector_t *dest = (up_vector_t*)&_svectors;
up_vector_t *dest = (up_vector_t *)&_svectors;
int i;
for (i = 0; i < NVECTORS; i++)
arch/arm/src/c5471/c5471_serial.c
+26 -25
View File
@@ -268,7 +268,7 @@ static inline void up_disableuartint(struct up_dev_s *priv, uint16_t *ier)
static inline void up_restoreuartint(struct up_dev_s *priv, uint16_t ier)
{
priv->regs.ier |= ier & (UART_IER_RECVINT|UART_IER_XMITINT);
priv->regs.ier |= ier & (UART_IER_RECVINT | UART_IER_XMITINT);
up_serialout(priv, UART_IER_OFFS, priv->regs.ier);
}
@@ -380,11 +380,11 @@ static int up_setup(struct uart_dev_s *dev)
if (priv->parity == 1) /* Odd parity */
{
cval |= (UART_LCR_PAREN|UART_LCR_PARODD);
cval |= (UART_LCR_PAREN | UART_LCR_PARODD);
}
else if (priv->parity == 2) /* Even parity */
{
cval |= (UART_LCR_PAREN|UART_LCR_PAREVEN);
cval |= (UART_LCR_PAREN | UART_LCR_PAREVEN);
}
/* Both the IrDA and MODEM UARTs support RESET and UART mode. */
@@ -465,7 +465,7 @@ static int up_setup(struct uart_dev_s *dev)
static void up_shutdown(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv;
struct up_dev_s *priv = (struct up_dev_s *)CONSOLE_DEV.priv;
up_disableuartint(priv, NULL);
}
@@ -486,7 +486,7 @@ static void up_shutdown(struct uart_dev_s *dev)
static int up_attach(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
int ret;
/* Attach and enable the IRQ */
@@ -494,12 +494,13 @@ static int up_attach(struct uart_dev_s *dev)
ret = irq_attach(priv->irq, up_interrupt);
if (ret == OK)
{
/* Enable the interrupt (RX and TX interrupts are still disabled
* in the UART
*/
/* Enable the interrupt (RX and TX interrupts are still disabled
* in the UART
*/
up_enable_irq(priv->irq);
up_enable_irq(priv->irq);
}
return ret;
}
@@ -515,7 +516,7 @@ static int up_attach(struct uart_dev_s *dev)
static void up_detach(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
up_disable_irq(priv->irq);
irq_detach(priv->irq);
}
@@ -551,7 +552,7 @@ static int up_interrupt(int irq, void *context)
{
PANIC();
}
priv = (struct up_dev_s*)dev->priv;
priv = (struct up_dev_s *)dev->priv;
cause = up_inserial(priv, UART_ISR_OFFS) & 0x0000003f;
@@ -586,11 +587,11 @@ static int up_interrupt(int irq, void *context)
/* Is this an interrupt from the IrDA UART? */
if (irq == C5471_IRQ_UART_IRDA)
{
/* Restore the IrDA UART interrupt enables */
{
/* Restore the IrDA UART interrupt enables */
up_serialout(priv, UART_IER_OFFS, ier_val);
}
up_serialout(priv, UART_IER_OFFS, ier_val);
}
}
else if ((cause & 0x0000000c) == 0x00000004)
{
@@ -617,7 +618,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
{
struct inode *inode = filep->f_inode;
struct uart_dev_s *dev = inode->i_private;
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
int ret = OK;
switch (cmd)
@@ -625,7 +626,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
#ifdef CONFIG_SERIAL_TIOCSERGSTRUCT
case TIOCSERGSTRUCT:
{
struct up_dev_s *user = (struct up_dev_s*)arg;
struct up_dev_s *user = (struct up_dev_s *)arg;
if (!user)
{
ret = -EINVAL;
@@ -675,7 +676,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
static int up_receive(struct uart_dev_s *dev, unsigned int *status)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
uint32_t rhr;
uint32_t lsr;
@@ -703,7 +704,7 @@ static int up_receive(struct uart_dev_s *dev, unsigned int *status)
static void up_rxint(struct uart_dev_s *dev, bool enable)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
if (enable)
{
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
@@ -728,7 +729,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
static bool up_rxavailable(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
return up_inserial(priv, UART_LSR_OFFS) & UART_RX_FIFO_NOEMPTY;
}
@@ -742,7 +743,7 @@ static bool up_rxavailable(struct uart_dev_s *dev)
static void up_send(struct uart_dev_s *dev, int ch)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
up_serialout(priv, UART_THR_OFFS, (uint8_t)ch);
}
@@ -756,7 +757,7 @@ static void up_send(struct uart_dev_s *dev, int ch)
static void up_txint(struct uart_dev_s *dev, bool enable)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
if (enable)
{
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
@@ -781,7 +782,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
static bool up_txready(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
return (up_inserial(priv, UART_SSR_OFFS) & UART_SSR_TXFULL) == 0;
}
@@ -795,7 +796,7 @@ static bool up_txready(struct uart_dev_s *dev)
static bool up_txempty(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
return (up_inserial(priv, UART_LSR_OFFS) & UART_LSR_TREF) != 0;
}
@@ -849,7 +850,7 @@ void up_serialinit(void)
int up_putc(int ch)
{
struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv;
struct up_dev_s *priv = (struct up_dev_s *)CONSOLE_DEV.priv;
uint16_t ier;
up_disableuartint(priv, &ier);
arch/arm/src/calypso/calypso_armio.c
+2 -2
View File
@@ -90,11 +90,11 @@ void calypso_armio(void)
{
/* Enable ARMIO clock */
putreg16(1<<5, ARMIO_REG(CNTL_REG));
putreg16(1 << 5, ARMIO_REG(CNTL_REG));
/* Mask GPIO interrupt and keypad interrupt */
putreg16(KBD_INT|GPIO_INT, ARMIO_REG(KBD_GPIO_MASKIT));
putreg16(KBD_INT | GPIO_INT, ARMIO_REG(KBD_GPIO_MASKIT));
/* Attach and enable the interrupt */
arch/arm/src/calypso/calypso_heap.c
+1 -1
View File
@@ -96,6 +96,6 @@ void up_addregion(void)
/* Configure the RHEA bridge with some sane default values */
calypso_rhea_cfg(0, 0, 0xff, 0, 1, 0, 0);
kmm_addregion((FAR void*)CONFIG_HEAP2_BASE, CONFIG_HEAP2_SIZE);
kmm_addregion((FAR void *)CONFIG_HEAP2_BASE, CONFIG_HEAP2_SIZE);
}
#endif
arch/arm/src/calypso/calypso_keypad.c
+1 -1
View File
@@ -160,7 +160,7 @@ static int pwr_btn_dec(uint32_t * state, uint8_t reg, char *buf, size_t * len)
* false keystrokes otherwise
*/
return 1;
return 1;
}
}
arch/arm/src/calypso/calypso_serial.c
+45 -45
View File
@@ -302,7 +302,7 @@ static inline void up_disableuartint(struct up_dev_s *priv, uint16_t *ier)
static inline void up_restoreuartint(struct up_dev_s *priv, uint16_t ier)
{
priv->regs.ier |= ier & (UART_IER_RECVINT|UART_IER_XMITINT);
priv->regs.ier |= ier & (UART_IER_RECVINT | UART_IER_XMITINT);
up_serialout(priv, UART_IER_OFFS, priv->regs.ier);
}
@@ -419,11 +419,11 @@ static int up_setup(struct uart_dev_s *dev)
if (priv->parity == 1) /* Odd parity */
{
cval |= (UART_LCR_PAREN|UART_LCR_PARODD);
cval |= (UART_LCR_PAREN | UART_LCR_PARODD);
}
else if (priv->parity == 2) /* Even parity */
{
cval |= (UART_LCR_PAREN|UART_LCR_PAREVEN);
cval |= (UART_LCR_PAREN | UART_LCR_PAREVEN);
}
/* Both the IrDA and MODEM UARTs support RESET and UART mode. */
@@ -462,7 +462,7 @@ static int up_setup(struct uart_dev_s *dev)
#ifdef UART_MULTIPLEX_REGS
priv->regs.lcr = 0x80;
up_serialout(priv, UART_LCR_OFFS, priv->regs.lcr);
//up_serialout(priv, UART_MCR_OFFS, 1<<4); /* loopback */
//up_serialout(priv, UART_MCR_OFFS, 1 << 4); /* loopback */
#endif
up_serialout(priv, UART_TFCR_OFFS, 0); /* Reset to 0 */
@@ -526,7 +526,7 @@ static int up_setup(struct uart_dev_s *dev)
static void up_shutdown(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv;
struct up_dev_s *priv = (struct up_dev_s *)CONSOLE_DEV.priv;
up_disableuartint(priv, NULL);
}
@@ -547,7 +547,7 @@ static void up_shutdown(struct uart_dev_s *dev)
static int up_attach(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
int ret;
/* Attach and enable the IRQ */
@@ -555,11 +555,11 @@ static int up_attach(struct uart_dev_s *dev)
ret = irq_attach(priv->irq, up_interrupt);
if (ret == OK)
{
/* Enable the interrupt (RX and TX interrupts are still disabled
* in the UART
*/
/* Enable the interrupt (RX and TX interrupts are still disabled
* in the UART
*/
up_enable_irq(priv->irq);
up_enable_irq(priv->irq);
}
return ret;
@@ -577,7 +577,7 @@ static int up_attach(struct uart_dev_s *dev)
static void up_detach(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
up_disable_irq(priv->irq);
irq_detach(priv->irq);
}
@@ -613,7 +613,7 @@ static int up_interrupt(int irq, void *context)
{
PANIC();
}
priv = (struct up_dev_s*)dev->priv;
priv = (struct up_dev_s *)dev->priv;
cause = up_inserial(priv, UART_ISR_OFFS) & 0x0000003f;
@@ -641,14 +641,14 @@ static int up_interrupt(int irq, void *context)
#ifdef CONFIG_SERCOMM_CONSOLE
if (priv->sercomm)
{
sercomm_recvchars(dev);
}
{
sercomm_recvchars(dev);
}
else
#endif
{
uart_recvchars(dev);
}
{
uart_recvchars(dev);
}
/* read UART_RHR to clear int condition
* toss = up_inserialchar(priv,&status);
@@ -657,38 +657,38 @@ static int up_interrupt(int irq, void *context)
/* Is this an interrupt from the IrDA UART? */
if (irq == UART_IRQ_IRDA)
{
/* Restore the IrDA UART interrupt enables */
{
/* Restore the IrDA UART interrupt enables */
up_serialout(priv, UART_IER_OFFS, ier_val);
}
up_serialout(priv, UART_IER_OFFS, ier_val);
}
}
else if ((cause & 0x0000000c) == 0x00000004)
{
#ifdef CONFIG_SERCOMM_CONSOLE
if (priv->sercomm)
{
sercomm_recvchars(dev);
}
{
sercomm_recvchars(dev);
}
else
#endif
{
uart_recvchars(dev);
}
{
uart_recvchars(dev);
}
}
if ((cause & 0x00000002) != 0)
{
#ifdef CONFIG_SERCOMM_CONSOLE
if (priv->sercomm)
{
sercomm_xmitchars(dev);
}
{
sercomm_xmitchars(dev);
}
else
#endif
{
uart_xmitchars(dev);
}
{
uart_xmitchars(dev);
}
}
return OK;
@@ -706,7 +706,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
{
struct inode *inode = filep->f_inode;
struct uart_dev_s *dev = inode->i_private;
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
int ret = OK;
switch (cmd)
@@ -714,7 +714,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
#ifdef CONFIG_SERIAL_TIOCSERGSTRUCT
case TIOCSERGSTRUCT:
{
struct up_dev_s *user = (struct up_dev_s*)arg;
struct up_dev_s *user = (struct up_dev_s *)arg;
if (!user)
{
ret = -EINVAL;
@@ -764,7 +764,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
static int up_receive(struct uart_dev_s *dev, unsigned int *status)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
uint32_t rhr;
uint32_t lsr;
@@ -792,7 +792,7 @@ static int up_receive(struct uart_dev_s *dev, unsigned int *status)
static void up_rxint(struct uart_dev_s *dev, bool enable)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
if (enable)
{
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
@@ -817,7 +817,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
static bool up_rxavailable(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
return up_inserial(priv, UART_LSR_OFFS) & UART_RX_FIFO_NOEMPTY;
}
@@ -831,7 +831,7 @@ static bool up_rxavailable(struct uart_dev_s *dev)
static void up_send(struct uart_dev_s *dev, int ch)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
up_serialout(priv, UART_THR_OFFS, (uint8_t)ch);
}
@@ -845,7 +845,7 @@ static void up_send(struct uart_dev_s *dev, int ch)
static void up_txint(struct uart_dev_s *dev, bool enable)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
if (enable)
{
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
@@ -870,7 +870,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
static bool up_txready(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
return (up_inserial(priv, UART_SSR_OFFS) & UART_SSR_TXFULL) == 0;
}
@@ -884,7 +884,7 @@ static bool up_txready(struct uart_dev_s *dev)
static bool up_txempty(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
return (up_inserial(priv, UART_LSR_OFFS) & UART_LSR_TREF) != 0;
}
@@ -923,7 +923,7 @@ void up_earlyserialinit(void)
void up_serialinit(void)
{
#ifdef CONFIG_SERCOMM_CONSOLE
((struct up_dev_s*)TTYS0_DEV.priv)->sercomm = true;
((struct up_dev_s *)TTYS0_DEV.priv)->sercomm = true;
(void)sercomm_register("/dev/console", &TTYS0_DEV);
(void)uart_register("/dev/ttyS0", &TTYS1_DEV);
#else
@@ -944,7 +944,7 @@ void up_serialinit(void)
int up_putc(int ch)
{
struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv;
struct up_dev_s *priv = (struct up_dev_s *)CONSOLE_DEV.priv;
uint16_t ier;
up_disableuartint(priv, &ier);
arch/arm/src/calypso/calypso_timer.c
+10 -4
View File
@@ -80,9 +80,13 @@ void hwtimer_enable(int num, int on)
ctl = getreg8(TIMER_REG(num, CNTL_TIMER));
if (on)
ctl |= CNTL_START|CNTL_CLOCK_ENABLE;
{
ctl |= CNTL_START | CNTL_CLOCK_ENABLE;
}
else
{
ctl &= ~CNTL_START;
}
putreg8(ctl, TIMER_REG(num, CNTL_TIMER));
}
@@ -107,10 +111,12 @@ uint16_t hwtimer_read(int num)
{
uint8_t ctl = getreg8(TIMER_REG(num, CNTL_TIMER));
/* somehow a read results in an abort */
/* Somehow a read results in an abort */
if ((ctl & (CNTL_START|CNTL_CLOCK_ENABLE)) != (CNTL_START|CNTL_CLOCK_ENABLE))
return 0xFFFF;
if ((ctl & (CNTL_START | CNTL_CLOCK_ENABLE)) != (CNTL_START | CNTL_CLOCK_ENABLE))
{
return 0xffff;
}
return getreg16(TIMER_REG(num, READ_TIMER));
}
arch/arm/src/common/up_allocateheap.c
+3 -3
View File
@@ -143,14 +143,14 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
/* Return the user-space heap settings */
board_led_on(LED_HEAPALLOCATE);
*heap_start = (FAR void*)ubase;
*heap_start = (FAR void *)ubase;
*heap_size = usize;
#else
/* Return the heap settings */
board_led_on(LED_HEAPALLOCATE);
*heap_start = (FAR void*)g_idle_topstack;
*heap_start = (FAR void *)g_idle_topstack;
*heap_size = CONFIG_RAM_END - g_idle_topstack;
#endif
}
@@ -181,7 +181,7 @@ void up_allocate_kheap(FAR void **heap_start, size_t *heap_size)
* that was not dedicated to the user heap).
*/
*heap_start = (FAR void*)USERSPACE->us_bssend;
*heap_start = (FAR void *)USERSPACE->us_bssend;
*heap_size = ubase - (uintptr_t)USERSPACE->us_bssend;
}
#endif
arch/arm/src/common/up_checkstack.c
+3 -3
View File
@@ -140,7 +140,7 @@ static size_t do_stackcheck(uintptr_t alloc, size_t size)
up_putc('\n');
}
}
}
#endif
/* Return our guess about how much stack space was used */
@@ -180,12 +180,12 @@ ssize_t up_check_tcbstack_remain(FAR struct tcb_s *tcb)
size_t up_check_stack(void)
{
return up_check_tcbstack((FAR struct tcb_s*)g_readytorun.head);
return up_check_tcbstack((FAR struct tcb_s *)g_readytorun.head);
}
ssize_t up_check_stack_remain(void)
{
return up_check_tcbstack_remain((FAR struct tcb_s*)g_readytorun.head);
return up_check_tcbstack_remain((FAR struct tcb_s *)g_readytorun.head);
}
#if CONFIG_ARCH_INTERRUPTSTACK > 3
arch/arm/src/common/up_createstack.c
+1 -1
View File
@@ -215,7 +215,7 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
/* Save the adjusted stack values in the struct tcb_s */
tcb->adj_stack_ptr = (uint32_t*)top_of_stack;
tcb->adj_stack_ptr = (uint32_t *)top_of_stack;
tcb->adj_stack_size = size_of_stack;
/* If stack debug is enabled, then fill the stack with a
arch/arm/src/common/up_exit.c
+2 -2
View File
@@ -138,7 +138,7 @@ static void _up_dumponexit(FAR struct tcb_s *tcb, FAR void *arg)
void _exit(int status)
{
struct tcb_s* tcb;
struct tcb_s *tcb;
/* Disable interrupts. They will be restored when the next
* task is started.
@@ -161,7 +161,7 @@ void _exit(int status)
* head of the list.
*/
tcb = (struct tcb_s*)g_readytorun.head;
tcb = (struct tcb_s *)g_readytorun.head;
#ifdef CONFIG_ARCH_ADDRENV
/* Make sure that the address environment for the previously running
arch/arm/src/common/up_usestack.c
+1 -1
View File
@@ -159,7 +159,7 @@ int up_use_stack(struct tcb_s *tcb, void *stack, size_t stack_size)
/* Save the adjusted stack values in the struct tcb_s */
tcb->adj_stack_ptr = (uint32_t*)top_of_stack;
tcb->adj_stack_ptr = (uint32_t *)top_of_stack;
tcb->adj_stack_size = size_of_stack;
return OK;
arch/arm/src/dm320/dm320_allocateheap.c
+1 -1
View File
@@ -86,6 +86,6 @@
void up_allocate_heap(FAR void **heap_start, size_t *heap_size)
{
board_led_on(LED_HEAPALLOCATE);
*heap_start = (FAR void*)g_idle_topstack;
*heap_start = (FAR void *)g_idle_topstack;
*heap_size = (DM320_SDRAM_VADDR + CONFIG_RAM_SIZE) - g_idle_topstack;
}
arch/arm/src/dm320/dm320_boot.c
+5 -5
View File
@@ -101,7 +101,7 @@ static const struct section_mapping_s section_mapping[] =
static inline void up_setlevel1entry(uint32_t paddr, uint32_t vaddr, uint32_t mmuflags)
{
uint32_t *pgtable = (uint32_t*)PGTABLE_BASE_VADDR;
uint32_t *pgtable = (uint32_t *)PGTABLE_BASE_VADDR;
uint32_t index = vaddr >> 20;
/* Save the page table entry */
@@ -116,7 +116,7 @@ static inline void up_setlevel1entry(uint32_t paddr, uint32_t vaddr, uint32_t mm
static inline void up_setlevel2coarseentry(uint32_t ctabvaddr, uint32_t paddr,
uint32_t vaddr, uint32_t mmuflags)
{
uint32_t *ctable = (uint32_t*)ctabvaddr;
uint32_t *ctable = (uint32_t *)ctabvaddr;
uint32_t index;
/* The coarse table divides a 1Mb address space up into 256 entries, each
@@ -188,9 +188,9 @@ static void up_vectormapping(void)
static void up_copyvectorblock(void)
{
uint32_t *src = (uint32_t*)&_vector_start;
uint32_t *end = (uint32_t*)&_vector_end;
uint32_t *dest = (uint32_t*)VECTOR_BASE;
uint32_t *src = (uint32_t *)&_vector_start;
uint32_t *end = (uint32_t *)&_vector_end;
uint32_t *dest = (uint32_t *)VECTOR_BASE;
while (src < end)
{
arch/arm/src/dm320/dm320_decodeirq.c
+2 -2
View File
@@ -71,7 +71,7 @@
* Public Functions
********************************************************************************/
void up_decodeirq(uint32_t* regs)
void up_decodeirq(uint32_t *regs)
{
#ifdef CONFIG_SUPPRESS_INTERRUPTS
lowsyslog(LOG_ERR, "Unexpected IRQ\n");
@@ -124,7 +124,7 @@ void up_decodeirq(uint32_t* regs)
#ifdef CONFIG_ARCH_FPU
/* Restore floating point registers */
up_restorefpu((uint32_t*)current_regs);
up_restorefpu((uint32_t *)current_regs);
#endif
#ifdef CONFIG_ARCH_ADDRENV
arch/arm/src/dm320/dm320_framebuffer.c
+8 -8
View File
@@ -471,7 +471,7 @@
#ifdef CONFIG_FB_HWCURSOR
# define DM320_RECTCURSOR_SETUP \
((CONFIG_DM320_CURSORLINEHEIGHT << 1) | \
(CONFIG_DM320_CURSORLINEWIDTH <<4) | \
(CONFIG_DM320_CURSORLINEWIDTH << 4) | \
(CONFIG_DM320_CURSORCLUT << 8))
#endif
@@ -676,7 +676,7 @@ static int dm320_allocvideomemory(void)
#ifndef CONFIG_DM320_VID0_DISABLE
#ifndef CONFIG_DM320_DISABLE_PINGPONG
g_vid0base = (FAR void *)kmm_malloc(2 * DM320_VID0_FBLEN);
g_vid0ppbase = (FAR char*)g_vid0base + DM320_VID0_FBLEN;
g_vid0ppbase = (FAR char *)g_vid0base + DM320_VID0_FBLEN;
#else
g_vid0base = (FAR void *)kmm_malloc(DM320_VID0_FBLEN);
#endif
@@ -1301,13 +1301,13 @@ static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcurs
settings->pos.x = MAX_YRES;
}
if (settings->pos.y > MAX_YRES)
{
settings->pos.y = MAX_YRES;
}
if (settings->pos.y > MAX_YRES)
{
settings->pos.y = MAX_YRES;
}
putreg16(settings->pos.x, DM320_OSD_CURXP);
putreg16(settings->pos.y, DM320_OSD_CURYP);
putreg16(settings->pos.x, DM320_OSD_CURXP);
putreg16(settings->pos.y, DM320_OSD_CURYP);
}
#ifdef CONFIG_FB_HWCURSORSIZE
arch/arm/src/dm320/dm320_serial.c
+20 -20
View File
@@ -292,7 +292,7 @@ static inline void up_enablebreaks(struct up_dev_s *priv, bool enable)
static int up_setup(struct uart_dev_s *dev)
{
#ifndef CONFIG_SUPPRESS_UART_CONFIG
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
uint16_t brsr;
/* Clear fifos */
@@ -336,7 +336,7 @@ static int up_setup(struct uart_dev_s *dev)
}
else
{
priv->msr &= ~(UART_MSR_PSB|UART_MSR_PEB);
priv->msr &= ~(UART_MSR_PSB | UART_MSR_PEB);
}
/* Set up the BRSR */
@@ -402,7 +402,7 @@ static int up_setup(struct uart_dev_s *dev)
static void up_shutdown(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
up_disableuartint(priv, NULL);
}
@@ -423,7 +423,7 @@ static void up_shutdown(struct uart_dev_s *dev)
static int up_attach(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
int ret;
/* Attach and enable the IRQ */
@@ -431,11 +431,11 @@ static int up_attach(struct uart_dev_s *dev)
ret = irq_attach(priv->irq, up_interrupt);
if (ret == OK)
{
/* Enable the interrupt (RX and TX interrupts are still disabled
* in the UART
*/
/* Enable the interrupt (RX and TX interrupts are still disabled
* in the UART
*/
up_enable_irq(priv->irq);
up_enable_irq(priv->irq);
}
return ret;
}
@@ -452,7 +452,7 @@ static int up_attach(struct uart_dev_s *dev)
static void up_detach(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
up_disable_irq(priv->irq);
irq_detach(priv->irq);
}
@@ -489,7 +489,7 @@ static int up_interrupt(int irq, void *context)
{
PANIC();
}
priv = (struct up_dev_s*)dev->priv;
priv = (struct up_dev_s *)dev->priv;
/* Loop until there are no characters to be transferred or,
* until we have been looping for a long time.
@@ -543,7 +543,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
{
struct inode *inode = filep->f_inode;
struct uart_dev_s *dev = inode->i_private;
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
int ret = OK;
switch (cmd)
@@ -551,7 +551,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
#ifdef CONFIG_SERIAL_TIOCSERGSTRUCT
case TIOCSERGSTRUCT:
{
struct up_dev_s *user = (struct up_dev_s*)arg;
struct up_dev_s *user = (struct up_dev_s *)arg;
if (!user)
{
ret = -EINVAL;
@@ -601,7 +601,7 @@ static int up_ioctl(struct file *filep, int cmd, unsigned long arg)
static int up_receive(struct uart_dev_s *dev, uint32_t *status)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
uint16_t dtrr;
dtrr = up_serialin(priv, UART_DTRR);
@@ -619,7 +619,7 @@ static int up_receive(struct uart_dev_s *dev, uint32_t *status)
static void up_rxint(struct uart_dev_s *dev, bool enable)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
if (enable)
{
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
@@ -643,7 +643,7 @@ static void up_rxint(struct uart_dev_s *dev, bool enable)
static bool up_rxavailable(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
return ((up_serialin(priv, UART_SR) & UART_SR_RFNEF) != 0);
}
@@ -657,7 +657,7 @@ static bool up_rxavailable(struct uart_dev_s *dev)
static void up_send(struct uart_dev_s *dev, int ch)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
up_serialout(priv, UART_DTRR, (uint16_t)ch);
}
@@ -671,7 +671,7 @@ static void up_send(struct uart_dev_s *dev, int ch)
static void up_txint(struct uart_dev_s *dev, bool enable)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
if (enable)
{
#ifndef CONFIG_SUPPRESS_SERIAL_INTS
@@ -695,7 +695,7 @@ static void up_txint(struct uart_dev_s *dev, bool enable)
static bool up_txready(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
return ((up_serialin(priv, UART_SR) & UART_SR_TFTI) != 0);
}
@@ -709,7 +709,7 @@ static bool up_txready(struct uart_dev_s *dev)
static bool up_txempty(struct uart_dev_s *dev)
{
struct up_dev_s *priv = (struct up_dev_s*)dev->priv;
struct up_dev_s *priv = (struct up_dev_s *)dev->priv;
return ((up_serialin(priv, UART_SR) & UART_SR_TREF) == 0);
}
@@ -763,7 +763,7 @@ void up_serialinit(void)
int up_putc(int ch)
{
struct up_dev_s *priv = (struct up_dev_s*)CONSOLE_DEV.priv;
struct up_dev_s *priv = (struct up_dev_s *)CONSOLE_DEV.priv;
uint16_t ier;
up_disableuartint(priv, &ier);
arch/arm/src/dm320/dm320_usbdev.c
+134 -90
View File
@@ -65,7 +65,7 @@
* Pre-processor Definitions
****************************************************************************/
/* Configuration ***************************************************************/
/* Configuration ************************************************************/
#ifndef CONFIG_USBDEV_MAXPOWER
# define CONFIG_USBDEV_MAXPOWER 100 /* mA */
@@ -385,28 +385,28 @@ static struct dm320_usbdev_s g_usbdev;
static const struct dm320_epinfo_s g_epinfo[DM320_NENDPOINTS] =
{
{
0, /* EP0 */
USB_EP_ATTR_XFER_CONTROL, /* Type: Control IN/OUT */
USB_TXFIFO2_SZ_64|USB_TXFIFO2_SINGLE_BUF, /* Bits for TX/RXFIFO2 */
DM320_EP0MAXPACKET /* Max packet size */
0, /* EP0 */
USB_EP_ATTR_XFER_CONTROL, /* Type: Control IN/OUT */
USB_TXFIFO2_SZ_64 | USB_TXFIFO2_SINGLE_BUF, /* Bits for TX/RXFIFO2 */
DM320_EP0MAXPACKET /* Max packet size */
},
{
DM320_EPBULKIN | USB_DIR_IN, /* Logical endpoint number: 1 IN */
USB_EP_ATTR_XFER_BULK, /* Type: Bulk */
USB_TXFIFO2_SZ_64|USB_TXFIFO2_SINGLE_BUF, /* Bits for TX/RXFIFO2 */
DM320_BULKMAXPACKET, /* Max packet size */
DM320_EPBULKIN | USB_DIR_IN, /* Logical endpoint number: 1 IN */
USB_EP_ATTR_XFER_BULK, /* Type: Bulk */
USB_TXFIFO2_SZ_64 | USB_TXFIFO2_SINGLE_BUF, /* Bits for TX/RXFIFO2 */
DM320_BULKMAXPACKET, /* Max packet size */
},
{
DM320_EPBULKOUT | USB_DIR_OUT, /* Logical endpoint number: 2 OUT */
USB_EP_ATTR_XFER_BULK, /* Type: Bulk */
USB_TXFIFO2_SZ_64|USB_TXFIFO2_SINGLE_BUF, /* Bits for TX/RXFIFO2 */
DM320_BULKMAXPACKET /* Max packet size */
DM320_EPBULKOUT | USB_DIR_OUT, /* Logical endpoint number: 2 OUT */
USB_EP_ATTR_XFER_BULK, /* Type: Bulk */
USB_TXFIFO2_SZ_64 | USB_TXFIFO2_SINGLE_BUF, /* Bits for TX/RXFIFO2 */
DM320_BULKMAXPACKET /* Max packet size */
},
{
DM320_EPINTRIN| USB_DIR_IN, /* Logical endpoint number: 3 IN */
USB_EP_ATTR_XFER_INT, /* Type: Interrupt */
USB_TXFIFO2_SZ_64|USB_TXFIFO2_SINGLE_BUF, /* Bits for TX/RXFIFO2 */
DM320_INTRMAXPACKET /* Max packet size */
DM320_EPINTRIN | USB_DIR_IN, /* Logical endpoint number: 3 IN */
USB_EP_ATTR_XFER_INT, /* Type: Interrupt */
USB_TXFIFO2_SZ_64 | USB_TXFIFO2_SINGLE_BUF, /* Bits for TX/RXFIFO2 */
DM320_INTRMAXPACKET /* Max packet size */
}
};
@@ -454,20 +454,20 @@ static uint8_t dm320_getreg8(uint32_t addr)
else
{
/* Did we print "..." for the previous value? */
/* Did we print "..." for the previous value? */
if (count > 3)
{
/* Yes.. then show how many times the value repeated */
if (count > 3)
{
/* Yes.. then show how many times the value repeated */
lldbg("[repeats %d more times]\n", count-3);
}
lldbg("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
/* Save the new address, value, and count */
prevaddr = addr;
preval = val;
count = 1;
prevaddr = addr;
preval = val;
count = 1;
}
/* Show the register value read */
@@ -504,10 +504,11 @@ static uint32_t dm320_getreg16(uint32_t addr)
{
if (count == 0xffffffff || ++count > 3)
{
if (count == 4)
{
lldbg("...\n");
}
if (count == 4)
{
lldbg("...\n");
}
return val;
}
}
@@ -516,20 +517,20 @@ static uint32_t dm320_getreg16(uint32_t addr)
else
{
/* Did we print "..." for the previous value? */
/* Did we print "..." for the previous value? */
if (count > 3)
{
/* Yes.. then show how many times the value repeated */
if (count > 3)
{
/* Yes.. then show how many times the value repeated */
lldbg("[repeats %d more times]\n", count-3);
}
lldbg("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
/* Save the new address, value, and count */
prevaddr = addr;
preval = val;
count = 1;
prevaddr = addr;
preval = val;
count = 1;
}
/* Show the register value read */
@@ -566,10 +567,11 @@ static uint32_t dm320_getreg32(uint32_t addr)
{
if (count == 0xffffffff || ++count > 3)
{
if (count == 4)
{
lldbg("...\n");
}
if (count == 4)
{
lldbg("...\n");
}
return val;
}
}
@@ -578,20 +580,20 @@ static uint32_t dm320_getreg32(uint32_t addr)
else
{
/* Did we print "..." for the previous value? */
/* Did we print "..." for the previous value? */
if (count > 3)
{
/* Yes.. then show how many times the value repeated */
if (count > 3)
{
/* Yes.. then show how many times the value repeated */
lldbg("[repeats %d more times]\n", count-3);
}
lldbg("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
/* Save the new address, value, and count */
prevaddr = addr;
preval = val;
count = 1;
prevaddr = addr;
preval = val;
count = 1;
}
/* Show the register value read */
@@ -829,7 +831,7 @@ static int dm320_epread(uint8_t epphy, uint8_t *buf, uint16_t nbytes)
}
}
else
{
{
bytesleft = dm320_getreg8(DM320_USB_RXCOUNT2);
bytesleft = (bytesleft << 8) + dm320_getreg8(DM320_USB_RXCOUNT1);
if (bytesleft > nbytes)
@@ -838,15 +840,15 @@ static int dm320_epread(uint8_t epphy, uint8_t *buf, uint16_t nbytes)
}
}
ret = bytesleft;
fifo = (uint8_t*)DM320_USB_FIFO0;
ret = bytesleft;
fifo = (uint8_t *)DM320_USB_FIFO0;
fifo = fifo + (epphy << 2);
while (bytesleft > 0)
{
*buf++ = *fifo;
bytesleft--;
}
{
*buf++ = *fifo;
bytesleft--;
}
/* Clear RXPKTRDY bit in PER_RXCSR1 */
@@ -1204,7 +1206,7 @@ static inline void dm320_ep0setup(struct dm320_usbdev_s *priv)
/* Read EP0 data */
ret = dm320_epread(USB_EP0_SELECT, (uint8_t*)&ctrl, USB_SIZEOF_CTRLREQ);
ret = dm320_epread(USB_EP0_SELECT, (uint8_t *)&ctrl, USB_SIZEOF_CTRLREQ);
if (ret <= 0)
{
return;
@@ -1351,7 +1353,8 @@ static inline void dm320_ep0setup(struct dm320_usbdev_s *priv)
* len: 0; data = none
*/
dm320_putreg8(USB_PERCSR0_CLRRXRDY|USB_PERCSR0_DATAEND, DM320_USB_PERCSR0);
dm320_putreg8(USB_PERCSR0_CLRRXRDY | USB_PERCSR0_DATAEND,
DM320_USB_PERCSR0);
usbtrace(TRACE_INTDECODE(DM320_TRACEINTID_SETADDRESS), 0);
priv->paddr = value & 0xff;
}
@@ -1400,8 +1403,10 @@ static inline void dm320_ep0setup(struct dm320_usbdev_s *priv)
* index: interface;
* len: 0; data = none
*/
{
dm320_putreg8(USB_PERCSR0_CLRRXRDY|USB_PERCSR0_DATAEND, DM320_USB_PERCSR0);
dm320_putreg8(USB_PERCSR0_CLRRXRDY | USB_PERCSR0_DATAEND,
DM320_USB_PERCSR0);
usbtrace(TRACE_INTDECODE(DM320_TRACEINTID_GETSETIFCONFIG), 0);
dm320_dispatchrequest(priv, &ctrl);
}
@@ -1415,14 +1420,16 @@ static inline void dm320_ep0setup(struct dm320_usbdev_s *priv)
* len: 2; data = frame number
*/
dm320_putreg8(USB_PERCSR0_CLRRXRDY|USB_PERCSR0_SENDST, DM320_USB_PERCSR0);
dm320_putreg8(USB_PERCSR0_CLRRXRDY | USB_PERCSR0_SENDST,
DM320_USB_PERCSR0);
usbtrace(TRACE_INTDECODE(DM320_TRACEINTID_SYNCHFRAME), 0);
}
break;
default:
{
dm320_putreg8(USB_PERCSR0_CLRRXRDY|USB_PERCSR0_SENDST, DM320_USB_PERCSR0);
dm320_putreg8(USB_PERCSR0_CLRRXRDY | USB_PERCSR0_SENDST,
DM320_USB_PERCSR0);
usbtrace(TRACE_DEVERROR(DM320_TRACEERR_STALLEDREQUEST), ctrl.req);
priv->stalled = 1;
}
@@ -1441,27 +1448,59 @@ static inline void dm320_ep0setup(struct dm320_usbdev_s *priv)
static inline uint32_t dm320_highestpriinterrupt(int intstatus)
{
if ((intstatus & USB_INT_CONNECTED) != 0)
return USB_INT_CONNECTED;
{
return USB_INT_CONNECTED;
}
if ((intstatus & USB_INT_DISCONNECTED) != 0)
return USB_INT_DISCONNECTED;
{
return USB_INT_DISCONNECTED;
}
if ((intstatus & USB_INT_RESET) != 0)
return USB_INT_RESET;
{
return USB_INT_RESET;
}
if ((intstatus & USB_INT_RESUME) != 0)
return USB_INT_RESUME;
{
return USB_INT_RESUME;
}
if ((intstatus & USB_INT_SESSRQ) != 0)
return USB_INT_SESSRQ;
{
return USB_INT_SESSRQ;
}
if ((intstatus & USB_INT_VBUSERR) != 0)
return USB_INT_VBUSERR;
{
return USB_INT_VBUSERR;
}
if ((intstatus & USB_INT_SOF) != 0)
return USB_INT_SOF;
{
return USB_INT_SOF;
}
if ((intstatus & USB_INT_SUSPEND) != 0)
return USB_INT_SUSPEND;
{
return USB_INT_SUSPEND;
}
if ((intstatus & USB_INT_CONTROL) != 0)
return USB_INT_CONTROL;
{
return USB_INT_CONTROL;
}
if ((intstatus & USB_INT_RXFIFO) != 0)
return USB_INT_RXFIFO;
{
return USB_INT_RXFIFO;
}
if ((intstatus & USB_INT_TXFIFO) != 0)
return USB_INT_TXFIFO;
{
return USB_INT_TXFIFO;
}
return USB_INT_NOINTERRUPT;
}
@@ -1721,7 +1760,8 @@ static inline void dm320_epinitialize(struct dm320_usbdev_s *priv)
/* Initialize endpoint 0 */
dm320_putreg8(USB_EP0_SELECT, DM320_USB_INDEX);
dm320_putreg8(USB_PERCSR0_CLRSETEND|USB_PERCSR0_CLRRXRDY, DM320_USB_PERCSR0);
dm320_putreg8(USB_PERCSR0_CLRSETEND | USB_PERCSR0_CLRRXRDY,
DM320_USB_PERCSR0);
dm320_putreg8(USB_CSR2_FLFIFO, DM320_USB_CSR2);
dm320_putreg8(USB_CSR2_FLFIFO, DM320_USB_CSR2);
@@ -1755,15 +1795,17 @@ static inline void dm320_epinitialize(struct dm320_usbdev_s *priv)
{
/* Initialize TX endpoint */
dm320_putreg8(USB_TXCSR1_CLRDATTOG|USB_TXCSR1_FLFIFO|USB_TXCSR1_UNDERRUN,
DM320_USB_PERTXCSR1);
dm320_putreg8(USB_TXCSR1_CLRDATTOG | USB_TXCSR1_FLFIFO |
USB_TXCSR1_UNDERRUN,
DM320_USB_PERTXCSR1);
dm320_putreg8(USB_TXCSR1_FLFIFO, DM320_USB_PERTXCSR1);
dm320_putreg8(USB_TXCSR2_FRDATTOG|USB_TXCSR2_MODE_TX, DM320_USB_TXCSR2);
dm320_putreg8(USB_TXCSR2_FRDATTOG | USB_TXCSR2_MODE_TX,
DM320_USB_TXCSR2);
/* FIFO address, max packet size, dual/single buffered */
dm320_putreg8(addrlo, DM320_USB_TXFIFO1);
dm320_putreg8(addrhi|g_epinfo[i].fifo, DM320_USB_TXFIFO2);
dm320_putreg8(addrhi | g_epinfo[i].fifo, DM320_USB_TXFIFO2);
/* TX endpoint max packet size */
@@ -1776,15 +1818,15 @@ static inline void dm320_epinitialize(struct dm320_usbdev_s *priv)
{
/* Initialize RX endpoint */
dm320_putreg8(USB_PERRXCSR1_CLRDATTOG|USB_PERRXCSR1_FLFIFO,
DM320_USB_PERRXCSR1);
dm320_putreg8(USB_PERRXCSR1_CLRDATTOG | USB_PERRXCSR1_FLFIFO,
DM320_USB_PERRXCSR1);
dm320_putreg8(USB_PERRXCSR1_FLFIFO, DM320_USB_PERRXCSR1);
dm320_putreg8(0x00, DM320_USB_PERRXCSR2);
/* FIFO address, max packet size, dual/single buffered */
dm320_putreg8(addrhi, DM320_USB_RXFIFO1);
dm320_putreg8(addrhi|g_epinfo[i].fifo | USB_RXFIF02_DPB, DM320_USB_RXFIFO2);
dm320_putreg8(addrhi | g_epinfo[i].fifo | USB_RXFIF02_DPB, DM320_USB_RXFIFO2);
/* RX endpoint max packet size */
@@ -1837,8 +1879,9 @@ static void dm320_ctrlinitialize(FAR struct dm320_usbdev_s *priv)
dm320_putreg8((DM320_EPBULKIN << 1), DM320_USB_INTRRX1E);
dm320_putreg8((DM320_EPBULKOUT << 1) | USB_EP0, DM320_USB_INTRTX1E);
dm320_putreg8(USB_INT_RESET|USB_INT_RESUME|USB_INT_SUSPEND|USB_INT_SESSRQ|USB_INT_SOF,
DM320_USB_INTRUSBE);
dm320_putreg8(USB_INT_RESET | USB_INT_RESUME | USB_INT_SUSPEND |
USB_INT_SESSRQ | USB_INT_SOF,
DM320_USB_INTRUSBE);
/* Initialize endpoints ******************************************************/
@@ -2534,8 +2577,9 @@ int usbdev_register(FAR struct usbdevclass_driver_s *driver)
dm320_epreset(0);
dm320_putreg8(USB_EP0, DM320_USB_INTRTX1E);
dm320_putreg8(USB_INT_RESET|USB_INT_RESUME|USB_INT_SUSPEND|USB_INT_SESSRQ|USB_INT_SOF,
DM320_USB_INTRUSBE);
dm320_putreg8(USB_INT_RESET | USB_INT_RESUME | USB_INT_SUSPEND |
USB_INT_SESSRQ | USB_INT_SOF,
DM320_USB_INTRUSBE);
/* Enable interrupts */
arch/arm/src/efm32/efm32_adc.c
+11 -11
View File
@@ -166,8 +166,8 @@ static struct efm32_dev_s g_adcpriv1 =
static struct adc_dev_s g_adcdev1 =
{
.ad_ops = &g_adcops,
.ad_priv= &g_adcpriv1,
.ad_ops = &g_adcops,
.ad_priv = &g_adcpriv1,
};
#endif
@@ -213,7 +213,7 @@ static void adc_putreg(struct efm32_dev_s *priv, int offset, uint32_t value)
putreg32(value, priv->base + offset);
}
/***************************************************************************//**
/****************************************************************************
* Name: ADC_CalibrateLoadScan
*
* Description:
@@ -297,7 +297,7 @@ static void ADC_CalibrateLoadScan(ADC_TypeDef *adc, ADC_Ref_TypeDef ref)
}
}
/***************************************************************************//**
/****************************************************************************
* Name: ADC_CalibrateLoadSingle
*
* Description:
@@ -385,7 +385,7 @@ static void ADC_CalibrateLoadSingle(ADC_TypeDef *adc, ADC_Ref_TypeDef ref)
* Public Functions
****************************************************************************/
/***************************************************************************//**
/****************************************************************************
* Name: ADC_Init
* Initialize ADC.
*
@@ -397,7 +397,7 @@ static void ADC_CalibrateLoadSingle(ADC_TypeDef *adc, ADC_Ref_TypeDef ref)
* NOTE: This function will stop any ongoing conversion.
*
* Input Parameters:
* adc- Pointer to ADC peripheral register block.
* adc - Pointer to ADC peripheral register block.
* int - Pointer to ADC initialization structure.
*
****************************************************************************/
@@ -426,7 +426,7 @@ void ADC_Init(ADC_TypeDef *adc, const ADC_Init_TypeDef *init)
adc->CTRL = tmp;
}
/***************************************************************************//**
/****************************************************************************
* Name: ADC_InitScan
*
* Description:
@@ -489,7 +489,7 @@ void ADC_InitScan(ADC_TypeDef *adc, const ADC_InitScan_TypeDef *init)
adc->SCANCTRL = tmp;
}
/***************************************************************************//**
/****************************************************************************
* Name: ADC_InitSingle
*
* Description:
@@ -552,7 +552,7 @@ void ADC_InitSingle(ADC_TypeDef *adc, const ADC_InitSingle_TypeDef *init)
adc->SINGLECTRL = tmp;
}
/***************************************************************************//**
/****************************************************************************
* Name: ADC_PrescaleCalc
*
* Description:
@@ -603,7 +603,7 @@ uint8_t ADC_PrescaleCalc(uint32_t adcFreq, uint32_t hfperFreq)
return (uint8_t)ret;
}
/***************************************************************************//**
/****************************************************************************
* Name: ADC_Reset
*
* Description:
@@ -638,7 +638,7 @@ void ADC_Reset(ADC_TypeDef *adc)
/* Do not reset route register, setting should be done independently */
}
/***************************************************************************//**
/****************************************************************************
* Name: ADC_TimebaseCalc
*
* Description:
arch/arm/src/efm32/efm32_clockconfig.c
+1 -1
View File
@@ -509,7 +509,7 @@ uint32_t efm32_coreleclk_config(int frequency)
/* Check if the core frequency is higher than CMU_MAX_FREQ_HFLE */
if (frequency > CMU_MAX_FREQ_HFLE)
if (frequency > CMU_MAX_FREQ_HFLE)
{
/* Enable HFLE */
arch/arm/src/efm32/efm32_flash.c
+9 -7
View File
@@ -208,7 +208,7 @@ void efm32_flash_unlock(void)
* -EACCES - Operation tried to access a locked area of the flash.
****************************************************************************/
int __ramfunc__ msc_load_verify_address(uint32_t* address)
int __ramfunc__ msc_load_verify_address(uint32_t *address)
{
uint32_t status;
uint32_t timeout;
@@ -247,7 +247,9 @@ int __ramfunc__ msc_load_verify_address(uint32_t* address)
/* Check for write protected page */
if (status & MSC_STATUS_LOCKED)
return -EACCES;
{
return -EACCES;
}
}
return OK;
@@ -280,7 +282,7 @@ int __ramfunc__ msc_load_verify_address(uint32_t* address)
* to complete.
****************************************************************************/
int __ramfunc__ msc_load_write_data(uint32_t* data, uint32_t num_words,
int __ramfunc__ msc_load_write_data(uint32_t *data, uint32_t num_words,
bool write_strategy_safe)
{
int timeout;
@@ -748,8 +750,8 @@ ssize_t __ramfunc__ up_progmem_write(size_t addr, const void *buf, size_t size)
int word_count;
int num_words;
int page_words;
uint32_t* p_data;
uint32_t* address = (uint32_t*) addr;
uint32_t *p_data;
uint32_t *address = (uint32_t *)addr;
uint32_t num_bytes = size;
/* EFM32 requires word access */
@@ -781,7 +783,7 @@ ssize_t __ramfunc__ up_progmem_write(size_t addr, const void *buf, size_t size)
* increments the address internally for each data load inside a page.
*/
for (word_count = 0, p_data = (uint32_t*) buf; word_count < num_words;)
for (word_count = 0, p_data = (uint32_t *)buf; word_count < num_words;)
{
int page_bytes;
ssize_t page_idx;
@@ -789,7 +791,7 @@ ssize_t __ramfunc__ up_progmem_write(size_t addr, const void *buf, size_t size)
/* Compute the number of words to write to the current page. */
page_idx = up_progmem_getpage((size_t)address+(word_count<<2));
page_idx = up_progmem_getpage((size_t)address+(word_count << 2));
if (page_idx < 0)
{
ret = -EINVAL;
arch/arm/src/efm32/efm32_irq.c
+3 -3
View File
@@ -63,9 +63,9 @@
/* Get a 32-bit version of the default priority */
#define DEFPRIORITY32 \
(NVIC_SYSH_PRIORITY_DEFAULT << 24 |\
NVIC_SYSH_PRIORITY_DEFAULT << 16 |\
NVIC_SYSH_PRIORITY_DEFAULT << 8 |\
(NVIC_SYSH_PRIORITY_DEFAULT << 24 | \
NVIC_SYSH_PRIORITY_DEFAULT << 16 | \
NVIC_SYSH_PRIORITY_DEFAULT << 8 | \
NVIC_SYSH_PRIORITY_DEFAULT)
/* Given the address of a NVIC ENABLE register, this is the offset to
arch/arm/src/efm32/efm32_leserial.c
+14 -14
View File
@@ -362,7 +362,7 @@ static void efm32_disableuartint(struct efm32_leuart_s *priv, uint32_t *ien)
static int efm32_setup(struct uart_dev_s *dev)
{
struct efm32_leuart_s *priv = (struct efm32_leuart_s*)dev->priv;
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
#ifndef CONFIG_SUPPRESS_LEUART_CONFIG
const struct efm32_config_s *config = priv->config;
@@ -390,7 +390,7 @@ static int efm32_setup(struct uart_dev_s *dev)
static void efm32_shutdown(struct uart_dev_s *dev)
{
struct efm32_leuart_s *priv = (struct efm32_leuart_s*)dev->priv;
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
/* Disable interrupts */
@@ -421,7 +421,7 @@ static void efm32_shutdown(struct uart_dev_s *dev)
static int efm32_attach(struct uart_dev_s *dev)
{
struct efm32_leuart_s *priv = (struct efm32_leuart_s*)dev->priv;
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
const struct efm32_config_s *config = priv->config;
int ret;
@@ -450,7 +450,7 @@ static int efm32_attach(struct uart_dev_s *dev)
static void efm32_detach(struct uart_dev_s *dev)
{
struct efm32_leuart_s *priv = (struct efm32_leuart_s*)dev->priv;
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
const struct efm32_config_s *config = priv->config;
/* Disable interrupts */
@@ -473,7 +473,7 @@ static void efm32_detach(struct uart_dev_s *dev)
static int efm32_interrupt(struct uart_dev_s *dev)
{
struct efm32_leuart_s *priv = (struct efm32_leuart_s*)dev->priv;
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
uint32_t intflags;
DEBUGASSERT(priv);
@@ -569,7 +569,7 @@ static int efm32_ioctl(struct file *filep, int cmd, unsigned long arg)
dev = inode->i_private;
DEBUGASSERT(dev, dev->priv);
priv = (struct efm32_leuart_s*)dev->priv;
priv = (struct efm32_leuart_s *)dev->priv;
switch (cmd)
{
@@ -599,7 +599,7 @@ static int efm32_ioctl(struct file *filep, int cmd, unsigned long arg)
static int efm32_receive(struct uart_dev_s *dev, uint32_t *status)
{
struct efm32_leuart_s *priv = (struct efm32_leuart_s*)dev->priv;
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
uint32_t rxdatax;
/* Get error status information:
@@ -632,7 +632,7 @@ static int efm32_receive(struct uart_dev_s *dev, uint32_t *status)
static void efm32_rxint(struct uart_dev_s *dev, bool enable)
{
struct efm32_leuart_s *priv = (struct efm32_leuart_s*)dev->priv;
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
@@ -666,7 +666,7 @@ static void efm32_rxint(struct uart_dev_s *dev, bool enable)
static bool efm32_rxavailable(struct uart_dev_s *dev)
{
struct efm32_leuart_s *priv = (struct efm32_leuart_s*)dev->priv;
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
/* Return true if the receive data is available (RXDATAV). */
@@ -683,7 +683,7 @@ static bool efm32_rxavailable(struct uart_dev_s *dev)
static void efm32_send(struct uart_dev_s *dev, int ch)
{
struct efm32_leuart_s *priv = (struct efm32_leuart_s*)dev->priv;
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
efm32_serialout(priv, EFM32_LEUART_TXDATA_OFFSET, (uint32_t)ch);
}
@@ -697,7 +697,7 @@ static void efm32_send(struct uart_dev_s *dev, int ch)
static void efm32_txint(struct uart_dev_s *dev, bool enable)
{
struct efm32_leuart_s *priv = (struct efm32_leuart_s*)dev->priv;
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
@@ -737,7 +737,7 @@ static void efm32_txint(struct uart_dev_s *dev, bool enable)
static bool efm32_txready(struct uart_dev_s *dev)
{
struct efm32_leuart_s *priv = (struct efm32_leuart_s*)dev->priv;
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
/* The TX Buffer Level (TXBL) status bit indicates the level of the
* transmit buffer. Set when the transmit buffer is empty, and cleared
@@ -757,7 +757,7 @@ static bool efm32_txready(struct uart_dev_s *dev)
static bool efm32_txempty(struct uart_dev_s *dev)
{
struct efm32_leuart_s *priv = (struct efm32_leuart_s*)dev->priv;
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)dev->priv;
/* TX Complete (TXC) is set when a transmission has completed and no more
* data is available in the transmit buffer.
@@ -837,7 +837,7 @@ void up_serialinit(void)
#ifdef HAVE_LEUART_CONSOLE
int up_putc(int ch)
{
struct efm32_leuart_s *priv = (struct efm32_leuart_s*)CONSOLE_DEV.priv;
struct efm32_leuart_s *priv = (struct efm32_leuart_s *)CONSOLE_DEV.priv;
uint32_t ien;
efm32_disableuartint(priv, &ien);
arch/arm/src/efm32/efm32_pwm.c
+2 -4
View File
@@ -413,9 +413,7 @@ static int pwm_timer(FAR struct efm32_pwmtimer_s *priv,
if (efm32_timer_set_freq(priv->base,priv->pclk,info->frequency) < 0)
{
pwmdbg("Cannot set TIMER frequency %dHz from clock %dHz\n",
info->frequency,
priv->pclk
);
info->frequency, priv->pclk);
return -EINVAL;
}
@@ -734,7 +732,7 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
/* Then put the GPIO pin back to the default state */
pincfg = priv->pincfg & (GPIO_PORT_MASK|GPIO_PIN_MASK);
pincfg = priv->pincfg & (GPIO_PORT_MASK | GPIO_PIN_MASK);
pincfg |= (_GPIO_DISABLE);
arch/arm/src/efm32/efm32_rmu.c
+2 -2
View File
@@ -68,7 +68,7 @@ typedef struct
{
const uint32_t val;
const uint32_t mask;
const char* str;
const char *str;
} efm32_reset_cause_list_t;
#endif
@@ -265,7 +265,7 @@ void efm32_rmu_initialize(void)
rmudbg("RMU => reg = 0x%08X\n", g_efm32_rstcause);
for (;;)
{
const char* str;
const char *str;
str = efm32_reset_cause_list_str(g_efm32_rstcause, &idx);
if (str == NULL)
arch/arm/src/efm32/efm32_serial.c
+19 -19
View File
@@ -188,7 +188,7 @@
#endif
/* Pick ttys4. This could be one of UART0-1. It can't be USART0-2 because
* those have already been assigned to ttsyS0, 1, 2, or 3. One of
* those have already been assigned to ttsyS0, 1, 2, or 3. One of
* these could also be the console. There is really only 1 unassigned.
*/
@@ -613,7 +613,7 @@ static void efm32_disableuartint(struct efm32_usart_s *priv, uint32_t *ien)
static int efm32_setup(struct uart_dev_s *dev)
{
struct efm32_usart_s *priv = (struct efm32_usart_s*)dev->priv;
struct efm32_usart_s *priv = (struct efm32_usart_s *)dev->priv;
uint32_t regval;
#ifndef CONFIG_SUPPRESS_UART_CONFIG
@@ -650,7 +650,7 @@ static int efm32_setup(struct uart_dev_s *dev)
static void efm32_shutdown(struct uart_dev_s *dev)
{
struct efm32_usart_s *priv = (struct efm32_usart_s*)dev->priv;
struct efm32_usart_s *priv = (struct efm32_usart_s *)dev->priv;
/* Disable interrupts */
@@ -681,7 +681,7 @@ static void efm32_shutdown(struct uart_dev_s *dev)
static int efm32_attach(struct uart_dev_s *dev)
{
struct efm32_usart_s *priv = (struct efm32_usart_s*)dev->priv;
struct efm32_usart_s *priv = (struct efm32_usart_s *)dev->priv;
const struct efm32_config_s *config = priv->config;
int ret;
@@ -719,7 +719,7 @@ static int efm32_attach(struct uart_dev_s *dev)
static void efm32_detach(struct uart_dev_s *dev)
{
struct efm32_usart_s *priv = (struct efm32_usart_s*)dev->priv;
struct efm32_usart_s *priv = (struct efm32_usart_s *)dev->priv;
const struct efm32_config_s *config = priv->config;
/* Disable interrupts */
@@ -744,7 +744,7 @@ static void efm32_detach(struct uart_dev_s *dev)
static int efm32_rxinterrupt(struct uart_dev_s *dev)
{
struct efm32_usart_s *priv = (struct efm32_usart_s*)dev->priv;
struct efm32_usart_s *priv = (struct efm32_usart_s *)dev->priv;
uint32_t intflags;
DEBUGASSERT(priv);
@@ -832,7 +832,7 @@ static int efm32_uart1_rxinterrupt(int irq, void *context)
static int efm32_txinterrupt(struct uart_dev_s *dev)
{
struct efm32_usart_s *priv = (struct efm32_usart_s*)dev->priv;
struct efm32_usart_s *priv = (struct efm32_usart_s *)dev->priv;
uint32_t intflags;
DEBUGASSERT(priv);
@@ -933,7 +933,7 @@ static int efm32_ioctl(struct file *filep, int cmd, unsigned long arg)
DEBUGASSERT(dev->priv);
#ifdef CONFIG_SERIAL_TERMIOS
priv = (struct efm32_usart_s*)dev->priv;
priv = (struct efm32_usart_s *)dev->priv;
#endif
switch (cmd)
@@ -941,7 +941,7 @@ static int efm32_ioctl(struct file *filep, int cmd, unsigned long arg)
#ifdef CONFIG_SERIAL_TERMIOS
case TCGETS:
{
struct termios *termiosp = (struct termios*)arg;
struct termios *termiosp = (struct termios *)arg;
if (!termiosp)
{
@@ -963,7 +963,7 @@ static int efm32_ioctl(struct file *filep, int cmd, unsigned long arg)
case TCSETS:
{
struct termios *termiosp = (struct termios*)arg;
struct termios *termiosp = (struct termios *)arg;
if (!termiosp)
{
@@ -1013,7 +1013,7 @@ static int efm32_ioctl(struct file *filep, int cmd, unsigned long arg)
{
uint32_t ien;
struct efm32_config_s* config = priv->config;
struct efm32_config_s *config = priv->config;
config->baud = cfgetispeed(termiosp);
@@ -1050,7 +1050,7 @@ static int efm32_ioctl(struct file *filep, int cmd, unsigned long arg)
static int efm32_receive(struct uart_dev_s *dev, uint32_t *status)
{
struct efm32_usart_s *priv = (struct efm32_usart_s*)dev->priv;
struct efm32_usart_s *priv = (struct efm32_usart_s *)dev->priv;
uint32_t rxdatax;
/* Get error status information:
@@ -1083,7 +1083,7 @@ static int efm32_receive(struct uart_dev_s *dev, uint32_t *status)
static void efm32_rxint(struct uart_dev_s *dev, bool enable)
{
struct efm32_usart_s *priv = (struct efm32_usart_s*)dev->priv;
struct efm32_usart_s *priv = (struct efm32_usart_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
@@ -1117,7 +1117,7 @@ static void efm32_rxint(struct uart_dev_s *dev, bool enable)
static bool efm32_rxavailable(struct uart_dev_s *dev)
{
struct efm32_usart_s *priv = (struct efm32_usart_s*)dev->priv;
struct efm32_usart_s *priv = (struct efm32_usart_s *)dev->priv;
/* Return true if the receive data is available (RXDATAV). */
@@ -1134,7 +1134,7 @@ static bool efm32_rxavailable(struct uart_dev_s *dev)
static void efm32_send(struct uart_dev_s *dev, int ch)
{
struct efm32_usart_s *priv = (struct efm32_usart_s*)dev->priv;
struct efm32_usart_s *priv = (struct efm32_usart_s *)dev->priv;
efm32_serialout(priv, EFM32_USART_TXDATA_OFFSET, (uint32_t)ch);
}
@@ -1148,7 +1148,7 @@ static void efm32_send(struct uart_dev_s *dev, int ch)
static void efm32_txint(struct uart_dev_s *dev, bool enable)
{
struct efm32_usart_s *priv = (struct efm32_usart_s*)dev->priv;
struct efm32_usart_s *priv = (struct efm32_usart_s *)dev->priv;
irqstate_t flags;
flags = irqsave();
@@ -1188,7 +1188,7 @@ static void efm32_txint(struct uart_dev_s *dev, bool enable)
static bool efm32_txready(struct uart_dev_s *dev)
{
struct efm32_usart_s *priv = (struct efm32_usart_s*)dev->priv;
struct efm32_usart_s *priv = (struct efm32_usart_s *)dev->priv;
/* The TX Buffer Level (TXBL) status bit indicates the level of the
* transmit buffer. If TXBIL is set, TXBL is set whenever the transmit
@@ -1208,7 +1208,7 @@ static bool efm32_txready(struct uart_dev_s *dev)
static bool efm32_txempty(struct uart_dev_s *dev)
{
struct efm32_usart_s *priv = (struct efm32_usart_s*)dev->priv;
struct efm32_usart_s *priv = (struct efm32_usart_s *)dev->priv;
/* TX Complete (TXC) is set when a transmission has completed and no more
* data is available in the transmit buffer.
@@ -1309,7 +1309,7 @@ void up_serialinit(void)
int up_putc(int ch)
{
#ifdef HAVE_UART_CONSOLE
struct efm32_usart_s *priv = (struct efm32_usart_s*)CONSOLE_DEV.priv;
struct efm32_usart_s *priv = (struct efm32_usart_s *)CONSOLE_DEV.priv;
uint32_t ien;
efm32_disableuartint(priv, &ien);
arch/arm/src/efm32/efm32_spi.c
+4 -4
View File
@@ -1288,8 +1288,8 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
{
/* 16-bit mode */
const uint16_t *src = (const uint16_t*)txbuffer;;
uint16_t *dest = (uint16_t*)rxbuffer;
const uint16_t *src = (const uint16_t *)txbuffer;;
uint16_t *dest = (uint16_t *)rxbuffer;
uint16_t word;
unrecvd = nwords;
@@ -1342,8 +1342,8 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
{
/* 8-bit mode */
const uint8_t *src = (const uint8_t*)txbuffer;;
uint8_t *dest = (uint8_t*)rxbuffer;
const uint8_t *src = (const uint8_t *)txbuffer;;
uint8_t *dest = (uint8_t *)rxbuffer;
uint8_t word;
unrecvd = nwords;
arch/arm/src/efm32/efm32_timer.c
+7 -11
View File
@@ -200,7 +200,7 @@ void efm32_timer_reset(uintptr_t base)
//putreg32(_TIMER_ROUTE_RESETVALUE, base + EFM32_TIMER_ROUTE_OFFSET );
for(i = 0; i < EFM32_TIMER_NCC; i++)
for (i = 0; i < EFM32_TIMER_NCC; i++)
{
uintptr_t base_cc = base + EFM32_TIMER_CC_OFFSET(i);
putreg32(_TIMER_CC_CTRL_RESETVALUE, base_cc+EFM32_TIMER_CC_CTRL_OFFSET);
@@ -247,8 +247,8 @@ int efm32_timer_set_freq(uintptr_t base, uint32_t clk_freq, uint32_t freq)
while (cnt_freq > freq)
{
prescaler++;
cnt_freq>>=1;
if (prescaler > (_TIMER_CTRL_PRESC_MASK>>_TIMER_CTRL_PRESC_SHIFT))
cnt_freq >>= 1;
if (prescaler > (_TIMER_CTRL_PRESC_MASK >> _TIMER_CTRL_PRESC_SHIFT))
{
return -1;
}
@@ -256,18 +256,14 @@ int efm32_timer_set_freq(uintptr_t base, uint32_t clk_freq, uint32_t freq)
modifyreg32(base + EFM32_TIMER_CTRL_OFFSET,
_TIMER_CTRL_PRESC_MASK,
prescaler<<_TIMER_CTRL_PRESC_SHIFT
);
prescaler << _TIMER_CTRL_PRESC_SHIFT);
prescaler = 1<<prescaler;
prescaler = 1 << prescaler;
reload = (clk_freq/prescaler/freq);
reload = (clk_freq / prescaler / freq);
efm32_timerdbg("Source: %4xHz Div: %4x Reload: %4x \n",
clk_freq,
prescaler,
reload
);
clk_freq, prescaler, reload);
putreg32(reload, base + EFM32_TIMER_TOP_OFFSET);
arch/arm/src/efm32/efm32_timerisr.c
+2 -1
View File
@@ -133,7 +133,8 @@ void up_timer_initialize(void)
/* Enable SysTick interrupts */
putreg32((NVIC_SYSTICK_CTRL_CLKSOURCE|NVIC_SYSTICK_CTRL_TICKINT|NVIC_SYSTICK_CTRL_ENABLE), NVIC_SYSTICK_CTRL);
putreg32((NVIC_SYSTICK_CTRL_CLKSOURCE | NVIC_SYSTICK_CTRL_TICKINT |
NVIC_SYSTICK_CTRL_ENABLE), NVIC_SYSTICK_CTRL);
/* And enable the timer interrupt */
arch/arm/src/efm32/efm32_usbdev.c
+16 -16
View File
@@ -826,20 +826,20 @@ static uint32_t efm32_getreg(uint32_t addr)
else
{
/* Did we print "..." for the previous value? */
/* Did we print "..." for the previous value? */
if (count > 3)
{
/* Yes.. then show how many times the value repeated */
if (count > 3)
{
/* Yes.. then show how many times the value repeated */
lldbg("[repeats %d more times]\n", count-3);
}
lldbg("[repeats %d more times]\n", count-3);
}
/* Save the new address, value, and count */
/* Save the new address, value, and count */
prevaddr = addr;
preval = val;
count = 1;
prevaddr = addr;
preval = val;
count = 1;
}
/* Show the register value read */
@@ -1231,12 +1231,12 @@ static void efm32_epin_request(FAR struct efm32_usbdev_s *priv,
if (privreq->req.len == 0)
{
/* The ZLP flag is set TRUE whenever we want to force the driver to
* send a zero-length-packet on the next pass through the loop (below).
* The flag is cleared whenever a packet is sent in the loop below.
*/
/* The ZLP flag is set TRUE whenever we want to force the driver to
* send a zero-length-packet on the next pass through the loop (below).
* The flag is cleared whenever a packet is sent in the loop below.
*/
privep->zlp = true;
privep->zlp = true;
}
/* Add one more packet to the TxFIFO. We will wait for the transfer
@@ -3213,7 +3213,7 @@ static inline void efm32_rxinterrupt(FAR struct efm32_usbdev_s *priv)
* last SETUP packet will be processed.
*/
efm32_rxfifo_read(&priv->epout[EP0], (FAR uint8_t*)&priv->ctrlreq,
efm32_rxfifo_read(&priv->epout[EP0], (FAR uint8_t *)&priv->ctrlreq,
USB_SIZEOF_CTRLREQ);
/* Was this an IN or an OUT SETUP packet. If it is an OUT SETUP,
arch/arm/src/efm32/efm32_usbhost.c
+3 -3
View File
@@ -2952,9 +2952,9 @@ static void efm32_gint_disconnected(FAR struct efm32_usbhost_s *priv)
priv->rhport.hport.speed = USB_SPEED_FULL;
/* Notify any waiters that there is a change in the connection state */
/* Notify any waiters that there is a change in the connection state */
if (priv->pscwait)
if (priv->pscwait)
{
efm32_givesem(&priv->pscsem);
priv->pscwait = false;
@@ -4400,7 +4400,7 @@ static int efm32_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
ret = efm32_ctrl_sendsetup(priv, ep0info, req);
if (ret < 0)
{
{
usbhost_trace1(USBHOST_TRACE1_SENDSETUP, -ret);
continue;
}