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Replace all occurrences of vdbg with vinfo

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This commit is contained in:
Gregory Nutt
2016-06-11 11:59:51 -06:00
parent 3a74a438d9
commit fc3540cffe
845 changed files with 5817 additions and 5817 deletions
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arch/arm/src/a1x/a1x_serial.c
+2 -2
View File
@@ -1156,7 +1156,7 @@ static int uart_interrupt(struct uart_dev_s *dev)
/* Read the modem status register (MSR) to clear */
status = up_serialin(priv, A1X_UART_MSR_OFFSET);
vdbg("MSR: %02x\n", status);
info("MSR: %02x\n", status);
break;
}
@@ -1167,7 +1167,7 @@ static int uart_interrupt(struct uart_dev_s *dev)
/* Read the line status register (LSR) to clear */
status = up_serialin(priv, A1X_UART_LSR_OFFSET);
vdbg("LSR: %02x\n", status);
info("LSR: %02x\n", status);
break;
}
arch/arm/src/arm/up_dataabort.c
+1 -1
View File
@@ -142,7 +142,7 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
* (It has not yet been saved in the register context save area).
*/
pgllvdbg("VBASE: %08x VEND: %08x\n", PG_PAGED_VBASE, PG_PAGED_VEND);
pgllinfo("VBASE: %08x VEND: %08x\n", PG_PAGED_VBASE, PG_PAGED_VEND);
if (far < PG_PAGED_VBASE || far >= PG_PAGED_VEND)
{
goto segfault;
arch/arm/src/arm/up_elf.c
+5 -5
View File
@@ -172,7 +172,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_CALL:
case R_ARM_JUMP24:
{
bvdbg("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
binfo("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
@@ -201,7 +201,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_ABS32:
case R_ARM_TARGET1: /* New ABI: TARGET1 always treated as ABS32 */
{
bvdbg("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
binfo("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
*(uint32_t *)addr += sym->st_value;
@@ -210,7 +210,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_V4BX:
{
bvdbg("Performing V4BX link at addr=%08lx [%08lx]\n",
binfo("Performing V4BX link at addr=%08lx [%08lx]\n",
(long)addr, (long)(*(uint32_t *)addr));
/* Preserve only Rm and the condition code */
@@ -225,7 +225,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_PREL31:
{
bvdbg("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
binfo("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
offset = *(uint32_t *)addr + sym->st_value - addr;
@@ -236,7 +236,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_MOVW_ABS_NC:
case R_ARM_MOVT_ABS:
{
bvdbg("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
binfo("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
arch/arm/src/armv6-m/up_elf.c
+11 -11
View File
@@ -168,7 +168,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_CALL:
case R_ARM_JUMP24:
{
bvdbg("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
binfo("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
@@ -197,7 +197,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_ABS32:
case R_ARM_TARGET1: /* New ABI: TARGET1 always treated as ABS32 */
{
bvdbg("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
binfo("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
*(uint32_t *)addr += sym->st_value;
@@ -245,7 +245,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
upper_insn = (uint32_t)(*(uint16_t *)addr);
lower_insn = (uint32_t)(*(uint16_t *)(addr + 2));
bvdbg("Performing THM_JUMP24 [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
binfo("Performing THM_JUMP24 [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (int)upper_insn, (int)lower_insn,
sym, (long)sym->st_value);
@@ -279,7 +279,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
/* And perform the relocation */
bvdbg(" S=%d J1=%d J2=%d offset=%08lx branch target=%08lx\n",
binfo(" S=%d J1=%d J2=%d offset=%08lx branch target=%08lx\n",
S, J1, J2, (long)offset, offset + sym->st_value - addr);
offset += sym->st_value - addr;
@@ -320,14 +320,14 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
lower_insn = ((lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | ((offset >> 1) & 0x07ff));
*(uint16_t *)(addr + 2) = (uint16_t)lower_insn;
bvdbg(" S=%d J1=%d J2=%d insn [%04x %04x]\n",
binfo(" S=%d J1=%d J2=%d insn [%04x %04x]\n",
S, J1, J2, (int)upper_insn, (int)lower_insn);
}
break;
case R_ARM_V4BX:
{
bvdbg("Performing V4BX link at addr=%08lx [%08lx]\n",
binfo("Performing V4BX link at addr=%08lx [%08lx]\n",
(long)addr, (long)(*(uint32_t *)addr));
/* Preserve only Rm and the condition code */
@@ -342,7 +342,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_PREL31:
{
bvdbg("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
binfo("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
offset = *(uint32_t *)addr + sym->st_value - addr;
@@ -353,7 +353,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_MOVW_ABS_NC:
case R_ARM_MOVT_ABS:
{
bvdbg("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
binfo("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
@@ -408,7 +408,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
upper_insn = (uint32_t)(*(uint16_t *)addr);
lower_insn = (uint32_t)(*(uint16_t *)(addr + 2));
bvdbg("Performing THM_MOVx [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
binfo("Performing THM_MOVx [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (int)upper_insn, (int)lower_insn,
sym, (long)sym->st_value);
@@ -425,7 +425,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
/* And perform the relocation */
bvdbg(" offset=%08lx branch target=%08lx\n",
binfo(" offset=%08lx branch target=%08lx\n",
(long)offset, offset + sym->st_value);
offset += sym->st_value;
@@ -445,7 +445,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
lower_insn = ((lower_insn & 0x8f00) | ((offset & 0x0700) << 4) | (offset & 0x00ff));
*(uint16_t *)(addr + 2) = (uint16_t)lower_insn;
bvdbg(" insn [%04x %04x]\n",
binfo(" insn [%04x %04x]\n",
(int)upper_insn, (int)lower_insn);
}
break;
arch/arm/src/armv7-a/arm_addrenv.c
+8 -8
View File
@@ -257,7 +257,7 @@ int up_addrenv_create(size_t textsize, size_t datasize, size_t heapsize,
{
int ret;
bvdbg("addrenv=%p textsize=%lu datasize=%lu\n",
binfo("addrenv=%p textsize=%lu datasize=%lu\n",
addrenv, (unsigned long)textsize, (unsigned long)datasize);
DEBUGASSERT(addrenv);
@@ -353,7 +353,7 @@ errout:
int up_addrenv_destroy(FAR group_addrenv_t *addrenv)
{
bvdbg("addrenv=%p\n", addrenv);
binfo("addrenv=%p\n", addrenv);
DEBUGASSERT(addrenv);
/* Destroy the .text region */
@@ -405,7 +405,7 @@ int up_addrenv_destroy(FAR group_addrenv_t *addrenv)
int up_addrenv_vtext(FAR group_addrenv_t *addrenv, FAR void **vtext)
{
bvdbg("return=%p\n", (FAR void *)CONFIG_ARCH_TEXT_VBASE);
binfo("return=%p\n", (FAR void *)CONFIG_ARCH_TEXT_VBASE);
/* Not much to do in this case */
@@ -439,7 +439,7 @@ int up_addrenv_vtext(FAR group_addrenv_t *addrenv, FAR void **vtext)
int up_addrenv_vdata(FAR group_addrenv_t *addrenv, uintptr_t textsize,
FAR void **vdata)
{
bvdbg("return=%p\n",
binfo("return=%p\n",
(FAR void *)(CONFIG_ARCH_DATA_VBASE + ARCH_DATA_RESERVE_SIZE));
/* Not much to do in this case */
@@ -636,7 +636,7 @@ int up_addrenv_restore(FAR const save_addrenv_t *oldenv)
uintptr_t vaddr;
int i;
bvdbg("oldenv=%p\n", oldenv);
binfo("oldenv=%p\n", oldenv);
DEBUGASSERT(oldenv);
for (vaddr = CONFIG_ARCH_TEXT_VBASE, i = 0;
@@ -752,7 +752,7 @@ int up_addrenv_coherent(FAR const group_addrenv_t *addrenv)
int up_addrenv_clone(FAR const group_addrenv_t *src,
FAR group_addrenv_t *dest)
{
bvdbg("src=%p dest=%p\n", src, dest);
binfo("src=%p dest=%p\n", src, dest);
DEBUGASSERT(src && dest);
/* Just copy the address environment from the source to the destination */
@@ -784,7 +784,7 @@ int up_addrenv_clone(FAR const group_addrenv_t *src,
int up_addrenv_attach(FAR struct task_group_s *group, FAR struct tcb_s *tcb)
{
bvdbg("group=%p tcb=%p\n", group, tcb);
binfo("group=%p tcb=%p\n", group, tcb);
/* Nothing needs to be done in this implementation */
@@ -817,7 +817,7 @@ int up_addrenv_attach(FAR struct task_group_s *group, FAR struct tcb_s *tcb)
int up_addrenv_detach(FAR struct task_group_s *group, FAR struct tcb_s *tcb)
{
bvdbg("group=%p tcb=%p\n", group, tcb);
binfo("group=%p tcb=%p\n", group, tcb);
/* Nothing needs to be done in this implementation */
arch/arm/src/armv7-a/arm_addrenv_kstack.c
+2 -2
View File
@@ -144,7 +144,7 @@
int up_addrenv_kstackalloc(FAR struct tcb_s *tcb)
{
bvdbg("tcb=%p stacksize=%u\n", tcb, ARCH_KERNEL_STACKSIZE);
binfo("tcb=%p stacksize=%u\n", tcb, ARCH_KERNEL_STACKSIZE);
DEBUGASSERT(tcb && tcb->xcp.kstack == 0);
@@ -177,7 +177,7 @@ int up_addrenv_kstackalloc(FAR struct tcb_s *tcb)
int up_addrenv_kstackfree(FAR struct tcb_s *tcb)
{
bvdbg("tcb=%p\n", tcb);
binfo("tcb=%p\n", tcb);
DEBUGASSERT(tcb);
/* Does the exiting thread have a kernel stack? */
arch/arm/src/armv7-a/arm_addrenv_shm.c
+2 -2
View File
@@ -92,7 +92,7 @@ int up_shmat(FAR uintptr_t *pages, unsigned int npages, uintptr_t vaddr)
unsigned int nmapped;
unsigned int shmndx;
shmvdbg("pages=%p npages=%d vaddr=%08lx\n",
shminfo("pages=%p npages=%d vaddr=%08lx\n",
pages, npages, (unsigned long)vaddr);
/* Sanity checks */
@@ -241,7 +241,7 @@ int up_shmdt(uintptr_t vaddr, unsigned int npages)
unsigned int nunmapped;
unsigned int shmndx;
shmvdbg("npages=%d vaddr=%08lx\n", npages, (unsigned long)vaddr);
shminfo("npages=%d vaddr=%08lx\n", npages, (unsigned long)vaddr);
/* Sanity checks */
arch/arm/src/armv7-a/arm_addrenv_ustack.c
+3 -3
View File
@@ -143,7 +143,7 @@ int up_addrenv_ustackalloc(FAR struct tcb_s *tcb, size_t stacksize)
{
int ret;
bvdbg("tcb=%p stacksize=%lu\n", tcb, (unsigned long)stacksize);
binfo("tcb=%p stacksize=%lu\n", tcb, (unsigned long)stacksize);
DEBUGASSERT(tcb);
@@ -190,7 +190,7 @@ int up_addrenv_ustackalloc(FAR struct tcb_s *tcb, size_t stacksize)
int up_addrenv_ustackfree(FAR struct tcb_s *tcb)
{
bvdbg("tcb=%p\n", tcb);
binfo("tcb=%p\n", tcb);
DEBUGASSERT(tcb);
/* Destroy the stack region */
@@ -221,7 +221,7 @@ int up_addrenv_ustackfree(FAR struct tcb_s *tcb)
int up_addrenv_vustack(FAR const struct tcb_s *tcb, FAR void **vstack)
{
bvdbg("Return=%p\n", (FAR void *)CONFIG_ARCH_STACK_VBASE);
binfo("Return=%p\n", (FAR void *)CONFIG_ARCH_STACK_VBASE);
/* Not much to do in this case */
arch/arm/src/armv7-a/arm_addrenv_utils.c
+2 -2
View File
@@ -84,7 +84,7 @@ int arm_addrenv_create_region(FAR uintptr_t **list, unsigned int listlen,
unsigned int i;
unsigned int j;
bvdbg("listlen=%d vaddr=%08lx regionsize=%ld, mmuflags=%08x\n",
binfo("listlen=%d vaddr=%08lx regionsize=%ld, mmuflags=%08x\n",
listlen, (unsigned long)vaddr, (unsigned long)regionsize,
(unsigned int)mmuflags);
@@ -201,7 +201,7 @@ void arm_addrenv_destroy_region(FAR uintptr_t **list, unsigned int listlen,
int i;
int j;
bvdbg("listlen=%d vaddr=%08lx\n", listlen, (unsigned long)vaddr);
binfo("listlen=%d vaddr=%08lx\n", listlen, (unsigned long)vaddr);
for (i = 0; i < listlen; vaddr += SECTION_SIZE, list++, i++)
{
arch/arm/src/armv7-a/arm_cpustart.c
+2 -2
View File
@@ -106,7 +106,7 @@ int arm_start_handler(int irq, FAR void *context)
{
FAR struct tcb_s *tcb;
sllvdbg("CPU%d Started\n", up_cpu_index());
sllinfo("CPU%d Started\n", up_cpu_index());
/* Reset scheduler parameters */
@@ -155,7 +155,7 @@ int arm_start_handler(int irq, FAR void *context)
int up_cpu_start(int cpu)
{
sllvdbg("Starting CPU%d\n", cpu);
sllinfo("Starting CPU%d\n", cpu);
DEBUGASSERT(cpu >= 0 && cpu < CONFIG_SMP_NCPUS && cpu != this_cpu());
arch/arm/src/armv7-a/arm_dataabort.c
+1 -1
View File
@@ -126,7 +126,7 @@ uint32_t *arm_dataabort(uint32_t *regs, uint32_t dfar, uint32_t dfsr)
* (It has not yet been saved in the register context save area).
*/
pgllvdbg("VBASE: %08x VEND: %08x\n", PG_PAGED_VBASE, PG_PAGED_VEND);
pgllinfo("VBASE: %08x VEND: %08x\n", PG_PAGED_VBASE, PG_PAGED_VEND);
if (dfar < PG_PAGED_VBASE || dfar >= PG_PAGED_VEND)
{
goto segfault;
arch/arm/src/armv7-a/arm_elf.c
+5 -5
View File
@@ -162,7 +162,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_CALL:
case R_ARM_JUMP24:
{
bvdbg("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
binfo("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
@@ -191,7 +191,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_ABS32:
case R_ARM_TARGET1: /* New ABI: TARGET1 always treated as ABS32 */
{
bvdbg("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
binfo("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
*(uint32_t *)addr += sym->st_value;
@@ -200,7 +200,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_V4BX:
{
bvdbg("Performing V4BX link at addr=%08lx [%08lx]\n",
binfo("Performing V4BX link at addr=%08lx [%08lx]\n",
(long)addr, (long)(*(uint32_t *)addr));
/* Preserve only Rm and the condition code */
@@ -215,7 +215,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_PREL31:
{
bvdbg("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
binfo("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
offset = *(uint32_t *)addr + sym->st_value - addr;
@@ -226,7 +226,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_MOVW_ABS_NC:
case R_ARM_MOVT_ABS:
{
bvdbg("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
binfo("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
arch/arm/src/armv7-a/arm_gicv2.c
+1 -1
View File
@@ -387,7 +387,7 @@ uint32_t *arm_decodeirq(uint32_t *regs)
regval = getreg32(GIC_ICCIAR);
irq = (regval & GIC_ICCIAR_INTID_MASK) >> GIC_ICCIAR_INTID_SHIFT;
gicllvdbg("irq=%d\n", irq);
gicllinfo("irq=%d\n", irq);
/* Ignore spurions IRQs. ICCIAR will report 1023 if there is no pending
* interrupt.
arch/arm/src/armv7-a/gic.h
+4 -4
View File
@@ -596,13 +596,13 @@
#ifdef CONFIG_DEBUG_IRQ
# define gicdbg(format, ...) dbg(format, ##__VA_ARGS__)
# define giclldbg(format, ...) lldbg(format, ##__VA_ARGS__)
# define gicvdbg(format, ...) vdbg(format, ##__VA_ARGS__)
# define gicllvdbg(format, ...) llvdbg(format, ##__VA_ARGS__)
# define gicinfo(format, ...) info(format, ##__VA_ARGS__)
# define gicllinfo(format, ...) llinfo(format, ##__VA_ARGS__)
#else
# define gicdbg(x...)
# define giclldbg(x...)
# define gicvdbg(x...)
# define gicllvdbg(x...)
# define gicinfo(x...)
# define gicllinfo(x...)
#endif
/****************************************************************************
arch/arm/src/armv7-m/up_elf.c
+12 -12
View File
@@ -164,7 +164,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_CALL:
case R_ARM_JUMP24:
{
bvdbg("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
binfo("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
@@ -193,7 +193,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_ABS32:
case R_ARM_TARGET1: /* New ABI: TARGET1 always treated as ABS32 */
{
bvdbg("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
binfo("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
*(uint32_t *)addr += sym->st_value;
@@ -204,7 +204,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_TARGET2: /* TARGET2 is a platform-specific relocation: gcc-arm-none-eabi
* performs a self relocation */
{
bvdbg("Performing TARGET2 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
binfo("Performing TARGET2 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
*(uint32_t *)addr += sym->st_value - addr;
@@ -253,7 +253,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
upper_insn = (uint32_t)(*(uint16_t *)addr);
lower_insn = (uint32_t)(*(uint16_t *)(addr + 2));
bvdbg("Performing THM_JUMP24 [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
binfo("Performing THM_JUMP24 [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (int)upper_insn, (int)lower_insn,
sym, (long)sym->st_value);
@@ -287,7 +287,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
/* And perform the relocation */
bvdbg(" S=%d J1=%d J2=%d offset=%08lx branch target=%08lx\n",
binfo(" S=%d J1=%d J2=%d offset=%08lx branch target=%08lx\n",
S, J1, J2, (long)offset, offset + sym->st_value - addr);
offset += sym->st_value - addr;
@@ -328,14 +328,14 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
lower_insn = ((lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | ((offset >> 1) & 0x07ff));
*(uint16_t *)(addr + 2) = (uint16_t)lower_insn;
bvdbg(" S=%d J1=%d J2=%d insn [%04x %04x]\n",
binfo(" S=%d J1=%d J2=%d insn [%04x %04x]\n",
S, J1, J2, (int)upper_insn, (int)lower_insn);
}
break;
case R_ARM_V4BX:
{
bvdbg("Performing V4BX link at addr=%08lx [%08lx]\n",
binfo("Performing V4BX link at addr=%08lx [%08lx]\n",
(long)addr, (long)(*(uint32_t *)addr));
/* Preserve only Rm and the condition code */
@@ -350,7 +350,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_PREL31:
{
bvdbg("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
binfo("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
offset = *(uint32_t *)addr + sym->st_value - addr;
@@ -361,7 +361,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_MOVW_ABS_NC:
case R_ARM_MOVT_ABS:
{
bvdbg("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
binfo("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
@@ -416,7 +416,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
upper_insn = (uint32_t)(*(uint16_t *)addr);
lower_insn = (uint32_t)(*(uint16_t *)(addr + 2));
bvdbg("Performing THM_MOVx [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
binfo("Performing THM_MOVx [%d] link at addr=%08lx [%04x %04x] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (int)upper_insn, (int)lower_insn,
sym, (long)sym->st_value);
@@ -433,7 +433,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
/* And perform the relocation */
bvdbg(" offset=%08lx branch target=%08lx\n",
binfo(" offset=%08lx branch target=%08lx\n",
(long)offset, offset + sym->st_value);
offset += sym->st_value;
@@ -455,7 +455,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
(offset & 0x00ff));
*(uint16_t *)(addr + 2) = (uint16_t)lower_insn;
bvdbg(" insn [%04x %04x]\n",
binfo(" insn [%04x %04x]\n",
(int)upper_insn, (int)lower_insn);
}
break;
arch/arm/src/armv7-m/up_ramvec_attach.c
+3 -3
View File
@@ -60,10 +60,10 @@
#ifdef CONFIG_DEBUG_IRQ
# define intdbg lldbg
# define intvdbg llvdbg
# define intinfo llinfo
#else
# define intdbg(x...)
# define intvdbg(x...)
# define intinfo(x...)
#endif
/****************************************************************************
@@ -103,7 +103,7 @@ int up_ramvec_attach(int irq, up_vector_t vector)
{
int ret = -EINVAL;
intvdbg("%s IRQ%d\n", vector ? "Attaching" : "Detaching", irq);
intinfo("%s IRQ%d\n", vector ? "Attaching" : "Detaching", irq);
if ((unsigned)irq < NR_VECTORS)
{
arch/arm/src/armv7-m/up_ramvec_initialize.c
+4 -4
View File
@@ -79,10 +79,10 @@
#ifdef CONFIG_DEBUG_IRQ
# define intdbg lldbg
# define intvdbg llvdbg
# define intinfo llinfo
#else
# define intdbg(x...)
# define intvdbg(x...)
# define intinfo(x...)
#endif
/****************************************************************************
@@ -147,7 +147,7 @@ void up_ramvec_initialize(void)
src = (const CODE up_vector_t *)getreg32(NVIC_VECTAB);
dest = g_ram_vectors;
intvdbg("src=%p dest=%p\n", src, dest);
intinfo("src=%p dest=%p\n", src, dest);
for (i = 0; i < ARMV7M_VECTAB_SIZE; i++)
{
@@ -163,7 +163,7 @@ void up_ramvec_initialize(void)
* the table alignment is insufficient.
*/
intvdbg("NVIC_VECTAB=%08x\n", getreg32(NVIC_VECTAB));
intinfo("NVIC_VECTAB=%08x\n", getreg32(NVIC_VECTAB));
DEBUGASSERT(getreg32(NVIC_VECTAB) == (uint32_t)g_ram_vectors);
}
arch/arm/src/armv7-r/arm_elf.c
+5 -5
View File
@@ -174,7 +174,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_CALL:
case R_ARM_JUMP24:
{
bvdbg("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
binfo("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
@@ -203,7 +203,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_ABS32:
case R_ARM_TARGET1: /* New ABI: TARGET1 always treated as ABS32 */
{
bvdbg("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
binfo("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
*(uint32_t *)addr += sym->st_value;
@@ -212,7 +212,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_V4BX:
{
bvdbg("Performing V4BX link at addr=%08lx [%08lx]\n",
binfo("Performing V4BX link at addr=%08lx [%08lx]\n",
(long)addr, (long)(*(uint32_t *)addr));
/* Preserve only Rm and the condition code */
@@ -227,7 +227,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_PREL31:
{
bvdbg("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
binfo("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
offset = *(uint32_t *)addr + sym->st_value - addr;
@@ -238,7 +238,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
case R_ARM_MOVW_ABS_NC:
case R_ARM_MOVT_ABS:
{
bvdbg("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
binfo("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
sym, (long)sym->st_value);
arch/arm/src/c5471/c5471_ethernet.c
+26 -26
View File
@@ -417,7 +417,7 @@ static inline void c5471_dumpbuffer(const char *msg, const uint8_t *buffer, unsi
* defined or the following does nothing.
*/
nvdbgdumpbuffer(msg, buffer, nbytes);
ninfodumpbuffer(msg, buffer, nbytes);
}
#else
# define c5471_dumpbuffer(msg, buffer,nbytes)
@@ -802,7 +802,7 @@ static inline void c5471_inctxcpu(struct c5471_driver_s *c5471)
c5471->c_txcpudesc += 2*sizeof(uint32_t);
}
nvdbg("TX CPU desc: %08x\n", c5471->c_txcpudesc);
ninfo("TX CPU desc: %08x\n", c5471->c_txcpudesc);
}
/****************************************************************************
@@ -825,7 +825,7 @@ static inline void c5471_incrxcpu(struct c5471_driver_s *c5471)
c5471->c_rxcpudesc += 2*sizeof(uint32_t);
}
nvdbg("RX CPU desc: %08x\n", c5471->c_rxcpudesc);
ninfo("RX CPU desc: %08x\n", c5471->c_rxcpudesc);
}
/****************************************************************************
@@ -861,7 +861,7 @@ static int c5471_transmit(struct c5471_driver_s *c5471)
bfirstframe = true;
c5471->c_lastdescstart = c5471->c_rxcpudesc;
nvdbg("Packet size: %d RX CPU desc: %08x\n", nbytes, c5471->c_rxcpudesc);
ninfo("Packet size: %d RX CPU desc: %08x\n", nbytes, c5471->c_rxcpudesc);
c5471_dumpbuffer("Transmit packet", dev->d_buf, dev->d_len);
while (nbytes)
@@ -918,7 +918,7 @@ static int c5471_transmit(struct c5471_driver_s *c5471)
putreg32(((getreg32(c5471->c_rxcpudesc) & ~EIM_RXDESC_BYTEMASK) | framelen), c5471->c_rxcpudesc);
nbytes -= framelen;
nvdbg("Wrote framelen: %d nbytes: %d nshorts: %d\n", framelen, nbytes, nshorts);
ninfo("Wrote framelen: %d nbytes: %d nshorts: %d\n", framelen, nbytes, nshorts);
if (0 == nbytes)
{
@@ -1092,43 +1092,43 @@ static void c5471_rxstatus(struct c5471_driver_s *c5471)
if ((rxstatus & EIM_TXDESC_RETRYERROR) != 0)
{
c5471->c_rxretries++;
nvdbg("c_rxretries: %d\n", c5471->c_rxretries);
ninfo("c_rxretries: %d\n", c5471->c_rxretries);
}
if ((rxstatus & EIM_TXDESC_HEARTBEAT) != 0)
{
c5471->c_rxheartbeat++;
nvdbg("c_rxheartbeat: %d\n", c5471->c_rxheartbeat);
ninfo("c_rxheartbeat: %d\n", c5471->c_rxheartbeat);
}
if ((rxstatus & EIM_TXDESC_LCOLLISON) != 0)
{
c5471->c_rxlcollision++;
nvdbg("c_rxlcollision: %d\n", c5471->c_rxlcollision);
ninfo("c_rxlcollision: %d\n", c5471->c_rxlcollision);
}
if ((rxstatus & EIM_TXDESC_COLLISION) != 0)
{
c5471->c_rxcollision++;
nvdbg("c_rxcollision: %d\n", c5471->c_rxcollision);
ninfo("c_rxcollision: %d\n", c5471->c_rxcollision);
}
if ((rxstatus & EIM_TXDESC_CRCERROR) != 0)
{
c5471->c_rxcrc++;
nvdbg("c_rxcrc: %d\n", c5471->c_rxcrc);
ninfo("c_rxcrc: %d\n", c5471->c_rxcrc);
}
if ((rxstatus & EIM_TXDESC_UNDERRUN) != 0)
{
c5471->c_rxunderrun++;
nvdbg("c_rxunderrun: %d\n", c5471->c_rxunderrun);
ninfo("c_rxunderrun: %d\n", c5471->c_rxunderrun);
}
if ((rxstatus & EIM_TXDESC_LOC) != 0)
{
c5471->c_rxloc++;
nvdbg("c_rxloc: %d\n", c5471->c_rxloc);
ninfo("c_rxloc: %d\n", c5471->c_rxloc);
}
}
}
@@ -1166,7 +1166,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
* the EIM for additional packets that might be received later from the network.
*/
nvdbg("Reading TX CPU desc: %08x\n", c5471->c_txcpudesc);
ninfo("Reading TX CPU desc: %08x\n", c5471->c_txcpudesc);
while (bmore)
{
/* Words #0 and #1 of descriptor */
@@ -1196,7 +1196,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
/* Divide by 2 with round up to get the number of 16-bit words. */
nshorts = (framelen + 1) >> 1;
nvdbg("Reading framelen: %d packetlen: %d nshorts: %d packetmen: %p\n",
ninfo("Reading framelen: %d packetlen: %d nshorts: %d packetmen: %p\n",
framelen, packetlen, nshorts, packetmem);
for (i = 0 ; i < nshorts; i++, j++)
@@ -1210,7 +1210,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
}
else
{
nvdbg("Discarding framelen: %d packetlen\n", framelen, packetlen);
ninfo("Discarding framelen: %d packetlen\n", framelen, packetlen);
}
if (getreg32(c5471->c_txcpudesc) & EIM_TXDESC_LIF)
@@ -1253,7 +1253,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
/* Set amount of data in c5471->c_dev.d_len. */
dev->d_len = packetlen;
nvdbg("Received packet, packetlen: %d type: %02x\n", packetlen, ntohs(BUF->type));
ninfo("Received packet, packetlen: %d type: %02x\n", packetlen, ntohs(BUF->type));
c5471_dumpbuffer("Received packet", dev->d_buf, dev->d_len);
#ifdef CONFIG_NET_PKT
@@ -1267,7 +1267,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
#ifdef CONFIG_NET_IPv4
if (BUF->type == HTONS(ETHTYPE_IP))
{
nllvdbg("IPv4 frame\n");
nllinfo("IPv4 frame\n");
/* Handle ARP on input then give the IPv4 packet to the network
* layer
@@ -1310,7 +1310,7 @@ static void c5471_receive(struct c5471_driver_s *c5471)
#ifdef CONFIG_NET_IPv6
if (BUF->type == HTONS(ETHTYPE_IP6))
{
nllvdbg("Iv6 frame\n");
nllinfo("Iv6 frame\n");
/* Give the IPv6 packet to the network layer */
@@ -1432,43 +1432,43 @@ static void c5471_txstatus(struct c5471_driver_s *c5471)
if ((txstatus & EIM_RXDESC_MISS) != 0)
{
c5471->c_txmiss++;
nvdbg("c_txmiss: %d\n", c5471->c_txmiss);
ninfo("c_txmiss: %d\n", c5471->c_txmiss);
}
if ((txstatus & EIM_RXDESC_VLAN) != 0)
{
c5471->c_txvlan++;
nvdbg("c_txvlan: %d\n", c5471->c_txvlan);
ninfo("c_txvlan: %d\n", c5471->c_txvlan);
}
if ((txstatus & EIM_RXDESC_LFRAME) != 0)
{
c5471->c_txlframe++;
nvdbg("c_txlframe: %d\n", c5471->c_txlframe);
ninfo("c_txlframe: %d\n", c5471->c_txlframe);
}
if ((txstatus & EIM_RXDESC_SFRAME) != 0)
{
c5471->c_txsframe++;
nvdbg("c_txsframe: %d\n", c5471->c_txsframe);
ninfo("c_txsframe: %d\n", c5471->c_txsframe);
}
if ((txstatus & EIM_RXDESC_CRCERROR) != 0)
{
c5471->c_txcrc++;
nvdbg("c_txcrc: %d\n", c5471->c_txcrc);
ninfo("c_txcrc: %d\n", c5471->c_txcrc);
}
if ((txstatus & EIM_RXDESC_OVERRUN) != 0)
{
c5471->c_txoverrun++;
nvdbg("c_txoverrun: %d\n", c5471->c_txoverrun);
ninfo("c_txoverrun: %d\n", c5471->c_txoverrun);
}
if ((txstatus & EIM_RXDESC_OVERRUN) != 0)
{
c5471->c_txalign++;
nvdbg("c_txalign: %d\n", c5471->c_txalign);
ninfo("c_txalign: %d\n", c5471->c_txalign);
}
}
}
@@ -1607,7 +1607,7 @@ static void c5471_txtimeout(int argc, uint32_t arg, ...)
#ifdef CONFIG_C5471_NET_STATS
c5471->c_txtimeouts++;
nvdbg("c_txtimeouts: %d\n", c5471->c_txtimeouts);
ninfo("c_txtimeouts: %d\n", c5471->c_txtimeouts);
#endif
/* Then try to restart the hardware */
arch/arm/src/common/up_vfork.c
+8 -8
View File
@@ -130,12 +130,12 @@ pid_t up_vfork(const struct vfork_s *context)
uint32_t stackutil;
int ret;
svdbg("vfork context [%p]:\n", context);
svdbg(" r4:%08x r5:%08x r6:%08x r7:%08x\n",
sinfo("vfork context [%p]:\n", context);
sinfo(" r4:%08x r5:%08x r6:%08x r7:%08x\n",
context->r4, context->r5, context->r6, context->r7);
svdbg(" r8:%08x r9:%08x r10:%08x\n",
sinfo(" r8:%08x r9:%08x r10:%08x\n",
context->r8, context->r9, context->r10);
svdbg(" fp:%08x sp:%08x lr:%08x\n",
sinfo(" fp:%08x sp:%08x lr:%08x\n",
context->fp, context->sp, context->lr);
/* Allocate and initialize a TCB for the child task. */
@@ -147,7 +147,7 @@ pid_t up_vfork(const struct vfork_s *context)
return (pid_t)ERROR;
}
svdbg("TCBs: Parent=%p Child=%p\n", parent, child);
sinfo("TCBs: Parent=%p Child=%p\n", parent, child);
/* Get the size of the parent task's stack. Due to alignment operations,
* the adjusted stack size may be smaller than the stack size originally
@@ -176,7 +176,7 @@ pid_t up_vfork(const struct vfork_s *context)
DEBUGASSERT((uint32_t)parent->adj_stack_ptr > context->sp);
stackutil = (uint32_t)parent->adj_stack_ptr - context->sp;
svdbg("Parent: stacksize:%d stackutil:%d\n", stacksize, stackutil);
sinfo("Parent: stacksize:%d stackutil:%d\n", stacksize, stackutil);
/* Make some feeble effort to preserve the stack contents. This is
* feeble because the stack surely contains invalid pointers and other
@@ -201,9 +201,9 @@ pid_t up_vfork(const struct vfork_s *context)
newfp = context->fp;
}
svdbg("Parent: stack base:%08x SP:%08x FP:%08x\n",
sinfo("Parent: stack base:%08x SP:%08x FP:%08x\n",
parent->adj_stack_ptr, context->sp, context->fp);
svdbg("Child: stack base:%08x SP:%08x FP:%08x\n",
sinfo("Child: stack base:%08x SP:%08x FP:%08x\n",
child->cmn.adj_stack_ptr, newsp, newfp);
/* Update the stack pointer, frame pointer, and volatile registers. When
arch/arm/src/dm320/dm320_framebuffer.c
+66 -66
View File
@@ -768,15 +768,15 @@ static void dm320_disable(void)
{
/* Disable all planes */
gvdbg("Inactivate OSD:\n");
ginfo("Inactivate OSD:\n");
putreg16(0, DM320_OSD_OSDWIN0MD); /* Win0 mode = 0 (1:active) */
putreg16(0, DM320_OSD_OSDWIN1MD); /* Win1 mode = 0 (1:active) */
putreg16(0, DM320_OSD_RECTCUR); /* Rectangular cursor mode = 0 (1:active) */
gvdbg("DM320_OSD_OSDWIN0MD: %04x\n", getreg16(DM320_OSD_OSDWIN0MD));
gvdbg("DM320_OSD_OSDWIN1MD: %04x\n", getreg16(DM320_OSD_OSDWIN1MD));
gvdbg("DM320_OSD_RECTCUR: %04x\n", getreg16(DM320_OSD_RECTCUR));
ginfo("DM320_OSD_OSDWIN0MD: %04x\n", getreg16(DM320_OSD_OSDWIN0MD));
ginfo("DM320_OSD_OSDWIN1MD: %04x\n", getreg16(DM320_OSD_OSDWIN1MD));
ginfo("DM320_OSD_RECTCUR: %04x\n", getreg16(DM320_OSD_RECTCUR));
}
/****************************************************************************
@@ -791,17 +791,17 @@ static void dm320_hwinitialize(void)
/* Initialize the main video to correct the origin */
gvdbg("Setup main video origin:\n");
ginfo("Setup main video origin:\n");
putreg16(CONFIG_DM320_BASEX, DM320_OSD_BASEPX);
putreg16(CONFIG_DM320_BASEY, DM320_OSD_BASEPY);
gvdbg("DM320_OSD_BASEPX: %04x\n", getreg16(DM320_OSD_BASEPX));
gvdbg("DM320_OSD_BASEPY: %04x\n", getreg16(DM320_OSD_BASEPY));
ginfo("DM320_OSD_BASEPX: %04x\n", getreg16(DM320_OSD_BASEPX));
ginfo("DM320_OSD_BASEPY: %04x\n", getreg16(DM320_OSD_BASEPY));
/* Set up the frame buffer address registers */
gvdbg("Setup framebuffer addresses:\n");
ginfo("Setup framebuffer addresses:\n");
putreg16(((dm320_osd1upperoffset() << 8) |
@@ -809,9 +809,9 @@ static void dm320_hwinitialize(void)
putreg16(dm320_osd0loweroffset(), DM320_OSD_OSDWIN0ADL);
putreg16(dm320_osd1loweroffset(), DM320_OSD_OSDWIN1ADL);
gvdbg("DM320_OSD_OSDWINADH: %04x\n", getreg16(DM320_OSD_OSDWINADH));
gvdbg("DM320_OSD_OSDWIN0ADL: %04x\n", getreg16(DM320_OSD_OSDWIN0ADL));
gvdbg("DM320_OSD_OSDWIN1ADL: %04x\n", getreg16(DM320_OSD_OSDWIN1ADL));
ginfo("DM320_OSD_OSDWINADH: %04x\n", getreg16(DM320_OSD_OSDWINADH));
ginfo("DM320_OSD_OSDWIN0ADL: %04x\n", getreg16(DM320_OSD_OSDWIN0ADL));
ginfo("DM320_OSD_OSDWIN1ADL: %04x\n", getreg16(DM320_OSD_OSDWIN1ADL));
/* Set up VID WIN0 */
@@ -820,19 +820,19 @@ static void dm320_hwinitialize(void)
#endif
#ifndef CONFIG_DM320_VID0_DISABLE
gvdbg("Initialize video win0:\n");
ginfo("Initialize video win0:\n");
putreg16(dm320_vid0loweroffset(), DM320_OSD_VIDWIN0ADL);
gvdbg("DM320_OSD_VIDWINADH: %04x\n", getreg16(DM320_OSD_VIDWINADH));
gvdbg("DM320_OSD_VIDWIN0ADL: %04x\n", getreg16(DM320_OSD_VIDWIN0ADL));
ginfo("DM320_OSD_VIDWINADH: %04x\n", getreg16(DM320_OSD_VIDWINADH));
ginfo("DM320_OSD_VIDWIN0ADL: %04x\n", getreg16(DM320_OSD_VIDWIN0ADL));
dm320_blankscreen((uint8_t *)g_vid0base, DM320_VID0_FBLEN);
#ifndef CONFIG_DM320_DISABLE_PINGPONG
putreg16(dm320_vid0ppupperoffset(), DM320_OSD_PPVWIN0ADH);
putreg16(dm320_vid0pploweroffset(), DM320_OSD_PPVWIN0ADL);
gvdbg("DM320_OSD_PPVWIN0ADH: %04x\n", getreg16(DM320_OSD_PPVWIN0ADH));
gvdbg("DM320_OSD_PPVWIN0ADL: %04x\n", getreg16(DM320_OSD_PPVWIN0ADL));
ginfo("DM320_OSD_PPVWIN0ADH: %04x\n", getreg16(DM320_OSD_PPVWIN0ADH));
ginfo("DM320_OSD_PPVWIN0ADL: %04x\n", getreg16(DM320_OSD_PPVWIN0ADL));
dm320_blankscreen((uint8_t *)g_vid0ppbase, DM320_VID0_FBLEN);
#endif
@@ -842,21 +842,21 @@ static void dm320_hwinitialize(void)
putreg16(CONFIG_DM320_VID0_XRES, DM320_OSD_VIDWIN0XL);
putreg16(CONFIG_DM320_VID0_YRES, DM320_OSD_VIDWIN0YL);
gvdbg("DM320_OSD_VIDWIN0XP: %04x\n", getreg16(DM320_OSD_VIDWIN0XP));
gvdbg("DM320_OSD_VIDWIN0YP: %04x\n", getreg16(DM320_OSD_VIDWIN0YP));
gvdbg("DM320_OSD_VIDWIN0OFST: %04x\n", getreg16(DM320_OSD_VIDWIN0OFST));
gvdbg("DM320_OSD_VIDWIN0XL: %04x\n", getreg16(DM320_OSD_VIDWIN0XL));
gvdbg("DM320_OSD_VIDWIN0YL: %04x\n", getreg16(DM320_OSD_VIDWIN0YL));
ginfo("DM320_OSD_VIDWIN0XP: %04x\n", getreg16(DM320_OSD_VIDWIN0XP));
ginfo("DM320_OSD_VIDWIN0YP: %04x\n", getreg16(DM320_OSD_VIDWIN0YP));
ginfo("DM320_OSD_VIDWIN0OFST: %04x\n", getreg16(DM320_OSD_VIDWIN0OFST));
ginfo("DM320_OSD_VIDWIN0XL: %04x\n", getreg16(DM320_OSD_VIDWIN0XL));
ginfo("DM320_OSD_VIDWIN0YL: %04x\n", getreg16(DM320_OSD_VIDWIN0YL));
#endif
/* Set up VID WIN1 */
#ifndef CONFIG_DM320_VID1_DISABLE
gvdbg("Initialize video win1:\n");
ginfo("Initialize video win1:\n");
putreg16(dm320_vid1loweroffset(), DM320_OSD_VIDWIN1ADL);
gvdbg("DM320_OSD_VIDWINADH: %04x\n", getreg16(DM320_OSD_VIDWINADH));
gvdbg("DM320_OSD_VIDWIN1ADL: %04x\n", getreg16(DM320_OSD_VIDWIN1ADL));
ginfo("DM320_OSD_VIDWINADH: %04x\n", getreg16(DM320_OSD_VIDWINADH));
ginfo("DM320_OSD_VIDWIN1ADL: %04x\n", getreg16(DM320_OSD_VIDWIN1ADL));
dm320_blankscreen((uint8_t *)g_vid1base, DM320_VID1_FBLEN);
putreg16(CONFIG_DM320_VID1_XPOS, DM320_OSD_VIDWIN1XP);
@@ -865,20 +865,20 @@ static void dm320_hwinitialize(void)
putreg16(CONFIG_DM320_VID1_XRES, DM320_OSD_VIDWIN1XL);
putreg16(CONFIG_DM320_VID1_YRES, DM320_OSD_VIDWIN1YL);
gvdbg("DM320_OSD_VIDWIN1XP: %04x\n", getreg16(DM320_OSD_VIDWIN1XP));
gvdbg("DM320_OSD_VIDWIN1YP: %04x\n", getreg16(DM320_OSD_VIDWIN1YP));
gvdbg("DM320_OSD_VIDWIN1OFST: %04x\n", getreg16(DM320_OSD_VIDWIN1OFST));
gvdbg("DM320_OSD_VIDWIN1XL: %04x\n", getreg16(DM320_OSD_VIDWIN1XL));
gvdbg("DM320_OSD_VIDWIN1YL: %04x\n", getreg16(DM320_OSD_VIDWIN1YL));
ginfo("DM320_OSD_VIDWIN1XP: %04x\n", getreg16(DM320_OSD_VIDWIN1XP));
ginfo("DM320_OSD_VIDWIN1YP: %04x\n", getreg16(DM320_OSD_VIDWIN1YP));
ginfo("DM320_OSD_VIDWIN1OFST: %04x\n", getreg16(DM320_OSD_VIDWIN1OFST));
ginfo("DM320_OSD_VIDWIN1XL: %04x\n", getreg16(DM320_OSD_VIDWIN1XL));
ginfo("DM320_OSD_VIDWIN1YL: %04x\n", getreg16(DM320_OSD_VIDWIN1YL));
#endif
putreg16(DM320_VIDMODE, DM320_OSD_VIDWINMD);
gvdbg("DM320_OSD_VIDWINMD: %04x\n", getreg16(DM320_OSD_VIDWINMD));
ginfo("DM320_OSD_VIDWINMD: %04x\n", getreg16(DM320_OSD_VIDWINMD));
/* Set up OSD WIN0 */
#ifndef CONFIG_DM320_OSD0_DISABLE
gvdbg("Initialize OSD win0:\n");
ginfo("Initialize OSD win0:\n");
dm320_blankscreen((uint8_t *)g_osd0base, DM320_OSD0_FBLEN);
putreg16(CONFIG_DM320_OSD0_XPOS, DM320_OSD_OSDWIN0XP);
@@ -892,18 +892,18 @@ static void dm320_hwinitialize(void)
putreg16(CONFIG_DM320_OSD0_YRES, DM320_OSD_OSDWIN0YL);
putreg16(INITIAL_OSD0MODE, DM320_OSD_OSDWIN0MD);
gvdbg("DM320_OSD_OSDWIN0XP: %04x\n", getreg16(DM320_OSD_OSDWIN0XP));
gvdbg("DM320_OSD_OSDWIN0YP: %04x\n", getreg16(DM320_OSD_OSDWIN0YP));
gvdbg("DM320_OSD_OSDWIN0OFST: %04x\n", getreg16(DM320_OSD_OSDWIN0OFST));
gvdbg("DM320_OSD_OSDWIN0XL: %04x\n", getreg16(DM320_OSD_OSDWIN0XL));
gvdbg("DM320_OSD_OSDWIN0YL: %04x\n", getreg16(DM320_OSD_OSDWIN0YL));
gvdbg("DM320_OSD_OSDWIN0MD: %04x\n", getreg16(DM320_OSD_OSDWIN0MD));
ginfo("DM320_OSD_OSDWIN0XP: %04x\n", getreg16(DM320_OSD_OSDWIN0XP));
ginfo("DM320_OSD_OSDWIN0YP: %04x\n", getreg16(DM320_OSD_OSDWIN0YP));
ginfo("DM320_OSD_OSDWIN0OFST: %04x\n", getreg16(DM320_OSD_OSDWIN0OFST));
ginfo("DM320_OSD_OSDWIN0XL: %04x\n", getreg16(DM320_OSD_OSDWIN0XL));
ginfo("DM320_OSD_OSDWIN0YL: %04x\n", getreg16(DM320_OSD_OSDWIN0YL));
ginfo("DM320_OSD_OSDWIN0MD: %04x\n", getreg16(DM320_OSD_OSDWIN0MD));
#endif
/* Set up OSD WIN1 */
#ifndef CONFIG_DM320_OSD1_DISABLE
gvdbg("Initialize OSD win1\n");
ginfo("Initialize OSD win1\n");
dm320_blankscreen((uint8_t *)g_osd1base, DM320_OSD1_FBLEN);
putreg16(CONFIG_DM320_OSD1_XPOS, DM320_OSD_OSDWIN1XP);
@@ -917,12 +917,12 @@ static void dm320_hwinitialize(void)
putreg16(CONFIG_DM320_OSD1_YRES, DM320_OSD_OSDWIN1YL);
putreg16(INITIAL_OSD1MODE, DM320_OSD_OSDWIN1MD);
gvdbg("DM320_OSD_OSDWIN1XP: %04x\n", getreg16(DM320_OSD_OSDWIN1XP));
gvdbg("DM320_OSD_OSDWIN1YP: %04x\n", getreg16(DM320_OSD_OSDWIN1YP));
gvdbg("DM320_OSD_OSDWIN1OFST: %04x\n", getreg16(DM320_OSD_OSDWIN1OFST));
gvdbg("DM320_OSD_OSDWIN1XL: %04x\n", getreg16(DM320_OSD_OSDWIN1XL));
gvdbg("DM320_OSD_OSDWIN1YL: %04x\n", getreg16(DM320_OSD_OSDWIN1YL));
gvdbg("DM320_OSD_OSDWIN1MD: %04x\n", getreg16(DM320_OSD_OSDWIN1MD));
ginfo("DM320_OSD_OSDWIN1XP: %04x\n", getreg16(DM320_OSD_OSDWIN1XP));
ginfo("DM320_OSD_OSDWIN1YP: %04x\n", getreg16(DM320_OSD_OSDWIN1YP));
ginfo("DM320_OSD_OSDWIN1OFST: %04x\n", getreg16(DM320_OSD_OSDWIN1OFST));
ginfo("DM320_OSD_OSDWIN1XL: %04x\n", getreg16(DM320_OSD_OSDWIN1XL));
ginfo("DM320_OSD_OSDWIN1YL: %04x\n", getreg16(DM320_OSD_OSDWIN1YL));
ginfo("DM320_OSD_OSDWIN1MD: %04x\n", getreg16(DM320_OSD_OSDWIN1MD));
#endif
/* Set up the rectangular cursor with defaults */
@@ -946,11 +946,11 @@ static void dm320_hwinitialize(void)
putreg16(DM320_RECTCURSOR_SETUP, DM320_OSD_RECTCUR);
gvdbg("DM320_OSD_CURXP: %04x\n", getreg16(DM320_OSD_CURXP));
gvdbg("DM320_OSD_CURYP: %04x\n", getreg16(DM320_OSD_CURYP));
gvdbg("DM320_OSD_CURXL: %04x\n", getreg16(DM320_OSD_CURXL));
gvdbg("DM320_OSD_CURYL: %04x\n", getreg16(DM320_OSD_CURYL));
gvdbg("DM320_OSD_RECTCUR: %04x\n", getreg16(DM320_OSD_RECTCUR));
ginfo("DM320_OSD_CURXP: %04x\n", getreg16(DM320_OSD_CURXP));
ginfo("DM320_OSD_CURYP: %04x\n", getreg16(DM320_OSD_CURYP));
ginfo("DM320_OSD_CURXL: %04x\n", getreg16(DM320_OSD_CURXL));
ginfo("DM320_OSD_CURYL: %04x\n", getreg16(DM320_OSD_CURYL));
ginfo("DM320_OSD_RECTCUR: %04x\n", getreg16(DM320_OSD_RECTCUR));
#endif
/* Set main window to the hardware default state. That initial
@@ -969,7 +969,7 @@ static void dm320_hwinitialize(void)
*/
putreg16(CONFIG_DM320_BKGDCLUT, DM320_OSD_OSDMODE);
gvdbg("DM320_OSD_OSDMODE: %04x\n", getreg16(DM320_OSD_OSDMODE));
ginfo("DM320_OSD_OSDMODE: %04x\n", getreg16(DM320_OSD_OSDMODE));
}
/****************************************************************************
@@ -1265,16 +1265,16 @@ static int dm320_getcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_cursora
attrib->mxsize.w = MAX_XRES;
attrib->mxsize.h = MAX_YRES;
gvdbg("DM320_OSD_CURXP: %04x\n", attrib->pos.x);
gvdbg("DM320_OSD_CURYP: %04x\n", attrib->pos.y);
ginfo("DM320_OSD_CURXP: %04x\n", attrib->pos.x);
ginfo("DM320_OSD_CURYP: %04x\n", attrib->pos.y);
#ifdef CONFIG_FB_HWCURSORSIZE
gvdbg("DM320_OSD_CURXL: %04x\n", attrib->size.w);
gvdbg("DM320_OSD_CURYL: %04x\n", attrib->size.h);
ginfo("DM320_OSD_CURXL: %04x\n", attrib->size.w);
ginfo("DM320_OSD_CURYL: %04x\n", attrib->size.h);
#else
gvdbg("DM320_OSD_CURXL: %04x\n", getreg16(DM320_OSD_CURXL));
gvdbg("DM320_OSD_CURYL: %04x\n", getreg16(DM320_OSD_CURYL));
ginfo("DM320_OSD_CURXL: %04x\n", getreg16(DM320_OSD_CURXL));
ginfo("DM320_OSD_CURYL: %04x\n", getreg16(DM320_OSD_CURYL));
#endif
gvdbg("DM320_OSD_RECTCUR: %04x\n", getreg16(DM320_OSD_RECTCUR));
ginfo("DM320_OSD_RECTCUR: %04x\n", getreg16(DM320_OSD_RECTCUR));
}
#endif
@@ -1300,7 +1300,7 @@ static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcurs
flags = enter_critical_section();
if ((settings->flags & FB_CUR_SETPOSITION) != 0)
{
gvdbg("x=%d y=%d\n", settings->pos.x, settings->pos.y);
ginfo("x=%d y=%d\n", settings->pos.x, settings->pos.y);
if (settings->pos.x > MAX_YRES)
{
@@ -1319,7 +1319,7 @@ static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcurs
#ifdef CONFIG_FB_HWCURSORSIZE
if ((settings->flags & FB_CUR_SETSIZE) != 0)
{
gvdbg("h=%d w=%d\n", settings->size.h, settings->size.w);
ginfo("h=%d w=%d\n", settings->size.h, settings->size.w);
if (settings->size.w > MAX_YRES)
{
@@ -1349,11 +1349,11 @@ static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcurs
putreg16(regval, DM320_OSD_RECTCUR);
leave_critical_section(flags);
gvdbg("DM320_OSD_CURXP: %04x\n", getreg16(DM320_OSD_CURXP));
gvdbg("DM320_OSD_CURYP: %04x\n", getreg16(DM320_OSD_CURYP));
gvdbg("DM320_OSD_CURXL: %04x\n", getreg16(DM320_OSD_CURXL));
gvdbg("DM320_OSD_CURYL: %04x\n", getreg16(DM320_OSD_CURYL));
gvdbg("DM320_OSD_RECTCUR: %04x\n", getreg16(DM320_OSD_RECTCUR));
ginfo("DM320_OSD_CURXP: %04x\n", getreg16(DM320_OSD_CURXP));
ginfo("DM320_OSD_CURYP: %04x\n", getreg16(DM320_OSD_CURYP));
ginfo("DM320_OSD_CURXL: %04x\n", getreg16(DM320_OSD_CURXL));
ginfo("DM320_OSD_CURYL: %04x\n", getreg16(DM320_OSD_CURYL));
ginfo("DM320_OSD_RECTCUR: %04x\n", getreg16(DM320_OSD_RECTCUR));
}
#endif
@@ -1381,7 +1381,7 @@ int up_fbinitialize(int display)
{
int ret;
gvdbg("Allocating framebuffers\n");
ginfo("Allocating framebuffers\n");
ret = dm320_allocvideomemory();
if (ret != 0)
{
@@ -1391,7 +1391,7 @@ int up_fbinitialize(int display)
/* Initialize the hardware */
gvdbg("Initializing hardware\n");
ginfo("Initializing hardware\n");
dm320_hwinitialize();
return 0;
}
arch/arm/src/dm320/dm320_usbdev.c
+2 -2
View File
@@ -1216,7 +1216,7 @@ static inline void dm320_ep0setup(struct dm320_usbdev_s *priv)
value = GETUINT16(ctrl.value);
len = GETUINT16(ctrl.len);
ullvdbg("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
ullinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
ctrl.type, ctrl.req, value, index, len);
/* Dispatch any non-standard requests */
@@ -1618,7 +1618,7 @@ static int dm320_ctlrinterrupt(int irq, FAR void *context)
}
else
{
ullvdbg("Pending data on OUT endpoint\n");
ullinfo("Pending data on OUT endpoint\n");
priv->rxpending = 1;
}
}
arch/arm/src/efm32/efm32_adc.c
+18 -18
View File
@@ -717,22 +717,22 @@ endif /* defined(ADC_COUNT) && (ADC_COUNT > 0) */
static void adc_tim_dumpregs(struct efm32_dev_s *priv, FAR const char *msg)
{
#if defined(CONFIG_DEBUG_ANALOG) && defined(CONFIG_DEBUG_INFO)
avdbg("%s:\n", msg);
avdbg(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
ainfo("%s:\n", msg);
ainfo(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
tim_getreg(priv, EFM32_GTIM_CR1_OFFSET),
tim_getreg(priv, EFM32_GTIM_CR2_OFFSET),
tim_getreg(priv, EFM32_GTIM_SMCR_OFFSET),
tim_getreg(priv, EFM32_GTIM_DIER_OFFSET));
avdbg(" SR: %04x EGR: 0000 CCMR1: %04x CCMR2: %04x\n",
ainfo(" SR: %04x EGR: 0000 CCMR1: %04x CCMR2: %04x\n",
tim_getreg(priv, EFM32_GTIM_SR_OFFSET),
tim_getreg(priv, EFM32_GTIM_CCMR1_OFFSET),
tim_getreg(priv, EFM32_GTIM_CCMR2_OFFSET));
avdbg(" CCER: %04x CNT: %04x PSC: %04x ARR: %04x\n",
ainfo(" CCER: %04x CNT: %04x PSC: %04x ARR: %04x\n",
tim_getreg(priv, EFM32_GTIM_CCER_OFFSET),
tim_getreg(priv, EFM32_GTIM_CNT_OFFSET),
tim_getreg(priv, EFM32_GTIM_PSC_OFFSET),
tim_getreg(priv, EFM32_GTIM_ARR_OFFSET));
avdbg(" CCR1: %04x CCR2: %04x CCR3: %04x CCR4: %04x\n",
ainfo(" CCR1: %04x CCR2: %04x CCR3: %04x CCR4: %04x\n",
tim_getreg(priv, EFM32_GTIM_CCR1_OFFSET),
tim_getreg(priv, EFM32_GTIM_CCR2_OFFSET),
tim_getreg(priv, EFM32_GTIM_CCR3_OFFSET),
@@ -740,7 +740,7 @@ static void adc_tim_dumpregs(struct efm32_dev_s *priv, FAR const char *msg)
if (priv->tbase == EFM32_TIM1_BASE || priv->tbase == EFM32_TIM8_BASE)
{
avdbg(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
ainfo(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
tim_getreg(priv, EFM32_ATIM_RCR_OFFSET),
tim_getreg(priv, EFM32_ATIM_BDTR_OFFSET),
tim_getreg(priv, EFM32_ATIM_DCR_OFFSET),
@@ -748,7 +748,7 @@ static void adc_tim_dumpregs(struct efm32_dev_s *priv, FAR const char *msg)
}
else
{
avdbg(" DCR: %04x DMAR: %04x\n",
ainfo(" DCR: %04x DMAR: %04x\n",
tim_getreg(priv, EFM32_GTIM_DCR_OFFSET),
tim_getreg(priv, EFM32_GTIM_DMAR_OFFSET));
}
@@ -775,7 +775,7 @@ static void adc_startconv(struct efm32_dev_s *priv, bool enable)
{
uint32_t regval;
avdbg("enable: %d\n", enable);
ainfo("enable: %d\n", enable);
regval = adc_getreg(priv, EFM32_ADC_CR2_OFFSET);
if (enable)
@@ -864,7 +864,7 @@ static void adc_enable(FAR struct efm32_dev_s *priv, bool enable)
{
uint32_t regval;
avdbg("enable: %d\n", enable);
ainfo("enable: %d\n", enable);
regval = adc_getreg(priv, EFM32_ADC_CR2_OFFSET);
if (enable)
@@ -922,7 +922,7 @@ static void adc_reset(FAR struct adc_dev_s *dev)
int ret;
#endif
avdbg("intf: ADC%d\n", priv->intf);
ainfo("intf: ADC%d\n", priv->intf);
flags = enter_critical_section();
/* Enable ADC reset state */
@@ -1040,11 +1040,11 @@ static void adc_reset(FAR struct adc_dev_s *dev)
leave_critical_section(flags);
avdbg("SR: 0x%08x CR1: 0x%08x CR2: 0x%08x\n",
ainfo("SR: 0x%08x CR1: 0x%08x CR2: 0x%08x\n",
adc_getreg(priv, EFM32_ADC_SR_OFFSET),
adc_getreg(priv, EFM32_ADC_CR1_OFFSET),
adc_getreg(priv, EFM32_ADC_CR2_OFFSET));
avdbg("SQR1: 0x%08x SQR2: 0x%08x SQR3: 0x%08x\n",
ainfo("SQR1: 0x%08x SQR2: 0x%08x SQR3: 0x%08x\n",
adc_getreg(priv, EFM32_ADC_SQR1_OFFSET),
adc_getreg(priv, EFM32_ADC_SQR2_OFFSET),
adc_getreg(priv, EFM32_ADC_SQR3_OFFSET));
@@ -1081,7 +1081,7 @@ static int adc_setup(FAR struct adc_dev_s *dev)
/* Enable the ADC interrupt */
avdbg("Enable the ADC interrupt: irq=%d\n", priv->irq);
ainfo("Enable the ADC interrupt: irq=%d\n", priv->irq);
up_enable_irq(priv->irq);
}
@@ -1132,7 +1132,7 @@ static void adc_rxint(FAR struct adc_dev_s *dev, bool enable)
FAR struct efm32_dev_s *priv = (FAR struct efm32_dev_s *)dev->ad_priv;
uint32_t regval;
avdbg("intf: %d enable: %d\n", priv->intf, enable);
ainfo("intf: %d enable: %d\n", priv->intf, enable);
regval = adc_getreg(priv, EFM32_ADC_CR1_OFFSET);
if (enable)
@@ -1271,12 +1271,12 @@ struct adc_dev_s *efm32_adcinitialize(int intf, const uint8_t *chanlist, int nch
FAR struct adc_dev_s *dev;
FAR struct efm32_dev_s *priv;
avdbg("intf: %d nchannels: %d\n", intf, nchannels);
ainfo("intf: %d nchannels: %d\n", intf, nchannels);
#ifdef CONFIG_EFM32_ADC1
if (intf == 1)
{
avdbg("ADC1 Selected\n");
ainfo("ADC1 Selected\n");
dev = &g_adcdev1;
}
else
@@ -1284,7 +1284,7 @@ struct adc_dev_s *efm32_adcinitialize(int intf, const uint8_t *chanlist, int nch
#ifdef CONFIG_EFM32_ADC2
if (intf == 2)
{
avdbg("ADC2 Selected\n");
ainfo("ADC2 Selected\n");
dev = &g_adcdev2;
}
else
@@ -1292,7 +1292,7 @@ struct adc_dev_s *efm32_adcinitialize(int intf, const uint8_t *chanlist, int nch
#ifdef CONFIG_EFM32_ADC3
if (intf == 3)
{
avdbg("ADC3 Selected\n");
ainfo("ADC3 Selected\n");
dev = &g_adcdev3;
}
else
arch/arm/src/efm32/efm32_dma.c
+2 -2
View File
@@ -270,7 +270,7 @@ void weak_function up_dmainitialize(void)
uint32_t regval;
int i;
dmallvdbg("Initialize XDMAC0\n");
dmallinfo("Initialize XDMAC0\n");
/* Initialize the channel list */
@@ -416,7 +416,7 @@ void efm32_dmafree(DMA_HANDLE handle)
struct dma_channel_s *dmach = (struct dma_channel_s *)handle;
DEBUGASSERT(dmach != NULL && dmach->inuse);
dmavdbg("DMA channel %d\n", dmach->chan);
dmainfo("DMA channel %d\n", dmach->chan);
/* Disable the channel */
arch/arm/src/efm32/efm32_i2c.c
+4 -4
View File
@@ -138,10 +138,10 @@
#ifdef CONFIG_DEBUG_I2C
# define i2cdbg dbg
# define i2cvdbg vdbg
# define i2cinfo info
#else
# define i2cdbg(x...)
# define i2cvdbg(x...)
# define i2cinfo(x...)
#endif
/* I2C event trace logic. NOTE: trace uses the internal, non-standard,
@@ -605,7 +605,7 @@ static inline int efm32_i2c_sem_waitdone(FAR struct efm32_i2c_priv_s *priv)
while (priv->result == I2CRESULT_INPROGRESS);
i2cvdbg("result: %s elapsed: %d threshold: %d i2c_state %s "
i2cinfo("result: %s elapsed: %d threshold: %d i2c_state %s "
"I2Cx_STATES: %08x I2Cx_IF: %08x\n",
efm32_i2c_result_str(priv->result), elapsed, timeout,
efm32_i2c_state_str(priv->i2c_state), priv->i2c_reg_state,
@@ -652,7 +652,7 @@ static inline int efm32_i2c_sem_waitdone(FAR struct efm32_i2c_priv_s *priv)
while ((priv->result == I2CRESULT_INPROGRESS) && elapsed < timeout);
i2cvdbg("result: %s elapsed: %d threshold: %d i2c_state %s "
i2cinfo("result: %s elapsed: %d threshold: %d i2c_state %s "
"I2Cx_STATES: %08x I2Cx_IF: %08x\n",
efm32_i2c_result_str(priv->result), elapsed, timeout,
efm32_i2c_state_str(priv->i2c_state), priv->i2c_reg_state,
arch/arm/src/efm32/efm32_idle.c
+1 -1
View File
@@ -110,7 +110,7 @@ static void up_idlepm(void)
/* Perform board-specific, state-dependent logic here */
llvdbg("newstate= %d oldstate=%d\n", newstate, oldstate);
llinfo("newstate= %d oldstate=%d\n", newstate, oldstate);
/* Then force the global state change */
arch/arm/src/efm32/efm32_pwm.c
+21 -21
View File
@@ -85,19 +85,19 @@
# define pwmdbg dbg
# define pwmlldbg lldbg
# ifdef CONFIG_DEBUG_INFO
# define pwmvdbg vdbg
# define pwmllvdbg llvdbg
# define pwminfo info
# define pwmllinfo llinfo
# define pwm_dumpgpio(p,m) efm32_dumpgpio(p,m)
# else
# define pwmvdbg(x...)
# define pwmllvdbg(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
# endif
#else
# define pwmdbg(x...)
# define pwmlldbg(x...)
# define pwmvdbg(x...)
# define pwmllvdbg(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
#endif
@@ -329,23 +329,23 @@ static void pwm_dumpregs(struct efm32_pwmtimer_s *priv, FAR const char *msg)
/* TODO debug pwm_dumpregs */
#if 0
pwmvdbg("%s:\n", msg);
pwmvdbg(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
pwminfo("%s:\n", msg);
pwminfo(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
pwm_getreg(priv, STM32_GTIM_CR1_OFFSET),
pwm_getreg(priv, STM32_GTIM_CR2_OFFSET),
pwm_getreg(priv, STM32_GTIM_SMCR_OFFSET),
pwm_getreg(priv, STM32_GTIM_DIER_OFFSET));
pwmvdbg(" SR: %04x EGR: %04x CCMR1: %04x CCMR2: %04x\n",
pwminfo(" SR: %04x EGR: %04x CCMR1: %04x CCMR2: %04x\n",
pwm_getreg(priv, STM32_GTIM_SR_OFFSET),
pwm_getreg(priv, STM32_GTIM_EGR_OFFSET),
pwm_getreg(priv, STM32_GTIM_CCMR1_OFFSET),
pwm_getreg(priv, STM32_GTIM_CCMR2_OFFSET));
pwmvdbg(" CCER: %04x CNT: %04x PSC: %04x ARR: %04x\n",
pwminfo(" CCER: %04x CNT: %04x PSC: %04x ARR: %04x\n",
pwm_getreg(priv, STM32_GTIM_CCER_OFFSET),
pwm_getreg(priv, STM32_GTIM_CNT_OFFSET),
pwm_getreg(priv, STM32_GTIM_PSC_OFFSET),
pwm_getreg(priv, STM32_GTIM_ARR_OFFSET));
pwmvdbg(" CCR1: %04x CCR2: %04x CCR3: %04x CCR4: %04x\n",
pwminfo(" CCR1: %04x CCR2: %04x CCR3: %04x CCR4: %04x\n",
pwm_getreg(priv, STM32_GTIM_CCR1_OFFSET),
pwm_getreg(priv, STM32_GTIM_CCR2_OFFSET),
pwm_getreg(priv, STM32_GTIM_CCR3_OFFSET),
@@ -353,7 +353,7 @@ static void pwm_dumpregs(struct efm32_pwmtimer_s *priv, FAR const char *msg)
#if defined(CONFIG_STM32_TIM1_PWM) || defined(CONFIG_STM32_TIM8_PWM)
if (priv->timtype == TIMTYPE_ADVANCED)
{
pwmvdbg(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
pwminfo(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
pwm_getreg(priv, STM32_ATIM_RCR_OFFSET),
pwm_getreg(priv, STM32_ATIM_BDTR_OFFSET),
pwm_getreg(priv, STM32_ATIM_DCR_OFFSET),
@@ -362,7 +362,7 @@ static void pwm_dumpregs(struct efm32_pwmtimer_s *priv, FAR const char *msg)
else
#endif
{
pwmvdbg(" DCR: %04x DMAR: %04x\n",
pwminfo(" DCR: %04x DMAR: %04x\n",
pwm_getreg(priv, STM32_GTIM_DCR_OFFSET),
pwm_getreg(priv, STM32_GTIM_DMAR_OFFSET));
}
@@ -396,11 +396,11 @@ static int pwm_timer(FAR struct efm32_pwmtimer_s *priv,
DEBUGASSERT(priv != NULL && info != NULL);
#ifdef CONFIG_PWM_PULSECOUNT
pwmvdbg("TIMER%d channel: %d frequency: %d duty: %08x count: %d\n",
pwminfo("TIMER%d channel: %d frequency: %d duty: %08x count: %d\n",
priv->timid, priv->channel, info->frequency,
info->duty, info->count);
#else
pwmvdbg("TIMER%d channel: %d frequency: %d duty: %08x\n",
pwminfo("TIMER%d channel: %d frequency: %d duty: %08x\n",
priv->timid, priv->channel, info->frequency, info->duty);
#endif
DEBUGASSERT(info->frequency > 0 && info->duty >= 0 &&
@@ -541,7 +541,7 @@ static int pwm_interrupt(struct efm32_pwmtimer_s *priv)
/* Now all of the time critical stuff is done so we can do some debug output */
pwmllvdbg("Update interrupt SR: %04x prev: %d curr: %d count: %d\n",
pwmllinfo("Update interrupt SR: %04x prev: %d curr: %d count: %d\n",
regval, priv->prev, priv->curr, priv->count);
return OK;
@@ -669,7 +669,7 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
{
FAR struct efm32_pwmtimer_s *priv = (FAR struct efm32_pwmtimer_s *)dev;
pwmvdbg("TIMER%d pincfg: %08x\n", priv->timid, priv->pincfg);
pwminfo("TIMER%d pincfg: %08x\n", priv->timid, priv->pincfg);
pwm_dumpregs(priv, "Initially");
/* Configure the PWM output pin, but do not start the timer yet */
@@ -726,7 +726,7 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
FAR struct efm32_pwmtimer_s *priv = (FAR struct efm32_pwmtimer_s *)dev;
uint32_t pincfg;
pwmvdbg("TIMER%d pincfg: %08x\n", priv->timid, priv->pincfg);
pwminfo("TIMER%d pincfg: %08x\n", priv->timid, priv->pincfg);
/* Make sure that the output has been stopped */
@@ -805,7 +805,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
FAR struct efm32_pwmtimer_s *priv = (FAR struct efm32_pwmtimer_s *)dev;
irqstate_t flags;
pwmvdbg("TIMER%d\n", priv->timid);
pwminfo("TIMER%d\n", priv->timid);
/* Disable interrupts momentary to stop any ongoing timer processing and
* to prevent any concurrent access to the reset register.
@@ -848,7 +848,7 @@ static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg
/* There are no platform-specific ioctl commands */
pwmvdbg("TIMER%d\n", priv->timid);
pwminfo("TIMER%d\n", priv->timid);
#endif
return -ENOTTY;
}
@@ -878,7 +878,7 @@ FAR struct pwm_lowerhalf_s *efm32_pwminitialize(int timer)
{
FAR struct efm32_pwmtimer_s *lower;
pwmvdbg("TIMER%d\n", timer);
pwminfo("TIMER%d\n", timer);
switch (timer)
{
arch/arm/src/efm32/efm32_rmu.h
+3 -3
View File
@@ -58,13 +58,13 @@
#ifdef CONFIG_EFM32_RMU_DEBUG
# define rmudbg lldbg
# ifdef CONFIG_DEBUG_INFO
# define rmuvdbg lldbg
# define rmuinfo lldbg
# else
# define rmuvdbg(x...)
# define rmuinfo(x...)
# endif
#else
# define rmudbg(x...)
# define rmuvdbg(x...)
# define rmuinfo(x...)
#endif
/****************************************************************************
arch/arm/src/efm32/efm32_spi.c
+11 -11
View File
@@ -102,13 +102,13 @@
#ifdef CONFIG_DEBUG_SPI
# define spidbg lldbg
# ifdef CONFIG_DEBUG_INFO
# define spivdbg lldbg
# define spiinfo lldbg
# else
# define spivdbg(x...)
# define spiinfo(x...)
# endif
#else
# define spidbg(x...)
# define spivdbg(x...)
# define spiinfo(x...)
#endif
/****************************************************************************
@@ -897,7 +897,7 @@ static uint32_t spi_setfrequency(struct spi_dev_s *dev, uint32_t frequency)
*/
actual = (BOARD_HFPERCLK_FREQUENCY << 7) / (256 + clkdiv);
spivdbg("frequency=%u actual=%u\n", frequency, actual);
spiinfo("frequency=%u actual=%u\n", frequency, actual);
/* Save the frequency selection so that subsequent reconfigurations
* will be faster.
@@ -932,7 +932,7 @@ static void spi_setmode(struct spi_dev_s *dev, enum spi_mode_e mode)
uint32_t setting;
uint32_t regval;
spivdbg("mode=%d\n", mode);
spiinfo("mode=%d\n", mode);
DEBUGASSERT(priv && priv->config);
config = priv->config;
@@ -998,7 +998,7 @@ static void spi_setbits(struct spi_dev_s *dev, int nbits)
uint32_t setting;
bool lsbfirst;
spivdbg("nbits=%d\n", nbits);
spiinfo("nbits=%d\n", nbits);
DEBUGASSERT(priv && priv->config);
config = priv->config;
@@ -1222,7 +1222,7 @@ static uint16_t spi_send(struct spi_dev_s *dev, uint16_t wd)
spi_wait_status(config, _USART_STATUS_RXDATAV_MASK, USART_STATUS_RXDATAV);
ret = (uint16_t)spi_getreg(config, EFM32_USART_RXDATA_OFFSET);
spivdbg("Sent: %04x Return: %04x \n", wd, ret);
spiinfo("Sent: %04x Return: %04x \n", wd, ret);
return ret;
}
@@ -1263,7 +1263,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
DEBUGASSERT(priv && priv->config);
config = priv->config;
spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
/* Flush any unread data */
@@ -1427,7 +1427,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
else
#endif
{
spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n",
spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n",
txbuffer, rxbuffer, nwords);
/* Pre-calculate the timeout value */
@@ -1492,7 +1492,7 @@ static void spi_exchange(struct spi_dev_s *dev, const void *txbuffer,
static void spi_sndblock(struct spi_dev_s *dev, const void *txbuffer,
size_t nwords)
{
spivdbg("txbuffer=%p nwords=%d\n", txbuffer, nwords);
spiinfo("txbuffer=%p nwords=%d\n", txbuffer, nwords);
return spi_exchange(dev, txbuffer, NULL, nwords);
}
#endif
@@ -1521,7 +1521,7 @@ static void spi_sndblock(struct spi_dev_s *dev, const void *txbuffer,
static void spi_recvblock(struct spi_dev_s *dev, void *rxbuffer,
size_t nwords)
{
spivdbg("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
spiinfo("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
return spi_exchange(dev, NULL, rxbuffer, nwords);
}
#endif
arch/arm/src/efm32/efm32_timer.c
+11 -11
View File
@@ -71,19 +71,19 @@
# define efm32_timerdbg dbg
# define efm32_timerlldbg lldbg
# ifdef CONFIG_DEBUG_INFO
# define efm32_timervdbg vdbg
# define efm32_timerllvdbg llvdbg
# define efm32_timerinfo info
# define efm32_timerllinfo llinfo
# define efm32_timer_dumpgpio(p,m) efm32_dumpgpio(p,m)
# else
# define efm32_timerlldbg(x...)
# define efm32_timerllvdbg(x...)
# define efm32_timerllinfo(x...)
# define efm32_timer_dumpgpio(p,m)
# endif
#else
# define efm32_timerdbg(x...)
# define efm32_timerlldbg(x...)
# define efm32_timervdbg(x...)
# define efm32_timerllvdbg(x...)
# define efm32_timerinfo(x...)
# define efm32_timerllinfo(x...)
# define efm32_timer_dumpgpio(p,m)
#endif
@@ -121,14 +121,14 @@ void efm32_timer_dumpregs(uintptr_t base, FAR const char *msg)
{
int i;
efm32_timervdbg("%s:\n", msg);
efm32_timervdbg(" CTRL: %04x STATUS: %04x IEN: %04x IF: %04x\n",
efm32_timerinfo("%s:\n", msg);
efm32_timerinfo(" CTRL: %04x STATUS: %04x IEN: %04x IF: %04x\n",
getreg32(base + EFM32_TIMER_CTRL_OFFSET ),
getreg32(base + EFM32_TIMER_STATUS_OFFSET ),
getreg32(base + EFM32_TIMER_IEN_OFFSET ),
getreg32(base + EFM32_TIMER_IF_OFFSET )
);
efm32_timervdbg(" TOP: %04x TOPB: %04x CNT: %04x ROUTE: %04x\n",
efm32_timerinfo(" TOP: %04x TOPB: %04x CNT: %04x ROUTE: %04x\n",
getreg32(base + EFM32_TIMER_TOP_OFFSET ),
getreg32(base + EFM32_TIMER_TOPB_OFFSET ),
getreg32(base + EFM32_TIMER_CNT_OFFSET ),
@@ -140,7 +140,7 @@ void efm32_timer_dumpregs(uintptr_t base, FAR const char *msg)
#if defined(CONFIG_DEBUG_TIMER) && defined(CONFIG_DEBUG_INFO)
uintptr_t base_cc = base + EFM32_TIMER_CC_OFFSET(i);
#endif
efm32_timervdbg("CC%d => CTRL: %04x CCV: %04x CCVP: %04x CCVB: %04x\n",
efm32_timerinfo("CC%d => CTRL: %04x CCV: %04x CCVP: %04x CCVB: %04x\n",
i
getreg32(base_cc + EFM32_TIMER_CC_CTRL_OFFSET ),
getreg32(base_cc + EFM32_TIMER_CC_CCV_OFFSET ),
@@ -149,13 +149,13 @@ void efm32_timer_dumpregs(uintptr_t base, FAR const char *msg)
);
}
efm32_timervdbg("DTCTRL: %04x DTTIME: %04x DTFC: %04x DTOGEN: %04x\n",
efm32_timerinfo("DTCTRL: %04x DTTIME: %04x DTFC: %04x DTOGEN: %04x\n",
getreg32(base + EFM32_TIMER_CTRL_OFFSET ),
getreg32(base + EFM32_TIMER_STATUS_OFFSET ),
getreg32(base + EFM32_TIMER_IEN_OFFSET ),
getreg32(base + EFM32_TIMER_IF_OFFSET )
);
efm32_timervdbg("DTFAULT: %04x DTFAULTC: %04x DTLOCK: %04x \n",
efm32_timerinfo("DTFAULT: %04x DTFAULTC: %04x DTLOCK: %04x \n",
getreg32(base + EFM32_TIMER_CTRL_OFFSET ),
getreg32(base + EFM32_TIMER_STATUS_OFFSET ),
getreg32(base + EFM32_TIMER_IEN_OFFSET ),
arch/arm/src/efm32/efm32_usbdev.c
+7 -7
View File
@@ -1220,7 +1220,7 @@ static void efm32_epin_request(FAR struct efm32_usbdev_s *priv,
return;
}
ullvdbg("EP%d req=%p: len=%d xfrd=%d zlp=%d\n",
ullinfo("EP%d req=%p: len=%d xfrd=%d zlp=%d\n",
privep->epphy, privreq, privreq->req.len,
privreq->req.xfrd, privep->zlp);
@@ -1486,7 +1486,7 @@ static void efm32_epout_complete(FAR struct efm32_usbdev_s *priv,
return;
}
ullvdbg("EP%d: len=%d xfrd=%d\n",
ullinfo("EP%d: len=%d xfrd=%d\n",
privep->epphy, privreq->req.len, privreq->req.xfrd);
/* Return the completed read request to the class driver and mark the state
@@ -1521,7 +1521,7 @@ static inline void efm32_ep0out_receive(FAR struct efm32_ep_s *privep, int bcnt)
DEBUGASSERT(privep && privep->ep.priv);
priv = (FAR struct efm32_usbdev_s *)privep->ep.priv;
ullvdbg("EP0: bcnt=%d\n", bcnt);
ullinfo("EP0: bcnt=%d\n", bcnt);
usbtrace(TRACE_READ(EP0), bcnt);
/* Verify that an OUT SETUP request as received before this data was
@@ -1614,7 +1614,7 @@ static inline void efm32_epout_receive(FAR struct efm32_ep_s *privep, int bcnt)
return;
}
ullvdbg("EP%d: len=%d xfrd=%d\n", privep->epphy, privreq->req.len, privreq->req.xfrd);
ullinfo("EP%d: len=%d xfrd=%d\n", privep->epphy, privreq->req.len, privreq->req.xfrd);
usbtrace(TRACE_READ(privep->epphy), bcnt);
/* Get the number of bytes to transfer from the RxFIFO */
@@ -1698,7 +1698,7 @@ static void efm32_epout_request(FAR struct efm32_usbdev_s *priv,
return;
}
ullvdbg("EP%d: len=%d\n", privep->epphy, privreq->req.len);
ullinfo("EP%d: len=%d\n", privep->epphy, privreq->req.len);
/* Ignore any attempt to receive a zero length packet (this really
* should not happen.
@@ -2494,7 +2494,7 @@ static inline void efm32_ep0out_setup(struct efm32_usbdev_s *priv)
ctrlreq.index = GETUINT16(priv->ctrlreq.index);
ctrlreq.len = GETUINT16(priv->ctrlreq.len);
ullvdbg("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
ullinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
ctrlreq.type, ctrlreq.req, ctrlreq.value, ctrlreq.index, ctrlreq.len);
/* Check for a standard request */
@@ -4333,7 +4333,7 @@ static int efm32_ep_submit(FAR struct usbdev_ep_s *ep, FAR struct usbdev_req_s *
if (!req || !req->callback || !req->buf || !ep)
{
usbtrace(TRACE_DEVERROR(EFM32_TRACEERR_INVALIDPARMS), 0);
ullvdbg("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
ullinfo("req=%p callback=%p buf=%p ep=%p\n", req, req->callback, req->buf, ep);
return -EINVAL;
}
#endif
arch/arm/src/efm32/efm32_usbhost.c
+16 -16
View File
@@ -2016,7 +2016,7 @@ static void efm32_in_next(FAR struct efm32_usbhost_s *priv,
/* The transfer is complete, with or without an error */
uvdbg("Transfer complete: %d\n", result);
uinfo("Transfer complete: %d\n", result);
/* Extract the callback information */
@@ -2302,7 +2302,7 @@ static void efm32_out_next(FAR struct efm32_usbhost_s *priv,
/* The transfer is complete, with or without an error */
uvdbg("Transfer complete: %d\n", result);
uinfo("Transfer complete: %d\n", result);
/* Extract the callback information */
@@ -2448,7 +2448,7 @@ static inline void efm32_gint_hcinisr(FAR struct efm32_usbhost_s *priv,
/* AND the two to get the set of enabled, pending HC interrupts */
pending &= regval;
ullvdbg("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
ullinfo("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
/* Check for a pending ACK response received/transmitted (ACK) interrupt */
@@ -2709,7 +2709,7 @@ static inline void efm32_gint_hcoutisr(FAR struct efm32_usbhost_s *priv,
/* AND the two to get the set of enabled, pending HC interrupts */
pending &= regval;
ullvdbg("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
ullinfo("HCINTMSK%d: %08x pending: %08x\n", chidx, regval, pending);
/* Check for a pending ACK response received/transmitted (ACK) interrupt */
@@ -3012,7 +3012,7 @@ static inline void efm32_gint_rxflvlisr(FAR struct efm32_usbhost_s *priv)
/* Read and pop the next status from the Rx FIFO */
grxsts = efm32_getreg(EFM32_USB_GRXSTSP);
ullvdbg("GRXSTS: %08x\n", grxsts);
ullinfo("GRXSTS: %08x\n", grxsts);
/* Isolate the channel number/index in the status word */
@@ -3166,7 +3166,7 @@ static inline void efm32_gint_nptxfeisr(FAR struct efm32_usbhost_s *priv)
/* Write the next group of packets into the Tx FIFO */
ullvdbg("HNPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
ullinfo("HNPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
regval, chidx, avail, chan->buflen, chan->xfrd, wrsize);
efm32_gint_wrpacket(priv, chan->buffer, chidx, wrsize);
@@ -3254,7 +3254,7 @@ static inline void efm32_gint_ptxfeisr(FAR struct efm32_usbhost_s *priv)
/* Write the next group of packets into the Tx FIFO */
ullvdbg("HPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
ullinfo("HPTXSTS: %08x chidx: %d avail: %d buflen: %d xfrd: %d wrsize: %d\n",
regval, chidx, avail, chan->buflen, chan->xfrd, wrsize);
efm32_gint_wrpacket(priv, chan->buffer, chidx, wrsize);
@@ -3827,7 +3827,7 @@ static int efm32_wait(FAR struct usbhost_connection_s *conn,
*hport = connport;
leave_critical_section(flags);
uvdbg("RHport Connected: %s\n", connport->connected ? "YES" : "NO");
uinfo("RHport Connected: %s\n", connport->connected ? "YES" : "NO");
return OK;
}
@@ -3844,7 +3844,7 @@ static int efm32_wait(FAR struct usbhost_connection_s *conn,
*hport = connport;
leave_critical_section(flags);
uvdbg("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
uinfo("Hub port Connected: %s\n", connport->connected ? "YES" : "NO");
return OK;
}
#endif
@@ -3964,7 +3964,7 @@ static int efm32_enumerate(FAR struct usbhost_connection_s *conn,
/* Then let the common usbhost_enumerate do the real enumeration. */
uvdbg("Enumerate the device\n");
uinfo("Enumerate the device\n");
priv->smstate = SMSTATE_ENUM;
ret = usbhost_enumerate(hport, &hport->devclass);
@@ -4380,7 +4380,7 @@ static int efm32_ctrlin(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
DEBUGASSERT(priv != NULL && ep0info != NULL && req != NULL);
usbhost_vtrace2(USBHOST_VTRACE2_CTRLIN, req->type, req->req);
uvdbg("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
uinfo("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
req->type, req->req, req->value[1], req->value[0],
req->index[1], req->index[0], req->len[1], req->len[0]);
@@ -4465,7 +4465,7 @@ static int efm32_ctrlout(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep0,
DEBUGASSERT(priv != NULL && ep0info != NULL && req != NULL);
usbhost_vtrace2(USBHOST_VTRACE2_CTRLOUT, req->type, req->req);
uvdbg("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
uinfo("type:%02x req:%02x value:%02x%02x index:%02x%02x len:%02x%02x\n",
req->type, req->req, req->value[1], req->value[0],
req->index[1], req->index[0], req->len[1], req->len[0]);
@@ -4583,7 +4583,7 @@ static ssize_t efm32_transfer(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep
unsigned int chidx = (unsigned int)ep;
ssize_t nbytes;
uvdbg("chidx: %d buflen: %d\n", (unsigned int)ep, buflen);
uinfo("chidx: %d buflen: %d\n", (unsigned int)ep, buflen);
DEBUGASSERT(priv && buffer && chidx < EFM32_MAX_TX_FIFOS && buflen > 0);
@@ -4650,7 +4650,7 @@ static int efm32_asynch(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep,
unsigned int chidx = (unsigned int)ep;
int ret;
uvdbg("chidx: %d buflen: %d\n", (unsigned int)ep, buflen);
uinfo("chidx: %d buflen: %d\n", (unsigned int)ep, buflen);
DEBUGASSERT(priv && buffer && chidx < EFM32_MAX_TX_FIFOS && buflen > 0);
@@ -4700,7 +4700,7 @@ static int efm32_cancel(FAR struct usbhost_driver_s *drvr, usbhost_ep_t ep)
unsigned int chidx = (unsigned int)ep;
irqstate_t flags;
uvdbg("chidx: %u: %d\n", chidx);
uinfo("chidx: %u: %d\n", chidx);
DEBUGASSERT(priv && chidx < EFM32_MAX_TX_FIFOS);
chan = &priv->chan[chidx];
@@ -4795,7 +4795,7 @@ static int efm32_connect(FAR struct usbhost_driver_s *drvr,
/* Set the connected/disconnected flag */
hport->connected = connected;
ullvdbg("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
ullinfo("Hub port %d connected: %s\n", hport->port, connected ? "YES" : "NO");
/* Report the connection event */
arch/arm/src/kinetis/kinetis_enet.c
+2 -2
View File
@@ -557,7 +557,7 @@ static void kinetis_receive(FAR struct kinetis_driver_s *priv)
#ifdef CONFIG_NET_IPv4
if (BUF->type == HTONS(ETHTYPE_IP))
{
nllvdbg("IPv4 frame\n");
nllinfo("IPv4 frame\n");
NETDEV_RXIPV4(&priv->dev);
/* Handle ARP on input then give the IPv4 packet to the network
@@ -598,7 +598,7 @@ static void kinetis_receive(FAR struct kinetis_driver_s *priv)
#ifdef CONFIG_NET_IPv6
if (BUF->type == HTONS(ETHTYPE_IP6))
{
nllvdbg("Iv6 frame\n");
nllinfo("Iv6 frame\n");
NETDEV_RXIPV6(&priv->dev);
/* Give the IPv6 packet to the network layer */
arch/arm/src/kinetis/kinetis_pwm.c
+23 -23
View File
@@ -86,19 +86,19 @@
# define pwmdbg dbg
# define pwmlldbg lldbg
# ifdef CONFIG_DEBUG_INFO
# define pwmvdbg vdbg
# define pwmllvdbg llvdbg
# define pwminfo info
# define pwmllinfo llinfo
# define pwm_dumpgpio(p,m) kinetis_pindump(p,m)
# else
# define pwmlldbg(x...)
# define pwmllvdbg(x...)
# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
# endif
#else
# define pwmdbg(x...)
# define pwmlldbg(x...)
# define pwmvdbg(x...)
# define pwmllvdbg(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
#endif
@@ -265,25 +265,25 @@ static void pwm_dumpregs(struct kinetis_pwmtimer_s *priv, FAR const char *msg)
{
int nchannels = (priv->tpmid == 0) ? 8 : 2;
pwmvdbg("%s:\n", msg);
pwmvdbg(" FTM%d_SC: %04x FTM%d_CNT: %04x FTM%d_MOD: %04x\n",
pwminfo("%s:\n", msg);
pwminfo(" FTM%d_SC: %04x FTM%d_CNT: %04x FTM%d_MOD: %04x\n",
priv->tpmid,
pwm_getreg(priv, KINETIS_FTM_SC_OFFSET),
priv->tpmid,
pwm_getreg(priv, KINETIS_FTM_CNT_OFFSET),
priv->tpmid,
pwm_getreg(priv, KINETIS_FTM_MOD_OFFSET));
pwmvdbg(" FTM%d_STATUS: %04x FTM%d_CONF: %04x\n",
pwminfo(" FTM%d_STATUS: %04x FTM%d_CONF: %04x\n",
priv->tpmid,
pwm_getreg(priv, KINETIS_FTM_STATUS_OFFSET),
priv->tpmid,
pwm_getreg(priv, KINETIS_FTM_CONF_OFFSET));
pwmvdbg(" FTM%d_C0SC: %04x FTM%d_C0V: %04x\n",
pwminfo(" FTM%d_C0SC: %04x FTM%d_C0V: %04x\n",
priv->tpmid,
pwm_getreg(priv, KINETIS_FTM_C0SC_OFFSET),
priv->tpmid,
pwm_getreg(priv, KINETIS_FTM_C0V_OFFSET));
pwmvdbg(" FTM%d_C1SC: %04x FTM%d_C1V: %04x\n",
pwminfo(" FTM%d_C1SC: %04x FTM%d_C1V: %04x\n",
priv->tpmid,
pwm_getreg(priv, KINETIS_FTM_C1SC_OFFSET),
priv->tpmid,
@@ -291,7 +291,7 @@ static void pwm_dumpregs(struct kinetis_pwmtimer_s *priv, FAR const char *msg)
if (nchannels >= 3)
{
pwmvdbg(" FTM%d_C2SC: %04x FTM%d_C2V: %04x\n",
pwminfo(" FTM%d_C2SC: %04x FTM%d_C2V: %04x\n",
priv->tpmid,
pwm_getreg(priv, KINETIS_FTM_C2SC_OFFSET),
priv->tpmid,
@@ -300,7 +300,7 @@ static void pwm_dumpregs(struct kinetis_pwmtimer_s *priv, FAR const char *msg)
if (nchannels >= 4)
{
pwmvdbg(" FTM%d_C3SC: %04x FTM%d_C3V: %04x\n",
pwminfo(" FTM%d_C3SC: %04x FTM%d_C3V: %04x\n",
priv->tpmid,
pwm_getreg(priv, KINETIS_FTM_C3SC_OFFSET),
priv->tpmid,
@@ -309,7 +309,7 @@ static void pwm_dumpregs(struct kinetis_pwmtimer_s *priv, FAR const char *msg)
if (nchannels >= 5)
{
pwmvdbg(" FTM%d_C4SC: %04x FTM%d_C4V: %04x\n",
pwminfo(" FTM%d_C4SC: %04x FTM%d_C4V: %04x\n",
priv->tpmid,
pwm_getreg(priv, KINETIS_FTM_C4SC_OFFSET),
priv->tpmid,
@@ -318,7 +318,7 @@ static void pwm_dumpregs(struct kinetis_pwmtimer_s *priv, FAR const char *msg)
if (nchannels >= 6)
{
pwmvdbg(" FTM%d_C5SC: %04x FTM%d_C5V: %04x\n",
pwminfo(" FTM%d_C5SC: %04x FTM%d_C5V: %04x\n",
priv->tpmid,
pwm_getreg(priv, KINETIS_FTM_C5SC_OFFSET),
priv->tpmid,
@@ -326,7 +326,7 @@ static void pwm_dumpregs(struct kinetis_pwmtimer_s *priv, FAR const char *msg)
}
if (nchannels >= 7)
{
pwmvdbg(" FTM%d_C6SC: %04x FTM%d_C6V: %04x\n",
pwminfo(" FTM%d_C6SC: %04x FTM%d_C6V: %04x\n",
priv->tpmid,
pwm_getreg(priv, KINETIS_FTM_C6SC_OFFSET),
priv->tpmid,
@@ -334,7 +334,7 @@ static void pwm_dumpregs(struct kinetis_pwmtimer_s *priv, FAR const char *msg)
}
if (nchannels >= 8)
{
pwmvdbg(" FTM%d_C7SC: %04x FTM%d_C7V: %04x\n",
pwminfo(" FTM%d_C7SC: %04x FTM%d_C7V: %04x\n",
priv->tpmid,
pwm_getreg(priv, KINETIS_FTM_C7SC_OFFSET),
priv->tpmid,
@@ -376,7 +376,7 @@ static int pwm_timer(FAR struct kinetis_pwmtimer_s *priv,
DEBUGASSERT(priv != NULL && info != NULL);
pwmvdbg("FTM%d channel: %d frequency: %d duty: %08x\n",
pwminfo("FTM%d channel: %d frequency: %d duty: %08x\n",
priv->tpmid, priv->channel, info->frequency, info->duty);
DEBUGASSERT(info->frequency > 0 && info->duty > 0 &&
@@ -446,7 +446,7 @@ static int pwm_timer(FAR struct kinetis_pwmtimer_s *priv,
cv = b16toi(info->duty * modulo + b16HALF);
pwmvdbg("FTM%d PCLK: %d frequency: %d FTMCLK: %d prescaler: %d modulo: %d c0v: %d\n",
pwminfo("FTM%d PCLK: %d frequency: %d FTMCLK: %d prescaler: %d modulo: %d c0v: %d\n",
priv->tpmid, priv->pclk, info->frequency, tpmclk,
presc_values[prescaler], modulo, cv);
@@ -570,7 +570,7 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
regval |= SIM_SCGC3_FTM2;
putreg32(regval, KINETIS_SIM_SCGC3);
pwmvdbg("FTM%d pincfg: %08x\n", priv->tpmid, priv->pincfg);
pwminfo("FTM%d pincfg: %08x\n", priv->tpmid, priv->pincfg);
pwm_dumpregs(priv, "Initially");
/* Configure the PWM output pin, but do not start the timer yet */
@@ -601,7 +601,7 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
FAR struct kinetis_pwmtimer_s *priv = (FAR struct kinetis_pwmtimer_s *)dev;
uint32_t pincfg;
pwmvdbg("FTM%d pincfg: %08x\n", priv->tpmid, priv->pincfg);
pwminfo("FTM%d pincfg: %08x\n", priv->tpmid, priv->pincfg);
/* Make sure that the output has been stopped */
@@ -661,7 +661,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
FAR struct kinetis_pwmtimer_s *priv = (FAR struct kinetis_pwmtimer_s *)dev;
irqstate_t flags;
pwmvdbg("FTM%d\n", priv->tpmid);
pwminfo("FTM%d\n", priv->tpmid);
/* Disable interrupts momentary to stop any ongoing timer processing and
* to prevent any concurrent access to the reset register.
@@ -744,7 +744,7 @@ static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg
/* There are no platform-specific ioctl commands */
pwmvdbg("FTM%d\n", priv->tpmid);
pwminfo("FTM%d\n", priv->tpmid);
#endif
return -ENOTTY;
}
@@ -772,7 +772,7 @@ FAR struct pwm_lowerhalf_s *kinetis_pwminitialize(int timer)
{
FAR struct kinetis_pwmtimer_s *lower;
pwmvdbg("FTM%d\n", timer);
pwminfo("FTM%d\n", timer);
switch (timer)
{
arch/arm/src/kinetis/kinetis_sdhc.c
+22 -22
View File
@@ -791,7 +791,7 @@ static void kinetis_transmit(struct kinetis_dev_s *priv)
* ready (BWR)
*/
fllvdbg("Entry: remaining: %d IRQSTAT: %08x\n",
fllinfo("Entry: remaining: %d IRQSTAT: %08x\n",
priv->remaining, getreg32(KINETIS_SDHC_IRQSTAT));
while (priv->remaining > 0 &&
@@ -837,7 +837,7 @@ static void kinetis_transmit(struct kinetis_dev_s *priv)
putreg32(data.w, KINETIS_SDHC_DATPORT);
}
fllvdbg("Exit: remaining: %d IRQSTAT: %08x\n",
fllinfo("Exit: remaining: %d IRQSTAT: %08x\n",
priv->remaining, getreg32(KINETIS_SDHC_IRQSTAT));
}
@@ -877,7 +877,7 @@ static void kinetis_receive(struct kinetis_dev_s *priv)
* ready (BRR)
*/
fllvdbg("Entry: remaining: %d IRQSTAT: %08x\n",
fllinfo("Entry: remaining: %d IRQSTAT: %08x\n",
priv->remaining, getreg32(KINETIS_SDHC_IRQSTAT));
while (priv->remaining > 0 &&
@@ -929,7 +929,7 @@ static void kinetis_receive(struct kinetis_dev_s *priv)
putreg32(watermark << SDHC_WML_RD_SHIFT, KINETIS_SDHC_WML);
fllvdbg("Exit: remaining: %d IRQSTAT: %08x WML: %08x\n",
fllinfo("Exit: remaining: %d IRQSTAT: %08x WML: %08x\n",
priv->remaining, getreg32(KINETIS_SDHC_IRQSTAT),
getreg32(KINETIS_SDHC_WML));
@@ -1105,7 +1105,7 @@ static int kinetis_interrupt(int irq, void *context)
regval = getreg32(KINETIS_SDHC_IRQSIGEN);
enabled = getreg32(KINETIS_SDHC_IRQSTAT) & regval;
fllvdbg("IRQSTAT: %08x IRQSIGEN %08x enabled: %08x\n",
fllinfo("IRQSTAT: %08x IRQSIGEN %08x enabled: %08x\n",
getreg32(KINETIS_SDHC_IRQSTAT), regval, enabled);
/* Disable card interrupts to clear the card interrupt to the host system. */
@@ -1289,7 +1289,7 @@ static void kinetis_reset(FAR struct sdio_dev_s *dev)
putreg32(SDHC_INT_ALL, KINETIS_SDHC_IRQSTATEN);
fvdbg("SYSCTL: %08x PRSSTAT: %08x IRQSTATEN: %08x\n",
finfo("SYSCTL: %08x PRSSTAT: %08x IRQSTATEN: %08x\n",
getreg32(KINETIS_SDHC_SYSCTL), getreg32(KINETIS_SDHC_PRSSTAT),
getreg32(KINETIS_SDHC_IRQSTATEN));
@@ -1504,7 +1504,7 @@ static void kinetis_frequency(FAR struct sdio_dev_s *dev, uint32_t frequency)
regval |= (SDHC_SYSCTL_SDCLKEN | SDHC_SYSCTL_PEREN | SDHC_SYSCTL_HCKEN |
SDHC_SYSCTL_IPGEN);
putreg32(regval, KINETIS_SDHC_SYSCTL);
fvdbg("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
finfo("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
}
#endif
@@ -1538,7 +1538,7 @@ static void kinetis_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
regval = getreg32(KINETIS_SDHC_SYSCTL);
regval &= ~SDHC_SYSCTL_SDCLKEN;
putreg32(regval, KINETIS_SDHC_SYSCTL);
fvdbg("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
finfo("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
switch (rate)
{
@@ -1552,7 +1552,7 @@ static void kinetis_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
regval &= ~(SDHC_SYSCTL_IPGEN | SDHC_SYSCTL_HCKEN | SDHC_SYSCTL_PEREN |
SDHC_SYSCTL_SDCLKFS_MASK | SDHC_SYSCTL_DVS_MASK);
putreg32(regval, KINETIS_SDHC_SYSCTL);
fvdbg("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
finfo("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
return;
}
@@ -1593,7 +1593,7 @@ static void kinetis_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
regval = getreg32(KINETIS_SDHC_SYSCTL);
regval &= ~SDHC_SYSCTL_SDCLKEN;
putreg32(regval, KINETIS_SDHC_SYSCTL);
fvdbg("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
finfo("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
/* Clear the old prescaler and divisor values so that new ones can be ORed
* in.
@@ -1619,7 +1619,7 @@ static void kinetis_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
regval &= ~(SDHC_SYSCTL_IPGEN | SDHC_SYSCTL_HCKEN | SDHC_SYSCTL_PEREN);
putreg32(regval, KINETIS_SDHC_SYSCTL);
fvdbg("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
finfo("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
return;
}
@@ -1653,7 +1653,7 @@ static void kinetis_clock(FAR struct sdio_dev_s *dev, enum sdio_clock_e rate)
}
putreg32(regval, KINETIS_SDHC_SYSCTL);
fvdbg("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
finfo("SYSCTRL: %08x\n", getreg32(KINETIS_SDHC_SYSCTL));
}
#endif
@@ -1824,7 +1824,7 @@ static int kinetis_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t ar
/* Other bits? What about CMDTYP? */
fvdbg("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
finfo("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
/* The Command Inhibit (CIHB) bit is set in the PRSSTAT bit immediately
* after the transfer type register is written. This bit is cleared when
@@ -2486,7 +2486,7 @@ static void kinetis_callbackenable(FAR struct sdio_dev_s *dev,
{
struct kinetis_dev_s *priv = (struct kinetis_dev_s *)dev;
fvdbg("eventset: %02x\n", eventset);
finfo("eventset: %02x\n", eventset);
DEBUGASSERT(priv != NULL);
priv->cbevents = eventset;
@@ -2522,7 +2522,7 @@ static int kinetis_registercallback(FAR struct sdio_dev_s *dev,
/* Disable callbacks and register this callback and is argument */
fvdbg("Register %p(%p)\n", callback, arg);
finfo("Register %p(%p)\n", callback, arg);
DEBUGASSERT(priv != NULL);
priv->cbevents = 0;
@@ -2694,7 +2694,7 @@ static void kinetis_callback(void *arg)
/* Is a callback registered? */
DEBUGASSERT(priv != NULL);
fvdbg("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
finfo("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
priv->callback, priv->cbarg, priv->cbevents, priv->cdstatus);
if (priv->callback)
@@ -2739,14 +2739,14 @@ static void kinetis_callback(void *arg)
{
/* Yes.. queue it */
fvdbg("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
finfo("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
(void)work_queue(HPWORK, &priv->cbwork, (worker_t)priv->callback, priv->cbarg, 0);
}
else
{
/* No.. then just call the callback here */
fvdbg("Callback to %p(%p)\n", priv->callback, priv->cbarg);
finfo("Callback to %p(%p)\n", priv->callback, priv->cbarg);
priv->callback(priv->cbarg);
}
}
@@ -2792,7 +2792,7 @@ FAR struct sdio_dev_s *sdhc_initialize(int slotno)
regval = getreg32(KINETIS_SIM_SCGC3);
regval |= SIM_SCGC3_SDHC;
putreg32(regval, KINETIS_SIM_SCGC3);
fvdbg("SIM_SCGC3: %08x\n", regval);
finfo("SIM_SCGC3: %08x\n", regval);
/* In addition to the system clock, the SDHC module needs a clock for the
* base for the external card clock. There are four possible sources for
@@ -2808,7 +2808,7 @@ FAR struct sdio_dev_s *sdhc_initialize(int slotno)
regval &= ~SIM_SOPT2_SDHCSRC_MASK;
regval |= SIM_SOPT2_SDHCSRC_CORE;
putreg32(regval, KINETIS_SIM_SOPT2);
fvdbg("SIM_SOPT2: %08x\n", regval);
finfo("SIM_SOPT2: %08x\n", regval);
/* Configure pins for 1 or 4-bit, wide-bus operation (the chip is capable
* of 8-bit wide bus operation but D4-D7 are not configured).
@@ -2892,7 +2892,7 @@ void sdhc_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
priv->cdstatus &= ~SDIO_STATUS_PRESENT;
}
fvdbg("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
finfo("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
/* Perform any requested callback if the status has changed */
@@ -2937,7 +2937,7 @@ void sdhc_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect)
priv->cdstatus &= ~SDIO_STATUS_WRPROTECTED;
}
fvdbg("cdstatus: %02x\n", priv->cdstatus);
finfo("cdstatus: %02x\n", priv->cdstatus);
leave_critical_section(flags);
}
#endif /* CONFIG_KINETIS_SDHC */
arch/arm/src/kinetis/kinetis_usbdev.c
+13 -13
View File
@@ -371,9 +371,9 @@ const struct trace_msg_t g_usb_trace_strings_deverror[] =
# define regdbg lldbg
# ifdef CONFIG_DEBUG_INFO
# define regvdbg lldbg
# define reginfo lldbg
# else
# define regvdbg(x...)
# define reginfo(x...)
# endif
#else
@@ -381,7 +381,7 @@ const struct trace_msg_t g_usb_trace_strings_deverror[] =
# define khci_getreg(addr) getreg8(addr)
# define khci_putreg(val,addr) putreg8(val,addr)
# define regdbg(x...)
# define regvdbg(x...)
# define reginfo(x...)
#endif
@@ -391,15 +391,15 @@ const struct trace_msg_t g_usb_trace_strings_deverror[] =
# define bdtdbg lldbg
# ifdef CONFIG_DEBUG_INFO
# define bdtvdbg lldbg
# define bdtinfo lldbg
# else
# define bdtvdbg(x...)
# define bdtinfo(x...)
# endif
#else
# define bdtdbg(x...)
# define bdtvdbg(x...)
# define bdtinfo(x...)
#endif
@@ -987,10 +987,10 @@ static void khci_wrcomplete(struct khci_usbdev_s *priv,
epno = USB_EPNO(privep->ep.eplog);
#ifdef CONFIG_USBDEV_NOWRITEAHEAD
ullvdbg("EP%d: len=%d xfrd=%d inflight=%d\n",
ullinfo("EP%d: len=%d xfrd=%d inflight=%d\n",
epno, privreq->req.len, privreq->req.xfrd, privreq->inflight[0]);
#else
ullvdbg("EP%d: len=%d xfrd=%d inflight={%d, %d}\n",
ullinfo("EP%d: len=%d xfrd=%d inflight={%d, %d}\n",
epno, privreq->req.len, privreq->req.xfrd,
privreq->inflight[0], privreq->inflight[1]);
#endif
@@ -1303,7 +1303,7 @@ static int khci_wrstart(struct khci_usbdev_s *priv,
bytesleft = privreq->req.len;
}
ullvdbg("epno=%d req=%p: len=%d xfrd=%d index=%d nullpkt=%d\n",
ullinfo("epno=%d req=%p: len=%d xfrd=%d index=%d nullpkt=%d\n",
epno, privreq, privreq->req.len, xfrd, index, privep->txnullpkt);
/* Get the number of bytes left to be sent in the packet */
@@ -1417,7 +1417,7 @@ static int khci_rdcomplete(struct khci_usbdev_s *priv,
bdtout = privep->bdtout;
epno = USB_EPNO(privep->ep.eplog);
ullvdbg("EP%d: len=%d xfrd=%d\n",
ullinfo("EP%d: len=%d xfrd=%d\n",
epno, privreq->req.len, privreq->req.xfrd);
bdtdbg("EP%d BDT OUT [%p] {%08x, %08x}\n",
epno, bdtout, bdtout->status, bdtout->addr);
@@ -1705,7 +1705,7 @@ static int khci_rdrequest(struct khci_usbdev_s *priv,
return OK;
}
ullvdbg("EP%d: len=%d\n", USB_EPNO(privep->ep.eplog), privreq->req.len);
ullinfo("EP%d: len=%d\n", USB_EPNO(privep->ep.eplog), privreq->req.len);
/* Ignore any attempt to receive a zero length packet */
@@ -1995,7 +1995,7 @@ static void khci_ep0setup(struct khci_usbdev_s *priv)
index.w = GETUINT16(priv->ctrl.index);
len.w = GETUINT16(priv->ctrl.len);
ullvdbg("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
ullinfo("SETUP: type=%02x req=%02x value=%04x index=%04x len=%04x\n",
priv->ctrl.type, priv->ctrl.req, value.w, index.w, len.w);
/* Dispatch any non-standard requests */
@@ -2239,7 +2239,7 @@ static void khci_ep0setup(struct khci_usbdev_s *priv)
{
/* Special case recipient=device test mode */
ullvdbg("test mode: %d\n", index.w);
ullinfo("test mode: %d\n", index.w);
}
else
{
arch/arm/src/kl/kl_idle.c
+1 -1
View File
@@ -103,7 +103,7 @@ static void up_idlepm(void)
/* Perform board-specific, state-dependent logic here */
llvdbg("newstate= %d oldstate=%d\n", newstate, oldstate);
llinfo("newstate= %d oldstate=%d\n", newstate, oldstate);
/* Then force the global state change */
arch/arm/src/kl/kl_pwm.c
+22 -22
View File
@@ -83,19 +83,19 @@
# define pwmdbg dbg
# define pwmlldbg lldbg
# ifdef CONFIG_DEBUG_INFO
# define pwmvdbg vdbg
# define pwmllvdbg llvdbg
# define pwminfo info
# define pwmllinfo llinfo
# define pwm_dumpgpio(p,m) kl_dumpgpio(p,m)
# else
# define pwmvdbg(x...)
# define pwmllvdbg(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
# endif
#else
# define pwmdbg(x...)
# define pwmlldbg(x...)
# define pwmvdbg(x...)
# define pwmllvdbg(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
#endif
@@ -258,25 +258,25 @@ static void pwm_dumpregs(struct kl_pwmtimer_s *priv, FAR const char *msg)
{
int nchannels = (priv->tpmid == 0) ? 6 : 2;
pwmvdbg("%s:\n", msg);
pwmvdbg(" TPM%d_SC: %04x TPM%d_CNT: %04x TPM%d_MOD: %04x\n",
pwminfo("%s:\n", msg);
pwminfo(" TPM%d_SC: %04x TPM%d_CNT: %04x TPM%d_MOD: %04x\n",
priv->tpmid,
pwm_getreg(priv, TPM_SC_OFFSET),
priv->tpmid,
pwm_getreg(priv, TPM_CNT_OFFSET),
priv->tpmid,
pwm_getreg(priv, TPM_MOD_OFFSET));
pwmvdbg(" TPM%d_STATUS: %04x TPM%d_CONF: %04x\n",
pwminfo(" TPM%d_STATUS: %04x TPM%d_CONF: %04x\n",
priv->tpmid,
pwm_getreg(priv, TPM_STATUS_OFFSET),
priv->tpmid,
pwm_getreg(priv, TPM_CONF_OFFSET));
pwmvdbg(" TPM%d_C0SC: %04x TPM%d_C0V: %04x\n",
pwminfo(" TPM%d_C0SC: %04x TPM%d_C0V: %04x\n",
priv->tpmid,
pwm_getreg(priv, TPM_C0SC_OFFSET),
priv->tpmid,
pwm_getreg(priv, TPM_C0V_OFFSET));
pwmvdbg(" TPM%d_C1SC: %04x TPM%d_C1V: %04x\n",
pwminfo(" TPM%d_C1SC: %04x TPM%d_C1V: %04x\n",
priv->tpmid,
pwm_getreg(priv, TPM_C1SC_OFFSET),
priv->tpmid,
@@ -284,7 +284,7 @@ static void pwm_dumpregs(struct kl_pwmtimer_s *priv, FAR const char *msg)
if (nchannels >= 3)
{
pwmvdbg(" TPM%d_C2SC: %04x TPM%d_C2V: %04x\n",
pwminfo(" TPM%d_C2SC: %04x TPM%d_C2V: %04x\n",
priv->tpmid,
pwm_getreg(priv, TPM_C2SC_OFFSET),
priv->tpmid,
@@ -293,7 +293,7 @@ static void pwm_dumpregs(struct kl_pwmtimer_s *priv, FAR const char *msg)
if (nchannels >= 4)
{
pwmvdbg(" TPM%d_C3SC: %04x TPM%d_C3V: %04x\n",
pwminfo(" TPM%d_C3SC: %04x TPM%d_C3V: %04x\n",
priv->tpmid,
pwm_getreg(priv, TPM_C3SC_OFFSET),
priv->tpmid,
@@ -302,7 +302,7 @@ static void pwm_dumpregs(struct kl_pwmtimer_s *priv, FAR const char *msg)
if (nchannels >= 5)
{
pwmvdbg(" TPM%d_C4SC: %04x TPM%d_C4V: %04x\n",
pwminfo(" TPM%d_C4SC: %04x TPM%d_C4V: %04x\n",
priv->tpmid,
pwm_getreg(priv, TPM_C4SC_OFFSET),
priv->tpmid,
@@ -311,7 +311,7 @@ static void pwm_dumpregs(struct kl_pwmtimer_s *priv, FAR const char *msg)
if (nchannels >= 6)
{
pwmvdbg(" TPM%d_C5SC: %04x TPM%d_C5V: %04x\n",
pwminfo(" TPM%d_C5SC: %04x TPM%d_C5V: %04x\n",
priv->tpmid,
pwm_getreg(priv, TPM_C5SC_OFFSET),
priv->tpmid,
@@ -353,7 +353,7 @@ static int pwm_timer(FAR struct kl_pwmtimer_s *priv,
DEBUGASSERT(priv != NULL && info != NULL);
pwmvdbg("TPM%d channel: %d frequency: %d duty: %08x\n",
pwminfo("TPM%d channel: %d frequency: %d duty: %08x\n",
priv->tpmid, priv->channel, info->frequency, info->duty);
DEBUGASSERT(info->frequency > 0 && info->duty > 0 &&
@@ -423,7 +423,7 @@ static int pwm_timer(FAR struct kl_pwmtimer_s *priv,
cv = b16toi(info->duty * modulo + b16HALF);
pwmvdbg("TPM%d PCLK: %d frequency: %d TPMCLK: %d prescaler: %d modulo: %d c0v: %d\n",
pwminfo("TPM%d PCLK: %d frequency: %d TPMCLK: %d prescaler: %d modulo: %d c0v: %d\n",
priv->tpmid, priv->pclk, info->frequency, tpmclk,
presc_values[prescaler], modulo, cv);
@@ -530,7 +530,7 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
regval |= SIM_SCGC6_TPM0 | SIM_SCGC6_TPM1 | SIM_SCGC6_TPM2;
putreg32(regval, KL_SIM_SCGC6);
pwmvdbg("TPM%d pincfg: %08x\n", priv->tpmid, priv->pincfg);
pwminfo("TPM%d pincfg: %08x\n", priv->tpmid, priv->pincfg);
pwm_dumpregs(priv, "Initially");
/* Configure the PWM output pin, but do not start the timer yet */
@@ -561,7 +561,7 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
FAR struct kl_pwmtimer_s *priv = (FAR struct kl_pwmtimer_s *)dev;
uint32_t pincfg;
pwmvdbg("TPM%d pincfg: %08x\n", priv->tpmid, priv->pincfg);
pwminfo("TPM%d pincfg: %08x\n", priv->tpmid, priv->pincfg);
/* Make sure that the output has been stopped */
@@ -621,7 +621,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
FAR struct kl_pwmtimer_s *priv = (FAR struct kl_pwmtimer_s *)dev;
irqstate_t flags;
pwmvdbg("TPM%d\n", priv->tpmid);
pwminfo("TPM%d\n", priv->tpmid);
/* Disable interrupts momentary to stop any ongoing timer processing and
* to prevent any concurrent access to the reset register.
@@ -696,7 +696,7 @@ static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg
/* There are no platform-specific ioctl commands */
pwmvdbg("TPM%d\n", priv->tpmid);
pwminfo("TPM%d\n", priv->tpmid);
#endif
return -ENOTTY;
}
@@ -724,7 +724,7 @@ FAR struct pwm_lowerhalf_s *kl_pwminitialize(int timer)
{
FAR struct kl_pwmtimer_s *lower;
pwmvdbg("TPM%d\n", timer);
pwminfo("TPM%d\n", timer);
switch (timer)
{
arch/arm/src/kl/kl_spi.c
+7 -7
View File
@@ -73,13 +73,13 @@
#ifdef CONFIG_DEBUG_SPI
# define spidbg lldbg
# ifdef CONFIG_DEBUG_INFO
# define spivdbg lldbg
# define spiinfo lldbg
# else
# define spivdbg(x...)
# define spiinfo(x...)
# endif
#else
# define spidbg(x...)
# define spivdbg(x...)
# define spiinfo(x...)
#endif
/****************************************************************************
@@ -388,7 +388,7 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
FAR struct kl_spidev_s *priv = (FAR struct kl_spidev_s *)dev;
uint8_t regval;
spivdbg("mode=%d\n", mode);
spiinfo("mode=%d\n", mode);
/* Has the mode changed? */
@@ -519,7 +519,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
FAR uint8_t *txptr = (FAR uint8_t *)txbuffer;
uint8_t data;
spivdbg("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
spiinfo("txbuffer=%p rxbuffer=%p nwords=%d\n", txbuffer, rxbuffer, nwords);
/* Loop, sending each word in the user-provied data buffer. */
@@ -585,7 +585,7 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
size_t nwords)
{
spivdbg("txbuffer=%p nwords=%d\n", txbuffer, nwords);
spiinfo("txbuffer=%p nwords=%d\n", txbuffer, nwords);
return spi_exchange(dev, txbuffer, NULL, nwords);
}
#endif
@@ -612,7 +612,7 @@ static void spi_sndblock(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
#ifndef CONFIG_SPI_EXCHANGE
static void spi_recvblock(FAR struct spi_dev_s *dev, FAR void *rxbuffer, size_t nwords)
{
spivdbg("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
spiinfo("rxbuffer=%p nwords=%d\n", rxbuffer, nwords);
return spi_exchange(dev, NULL, rxbuffer, nwords);
}
#endif
arch/arm/src/lpc11xx/lpc11_serial.c
+1 -1
View File
@@ -630,7 +630,7 @@ static int up_interrupt(int irq, void *context)
/* Read the line status register (LSR) to clear */
status = up_serialin(priv, LPC11_UART_LSR_OFFSET);
vdbg("LSR: %02x\n", status);
info("LSR: %02x\n", status);
break;
}
arch/arm/src/lpc11xx/lpc11_spi.c
+3 -3
View File
@@ -82,13 +82,13 @@
#ifdef CONFIG_DEBUG_SPI
# define spidbg lldbg
# ifdef CONFIG_DEBUG_INFO
# define spivdbg lldbg
# define spiinfo lldbg
# else
# define spivdbg(x...)
# define spiinfo(x...)
# endif
#else
# define spidbg(x...)
# define spivdbg(x...)
# define spiinfo(x...)
#endif
/* SSP Clocking *************************************************************/
arch/arm/src/lpc11xx/lpc11_ssp.c
+5 -5
View File
@@ -83,13 +83,13 @@
#ifdef CONFIG_DEBUG_SPI
# define sspdbg lldbg
# ifdef CONFIG_DEBUG_INFO
# define spivdbg lldbg
# define spiinfo lldbg
# else
# define spivdbg(x...)
# define spiinfo(x...)
# endif
#else
# define sspdbg(x...)
# define spivdbg(x...)
# define spiinfo(x...)
#endif
/* SSP Clocking *************************************************************/
@@ -754,7 +754,7 @@ static void ssp_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
* and (3) there are more bytes to be sent.
*/
spivdbg("TX: rxpending: %d nwords: %d\n", rxpending, nwords);
spiinfo("TX: rxpending: %d nwords: %d\n", rxpending, nwords);
while ((ssp_getreg(priv, LPC11_SSP_SR_OFFSET) & SSP_SR_TNF) &&
(rxpending < LPC11_SSP_FIFOSZ) && nwords)
{
@@ -767,7 +767,7 @@ static void ssp_recvblock(FAR struct spi_dev_s *dev, FAR void *buffer,
* empty.
*/
spivdbg("RX: rxpending: %d\n", rxpending);
spiinfo("RX: rxpending: %d\n", rxpending);
while (ssp_getreg(priv, LPC11_SSP_SR_OFFSET) & SSP_SR_RNE)
{
data = (uint8_t)ssp_getreg(priv, LPC11_SSP_DR_OFFSET);
arch/arm/src/lpc11xx/lpc11_timer.c
+6 -6
View File
@@ -92,19 +92,19 @@
# define pwmdbg dbg
# define pwmlldbg lldbg
# ifdef CONFIG_DEBUG_INFO
# define pwmvdbg vdbg
# define pwmllvdbg llvdbg
# define pwminfo info
# define pwmllinfo llinfo
# define pwm_dumpgpio(p,m) stm32_dumpgpio(p,m)
# else
# define pwmvdbg(x...)
# define pwmllvdbg(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
# endif
#else
# define pwmdbg(x...)
# define pwmlldbg(x...)
# define pwmvdbg(x...)
# define pwmllvdbg(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
#endif
arch/arm/src/lpc17xx/lpc176x_rtc.c
+4 -4
View File
@@ -82,14 +82,14 @@
#ifdef CONFIG_DEBUG_RTC
# define rtcdbg dbg
# define rtcvdbg vdbg
# define rtcinfo info
# define rtclldbg lldbg
# define rtcllvdbg llvdbg
# define rtcllinfo llinfo
#else
# define rtcdbg(x...)
# define rtcvdbg(x...)
# define rtcinfo(x...)
# define rtclldbg(x...)
# define rtcllvdbg(x...)
# define rtcllinfo(x...)
#endif
/************************************************************************************
arch/arm/src/lpc17xx/lpc17_can.c
+17 -17
View File
@@ -167,18 +167,18 @@
#ifdef CONFIG_DEBUG_CAN
# ifdef CONFIG_CAN_REGDEBUG
# define candbg lldbg
# define canvdbg llvdbg
# define caninfo llinfo
# else
# define candbg dbg
# define canvdbg vdbg
# define caninfo info
# endif
# define canlldbg lldbg
# define canllvdbg llvdbg
# define canllinfo llinfo
#else
# define candbg(x...)
# define canvdbg(x...)
# define caninfo(x...)
# define canlldbg(x...)
# define canllvdbg(x...)
# define canllinfo(x...)
#endif
/* Timing *******************************************************************/
@@ -504,7 +504,7 @@ static void can_reset(FAR struct can_dev_s *dev)
irqstate_t flags;
int ret;
canvdbg("CAN%d\n", priv->port);
caninfo("CAN%d\n", priv->port);
flags = enter_critical_section();
@@ -558,7 +558,7 @@ static int can_setup(FAR struct can_dev_s *dev)
#endif
int ret;
canvdbg("CAN%d\n", priv->port);
caninfo("CAN%d\n", priv->port);
ret = irq_attach(LPC17_IRQ_CAN, can12_interrupt);
if (ret == OK)
@@ -588,7 +588,7 @@ static void can_shutdown(FAR struct can_dev_s *dev)
#ifdef CONFIG_DEBUG_CAN
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->cd_priv;
canvdbg("CAN%d\n", priv->port);
caninfo("CAN%d\n", priv->port);
#endif
up_disable_irq(LPC17_IRQ_CAN);
@@ -615,7 +615,7 @@ static void can_rxint(FAR struct can_dev_s *dev, bool enable)
uint32_t regval;
irqstate_t flags;
canvdbg("CAN%d enable: %d\n", priv->port, enable);
caninfo("CAN%d enable: %d\n", priv->port, enable);
/* The EIR register is also modifed from the interrupt handler, so we have
* to protect this code section.
@@ -656,7 +656,7 @@ static void can_txint(FAR struct can_dev_s *dev, bool enable)
uint32_t regval;
irqstate_t flags;
canvdbg("CAN%d enable: %d\n", priv->port, enable);
caninfo("CAN%d enable: %d\n", priv->port, enable);
/* Only disabling of the TX interrupt is supported here. The TX interrupt
* is automatically enabled just before a message is sent in order to avoid
@@ -753,7 +753,7 @@ static int can_send(FAR struct can_dev_s *dev, FAR struct can_msg_s *msg)
irqstate_t flags;
int ret = OK;
canvdbg("CAN%d ID: %d DLC: %d\n",
caninfo("CAN%d ID: %d DLC: %d\n",
priv->port, msg->cm_hdr.ch_id, msg->cm_hdr.ch_dlc);
if (msg->cm_hdr.ch_rtr)
@@ -958,7 +958,7 @@ static void can_interrupt(FAR struct can_dev_s *dev)
/* Read the interrupt and capture register (also clearing most status bits) */
regval = can_getreg(priv, LPC17_CAN_ICR_OFFSET);
canllvdbg("CAN%d ICR: %08x\n", priv->port, regval);
canllinfo("CAN%d ICR: %08x\n", priv->port, regval);
/* Check for a receive interrupt */
@@ -1065,7 +1065,7 @@ static int can12_interrupt(int irq, void *context)
{
/* Handle CAN1/2 interrupts */
canllvdbg("irq: %d\n", irq);
canllinfo("irq: %d\n", irq);
#ifdef CONFIG_LPC17_CAN1
can_interrupt(&g_can1dev);
@@ -1142,7 +1142,7 @@ static int can_bittiming(struct up_dev_s *priv)
uint32_t ts2;
uint32_t sjw;
canllvdbg("CAN%d PCLK: %d baud: %d\n", priv->port,
canllinfo("CAN%d PCLK: %d baud: %d\n", priv->port,
CAN_CLOCK_FREQUENCY(priv->divisor), priv->baud);
/* Try to get CAN_BIT_QUANTA quanta in one bit_time.
@@ -1195,7 +1195,7 @@ static int can_bittiming(struct up_dev_s *priv)
sjw = 1;
canllvdbg("TS1: %d TS2: %d BRP: %d SJW= %d\n", ts1, ts2, brp, sjw);
canllinfo("TS1: %d TS2: %d BRP: %d SJW= %d\n", ts1, ts2, brp, sjw);
/* Configure bit timing */
@@ -1212,7 +1212,7 @@ static int can_bittiming(struct up_dev_s *priv)
btr |= CAN_BTR_SAM;
#endif
canllvdbg("Setting CANxBTR= 0x%08x\n", btr);
canllinfo("Setting CANxBTR= 0x%08x\n", btr);
can_putreg(priv, LPC17_CAN_BTR_OFFSET, btr); /* Set bit timing */
return OK;
}
@@ -1240,7 +1240,7 @@ FAR struct can_dev_s *lpc17_caninitialize(int port)
irqstate_t flags;
uint32_t regval;
canllvdbg("CAN%d\n", port);
canllinfo("CAN%d\n", port);
flags = enter_critical_section();
arch/arm/src/lpc17xx/lpc17_ethernet.c
+8 -8
View File
@@ -906,7 +906,7 @@ static void lpc17_rxdone_process(struct lpc17_driver_s *priv)
#ifdef CONFIG_NET_IPv4
if (BUF->type == HTONS(ETHTYPE_IP))
{
nllvdbg("IPv4 frame\n");
nllinfo("IPv4 frame\n");
NETDEV_RXIPV4(&priv->lp_dev);
/* Handle ARP on input then give the IPv4 packet to the
@@ -948,7 +948,7 @@ static void lpc17_rxdone_process(struct lpc17_driver_s *priv)
#ifdef CONFIG_NET_IPv6
if (BUF->type == HTONS(ETHTYPE_IP6))
{
nllvdbg("Iv6 frame\n");
nllinfo("Iv6 frame\n");
NETDEV_RXIPV6(&priv->lp_dev);
/* Give the IPv6 packet to the network layer */
@@ -1671,7 +1671,7 @@ static void lpc17_ipv6multicast(FAR struct lpc17_driver_s *priv)
mac[4] = tmp16 & 0xff;
mac[5] = tmp16 >> 8;
nvdbg("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
ninfo("IPv6 Multicast: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
(void)lpc17_addmac(dev, mac);
@@ -2145,7 +2145,7 @@ static int lpc17_addmac(struct net_driver_s *dev, const uint8_t *mac)
uint32_t crc;
unsigned int ndx;
nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
nllinfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
/* Hash function:
@@ -2221,7 +2221,7 @@ static int lpc17_rmmac(struct net_driver_s *dev, const uint8_t *mac)
uint32_t crc;
unsigned int ndx;
nllvdbg("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
nllinfo("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n",
mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
/* Hash function:
@@ -2647,14 +2647,14 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
*/
phyreg = (unsigned int)lpc17_phyread(phyaddr, MII_PHYID1);
nvdbg("Addr: %d PHY ID1: %04x\n", phyaddr, phyreg);
ninfo("Addr: %d PHY ID1: %04x\n", phyaddr, phyreg);
/* Compare OUI bits 3-18 */
if (phyreg == LPC17_PHYID1)
{
phyreg = lpc17_phyread(phyaddr, MII_PHYID2);
nvdbg("Addr: %d PHY ID2: %04x\n", phyaddr, phyreg);
ninfo("Addr: %d PHY ID2: %04x\n", phyaddr, phyreg);
/* Compare OUI bits 19-24 and the 6-bit model number (ignoring the
* 4-bit revision number).
@@ -2676,7 +2676,7 @@ static inline int lpc17_phyinit(struct lpc17_driver_s *priv)
ndbg("No PHY detected\n");
return -ENODEV;
}
nvdbg("phyaddr: %d\n", phyaddr);
ninfo("phyaddr: %d\n", phyaddr);
/* Save the discovered PHY device address */
arch/arm/src/lpc17xx/lpc17_lcd.c
+19 -19
View File
@@ -202,7 +202,7 @@ struct fb_vtable_s g_fbobject =
static int lpc17_getvideoinfo(FAR struct fb_vtable_s *vtable,
FAR struct fb_videoinfo_s *vinfo)
{
gvdbg("vtable=%p vinfo=%p\n", vtable, vinfo);
ginfo("vtable=%p vinfo=%p\n", vtable, vinfo);
if (vtable && vinfo)
{
memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
@@ -220,7 +220,7 @@ static int lpc17_getvideoinfo(FAR struct fb_vtable_s *vtable,
static int lpc17_getplaneinfo(FAR struct fb_vtable_s *vtable, int planeno,
FAR struct fb_planeinfo_s *pinfo)
{
gvdbg("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo);
ginfo("vtable=%p planeno=%d pinfo=%p\n", vtable, planeno, pinfo);
if (vtable && planeno == 0 && pinfo)
{
memcpy(pinfo, &g_planeinfo, sizeof(struct fb_planeinfo_s));
@@ -244,7 +244,7 @@ static int lpc17_getcmap(FAR struct fb_vtable_s *vtable,
int last;
int i;
gvdbg("vtable=%p cmap=%p first=%d len=%d\n",
ginfo("vtable=%p cmap=%p first=%d len=%d\n",
vtable, cmap, cmap->first, cmap->len);
DEBUGASSERT(vtable && cmap &&
@@ -319,7 +319,7 @@ static int lpc17_putcmap(FAR struct fb_vtable_s *vtable,
int last;
int i;
gvdbg("vtable=%p cmap=%p first=%d len=%d\n",
ginfo("vtable=%p cmap=%p first=%d len=%d\n",
vtable, cmap, cmap->first, cmap->len);
DEBUGASSERT(vtable && cmap);
@@ -383,21 +383,21 @@ static int lpc17_putcmap(FAR struct fb_vtable_s *vtable,
static int lpc17_getcursor(FAR struct fb_vtable_s *vtable,
FAR struct fb_cursorattrib_s *attrib)
{
gvdbg("vtable=%p attrib=%p\n", vtable, attrib);
ginfo("vtable=%p attrib=%p\n", vtable, attrib);
if (vtable && attrib)
{
#ifdef CONFIG_FB_HWCURSORIMAGE
attrib->fmt = LPC17_COLOR_FMT;
#endif
gvdbg("pos: (x=%d, y=%d)\n", g_cpos.x, g_cpos.y);
ginfo("pos: (x=%d, y=%d)\n", g_cpos.x, g_cpos.y);
attrib->pos = g_cpos;
#ifdef CONFIG_FB_HWCURSORSIZE
attrib->mxsize.h = CONFIG_LPC17_LCD_VHEIGHT;
attrib->mxsize.w = CONFIG_LPC17_LCD_HWIDTH;
gvdbg("size: (h=%d, w=%d)\n", g_csize.h, g_csize.w);
ginfo("size: (h=%d, w=%d)\n", g_csize.h, g_csize.w);
attrib->size = g_csize;
#endif
return OK;
@@ -416,26 +416,26 @@ static int lpc17_getcursor(FAR struct fb_vtable_s *vtable,
static int lpc17_setcursor(FAR struct fb_vtable_s *vtable,
FAR struct fb_setcursor_s *setttings)
{
gvdbg("vtable=%p setttings=%p\n", vtable, setttings);
ginfo("vtable=%p setttings=%p\n", vtable, setttings);
if (vtable && setttings)
{
gvdbg("flags: %02x\n", settings->flags);
ginfo("flags: %02x\n", settings->flags);
if ((flags & FB_CUR_SETPOSITION) != 0)
{
g_cpos = settings->pos;
gvdbg("pos: (h:%d, w:%d)\n", g_cpos.x, g_cpos.y);
ginfo("pos: (h:%d, w:%d)\n", g_cpos.x, g_cpos.y);
}
#ifdef CONFIG_FB_HWCURSORSIZE
if ((flags & FB_CUR_SETSIZE) != 0)
{
g_csize = settings->size;
gvdbg("size: (h:%d, w:%d)\n", g_csize.h, g_csize.w);
ginfo("size: (h:%d, w:%d)\n", g_csize.h, g_csize.w);
}
#endif
#ifdef CONFIG_FB_HWCURSORIMAGE
if ((flags & FB_CUR_SETIMAGE) != 0)
{
gvdbg("image: (h:%d, w:%d) @ %p\n",
ginfo("image: (h:%d, w:%d) @ %p\n",
settings->img.height, settings->img.width,
settings->img.image);
}
@@ -473,7 +473,7 @@ int up_fbinitialize(int display)
uint32_t regval;
int i;
gvdbg("Entry\n");
ginfo("Entry\n");
/* Give LCD bus priority */
@@ -485,7 +485,7 @@ int up_fbinitialize(int display)
/* Configure pins */
/* Video data */
gvdbg("Configuring pins\n");
ginfo("Configuring pins\n");
lpc17_configgpio(GPIO_LCD_VD0);
lpc17_configgpio(GPIO_LCD_VD1);
@@ -528,7 +528,7 @@ int up_fbinitialize(int display)
modifyreg32(LPC17_SYSCON_PCONP, 0, SYSCON_PCONP_PCLCD);
gvdbg("Configuring the LCD controller\n");
ginfo("Configuring the LCD controller\n");
/* Disable the cursor */
@@ -686,7 +686,7 @@ int up_fbinitialize(int display)
#endif
putreg32(0, LPC17_LCD_INTMSK);
gvdbg("Enabling the display\n");
ginfo("Enabling the display\n");
for (i = LPC17_LCD_PWREN_DELAY; i; i--);
@@ -727,7 +727,7 @@ int up_fbinitialize(int display)
FAR struct fb_vtable_s *up_fbgetvplane(int display, int vplane)
{
gvdbg("vplane: %d\n", vplane);
ginfo("vplane: %d\n", vplane);
if (vplane == 0)
{
return &g_fbobject;
@@ -801,14 +801,14 @@ void lpc17_lcdclear(nxgl_mxpixel_t color)
#if LPC17_BPP > 16
uint32_t *dest = (uint32_t *)CONFIG_LPC17_LCD_VRAMBASE;
gvdbg("Clearing display: color=%08x VRAM=%08x size=%d\n",
ginfo("Clearing display: color=%08x VRAM=%08x size=%d\n",
color, CONFIG_LPC17_LCD_VRAMBASE,
CONFIG_LPC17_LCD_HWIDTH * CONFIG_LPC17_LCD_VHEIGHT * sizeof(uint32_t));
#else
uint16_t *dest = (uint16_t *)CONFIG_LPC17_LCD_VRAMBASE;
gvdbg("Clearing display: color=%08x VRAM=%08x size=%d\n",
ginfo("Clearing display: color=%08x VRAM=%08x size=%d\n",
color, CONFIG_LPC17_LCD_VRAMBASE,
CONFIG_LPC17_LCD_HWIDTH * CONFIG_LPC17_LCD_VHEIGHT * sizeof(uint16_t));
#endif
arch/arm/src/lpc17xx/lpc17_mcpwm.c
+15 -15
View File
@@ -91,19 +91,19 @@
# define pwmdbg dbg
# define pwmlldbg lldbg
# ifdef CONFIG_DEBUG_INFO
# define pwmvdbg vdbg
# define pwmllvdbg llvdbg
# define pwminfo info
# define pwmllinfo llinfo
# define pwm_dumpgpio(p,m) stm32_dumpgpio(p,m)
# else
# define pwmvdbg(x...)
# define pwmllvdbg(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
# endif
#else
# define pwmdbg(x...)
# define pwmlldbg(x...)
# define pwmvdbg(x...)
# define pwmllvdbg(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
#endif
@@ -246,8 +246,8 @@ static void mcpwm_putreg(struct lpc17_mcpwmtimer_s *priv, int offset, uint32_t v
static void mcpwm_dumpregs(FAR struct lpc17_mcpwmtimer_s *priv,
FAR const char *msg)
{
pwmvdbg("%s:\n", msg);
pwmvdbg(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
pwminfo("%s:\n", msg);
pwminfo(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
mcpwm_getreg(priv, LPC17_PWM_MR0_OFFSET),
mcpwm_getreg(priv, LPC17_PWM_MR1_OFFSET),
mcpwm_getreg(priv, LPC17_PWM_MR2_OFFSET),
@@ -255,7 +255,7 @@ static void mcpwm_dumpregs(FAR struct lpc17_mcpwmtimer_s *priv,
#if defined(CONFIG_LPC17_MCPWM)
if (priv->timtype == TIMTYPE_ADVANCED)
{
pwmvdbg(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
pwminfo(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
mcpwm_getreg(priv, LPC17_PWM_MR0_OFFSET),
mcpwm_getreg(priv, LPC17_PWM_MR1_OFFSET),
mcpwm_getreg(priv, LPC17_PWM_MR2_OFFSET),
@@ -264,7 +264,7 @@ static void mcpwm_dumpregs(FAR struct lpc17_mcpwmtimer_s *priv,
else
#endif
{
pwmvdbg(" DCR: %04x DMAR: %04x\n",
pwminfo(" DCR: %04x DMAR: %04x\n",
mcpwm_getreg(priv, LPC17_PWM_MR2_OFFSET),
mcpwm_getreg(priv, LPC17_PWM_MR3_OFFSET));
}
@@ -520,7 +520,7 @@ static int mcpwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
FAR struct lpc17_mcpwmtimer_s *priv = (FAR struct lpc17_mcpwmtimer_s *)dev;
uint32_t pincfg;
pwmvdbg("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
pwminfo("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
/* Make sure that the output has been stopped */
@@ -576,7 +576,7 @@ static int mcpwm_stop(FAR struct pwm_lowerhalf_s *dev)
uint32_t regval;
irqstate_t flags;
pwmvdbg("TIM%d\n", priv->timid);
pwminfo("TIM%d\n", priv->timid);
/* Disable interrupts momentary to stop any ongoing timer processing and
* to prevent any concurrent access to the reset register.
@@ -602,7 +602,7 @@ static int mcpwm_stop(FAR struct pwm_lowerhalf_s *dev)
leave_critical_section(flags);
pwmvdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
pwminfo("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
mcpwm_dumpregs(priv, "After stop");
return OK;
}
@@ -630,7 +630,7 @@ static int mcpwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long a
/* There are no platform-specific ioctl commands */
pwmvdbg("TIM%d\n", priv->timid);
pwminfo("TIM%d\n", priv->timid);
#endif
return -ENOTTY;
}
@@ -660,7 +660,7 @@ FAR struct pwm_lowerhalf_s *lpc17_mcpwminitialize(int timer)
{
FAR struct lpc17_mcpwmtimer_s *lower;
pwmvdbg("TIM%d\n", timer);
pwminfo("TIM%d\n", timer);
switch (timer)
{
arch/arm/src/lpc17xx/lpc17_pwm.c
+15 -15
View File
@@ -109,19 +109,19 @@
# define pwmdbg dbg
# define pwmlldbg lldbg
# ifdef CONFIG_DEBUG_INFO
# define pwmvdbg vdbg
# define pwmllvdbg llvdbg
# define pwminfo info
# define pwmllinfo llinfo
# define pwm_dumpgpio(p,m) stm32_dumpgpio(p,m)
# else
# define pwmvdbg(x...)
# define pwmllvdbg(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
# endif
#else
# define pwmdbg(x...)
# define pwmlldbg(x...)
# define pwmvdbg(x...)
# define pwmllvdbg(x...)
# define pwminfo(x...)
# define pwmllinfo(x...)
# define pwm_dumpgpio(p,m)
#endif
@@ -261,8 +261,8 @@ static void pwm_putreg(struct lpc17_pwmtimer_s *priv, int offset, uint32_t value
#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_INFO)
static void pwm_dumpregs(struct lpc17_pwmtimer_s *priv, FAR const char *msg)
{
pwmvdbg("%s:\n", msg);
pwmvdbg(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
pwminfo("%s:\n", msg);
pwminfo(" CR1: %04x CR2: %04x SMCR: %04x DIER: %04x\n",
pwm_getreg(priv, LPC17_PWM_MR0_OFFSET),
pwm_getreg(priv, LPC17_PWM_MR1_OFFSET),
pwm_getreg(priv, LPC17_PWM_MR2_OFFSET),
@@ -270,7 +270,7 @@ static void pwm_dumpregs(struct lpc17_pwmtimer_s *priv, FAR const char *msg)
#if defined(CONFIG_LPC17_PWM1)
if (priv->timtype == TIMTYPE_ADVANCED)
{
pwmvdbg(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
pwminfo(" RCR: %04x BDTR: %04x DCR: %04x DMAR: %04x\n",
pwm_getreg(priv, LPC17_PWM_MR0_OFFSET),
pwm_getreg(priv, LPC17_PWM_MR1_OFFSET),
pwm_getreg(priv, LPC17_PWM_MR2_OFFSET),
@@ -279,7 +279,7 @@ static void pwm_dumpregs(struct lpc17_pwmtimer_s *priv, FAR const char *msg)
else
#endif
{
pwmvdbg(" DCR: %04x DMAR: %04x\n",
pwminfo(" DCR: %04x DMAR: %04x\n",
pwm_getreg(priv, LPC17_PWM_MR2_OFFSET),
pwm_getreg(priv, LPC17_PWM_MR3_OFFSET));
}
@@ -491,7 +491,7 @@ static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
FAR struct lpc17_pwmtimer_s *priv = (FAR struct lpc17_pwmtimer_s *)dev;
uint32_t pincfg;
pwmvdbg("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
pwminfo("TIM%d pincfg: %08x\n", priv->timid, priv->pincfg);
/* Make sure that the output has been stopped */
@@ -547,7 +547,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
uint32_t regval;
irqstate_t flags;
pwmvdbg("TIM%d\n", priv->timid);
pwminfo("TIM%d\n", priv->timid);
/* Disable interrupts momentary to stop any ongoing timer processing and
* to prevent any concurrent access to the reset register.
@@ -573,7 +573,7 @@ static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
leave_critical_section(flags);
pwmvdbg("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
pwminfo("regaddr: %08x resetbit: %08x\n", regaddr, resetbit);
pwm_dumpregs(priv, "After stop");
return OK;
}
@@ -601,7 +601,7 @@ static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg
/* There are no platform-specific ioctl commands */
pwmvdbg("TIM%d\n", priv->timid);
pwminfo("TIM%d\n", priv->timid);
#endif
return -ENOTTY;
}
@@ -631,7 +631,7 @@ FAR struct pwm_lowerhalf_s *lpc17_pwminitialize(int timer)
{
FAR struct lpc17_pwmtimer_s *lower;
pwmvdbg("TIM%d\n", timer);
pwminfo("TIM%d\n", timer);
switch (timer)
{
arch/arm/src/lpc17xx/lpc17_sdcard.c
+10 -10
View File
@@ -529,7 +529,7 @@ static inline void lpc17_setclock(uint32_t clkcr)
regval |= clkcr;
putreg32(regval, LPC17_SDCARD_CLOCK);
fvdbg("CLKCR: %08x PWR: %08x\n",
finfo("CLKCR: %08x PWR: %08x\n",
getreg32(LPC17_SDCARD_CLOCK), getreg32(LPC17_SDCARD_PWR));
}
@@ -1480,7 +1480,7 @@ static void lpc17_reset(FAR struct sdio_dev_s *dev)
lpc17_setpwrctrl(SDCARD_PWR_CTRL_ON);
leave_critical_section(flags);
fvdbg("CLCKR: %08x POWER: %08x\n",
finfo("CLCKR: %08x POWER: %08x\n",
getreg32(LPC17_SDCARD_CLOCK), getreg32(LPC17_SDCARD_PWR));
}
@@ -1689,7 +1689,7 @@ static int lpc17_sendcmd(FAR struct sdio_dev_s *dev, uint32_t cmd, uint32_t arg)
cmdidx = (cmd & MMCSD_CMDIDX_MASK) >> MMCSD_CMDIDX_SHIFT;
regval |= cmdidx | SDCARD_CMD_CPSMEN;
fvdbg("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
finfo("cmd: %08x arg: %08x regval: %08x\n", cmd, arg, regval);
/* Write the SD card CMD */
@@ -2341,7 +2341,7 @@ static void lpc17_callbackenable(FAR struct sdio_dev_s *dev,
{
struct lpc17_dev_s *priv = (struct lpc17_dev_s *)dev;
fvdbg("eventset: %02x\n", eventset);
finfo("eventset: %02x\n", eventset);
DEBUGASSERT(priv != NULL);
priv->cbevents = eventset;
@@ -2377,7 +2377,7 @@ static int lpc17_registercallback(FAR struct sdio_dev_s *dev,
/* Disable callbacks and register this callback and is argument */
fvdbg("Register %p(%p)\n", callback, arg);
finfo("Register %p(%p)\n", callback, arg);
DEBUGASSERT(priv != NULL);
priv->cbevents = 0;
@@ -2590,7 +2590,7 @@ static void lpc17_callback(void *arg)
/* Is a callback registered? */
DEBUGASSERT(priv != NULL);
fvdbg("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
finfo("Callback %p(%p) cbevents: %02x cdstatus: %02x\n",
priv->callback, priv->cbarg, priv->cbevents, priv->cdstatus);
if (priv->callback)
@@ -2635,14 +2635,14 @@ static void lpc17_callback(void *arg)
{
/* Yes.. queue it */
fvdbg("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
finfo("Queuing callback to %p(%p)\n", priv->callback, priv->cbarg);
(void)work_queue(HPWORK, &priv->cbwork, (worker_t)priv->callback, priv->cbarg, 0);
}
else
{
/* No.. then just call the callback here */
fvdbg("Callback to %p(%p)\n", priv->callback, priv->cbarg);
finfo("Callback to %p(%p)\n", priv->callback, priv->cbarg);
priv->callback(priv->cbarg);
}
}
@@ -2781,7 +2781,7 @@ void sdio_mediachange(FAR struct sdio_dev_s *dev, bool cardinslot)
{
priv->cdstatus &= ~SDIO_STATUS_PRESENT;
}
fvdbg("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
finfo("cdstatus OLD: %02x NEW: %02x\n", cdstatus, priv->cdstatus);
/* Perform any requested callback if the status has changed */
@@ -2824,7 +2824,7 @@ void sdio_wrprotect(FAR struct sdio_dev_s *dev, bool wrprotect)
{
priv->cdstatus &= ~SDIO_STATUS_WRPROTECTED;
}
fvdbg("cdstatus: %02x\n", priv->cdstatus);
finfo("cdstatus: %02x\n", priv->cdstatus);
leave_critical_section(flags);
}
#endif /* CONFIG_LPC17_SDCARD */

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