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arch/arm/src/stm32f7/stm32_otgdev.c: Fix some comments that were screwed up by indent.sh.
This commit is contained in:
Gregory Nutt
@@ -544,15 +544,24 @@ struct stm32_usbdev_s
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uint8_t testmode:4; /* Selected test mode */
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uint8_t epavail[2]; /* Bitset of available OUT/IN endpoints */
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/* E0 SETUP data buffering. ctrlreq: The 8-byte SETUP request is received
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* on the EP0 OUT endpoint and is saved. ep0data For OUT SETUP requests,
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* the SETUP data phase must also complete before the SETUP command can be
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* processed. The pack receipt logic will save the accompanying EP0 IN
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* data in ep0data[] before the SETUP command is processed. For IN SETUP
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* requests, the DATA phase will occur AFTER the SETUP control request is
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* processed. In that case, ep0data[] may be used as the response buffer.
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* ep0datlen Length of OUT DATA received in ep0data[] (Not used with OUT
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* data)
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/* E0 SETUP data buffering.
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*
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* ctrlreq:
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* The 8-byte SETUP request is received on the EP0 OUT endpoint and is
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* saved.
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*
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* ep0data:
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* For OUT SETUP requests, the SETUP data phase must also complete
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* before the SETUP command can be processed. The pack receipt logic
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* will save the accompanying EP0 IN data in ep0data[] before the
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* SETUP command is processed.
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*
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* For IN SETUP requests, the DATA phase will occur AFTER the SETUP
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* control request is processed. In that case, ep0data[] may be used
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* as the response buffer.
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*
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* ep0datlen:
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* Length of OUT DATA received in ep0data[] (Not used with OUT data)
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*/
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struct usb_ctrlreq_s ctrlreq;
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@@ -1272,17 +1281,25 @@ static void stm32_epin_request(FAR struct stm32_usbdev_s *priv,
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int nwords;
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int bytesleft;
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/* We get here in one of four possible ways. From three interrupting events:
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* 1. From stm32_epin as part of the transfer complete interrupt processing
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* This interrupt indicates that the last transfer has completed. 2. As part of
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* the ITTXFE interrupt processing. That interrupt indicates that an IN token
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* was received when the associated TxFIFO was empty. 3. From
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* stm32_epin_txfifoempty as part of the TXFE interrupt processing. The TXFE
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* interrupt is only enabled when the TxFIFO is full and the software must wait
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* for space to become available in the TxFIFO. And this function may be
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* called immediately when the write request is queue to start up the next
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* transaction. 4. From stm32_ep_submit when a new write request is received
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* WHILE the endpoint is not active (privep->active == false).
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/* We get here in one of four possible ways. From three interrupting
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* events:
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*
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* 1. From stm32_epin as part of the transfer complete interrupt
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* processing This interrupt indicates that the last transfer has
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* completed.
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* 2. As part of the ITTXFE interrupt processing. That interrupt
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* indicates that an IN token was received when the associated
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* TxFIFO was empty.
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* 3. From stm32_epin_txfifoempty as part of the TXFE interrupt
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* processing. The TXFEinterrupt is only enabled when the TxFIFO
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* is full and the software must wait for space to become available
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* in the TxFIFO.
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*
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* And this function may be called immediately when the write request
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* is queued to start up the next transaction.
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*
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* 4. From stm32_ep_submit when a new write request is received WHILE
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* the endpoint is not active (privep->active == false).
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*/
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/* Check the request from the head of the endpoint request queue */
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@@ -1390,8 +1407,12 @@ static void stm32_epin_request(FAR struct stm32_usbdev_s *priv,
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/* Get the number of 32-bit words available in the TxFIFO. The DXTFSTS
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* indicates the amount of free space available in the endpoint TxFIFO.
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* Values are in terms of 32-bit words: 0: Endpoint TxFIFO is full 1: 1
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* word available 2: 2 words available n: n words available
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* Values are in terms of 32-bit words:
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*
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* 0: Endpoint TxFIFO is full
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* 1: 1 word available
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* 2: 2 words available
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* n: n words available
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*/
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regaddr = STM32_OTG_DTXFSTS(privep->epphy);
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@@ -1670,8 +1691,10 @@ static inline void stm32_epout_receive(FAR struct stm32_ep_s *privep, int bcnt)
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/* Incoming data is available in the RxFIFO, but there is no read setup
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* to receive the receive the data. This should not happen for data
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* endpoints; those endpoints should have been NAKing any OUT data
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* tokens. We should get here normally on OUT data phase following an
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* OUT SETUP command. EP0 data will still receive data in this case and
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* tokens.
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*
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* We should get here normally on OUT data phase following an OUT
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* SETUP command. EP0 data will still receive data in this case and
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* it should not be NAKing.
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*/
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@@ -1805,9 +1828,11 @@ static void stm32_epout_request(FAR struct stm32_usbdev_s *priv,
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}
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/* Setup the pending read into the request buffer. First calculate:
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*
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* pktcnt = the number of packets (of maxpacket bytes) required to
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* perform the transfer. xfrsize = The total number of bytes required (in
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* units of maxpacket bytes).
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* perform the transfer.
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* xfrsize = The total number of bytes required (in units of maxpacket
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* bytes).
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*/
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pktcnt =
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@@ -2188,8 +2213,10 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv,
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{
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case USB_REQ_GETSTATUS:
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{
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/* type: device-to-host; recipient = device, interface, endpoint value:
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* 0 index: zero interface endpoint len: 2; data = status
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/* type: device-to-host; recipient = device, interface, endpoint
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* value: 0
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* index: zero interface endpoint
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* len: 2; data = status
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*/
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usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_GETSTATUS), 0);
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@@ -2279,9 +2306,10 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv,
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case USB_REQ_CLEARFEATURE:
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{
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/* type: host-to-device; recipient = device, interface or endpoint
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* value: feature selector index: zero interface endpoint; len: zero,
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* data = none
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/* type: host-to-device; recipient = device, interface or endpoint
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* value: feature selector
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* index: zero interface endpoint;
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* len: zero, data = none
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*/
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usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_CLEARFEATURE), 0);
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@@ -2318,8 +2346,10 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv,
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case USB_REQ_SETFEATURE:
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{
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/* type: host-to-device; recipient = device, interface, endpoint value:
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* feature selector index: zero interface endpoint; len: 0; data = none
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/* type: host-to-device; recipient = device, interface, endpoint
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* value: feature selector
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* index: zero interface endpoint;
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* len: 0; data = none
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*/
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usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETFEATURE), 0);
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@@ -2367,8 +2397,10 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv,
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case USB_REQ_SETADDRESS:
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{
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/* type: host-to-device; recipient = device value: device address
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* index: 0 len: 0; data = none
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/* type: host-to-device; recipient = device
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* value: device address
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* index: 0
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* len: 0; data = none
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*/
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usbtrace(TRACE_INTDECODE(STM32_TRACEINTID_SETADDRESS), ctrlreq->value);
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@@ -2392,14 +2424,17 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv,
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break;
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case USB_REQ_GETDESCRIPTOR:
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/* type: device-to-host; recipient = device, interface value: descriptor
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* type and index index: 0 or language ID; len: descriptor len; data =
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* descriptor
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/* type: device-to-host; recipient = device, interface
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* value: descriptor type and index
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* index: 0 or language ID;
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* len: descriptor len; data = descriptor
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*/
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case USB_REQ_SETDESCRIPTOR:
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/* type: host-to-device; recipient = device value: descriptor type and
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* index index: 0 or language ID; len: descriptor len; data = descriptor
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/* type: host-to-device; recipient = device
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* value: descriptor type and index
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* index: 0 or language ID;
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* len: descriptor len; data = descriptor
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*/
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{
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@@ -2420,8 +2455,10 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv,
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break;
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case USB_REQ_GETCONFIGURATION:
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/* type: device-to-host; recipient = device value: 0; index: 0; len: 1;
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* data = configuration value
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/* type: device-to-host; recipient = device
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* value: 0;
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* index: 0;
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* len: 1; data = configuration value
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*/
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{
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@@ -2441,8 +2478,10 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv,
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break;
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case USB_REQ_SETCONFIGURATION:
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/* type: host-to-device; recipient = device value: configuration value
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* index: 0; len: 0; data = none
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/* type: host-to-device; recipient = device
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* value: configuration value
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* index: 0;
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* len: 0; data = none
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*/
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{
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@@ -2484,13 +2523,17 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv,
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break;
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case USB_REQ_GETINTERFACE:
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/* type: device-to-host; recipient = interface value: 0 index: interface;
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* len: 1; data = alt interface
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/* type: device-to-host; recipient = interface
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* value: 0
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* index: interface;
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* len: 1; data = alt interface
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*/
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case USB_REQ_SETINTERFACE:
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/* type: host-to-device; recipient = interface value: alternate setting
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* index: interface; len: 0; data = none
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/* type: host-to-device; recipient = interface
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* value: alternate setting
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* index: interface;
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* len: 0; data = none
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*/
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{
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@@ -2500,8 +2543,10 @@ static inline void stm32_ep0out_stdrequest(struct stm32_usbdev_s *priv,
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break;
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case USB_REQ_SYNCHFRAME:
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/* type: device-to-host; recipient = endpoint value: 0 index: endpoint;
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* len: 2; data = frame number
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/* type: device-to-host; recipient = endpoint
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* value: 0
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* index: endpoint;
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* len: 2; data = frame number
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*/
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{
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@@ -2674,13 +2719,14 @@ static inline void stm32_epout_interrupt(FAR struct stm32_usbdev_s *priv)
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if (daint == 0)
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{
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/* We got an interrupt, but there is no unmasked endpoint that caused it
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* ?! When this happens, the interrupt flag never gets cleared and we are
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* stuck in infinite interrupt loop. This shouldn't happen if we are
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* diligent about handling timing issues when masking endpoint
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* interrupts. However, this workaround avoids infinite loop and allows
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* operation to continue normally. It works by clearing each endpoint
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* flags, masked or not.
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/* We got an interrupt, but there is no unmasked endpoint that caused
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* it?! When this happens, the interrupt flag never gets cleared and
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* we are stuck in infinite interrupt loop.
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*
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* This shouldn't happen if we are diligent about handling timing
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* issues when masking endpoint interrupts. However, this workaround
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* avoids infinite loop and allows operation to continue normally.
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* It works by clearing each endpoint flags, masked or not.
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*/
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regval = stm32_getreg(STM32_OTG_DAINT);
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@@ -2909,13 +2955,14 @@ static inline void stm32_epin_interrupt(FAR struct stm32_usbdev_s *priv)
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if (daint == 0)
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{
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/* We got an interrupt, but there is no unmasked endpoint that caused it
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* ?! When this happens, the interrupt flag never gets cleared and we are
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* stuck in infinite interrupt loop. This shouldn't happen if we are
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* diligent about handling timing issues when masking endpoint
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* interrupts. However, this workaround avoids infinite loop and allows
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* operation to continue normally. It works by clearing each endpoint
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* flags, masked or not.
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/* We got an interrupt, but there is no unmasked endpoint that caused
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* it?! When this happens, the interrupt flag never gets cleared and
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* we are stuck in infinite interrupt loop.
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*
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* This shouldn't happen if we are diligent about handling timing
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* issues when masking endpoint interrupts. However, this workaround
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* avoids infinite loop and allows operation to continue normally.
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* It works by clearing each endpoint flags, masked or not.
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*/
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daint = stm32_getreg(STM32_OTG_DAINT);
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@@ -3206,8 +3253,10 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv)
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switch (regval & OTG_GRXSTSD_PKTSTS_MASK)
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{
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/* Global OUT NAK. This indicate that the global OUT NAK bit has
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* taken effect. PKTSTS = Global OUT NAK, BCNT = 0, EPNUM = Don't
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* Care, DPID = Don't Care.
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* taken effect.
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*
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* PKTSTS = Global OUT NAK, BCNT = 0, EPNUM = Don't Care, DPID =
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* Don't Care.
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*/
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case OTG_GRXSTSD_PKTSTS_OUTNAK:
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@@ -3235,9 +3284,10 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv)
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/* OUT transfer completed. This indicates that an OUT data transfer
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* for the specified OUT endpoint has completed. After this entry is
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* popped from the receive FIFO, the core asserts a Transfer
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* Completed interrupt on the specified OUT endpoint. PKTSTS = Data
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* OUT Transfer Done, BCNT = 0, EPNUM = OUT EP Num on which the data
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* transfer is complete, DPID = Don't Care.
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* Completed interrupt on the specified OUT endpoint.
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*
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* PKTSTS = Data OUT Transfer Done, BCNT = 0, EPNUM = OUT EP Num on
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* which the data transfer is complete, DPID = Don't Care.
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*/
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case OTG_GRXSTSD_PKTSTS_OUTDONE:
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@@ -3250,8 +3300,10 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv)
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* for the specified endpoint has completed and the Data stage has
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* started. After this entry is popped from the receive FIFO, the
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* core asserts a Setup interrupt on the specified control OUT
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* endpoint (triggers an interrupt). PKTSTS = Setup Stage Done, BCNT
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* = 0, EPNUM = Control EP Num, DPID = Don't Care.
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* endpoint (triggers an interrupt).
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*
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* PKTSTS = Setup Stage Done, BCNT = 0, EPNUM = Control EP Num,
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* DPID = Don't Care.
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*/
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case OTG_GRXSTSD_PKTSTS_SETUPDONE:
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@@ -3276,8 +3328,9 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv)
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/* SETUP data packet received. This indicates that a SETUP packet
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* for the specified endpoint is now available for reading from the
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* receive FIFO. PKTSTS = SETUP, BCNT = 8, EPNUM = Control EP Num,
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* DPID = D0.
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* receive FIFO.
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*
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* PKTSTS = SETUP, BCNT = 8, EPNUM = Control EP Num, DPID = D0.
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*/
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case OTG_GRXSTSD_PKTSTS_SETUPRECVD:
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@@ -3298,8 +3351,9 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv)
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/* Was this an IN or an OUT SETUP packet. If it is an OUT SETUP,
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* then we need to wait for the completion of the data phase to
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* process the setup command. If it is an IN SETUP packet, then we
|
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* must processing the command BEFORE we enter the DATA phase. If
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* the data associated with the OUT SETUP packet is zero length,
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* must processing the command BEFORE we enter the DATA phase.
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*
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* If the data associated with the OUT SETUP packet is zero length,
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* then, of course, we don't need to wait.
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*/
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@@ -3456,8 +3510,11 @@ static inline void stm32_isocoutinterrupt(FAR struct stm32_usbdev_s *priv)
|
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/* When it receives an IISOOXFR interrupt, the application must read the
|
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* control registers of all isochronous OUT endpoints to determine which
|
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* endpoints had an incomplete transfer in the current microframe. An
|
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* endpoint transfer is incomplete if both the following conditions are true:
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* DOEPCTLx:EONUM = DSTS:SOFFN[0], and DOEPCTLx:EPENA = 1
|
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* endpoint transfer is incomplete if both the following conditions are
|
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* true:
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*
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* DOEPCTLx:EONUM = DSTS:SOFFN[0], and
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* DOEPCTLx:EPENA = 1
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*/
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for (i = 0; i < STM32_NENDPOINTS; i++)
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@@ -3487,8 +3544,8 @@ static inline void stm32_isocoutinterrupt(FAR struct stm32_usbdev_s *priv)
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doepctl = stm32_getreg(regaddr);
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dsts = stm32_getreg(STM32_OTG_DSTS);
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|
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/* EONUM = 0:even frame, 1:odd frame SOFFN = Frame number of the received
|
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* SOF
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/* EONUM = 0:even frame, 1:odd frame
|
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* SOFFN = Frame number of the received SOF
|
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*/
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|
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eonum = ((doepctl & OTG_DOEPCTL_EONUM) != 0);
|
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@@ -3794,8 +3851,10 @@ static void stm32_enablegonak(FAR struct stm32_ep_s *privep)
|
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# else
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/* Since we are in the interrupt handler, we cannot wait inline for the
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* GONAKEFF because it cannot occur until service the RXFLVL global interrupt
|
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* and pop the OUTNAK word from the RxFIFO. Perhaps it is sufficient to wait
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* for Global OUT NAK status to be reported in OTG DCTL register?
|
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* and pop the OUTNAK word from the RxFIFO.
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*
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* Perhaps it is sufficient to wait for Global OUT NAK status to be reported
|
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* in OTG DCTL register?
|
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*/
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while ((stm32_getreg(STM32_OTG_DCTL) & OTG_DCTL_GONSTS) == 0);
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@@ -4795,8 +4854,10 @@ static FAR struct usbdev_ep_s *stm32_ep_alloc(FAR struct usbdev_s *dev,
|
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{
|
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/* Otherwise, we will return the endpoint structure only for the
|
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* requested 'logical' endpoint. All of the other checks will still be
|
||||
* performed. First, verify that the logical endpoint is in the range
|
||||
* supported by by the hardware.
|
||||
* performed.
|
||||
*
|
||||
* First, verify that the logical endpoint is in the range supported by
|
||||
* the hardware.
|
||||
*/
|
||||
|
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if (epphy >= STM32_NENDPOINTS)
|
||||
@@ -5764,12 +5825,13 @@ int usbdev_register(struct usbdevclass_driver_s *driver)
|
||||
|
||||
up_enable_irq(STM32_IRQ_OTG);
|
||||
|
||||
/* FIXME: nothing seems to call DEV_CONNECT(), but we need to set the RS
|
||||
* bit to enable the controller. It kind of makes sense to do this after
|
||||
* the class has bound to us... GEN: This bug is really in the class
|
||||
* driver. It should make the soft connect when it is ready to be
|
||||
* enumerated. I have added that logic to the class drivers but left
|
||||
* this logic here.
|
||||
/* FIXME: nothing seems to call DEV_CONNECT(), but we need to set the
|
||||
* RS bit to enable the controller. It kind of makes sense to
|
||||
* do this after the class has bound to us...
|
||||
* GEN: This bug is really in the class driver. It should make the
|
||||
* soft connect when it is ready to be enumerated. I have
|
||||
* added that logic to the class drivers but left this logic
|
||||
* here.
|
||||
*/
|
||||
|
||||
stm32_pullup(&priv->usbdev, true);
|
||||
|
||||
Reference in New Issue
Block a user