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stm32h7/rcc: OTGHS ULPI works only in VOS0

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This is not documented by ST at all but otherwise ULPI is dead.
This commit is contained in:
raiden00pl
2023-04-04 09:25:00 -07:00
committed by David Sidrane
parent d76b7c20ad
commit f89d2be99f
1 changed files with 45 additions and 31 deletions
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arch/arm/src/stm32h7/stm32h7x3xx_rcc.c
+45 -31
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@@ -61,7 +61,8 @@
#endif
#if !defined(BOARD_FLASH_PROGDELAY)
# if STM32_PWR_VOS_SCALE == PWR_D3CR_VOS_SCALE_1
# if (STM32_PWR_VOS_SCALE == PWR_D3CR_VOS_SCALE_1) || \
(STM32_PWR_VOS_SCALE == PWR_D3CR_VOS_SCALE_0)
# if STM32_SYSCLK_FREQUENCY <= 70000000 && BOARD_FLASH_WAITSTATES == 0
# define BOARD_FLASH_PROGDELAY 0
# elif STM32_SYSCLK_FREQUENCY <= 140000000 && BOARD_FLASH_WAITSTATES == 1
@@ -102,9 +103,27 @@
#error When HSI is used, you have to define STM32_BOARD_HSIDIV in board/include/board.h
#endif
/****************************************************************************
* Private Data
****************************************************************************/
/* Over-drive is supported only for Voltage output scale 1 mode.
* It is required when:
* - SYSCLK frequency is over 400 MHz,
* - external ULPI is selected
*/
#if (STM32_PWR_VOS_SCALE == PWR_D3CR_VOS_SCALE_1)
# if (STM32_SYSCLK_FREQUENCY > 400000000)
# define STM32_VOS_OVERDRIVE 1
# elif defined(CONFIG_STM32H7_OTGHS_EXTERNAL_ULPI)
# define STM32_VOS_OVERDRIVE 1
# else
# define STM32_VOS_OVERDRIVE 0
# endif
#endif
#ifdef CONFIG_STM32H7_OTGHS_EXTERNAL_ULPI
# if (STM32_PWR_VOS_SCALE != PWR_D3CR_VOS_SCALE_1)
# error external ULPI seems to work only with SCALE 0
# endif
#endif
/****************************************************************************
* Private Functions
@@ -211,15 +230,15 @@ static inline void rcc_enableahb1(void)
#endif
#ifdef CONFIG_STM32H7_OTGHS
# if defined(CONFIG_STM32H7_OTGHS_EXTERNAL_ULPI)
/* Enable clocking for USB OTG HS and external PHY */
regval |= (RCC_AHB1ENR_OTGHSEN | RCC_AHB1ENR_OTGHSULPIEN);
#else
# ifndef CONFIG_STM32H7_OTGHS_EXTERNAL_ULPI
/* Enable only clocking for USB OTG HS */
regval |= RCC_AHB1ENR_OTGHSEN;
#endif
# else
/* Enable clocking for USB OTG HS and external PHY */
regval |= RCC_AHB1ENR_OTGHSEN | RCC_AHB1ENR_OTGHSULPIEN;
# endif
#endif
#ifdef CONFIG_STM32H7_ETHMAC
@@ -866,30 +885,25 @@ void stm32_stdclockconfig(void)
{
}
/* Over-drive is needed if
* - Voltage output scale 1 mode is selected and SYSCLK frequency is
* over 400 MHz.
*/
#if STM32_VOS_OVERDRIVE && (STM32_PWR_VOS_SCALE == PWR_D3CR_VOS_SCALE_1)
/* Over-drive support for VOS1 */
if ((STM32_PWR_VOS_SCALE == PWR_D3CR_VOS_SCALE_1) &&
STM32_SYSCLK_FREQUENCY > 400000000)
/* Enable System configuration controller clock to Enable ODEN */
regval = getreg32(STM32_RCC_APB4ENR);
regval |= RCC_APB4ENR_SYSCFGEN;
putreg32(regval, STM32_RCC_APB4ENR);
/* Enable Overdrive */
regval = getreg32(STM32_SYSCFG_PWRCR);
regval |= SYSCFG_PWRCR_ODEN;
putreg32(regval, STM32_SYSCFG_PWRCR);
while ((getreg32(STM32_PWR_D3CR) & STM32_PWR_D3CR_VOSRDY) == 0)
{
/* Enable System configuration controller clock to Enable ODEN */
regval = getreg32(STM32_RCC_APB4ENR);
regval |= RCC_APB4ENR_SYSCFGEN;
putreg32(regval, STM32_RCC_APB4ENR);
/* Enable Overdrive to extend the clock frequency up to 480 MHz. */
regval = getreg32(STM32_SYSCFG_PWRCR);
regval |= SYSCFG_PWRCR_ODEN;
putreg32(regval, STM32_SYSCFG_PWRCR);
while ((getreg32(STM32_PWR_D3CR) & STM32_PWR_D3CR_VOSRDY) == 0)
{
}
}
#endif
/* Configure FLASH wait states */