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boards: nxstyle fixes

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fixes for nxstyle errors reported by the tool.

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
This commit is contained in:
Alin Jerpelea
2021-04-06 12:13:09 +02:00
committed by Xiang Xiao
parent 72041911ce
commit f8420a9e47
116 changed files with 1997 additions and 1405 deletions
Download Patch File Download Diff File Expand all files Collapse all files
boards/arm/lpc17xx_40xx/lpcxpresso-lpc1768/src/lpc17_40_dac.c
+7 -1
View File
@@ -57,6 +57,10 @@
#ifdef CONFIG_DAC
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: dac_devinit
*
@@ -74,7 +78,9 @@ int dac_devinit(void)
if (!initialized)
{
/* Call lpc17_40_dacinitialize() to get an instance of the dac interface */
/* Call lpc17_40_dacinitialize() to get an instance of the dac
* interface
*/
dac = lpc17_40_dacinitialize();
if (dac == NULL)
boards/arm/lpc17xx_40xx/mbed/src/lpc17_40_adc.c
+3 -1
View File
@@ -83,7 +83,9 @@ int mbed_adc_setup(void)
if (!initialized)
{
/* Call lpc17_40_adcinitialize() to get an instance of the ADC interface */
/* Call lpc17_40_adcinitialize() to get an instance of the ADC
* interface
*/
adc = lpc17_40_adcinitialize();
if (adc == NULL)
boards/arm/lpc17xx_40xx/mbed/src/lpc17_40_dac.c
+7 -1
View File
@@ -59,6 +59,10 @@
#ifdef CONFIG_DAC
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: dac_devinit
*
@@ -76,7 +80,9 @@ int dac_devinit(void)
if (!initialized)
{
/* Call lpc17_40_dacinitialize() to get an instance of the dac interface */
/* Call lpc17_40_dacinitialize() to get an instance of the dac
* interface
*/
dac = lpc17_40_dacinitialize();
if (dac == NULL)
boards/arm/lpc17xx_40xx/mcb1700/src/lpc17_40_dac.c
+4
View File
@@ -59,6 +59,10 @@
#ifdef CONFIG_DAC
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: dac_devinit
*
boards/arm/lpc17xx_40xx/u-blox-c027/include/board.h
+5 -2
View File
@@ -61,8 +61,10 @@
/* This is the clock setup we configure for:
*
* SYSCLK = BOARD_OSCCLK_FREQUENCY = 12MHz -> Select Main oscillator for source
* PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz -> PLL0 multipler=20, pre-divider=1
* SYSCLK = BOARD_OSCCLK_FREQUENCY = 12MHz ->
* Select Main oscillator for source
* PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz ->
* PLL0 multipler=20, pre-divider=1
* CCLCK = 480MHz / 6 = 80MHz -> CCLK divider = 6
*/
@@ -216,6 +218,7 @@
/* The u-blox C027 board has a single red LED
* (there are additional LEDs on the base board not considered here).
*/
/* ON OFF */
#define LED_STARTED 0 /* OFF ON (never happens) */
#define LED_HEAPALLOCATE 0 /* OFF ON (never happens) */
boards/arm/lpc17xx_40xx/zkit-arm-1769/include/board.h
+9 -4
View File
@@ -72,8 +72,10 @@
/* This is the clock setup we configure for:
*
* SYSCLK = BOARD_OSCCLK_FREQUENCY = 12MHz -> Select Main oscillator for source
* PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz -> PLL0 multipler=20, pre-divider=1
* SYSCLK = BOARD_OSCCLK_FREQUENCY = 12MHz ->
* Select Main oscillator for source
* PLL0CLK = (2 * 20 * SYSCLK) / 1 = 480MHz ->
* PLL0 multipler=20, pre-divider=1
* CCLCK = 480MHz / 6 = 80MHz -> CCLK divider = 6
*/
@@ -141,7 +143,8 @@
/* Ethernet configuration */
//#define ETH_MCFG_CLKSEL_DIV ETH_MCFG_CLKSEL_DIV44
/* #define ETH_MCFG_CLKSEL_DIV ETH_MCFG_CLKSEL_DIV44 */
#define ETH_MCFG_CLKSEL_DIV ETH_MCFG_CLKSEL_DIV20
/* LED definitions **********************************************************/
@@ -179,6 +182,7 @@
* LED 1 is available for use by application software using lpc17_40_led
* (prototyped below)
*/
/* LED1 LED2 */
#define LED_INIRQ 4 /* NC ON (momentary) */
#define LED_SIGNAL 5 /* NC ON (momentary) */
@@ -346,7 +350,8 @@ extern "C"
* Name: lpc17_40_led
*
* Description:
* Once the system has booted, these functions can be used to control LEDs 1
* Once the system has booted,
* these functions can be used to control LEDs 1
*
****************************************************************************/
boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_boot.c
+2 -1
View File
@@ -70,7 +70,8 @@
* Name: lpc17_40_boardinitialize
*
* Description:
* All LPC17xx/LPC40xx architectures must provide the following entry point.
* All LPC17xx/LPC40xx architectures must provide the following entry
* point.
* This entry point is called early in the initialization -- after all
* memory has been configured and mapped but before any devices have been
* initialized.
boards/arm/lpc17xx_40xx/zkit-arm-1769/src/lpc17_40_dac.c
+7 -1
View File
@@ -58,6 +58,10 @@
#ifdef CONFIG_DAC
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: dac_devinit
*
@@ -75,7 +79,9 @@ int dac_devinit(void)
if (!initialized)
{
/* Call lpc17_40_dacinitialize() to get an instance of the dac interface */
/* Call lpc17_40_dacinitialize() to get an instance of the dac
* interface
*/
dac = lpc17_40_dacinitialize();
if (dac == NULL)
boards/arm/lpc31xx/ea3152/tools/crc32.c
+95 -55
View File
@@ -7,37 +7,44 @@
*
* The logic in this file was developed by Gary S. Brown:
*
* COPYRIGHT (C) 1986 Gary S. Brown. You may use this program, or code or tables
* extracted from it, as desired without restriction.
* COPYRIGHT (C) 1986 Gary S. Brown. You may use this program, or code
* or tables extracted from it, as desired without restriction.
*
* First, the polynomial itself and its table of feedback terms. The polynomial is:
* First, the polynomial itself and its table of feedback terms.
* The polynomial is:
*
* X^32+X^26+X^23+X^22+X^16+X^12+X^11+X^10+X^8+X^7+X^5+X^4+X^2+X^1+X^0
*
* Note that we take it "backwards" and put the highest-order term in the lowest-order bit.
* The X^32 term is "implied"; the LSB is the X^31 term, etc. The X^0 term (usually shown
* as "+1") results in the MSB being 1
* Note that we take it "backwards" and put the highest-order term in the
* lowest-order bit.
* The X^32 term is "implied"; the LSB is the X^31 term, etc.
* The X^0 term (usually shown as "+1") results in the MSB being 1
*
* Note that the usual hardware shift register implementation, which is what we're using
* (we're merely optimizing it by doing eight-bit chunks at a time) shifts bits into the
* lowest-order term. In our implementation, that means shifting towards the right. Why
* do we do it this way? Because the calculated CRC must be transmitted in order from
* highest-order term to lowest-order term. UARTs transmit characters in order from LSB
* to MSB. By storing the CRC this way we hand it to the UART in the order low-byte to
* high-byte; the UART sends each low-bit to hight-bit; and the result is transmission bit
* by bit from highest- to lowest-order term without requiring any bit shuffling on our
* part. Reception works similarly
* Note that the usual hardware shift register implementation, which is what
* we're using (we're merely optimizing it by doing eight-bit chunks at a
* time) shifts bits into the lowest-order term. In our implementation, that
* means shifting towards the right. Why do we do it this way? Because the
* calculated CRC must be transmitted in order from highest-order term to
* lowest-order term. UARTs transmit characters in order from LSB to MSB.
* By storing the CRC this way we hand it to the UART in the order low-byte
* to high-byte; the UART sends each low-bit to hight-bit; and the result is
* transmission bit by bit from highest- to lowest-order term without
* requiring any bit shuffling on our part. Reception works similarly
*
* The feedback terms table consists of 256, 32-bit entries. Notes
* The feedback terms table consists of 256, 32-bit entries.
* Notes
*
* - The table can be generated at runtime if desired; code to do so is shown later. It
* might not be obvious, but the feedback terms simply represent the results of eight
* shift/xor operations for all combinations of data and CRC register values
* - The table can be generated at runtime if desired; code to do so is shown
* later. It might not be obvious, but the feedback terms simply represent
* the results of eight shift/xor operations for all combinations of data
* and CRC register values
*
* - The values must be right-shifted by eight bits by the updcrc logic; the shift must
* be u_(bring in zeroes). On some hardware you could probably optimize the shift in
* assembler by using byte-swap instructions polynomial $edb88320
***************************************************************************/
* - The values must be right-shifted by eight bits by the updcrc logic; the
* shift must be u_(bring in zeroes). On some hardware you could probably
* optimize the shift in assembler by using byte-swap instructions
* polynomial $edb88320
*
****************************************************************************/
/****************************************************************************
* Included Files
@@ -53,38 +60,70 @@
static const uint32_t crc32_tab[] =
{
0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3,
0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91,
0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5,
0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172, 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b,
0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f,
0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d,
0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01,
0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457,
0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb,
0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9,
0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad,
0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683,
0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7,
0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc, 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5,
0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79,
0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f,
0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713,
0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21,
0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45,
0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2, 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db,
0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf,
0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d
0x00000000, 0x77073096, 0xee0e612c, 0x990951ba,
0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3,
0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988,
0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91,
0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de,
0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec,
0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5,
0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172,
0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b,
0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940,
0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116,
0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f,
0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924,
0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d,
0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a,
0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818,
0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01,
0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e,
0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457,
0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c,
0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2,
0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb,
0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0,
0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9,
0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086,
0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4,
0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad,
0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a,
0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683,
0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8,
0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe,
0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7,
0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc,
0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5,
0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252,
0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60,
0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79,
0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236,
0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f,
0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04,
0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a,
0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713,
0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38,
0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21,
0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e,
0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c,
0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45,
0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2,
0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db,
0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0,
0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6,
0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf,
0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94,
0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d
};
/****************************************************************************
@@ -107,6 +146,7 @@ uint32_t crc32part(const uint8_t *src, size_t len, uint32_t crc32val)
{
crc32val = crc32_tab[(crc32val ^ src[i]) & 0xff] ^ (crc32val >> 8);
}
return crc32val;
}
boards/arm/lpc31xx/olimex-lpc-h3131/tools/crc32.c
+65 -32
View File
@@ -59,38 +59,70 @@
static const uint32_t crc32_tab[] =
{
0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3,
0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91,
0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de, 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, 0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5,
0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172, 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b,
0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, 0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f,
0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d,
0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a, 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01,
0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457,
0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c, 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb,
0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9,
0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086, 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, 0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad,
0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683,
0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, 0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7,
0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc, 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5,
0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, 0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79,
0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f,
0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713,
0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21,
0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e, 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45,
0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2, 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db,
0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0, 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, 0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf,
0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d
0x00000000, 0x77073096, 0xee0e612c, 0x990951ba,
0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3,
0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988,
0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91,
0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de,
0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,
0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec,
0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5,
0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172,
0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b,
0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940,
0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,
0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116,
0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f,
0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924,
0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d,
0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a,
0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,
0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818,
0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01,
0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e,
0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457,
0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c,
0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,
0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2,
0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb,
0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0,
0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9,
0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086,
0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,
0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4,
0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad,
0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a,
0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683,
0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8,
0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,
0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe,
0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7,
0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc,
0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5,
0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252,
0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,
0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60,
0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79,
0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236,
0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f,
0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04,
0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,
0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a,
0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713,
0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38,
0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21,
0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e,
0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,
0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c,
0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45,
0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2,
0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db,
0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0,
0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,
0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6,
0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf,
0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94,
0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d
};
/****************************************************************************
@@ -113,6 +145,7 @@ uint32_t crc32part(const uint8_t *src, size_t len, uint32_t crc32val)
{
crc32val = crc32_tab[(crc32val ^ src[i]) & 0xff] ^ (crc32val >> 8);
}
return crc32val;
}
boards/arm/moxart/moxa/src/moxart_boot.c
+5 -4
View File
@@ -63,10 +63,11 @@
* Description:
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_late_initialize(). board_late_initialize() will be
* called immediately after up_initialize() is called and just before the
* initial application is started. This additional initialization phase
* may be used, for example, to initialize board-specific device drivers.
* function called board_late_initialize(). board_late_initialize() will
* be called immediately after up_initialize() is called and just before
* the initial application is started. This additional initialization
* phase may be used, for example, to initialize board-specific device
* drivers.
*
****************************************************************************/
boards/arm/sam34/sam4e-ek/src/sam_ili9325.c
+9 -6
View File
@@ -403,7 +403,7 @@ static const struct lcd_planeinfo_s g_planeinfo =
{
.putrun = sam_putrun, /* Put a run into LCD memory */
.getrun = sam_getrun, /* Get a run from LCD memory */
.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */
.buffer = (uint8_t *)g_runbuffer, /* Run scratch buffer */
.bpp = SAM_BPP, /* Bits-per-pixel */
};
@@ -582,6 +582,7 @@ static void sam_dumprun(FAR const char *msg, FAR uint16_t *run,
{
syslog(LOG_DEBUG, " %04x", *run++);
}
up_putc('\n');
}
}
@@ -607,7 +608,8 @@ static void sam_disable_backlight(void)
* Name: sam_set_backlight
*
* Description:
* The the backlight to the level associated with the specified power value.
* The the backlight to the level associated with the specified power
* value.
*
****************************************************************************/
@@ -691,11 +693,11 @@ static int sam_putrun(fb_coord_t row, fb_coord_t col,
size_t npixels)
{
#if defined(CONFIG_SAM4EEK_LCD_RGB565)
FAR const uint16_t *src = (FAR const uint16_t*)buffer;
FAR const uint16_t *src = (FAR const uint16_t *)buffer;
#elif defined(CONFIG_SAM4EEK_LCD_RGB24)
FAR const uint8_t *src = (FAR const uint8_t*)buffer;
FAR const uint8_t *src = (FAR const uint8_t *)buffer;
#elif defined(CONFIG_SAM4EEK_LCD_RGB32)
FAR const uint32_t *src = (FAR const uint32_t*)buffer;
FAR const uint32_t *src = (FAR const uint32_t *)buffer;
#endif
/* Buffer must be provided and aligned to a 16-bit address boundary */
@@ -1133,7 +1135,8 @@ static void sam_lcd9325_initialize(void)
sam_write_reg(ILI9325_GAMMA_CTRL9,
ILI9325_GAMMA_CTRL9_RN1(7) | ILI9325_GAMMA_CTRL9_RN0(1));
sam_write_reg(ILI9325_GAMMA_CTRL10,
ILI9325_GAMMA_CTRL10_VRN1(0) | ILI9325_GAMMA_CTRL10_VRN0(14));
ILI9325_GAMMA_CTRL10_VRN1(0) |
ILI9325_GAMMA_CTRL10_VRN0(14));
/* Set the Entry Mode:
*
boards/arm/sam34/sam4e-ek/src/sam_ili9341.c
+7 -7
View File
@@ -409,7 +409,7 @@ static const struct lcd_planeinfo_s g_planeinfo =
{
.putrun = sam_putrun, /* Put a run into LCD memory */
.getrun = sam_getrun, /* Get a run from LCD memory */
.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */
.buffer = (uint8_t *)g_runbuffer, /* Run scratch buffer */
.bpp = SAM_BPP, /* Bits-per-pixel */
};
@@ -730,11 +730,11 @@ static int sam_putrun(fb_coord_t row, fb_coord_t col,
size_t npixels)
{
#if defined(CONFIG_SAM4EEK_LCD_RGB565)
FAR const uint16_t *src = (FAR const uint16_t*)buffer;
FAR const uint16_t *src = (FAR const uint16_t *)buffer;
#elif defined(CONFIG_SAM4EEK_LCD_RGB24)
FAR const uint8_t *src = (FAR const uint8_t*)buffer;
FAR const uint8_t *src = (FAR const uint8_t *)buffer;
#elif defined(CONFIG_SAM4EEK_LCD_RGB32)
FAR const uint32_t *src = (FAR const uint32_t*)buffer;
FAR const uint32_t *src = (FAR const uint32_t *)buffer;
#endif
/* Buffer must be provided and aligned to a 16-bit address boundary */
@@ -788,11 +788,11 @@ static int sam_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
size_t npixels)
{
#if defined(CONFIG_SAM4EEK_LCD_RGB565)
FAR uint16_t *dest = (FAR uint16_t*)buffer;
FAR uint16_t *dest = (FAR uint16_t *)buffer;
#elif defined(CONFIG_SAM4EEK_LCD_RGB24)
FAR uint8_t *dest = (FAR uint8_t*)buffer;
FAR uint8_t *dest = (FAR uint8_t *)buffer;
#elif defined(dest)
FAR uint32_t *dest = (FAR uint32_t*)buffer;
FAR uint32_t *dest = (FAR uint32_t *)buffer;
#endif
/* Buffer must be provided and aligned to a 16-bit address boundary */
boards/arm/sam34/sam4s-xplained-pro/src/sam_autoleds.c
+2 -2
View File
@@ -54,8 +54,8 @@
#ifdef CONFIG_ARCH_LEDS
/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on
* board the SAM4S Xplained Pro. The following definitions describe how NuttX
* controls the LEDs:
* board the SAM4S Xplained Pro.
* The following definitions describe how NuttX controls the LEDs:
*
* SYMBOL Meaning LED state
* D9 D10
boards/arm/sama5/sama5d4-ek/src/sam_sdram.c
+12 -7
View File
@@ -273,9 +273,12 @@ static void sam_config_slaveddr(void)
for (ddrport = 1 ; ddrport < 8 ; ddrport++)
{
putreg32(0x00ffffff, SAM_MATRIX0_SSR(H64MX_DDR_SLAVE_PORT0 + ddrport));
putreg32(0x0000000f, SAM_MATRIX0_SRTSR(H64MX_DDR_SLAVE_PORT0 + ddrport));
putreg32(0x0000ffff, SAM_MATRIX0_SASSR(H64MX_DDR_SLAVE_PORT0 + ddrport));
putreg32(0x00ffffff,
SAM_MATRIX0_SSR(H64MX_DDR_SLAVE_PORT0 + ddrport));
putreg32(0x0000000f,
SAM_MATRIX0_SRTSR(H64MX_DDR_SLAVE_PORT0 + ddrport));
putreg32(0x0000ffff,
SAM_MATRIX0_SASSR(H64MX_DDR_SLAVE_PORT0 + ddrport));
}
}
@@ -292,9 +295,9 @@ static void sam_config_slaveddr(void)
* Per the SAMA5D3-EK User guide:
* "Two DDR2/SDRAM (MT47H64M16HR) used as main system memory (256 MByte).
* The board includes 2 Gbits of on-board solderedDDR2 (double data rate)
* SDRAM. The footprints can also host two DDR2 (MT47H128M16RT) from Micron®
* for a total of 512 MBytes of DDR2 memory. The memory bus is 32 bits wide
* and operates with a frequency of up to 166 MHz."
* SDRAM. The footprints can also host two DDR2 (MT47H128M16RT) from
* Micron® for a total of 512 MBytes of DDR2 memory. The memory bus is 32
* bits wide and operates with a frequency of up to 166 MHz."
*
* From the Atmel Code Example:
* MT47H64M16HR : 8 Meg x 16 x 8 banks
@@ -377,7 +380,9 @@ void sam_sdram_config(void)
MPDDRC_IO_CALIBR_EN_CALIB);
putreg32(regval, SAM_MPDDRC_IO_CALIBR);
/* Step 2: Program the features of DDR2-SDRAM device into the Timing Register */
/* Step 2: Program the features of DDR2-SDRAM device into the Timing
* Register
*/
#if defined(CONFIG_SAMA5D4EK_MT47H128M16RT)
boards/arm/samd5e5/metro-m4/scripts/nvm.c
+28
View File
@@ -1,3 +1,27 @@
/****************************************************************************
* boards/arm/samd5e5/metro-m4/scripts/nvm.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <stdio.h>
#include <stdint.h>
@@ -9,6 +33,10 @@ const uint8_t nvm[20] =
0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
};
/****************************************************************************
* Public Functions
****************************************************************************/
int main(int argc, char **argv)
{
unsigned int csum;
boards/arm/samv7/same70-xplained/src/sam_automount.c
+2 -1
View File
@@ -170,7 +170,8 @@ static int sam_attach(FAR const struct automount_lower_s *lower,
*
****************************************************************************/
static void sam_enable(FAR const struct automount_lower_s *lower, bool enable)
static void sam_enable(FAR const struct automount_lower_s *lower,
bool enable)
{
FAR const struct sam_automount_config_s *config;
FAR struct sam_automount_state_s *state;
boards/arm/samv7/same70-xplained/src/sam_sdram.c
+3 -1
View File
@@ -221,7 +221,9 @@ void sam_sdram_config(void)
putreg32(SDRAMC_MDR_SDRAM, SAM_SDRAMC_MDR);
/* 4. A minimum pause of 200 usec is provided to precede any signal toggle. */
/* 4. A minimum pause of 200 usec is provided to precede any signal
* toggle.
*/
up_udelay(200);
boards/arm/samv7/same70-xplained/src/sam_xbee.c
+2 -1
View File
@@ -266,7 +266,8 @@ static int sam_xbee_devsetup(FAR struct sam_priv_s *priv)
ret = xbee_netdev_register(xbee);
if (ret < 0)
{
wlerr("ERROR: Failed to register the XBee MAC network driver wpan%d: %d\n",
wlerr("ERROR: "
"Failed to register the XBee MAC network driver wpan%d: %d\n",
0, ret);
return ret;
}
boards/arm/samv7/samv71-xult/src/sam_automount.c
+2 -1
View File
@@ -170,7 +170,8 @@ static int sam_attach(FAR const struct automount_lower_s *lower,
*
****************************************************************************/
static void sam_enable(FAR const struct automount_lower_s *lower, bool enable)
static void sam_enable(FAR const struct automount_lower_s *lower,
bool enable)
{
FAR const struct sam_automount_config_s *config;
FAR struct sam_automount_state_s *state;
boards/arm/samv7/samv71-xult/src/sam_sdram.c
+3 -1
View File
@@ -221,7 +221,9 @@ void sam_sdram_config(void)
putreg32(SDRAMC_MDR_SDRAM, SAM_SDRAMC_MDR);
/* 4. A minimum pause of 200 usec is provided to precede any signal toggle. */
/* 4. A minimum pause of 200 usec is provided to precede any signal
* toggle.
*/
up_udelay(200);
boards/arm/stm32/axoloti/include/board.h
+9 -7
View File
@@ -69,13 +69,15 @@
* PLLN : 336 (STM32_PLLCFG_PLLN)
* PLLP : 2 (STM32_PLLCFG_PLLP)
* PLLQ : 7 (STM32_PLLCFG_PLLQ)
* Main regulator output voltage : Scale1 mode Needed for high speed SYSCLK
* Main regulator
* output voltage : Scale1 mode Needed for high speed SYSCLK
* Flash Latency(WS) : 5
* Prefetch Buffer : OFF
* Instruction cache : ON
* Data cache : ON
* Require 48MHz for USB OTG FS, : Enabled
* SDIO and RNG clock
* Require 48MHz for
* USB OTG FS,
* SDIO and RNG clock : Enabled
*/
/* HSI - 16 MHz RC factory-trimmed
@@ -129,8 +131,8 @@
/****************************************************************************
* LED Definitions
* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any
* way. The following definitions are used to access individual LEDs.
* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
* any way. The following definitions are used to access individual LEDs.
*/
/* LED index values for use with board_userled() */
@@ -148,8 +150,8 @@
/****************************************************************************
* Button Definitions
* There are two buttons on the axoloti, one of them is GPIO connected. The other
* is a reset button and is not under software control.
* There are two buttons on the axoloti, one of them is GPIO connected. The
* other is a reset button and is not under software control.
*/
#define BUTTON_USER 0
boards/arm/stm32/axoloti/src/stm32_adau1961.c
+3 -2
View File
@@ -125,8 +125,9 @@ static struct stm32_mwinfo_s g_adau1961info =
*
* Description:
* This function is called by platform-specific, setup logic to configure
* and register the ADAU1961 device. This function will register the driver
* as /dev/audio/pcm[x] where x is determined by the minor device number.
* and register the ADAU1961 device. This function will register the
* driver as /dev/audio/pcm[x] where x is determined by the minor device
* number.
*
* Input Parameters:
* minor - The input device minor number
boards/arm/stm32/axoloti/src/stm32_boot.c
+5 -4
View File
@@ -97,10 +97,11 @@ void stm32_boardinitialize(void)
* Description:
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
* initialization call will be performed in the boot-up sequence to a
* function called board_late_initialize(). board_late_initialize() will be
* called immediately after up_initialize() is called and just before the
* initial application is started. This additional initialization phase
* may be used, for example, to initialize board-specific device drivers.
* function called board_late_initialize(). board_late_initialize() will
* be called immediately after up_initialize() is called and just before
* the initial application is started. This additional initialization
* phase may be used, for example, to initialize board-specific device
* drivers.
*
****************************************************************************/
boards/arm/stm32/axoloti/src/stm32_extmem.c
+2 -1
View File
@@ -247,7 +247,8 @@ int stm32_sdram_initialize(void)
/* Step 4:
* Wait during the prescribed delay period. Typical delay is around 100
* μs (refer to the SDRAM datasheet for the required delay after power-up).
* μs (refer to the SDRAM datasheet for the required delay after
* power-up).
*/
nxsig_usleep(1000);
boards/arm/stm32/clicker2-stm32/include/board.h
+17 -12
View File
@@ -64,7 +64,8 @@
/* Clocking *****************************************************************/
/* The Clicker 2 for STM32 board features a 25Hz crystal and 32.768kHz RTC crystal.
/* The Clicker 2 for STM32 board features a 25Hz crystal and 32.768kHz RTC
* crystal.
*
* This is the canonical configuration:
* System Clock source : PLL (HSE)
@@ -78,12 +79,14 @@
* PLLN : 336 (STM32_PLLCFG_PLLN)
* PLLP : 2 (STM32_PLLCFG_PLLP)
* PLLQ : 7 (STM32_PLLCFG_PLLQ)
* Main regulator output voltage : Scale1 mode Needed for high speed SYSCLK
* Main regulator
* output voltage : Scale1 mode Needed for high speed SYSCLK
* Flash Latency(WS) : 5
* Prefetch Buffer : OFF
* Instruction cache : ON
* Data cache : ON
* Require 48MHz for USB OTG FS, : Enabled
* Require 48MHz for
* USB OTG FS, : Enabled
* SDIO and RNG clock
*/
@@ -200,14 +203,15 @@
# define SDIO_SDXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
#endif
/* LED definitions ******************************************************************/
/* LED definitions **********************************************************/
/* The Mikroe Clicker2 STM32 has two user controllable LEDs:
*
* LD1 - PE12, Active high output illuminates
* LD2 - PE15, Active high output illuminates
*
* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any
* way. The following definitions are used to access individual LEDs.
* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
* any way. The following definitions are used to access individual LEDs.
*/
/* LED index values for use with board_userled() */
@@ -221,8 +225,9 @@
#define BOARD_LED1_BIT (1 << BOARD_LED1)
#define BOARD_LED2_BIT (1 << BOARD_LED2)
/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 2 LEDs on board the
* Clicker2 for STM32. The following definitions describe how NuttX controls the LEDs:
/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 2 LEDs on
* board the Clicker2 for STM32.
* The following definitions describe how NuttX controls the LEDs:
*
* SYMBOL Meaning LED state
* LED1 LED2
@@ -276,7 +281,7 @@
#define GPIO_USART2_TX GPIO_USART2_TX_2 /* PD5 */
#define GPIO_USART3_RX GPIO_USART3_RX_3 /* PD9 */
#define GPIO_USART3_TX GPIO_USART3_TX_3 /* PD8 /
#define GPIO_USART3_TX GPIO_USART3_TX_3 /* PD8 */
/* SPI
*
@@ -319,10 +324,10 @@
#define GPIO_TIM1_CH1OUT GPIO_TIM1_CH1OUT_2 /* PE9 */
#define GPIO_TIM4_CH1OUT GPIO_TIM4_CH1OUT_2 /* PD12 */
/* DMA Channel/Stream Selections *********************************************/
/* DMA Channel/Stream Selections ********************************************/
/* Stream selections are arbitrary for now but might become important in the future
* if we set aside more DMA channels/streams.
/* Stream selections are arbitrary for now but might become important in the
* future if we set aside more DMA channels/streams.
*
* SDIO DMA
* DMAMAP_SDIO_1 = Channel 4, Stream 3
boards/arm/stm32/clicker2-stm32/src/stm32_automount.c
+23 -16
View File
@@ -62,6 +62,7 @@
/****************************************************************************
* Private Types
****************************************************************************/
/* This structure represents the changeable state of the automounter */
struct stm32_automount_state_s
@@ -76,8 +77,8 @@ struct stm32_automount_state_s
struct stm32_automount_config_s
{
/* This must be first thing in structure so that we can simply cast from struct
* automount_lower_s to struct stm32_automount_config_s
/* This must be first thing in structure so that we can simply cast from
* struct automount_lower_s to struct stm32_automount_config_s
*/
struct automount_lower_s lower; /* Publicly visible part */
@@ -91,7 +92,8 @@ struct stm32_automount_config_s
static int stm32_attach(FAR const struct automount_lower_s *lower,
automount_handler_t isr, FAR void *arg);
static void stm32_enable(FAR const struct automount_lower_s *lower, bool enable);
static void stm32_enable(FAR const struct automount_lower_s *lower,
bool enable);
static bool stm32_inserted(FAR const struct automount_lower_s *lower);
/****************************************************************************
@@ -107,8 +109,10 @@ static const struct stm32_automount_config_s g_mb1_mmcsdconfig =
.fstype = CONFIG_CLICKER2_STM32_MB1_MMCSD_AUTOMOUNT_FSTYPE,
.blockdev = CONFIG_CLICKER2_STM32_MB1_MMCSD_AUTOMOUNT_BLKDEV,
.mountpoint = CONFIG_CLICKER2_STM32_MB1_MMCSD_AUTOMOUNT_MOUNTPOINT,
.ddelay = MSEC2TICK(CONFIG_CLICKER2_STM32_MB1_MMCSD_AUTOMOUNT_DDELAY),
.udelay = MSEC2TICK(CONFIG_CLICKER2_STM32_MB1_MMCSD_AUTOMOUNT_UDELAY),
.ddelay = MSEC2TICK(
CONFIG_CLICKER2_STM32_MB1_MMCSD_AUTOMOUNT_DDELAY),
.udelay = MSEC2TICK(
CONFIG_CLICKER2_STM32_MB1_MMCSD_AUTOMOUNT_UDELAY),
.attach = stm32_attach,
.enable = stm32_enable,
.inserted = stm32_inserted
@@ -127,8 +131,10 @@ static const struct stm32_automount_config_s g_mb2_mmcsdconfig =
.fstype = CONFIG_CLICKER2_STM32_MB2_MMCSD_AUTOMOUNT_FSTYPE,
.blockdev = CONFIG_CLICKER2_STM32_MB2_MMCSD_AUTOMOUNT_BLKDEV,
.mountpoint = CONFIG_CLICKER2_STM32_MB2_MMCSD_AUTOMOUNT_MOUNTPOINT,
.ddelay = MSEC2TICK(CONFIG_CLICKER2_STM32_MB2_MMCSD_AUTOMOUNT_DDELAY),
.udelay = MSEC2TICK(CONFIG_CLICKER2_STM32_MB2_MMCSD_AUTOMOUNT_UDELAY),
.ddelay = MSEC2TICK(
CONFIG_CLICKER2_STM32_MB2_MMCSD_AUTOMOUNT_DDELAY),
.udelay = MSEC2TICK(
CONFIG_CLICKER2_STM32_MB2_MMCSD_AUTOMOUNT_UDELAY),
.attach = stm32_attach,
.enable = stm32_enable,
.inserted = stm32_inserted
@@ -197,7 +203,8 @@ static int stm32_attach(FAR const struct automount_lower_s *lower,
*
****************************************************************************/
static void stm32_enable(FAR const struct automount_lower_s *lower, bool enable)
static void stm32_enable(FAR const struct automount_lower_s *lower,
bool enable)
{
FAR const struct stm32_automount_config_s *config;
FAR struct stm32_automount_state_s *state;
@@ -310,16 +317,16 @@ int stm32_automount_initialize(void)
* Name: stm32_automount_event
*
* Description:
* The HSMCI card detection logic has detected an insertion or removal event. It
* has already scheduled the MMC/SD block driver operations. Now we need to
* schedule the auto-mount event which will occur with a substantial delay to make
* sure that everything has settle down.
* The HSMCI card detection logic has detected an insertion or removal
* event. It has already scheduled the MMC/SD block driver operations.
* Now we need to schedule the auto-mount event which will occur with a
* substantial delay to make sure that everything has settle down.
*
* Input Parameters:
* slotno - Identifies the MB slot: MB1_MMCSD_SLOTNO or MB2_MMCSD_SLOTNO. There is a
* terminology problem here: Each HSMCI supports two slots, slot A and slot B.
* Only slot A is used. So this is not a really a slot, but an HSCMI peripheral
* number.
* slotno - Identifies the MB slot: MB1_MMCSD_SLOTNO or MB2_MMCSD_SLOTNO.
* There is a terminology problem here: Each HSMCI supports two slots,
* slot A and slot B. Only slot A is used. So this is not a really a
* slot, but an HSCMI peripheral number.
* inserted - True if the card is inserted in the slot. False otherwise.
*
* Returned Value:
boards/arm/stm32/cloudctrl/include/board.h
+43 -33
View File
@@ -56,7 +56,7 @@
* Pre-processor Definitions
****************************************************************************/
/* Clocking *************************************************************************/
/* Clocking *****************************************************************/
/* HSI - 8 MHz RC factory-trimmed
* LSI - 40 KHz RC (30-60KHz, uncalibrated)
@@ -110,7 +110,8 @@
#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY)
#define STM32_APB1_TIM7_CLKIN (2*STM32_PCLK1_FREQUENCY)
/* MCO output driven by PLL3. From above, we already have PLL3 input frequency as:
/* MCO output driven by PLL3. From above, we already have PLL3 input
* frequency as:
*
* STM32_PLL_PREDIV2 = 5, 25MHz / 5 => 5MHz
*/
@@ -120,9 +121,10 @@
# define STM32_PLL_PLL3MUL RCC_CFGR2_PLL3MULx10 /* MCO 5MHz * 10 = 50MHz */
#endif
/* LED definitions ******************************************************************/
/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any
* way. The following definitions are used to access individual LEDs.
/* LED definitions **********************************************************/
/* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in
* any way. The following definitions are used to access individual LEDs.
*/
/* LED index values for use with board_userled() */
@@ -140,8 +142,9 @@
#define BOARD_LED3_BIT (1 << BOARD_LED3)
#define BOARD_LED4_BIT (1 << BOARD_LED4)
/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on board the
* STM3240G-EVAL. The following definitions describe how NuttX controls the LEDs:
/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the 4 LEDs on
* board the STM3240G-EVAL.
* The following definitions describe how NuttX controls the LEDs:
*/
#define LED_STARTED 0 /* LED1 */
@@ -153,7 +156,8 @@
#define LED_ASSERTION 6 /* LED1 + LED2 + LED3 */
#define LED_PANIC 7 /* N/C + N/C + N/C + LED4 */
/* Button definitions ***************************************************************/
/* Button definitions *******************************************************/
/* The STM3240G-EVAL supports three buttons: */
#define BUTTON_KEY1 0 /* Name printed on board */
@@ -177,16 +181,17 @@
#define NUM_RELAYS 2
/* Pin selections ******************************************************************/
/* Pin selections ***********************************************************/
/* Ethernet
*
* -- ---- -------------- ----------------------------------------------------------
* -- ---- -------------- ---------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ----------------------------------------------------------
* 24 PA1 MII_RX_CLK Ethernet PHY NOTE: Despite the MII labeling of these
* RMII_REF_CLK Ethernet PHY signals, the DM916AEP is actually configured
* 25 PA2 MII_MDIO Ethernet PHY to work in RMII mode.
* 48 PB11 MII_TX_EN Ethernet PHY
* -- ---- -------------- ---------------------------------------------------
* 24 PA1 MII_RX_CLK Ethernet PHY NOTE: Despite the MII labeling of
* RMII_REF_CLK Ethernet PHY these signals, the DM916AEP is
* 25 PA2 MII_MDIO Ethernet PHY actually configured to work in
* 48 PB11 MII_TX_EN Ethernet PHY RMII mode.
* 51 PB12 MII_TXD0 Ethernet PHY
* 52 PB13 MII_TXD1 Ethernet PHY
* 16 PC1 MII_MDC Ethernet PHY
@@ -216,9 +221,9 @@
/* USB
*
* -- ---- -------------- ----------------------------------------------------------
* -- ---- -------------- ---------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ----------------------------------------------------------
* -- ---- -------------- ---------------------------------------------------
* 68 PA9 USB_VBUS MINI-USB-AB. JP3
* 69 PA10 USB_ID MINI-USB-AB. JP5
* 70 PA11 USB_DM MINI-USB-AB
@@ -228,9 +233,9 @@
/* UARTS/USARTS
*
* -- ---- -------------- ----------------------------------------------------------
* -- ---- -------------- ---------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ----------------------------------------------------------
* -- ---- -------------- ---------------------------------------------------
* 68 PA9 USART1_TX MAX3232 to CN5. Requires CONFIG_STM32_USART1_REMAP
* 69 PA10 USART1_RX MAX3232 to CN5. Requires CONFIG_STM32_USART1_REMAP
* 86 PD5 USART2_TX MAX3232 to CN6. Requires CONFIG_STM32_USART2_REMAP
@@ -249,20 +254,23 @@
/* SPI
*
* -- ---- -------------- ----------------------------------------------------------
* -- ---- -------------- ---------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ----------------------------------------------------------
* -- ---- -------------- ---------------------------------------------------
* 30 PA5 SPI1_SCK To the SD card, SPI FLASH.
* Requires !CONFIG_STM32_SPI1_REMAP
* 31 PA6 SPI1_MISO To the SD card, SPI FLASH.
* Requires !CONFIG_STM32_SPI1_REMAP
* 32 PA7 SPI1_MOSI To the SD card, SPI FLASH.
* Requires !CONFIG_STM32_SPI1_REMAP
* 78 PC10 SPI3_SCK To TFT LCD (CN13), the NRF24L01 2.4G wireless module.
* 78 PC10 SPI3_SCK To TFT LCD (CN13),
* the NRF24L01 2.4G wireless module.
* Requires CONFIG_STM32_SPI3_REMAP.
* 79 PC11 SPI3_MISO To TFT LCD (CN13), the NRF24L01 2.4G wireless module.
* 79 PC11 SPI3_MISO To TFT LCD (CN13),
* the NRF24L01 2.4G wireless module.
* Requires CONFIG_STM32_SPI3_REMAP.
* 80 PC12 SPI3_MOSI To TFT LCD (CN13), the NRF24L01 2.4G wireless module.
* 80 PC12 SPI3_MOSI To TFT LCD (CN13),
* the NRF24L01 2.4G wireless module.
* Requires CONFIG_STM32_SPI3_REMAP.
*/
@@ -276,18 +284,18 @@
/* DAC
*
* -- ---- -------------- ----------------------------------------------------------
* -- ---- -------------- ---------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ----------------------------------------------------------
* -- ---- -------------- ---------------------------------------------------
* 29 PA4 DAC_OUT1 To CON5(CN14)
* 30 PA5 DAC_OUT2 To CON5(CN14). JP10
*/
/* ADC
*
* -- ---- -------------- ----------------------------------------------------------
* -- ---- -------------- ---------------------------------------------------
* PN NAME SIGNAL NOTES
* -- ---- -------------- ----------------------------------------------------------
* -- ---- -------------- ---------------------------------------------------
* 35 PB0 ADC_IN1 GPIO_ADC12_IN8. To CON5(CN14)
* 36 PB1 ADC_IN2 GPIO_ADC12_IN9. To CON5(CN14)
* 15 PC0 POTENTIO_METER GPIO_ADC12_IN10
@@ -302,7 +310,8 @@
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C" {
extern "C"
{
#else
#define EXTERN extern
#endif
@@ -315,10 +324,11 @@ extern "C" {
* Name: stm32_lcdclear
*
* Description:
* This is a non-standard LCD interface just for the Shenzhou board. Because
* of the various rotations, clearing the display in the normal way by writing a
* sequences of runs that covers the entire display can be very slow. Here the
* display is cleared by simply setting all GRAM memory to the specified color.
* This is a non-standard LCD interface just for the Shenzhou board.
* Because of the various rotations, clearing the display in the normal
* way by writing a sequences of runs that covers the entire display can
* be very slow. Here the display is cleared by simply setting all GRAM
* memory to the specified color.
*
****************************************************************************/
boards/arm/stm32/cloudctrl/src/stm32_adc.c
+15 -5
View File
@@ -58,7 +58,9 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ********************************************************************/
/* Configuration ************************************************************/
/* Up to 3 ADC interfaces are supported */
#if STM32_NADC < 3
@@ -86,8 +88,8 @@
* Private Data
****************************************************************************/
/* Identifying number of each ADC channel. The only internal signal for ADC testing
* is the potentiometer input:
/* Identifying number of each ADC channel. The only internal signal for ADC
* testing is the potentiometer input:
*
* ADC1_IN10(PC0) Potentiometer
*
@@ -98,11 +100,19 @@
*/
#ifdef CONFIG_STM32_ADC1
static const uint8_t g_chanlist[ADC1_NCHANNELS] = {10}; //{10, 8, 9};
static const uint8_t g_chanlist[ADC1_NCHANNELS] =
{
10 /* {10, 8, 9}; */
};
/* Configurations of pins used by each ADC channel */
static const uint32_t g_pinlist[ADC1_NCHANNELS] = {GPIO_ADC12_IN10}; //{GPIO_ADC12_IN10, GPIO_ADC12_IN8, GPIO_ADC12_IN9};
static const uint32_t g_pinlist[ADC1_NCHANNELS] =
{
GPIO_ADC12_IN10
};
/* {GPIO_ADC12_IN10, GPIO_ADC12_IN8, GPIO_ADC12_IN9}; */
#endif
/****************************************************************************
boards/arm/stm32/cloudctrl/src/stm32_appinit.c
+3 -2
View File
@@ -53,6 +53,7 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* Assume that we support everything until convinced otherwise */
@@ -141,8 +142,8 @@ int board_app_initialize(uintptr_t arg)
}
#endif
/* Initialize USB host operation. stm32_usbhost_initialize() starts a thread
* will monitor for USB connection and disconnection events.
/* Initialize USB host operation. stm32_usbhost_initialize() starts a
* thread will monitor for USB connection and disconnection events.
*/
#ifdef HAVE_USBHOST
boards/arm/stm32/cloudctrl/src/stm32_autoleds.c
-7
View File
@@ -213,7 +213,6 @@ static inline void led_clrbits(unsigned int clrbits)
{
stm32_gpiowrite(GPIO_LED4, true);
}
}
/****************************************************************************
@@ -247,7 +246,6 @@ static inline void led_setbits(unsigned int setbits)
{
stm32_gpiowrite(GPIO_LED4, false);
}
}
/****************************************************************************
@@ -282,35 +280,30 @@ static void led_pm_notify(struct pm_callback_s *cb, int domain,
case(PM_NORMAL):
{
/* Restore normal LEDs operation */
}
break;
case(PM_IDLE):
{
/* Entering IDLE mode - Turn leds off */
}
break;
case(PM_STANDBY):
{
/* Entering STANDBY mode - Logic for PM_STANDBY goes here */
}
break;
case(PM_SLEEP):
{
/* Entering SLEEP mode - Logic for PM_SLEEP goes here */
}
break;
default:
{
/* Should not get here */
}
break;
}
boards/arm/stm32/cloudctrl/src/stm32_boot.c
+8 -7
View File
@@ -64,16 +64,17 @@
* Name: stm32_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
* All STM32 architectures must provide the following entry point. This
* entry point is called early in the initialization -- after all memory
* has been configured and mapped but before any devices have been
* initialized.
*
****************************************************************************/
void stm32_boardinitialize(void)
{
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
* stm32_spidev_initialize() has been brought into the link.
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak
* function stm32_spidev_initialize() has been brought into the link.
*/
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI3)
@@ -84,8 +85,8 @@ void stm32_boardinitialize(void)
#endif
/* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not
* disabled, and 3) the weak function stm32_usbinitialize() has been brought
* into the build.
* disabled, and 3) the weak function stm32_usbinitialize() has been
* brought into the build.
*/
#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB)
boards/arm/stm32/cloudctrl/src/stm32_relays.c
+6 -6
View File
@@ -195,7 +195,7 @@ void up_relaysinit(void)
g_relays_init = true;
}
void relays_setstat(int relays,bool stat)
void relays_setstat(int relays, bool stat)
{
if ((unsigned)relays < NUM_RELAYS)
{
@@ -227,7 +227,7 @@ void relays_setstats(uint32_t relays_stat)
for (i = 0; i < NUM_RELAYS; i++)
{
relays_setstat(i, (relays_stat & (1<<i))!=0);
relays_setstat(i, (relays_stat & (1 << i)) != 0);
}
}
@@ -240,16 +240,16 @@ void relays_onoff(int relays, uint32_t mdelay)
{
if ((unsigned)relays < NUM_RELAYS)
{
if (mdelay>0)
if (mdelay > 0)
{
if (relays_getstat(relays))
{
relays_setstat(relays, false);
nxsig_usleep(RELAYS_MIN_RESET_TIME*1000*1000);
nxsig_usleep(RELAYS_MIN_RESET_TIME * 1000 * 1000);
}
relays_setstat(relays,true);
nxsig_usleep(mdelay*100*1000);
relays_setstat(relays, true);
nxsig_usleep(mdelay * 100 * 1000);
relays_setstat(relays, false);
}
}
boards/arm/stm32/cloudctrl/src/stm32_spi.c
+24 -21
View File
@@ -91,31 +91,34 @@ void weak_function stm32_spidev_initialize(void)
* Name: stm32_spi1/2/3select and stm32_spi1/2/3status
*
* Description:
* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
* provided by board-specific logic. They are implementations of the select
* and status methods of the SPI interface defined by struct spi_ops_s (see
* include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize())
* are provided by common STM32 logic. To use this common SPI logic on your
* board:
* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status
* must be provided by board-specific logic. They are implementations of
* the select and status methods of the SPI interface defined by struct
* spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including
* stm32_spibus_initialize()) are provided by common STM32 logic.
* To use this common SPI logic on your board:
*
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
* pins.
* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
* board-specific logic. These functions will perform chip selection and
* status operations using GPIOs in the way your board is configured.
* 3. Add a calls to stm32_spibus_initialize() in your low level application
* initialization logic
* 4. The handle returned by stm32_spibus_initialize() may then be used to bind the
* SPI driver to higher level logic (e.g., calling
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip
* select pins.
* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions
* in your board-specific logic. These functions will perform chip
* selection and status operations using GPIOs in the way your board is
* configured.
* 3. Add a calls to stm32_spibus_initialize() in your low level
* application initialization logic
* 4. The handle returned by stm32_spibus_initialize() may then be used to
* bind the SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
****************************************************************************/
#ifdef CONFIG_STM32_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
void stm32_spi1select(FAR struct spi_dev_s *dev,
uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spiinfo("devid: %d CS: %s\n",
(int)devid, selected ? "assert" : "de-assert");
/* SPI1 connects to the SD CARD and to the SPI FLASH */
@@ -129,16 +132,16 @@ void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
{
return SPI_STATUS_PRESENT;
}
#endif
#ifdef CONFIG_STM32_SPI3
void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
void stm32_spi3select(FAR struct spi_dev_s *dev,
uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spiinfo("devid: %d CS: %s\n",
(int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
boards/arm/stm32/cloudctrl/src/stm32_usbmsc.c
+3 -1
View File
@@ -53,6 +53,7 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#ifndef CONFIG_SYSTEM_USBMSC_DEVMINOR1
@@ -74,7 +75,8 @@
int board_usbmsc_initialize(int port)
{
/* If system/usbmsc is built as an NSH command, then SD slot should
* already have been initized in board_app_initialize() (see stm32_appinit.c).
* already have been initized in board_app_initialize()
* (see stm32_appinit.c).
* In this case, there is nothing further to be done here.
*/
boards/arm/stm32/hymini-stm32v/src/stm32_r61505u.c
+106 -92
View File
@@ -85,7 +85,10 @@
#define LCD_BL_TIMER_PERIOD 8999
/* LCD is connected to the FSMC_Bank1_NOR/SRAM1 and NE1 is used as ship select signal */
/* LCD is connected to the FSMC_Bank1_NOR/SRAM1 and NE1 is used as ship
* select signal
*/
/* RS <==> A16 */
#define LCD_REG (*((volatile unsigned short *) 0x60000000)) /* RS = 0 */
@@ -132,16 +135,17 @@ static void lcd_clear(uint16_t color);
/* LCD Data Transfer Methods */
static int lcd_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
size_t npixels);
static int lcd_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
size_t npixels);
static int lcd_putrun(fb_coord_t row, fb_coord_t col,
FAR const uint8_t *buffer, size_t npixels);
static int lcd_getrun(fb_coord_t row, fb_coord_t col,
FAR uint8_t *buffer, size_t npixels);
/* LCD Configuration */
static int lcd_getvideoinfo(FAR struct lcd_dev_s *dev,
FAR struct fb_videoinfo_s *vinfo);
static int lcd_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
static int lcd_getplaneinfo(FAR struct lcd_dev_s *dev,
unsigned int planeno,
FAR struct lcd_planeinfo_s *pinfo);
/* LCD RGB Mapping */
@@ -161,7 +165,8 @@ static int lcd_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
static int lcd_getpower(struct lcd_dev_s *dev);
static int lcd_setpower(struct lcd_dev_s *dev, int power);
static int lcd_getcontrast(struct lcd_dev_s *dev);
static int lcd_setcontrast(struct lcd_dev_s *dev, unsigned int contrast);
static int lcd_setcontrast(struct lcd_dev_s *dev,
unsigned int contrast);
/* Initialization (LCD ctrl / backlight) */
@@ -187,9 +192,9 @@ static const uint16_t fsmc_gpios[] =
/* D0... D15 */
GPIO_NPS_D0, GPIO_NPS_D1, GPIO_NPS_D2, GPIO_NPS_D3,
GPIO_NPS_D4, GPIO_NPS_D5, GPIO_NPS_D6, GPIO_NPS_D7, GPIO_NPS_D8, GPIO_NPS_D9,
GPIO_NPS_D10, GPIO_NPS_D11, GPIO_NPS_D12, GPIO_NPS_D13, GPIO_NPS_D14,
GPIO_NPS_D15,
GPIO_NPS_D4, GPIO_NPS_D5, GPIO_NPS_D6, GPIO_NPS_D7,
GPIO_NPS_D8, GPIO_NPS_D9, GPIO_NPS_D10, GPIO_NPS_D11,
GPIO_NPS_D12, GPIO_NPS_D13, GPIO_NPS_D14, GPIO_NPS_D15,
/* NOE, NWE */
@@ -231,7 +236,7 @@ static const struct lcd_planeinfo_s g_planeinfo =
{
.putrun = lcd_putrun, /* Put a run into LCD memory */
.getrun = lcd_getrun, /* Get a run from LCD memory */
.buffer = (uint8_t*) g_runbuffer, /* Run scratch buffer */
.buffer = (uint8_t *) g_runbuffer, /* Run scratch buffer */
.bpp = LCD_BPP, /* Bits-per-pixel */
};
@@ -246,6 +251,7 @@ static struct mylcd_dev_s g_lcddev =
.getplaneinfo = lcd_getplaneinfo,
/* LCD RGB Mapping -- Not supported */
/* Cursor Controls -- Not supported */
/* LCD Specific Controls */
@@ -306,7 +312,7 @@ static void stm32_selectlcd(void)
/* Bank1 NOR/SRAM timing register configuration */
putreg32(FSMC_BTR_ADDSET(2) | FSMC_BTR_ADDHLD(0) |FSMC_BTR_DATAST(2) |
putreg32(FSMC_BTR_ADDSET(2) | FSMC_BTR_ADDHLD(0) | FSMC_BTR_DATAST(2) |
FSMC_BTR_BUSTURN(0) | FSMC_BTR_CLKDIV(0) | FSMC_BTR_DATLAT(0) |
FSMC_BTR_ACCMODA,
STM32_FSMC_BTR1);
@@ -413,15 +419,15 @@ static void lcd_setcursor(unsigned int x, unsigned int y)
x = (LCD_XRES - 1) - x;
y = (LCD_YRES - 1) - y;
# endif
write_reg(0x20,x); /* Row */
write_reg(0x21,y); /* Line */
write_reg(0x20, x); /* Row */
write_reg(0x21, y); /* Line */
#endif
#if defined(CONFIG_LCD_LANDSCAPE)
y = (LCD_YRES - 1) - y;
write_reg(0x20,x); /* Row */
write_reg(0x21,y); /* Line */
write_reg(0x20, x); /* Row */
write_reg(0x21, y); /* Line */
#endif
}
@@ -439,11 +445,12 @@ static void lcd_setcursor(unsigned int x, unsigned int y)
*
****************************************************************************/
static int lcd_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
static int lcd_putrun(fb_coord_t row, fb_coord_t col,
FAR const uint8_t *buffer,
size_t npixels)
{
int i;
FAR const uint16_t *src = (FAR const uint16_t*) buffer;
FAR const uint16_t *src = (FAR const uint16_t *) buffer;
/* Buffer must be provided and aligned to a 16-bit address boundary */
@@ -479,7 +486,7 @@ static int lcd_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *buffer,
static int lcd_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer,
size_t npixels)
{
FAR uint16_t *dest = (FAR uint16_t*) buffer;
FAR uint16_t *dest = (FAR uint16_t *) buffer;
int i;
/* Buffer must be provided and aligned to a 16-bit address boundary */
@@ -516,7 +523,8 @@ static int lcd_getvideoinfo(FAR struct lcd_dev_s *dev,
{
DEBUGASSERT(dev && vinfo);
ginfo("fmt: %d xres: %d yres: %d nplanes: %d\n",
g_videoinfo.fmt, g_videoinfo.xres, g_videoinfo.yres, g_videoinfo.nplanes);
g_videoinfo.fmt, g_videoinfo.xres,
g_videoinfo.yres, g_videoinfo.nplanes);
memcpy(vinfo, &g_videoinfo, sizeof(struct fb_videoinfo_s));
return OK;
@@ -544,7 +552,8 @@ static int lcd_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
* Name: lcd_getpower
*
* Description:
* Get the LCD panel power status (0: full off - CONFIG_LCD_MAXPOWER: full on). On
* Get the LCD panel power status
* (0: full off - CONFIG_LCD_MAXPOWER: full on). On
* backlit LCDs, this setting may correspond to the backlight setting.
*
****************************************************************************/
@@ -559,7 +568,8 @@ static int lcd_getpower(struct lcd_dev_s *dev)
* Name: lcd_setpower
*
* Description:
* Enable/disable LCD panel power (0: full off - CONFIG_LCD_MAXPOWER: full on).
* Enable/disable LCD panel power
* (0: full off - CONFIG_LCD_MAXPOWER: full on).
* Used here to set pwm duty on timer used for backlight.
*
****************************************************************************/
@@ -586,7 +596,8 @@ static int lcd_setpower(struct lcd_dev_s *dev, int power)
* maximum power setting.
*/
duty = ((uint32_t)LCD_BL_TIMER_PERIOD * (uint32_t)power) / CONFIG_LCD_MAXPOWER;
duty = ((uint32_t)LCD_BL_TIMER_PERIOD * (uint32_t)power) /
CONFIG_LCD_MAXPOWER;
if (duty >= LCD_BL_TIMER_PERIOD)
{
duty = LCD_BL_TIMER_PERIOD - 1;
@@ -647,93 +658,93 @@ static int lcd_setcontrast(struct lcd_dev_s *dev, unsigned int contrast)
static inline void lcd_initialize(void)
{
/* Second release on 3/5 ,luminance is acceptable,water wave appear during camera
* preview
/* Second release on 3/5 ,luminance is acceptable,water wave appear
* during camera preview
*/
write_reg(0x07,0x0000);
write_reg(0x07, 0x0000);
up_mdelay(5); /* Delay 50 ms */
write_reg(0x12,0x011C); /* Why need to set several times? */
write_reg(0xA4,0x0001); /* NVM */
write_reg(0x08,0x000F);
write_reg(0x0A,0x0008);
write_reg(0x0D,0x0008);
write_reg(0x12, 0x011c); /* Why need to set several times? */
write_reg(0xa4, 0x0001); /* NVM */
write_reg(0x08, 0x000f);
write_reg(0x0a, 0x0008);
write_reg(0x0d, 0x0008);
/* GAMMA CONTROL */
write_reg(0x30,0x0707);
write_reg(0x31,0x0007);
write_reg(0x32,0x0603);
write_reg(0x33,0x0700);
write_reg(0x34,0x0202);
write_reg(0x35,0x0002);
write_reg(0x36,0x1F0F);
write_reg(0x37,0x0707);
write_reg(0x38,0x0000);
write_reg(0x39,0x0000);
write_reg(0x3A,0x0707);
write_reg(0x3B,0x0000);
write_reg(0x3C,0x0007);
write_reg(0x3D,0x0000);
write_reg(0x30, 0x0707);
write_reg(0x31, 0x0007);
write_reg(0x32, 0x0603);
write_reg(0x33, 0x0700);
write_reg(0x34, 0x0202);
write_reg(0x35, 0x0002);
write_reg(0x36, 0x1f0f);
write_reg(0x37, 0x0707);
write_reg(0x38, 0x0000);
write_reg(0x39, 0x0000);
write_reg(0x3a, 0x0707);
write_reg(0x3b, 0x0000);
write_reg(0x3c, 0x0007);
write_reg(0x3d, 0x0000);
up_mdelay(5); /* Delay 50 ms */
write_reg(0x07,0x0001);
write_reg(0x17,0x0001); /* Power supply startup enable */
write_reg(0x07, 0x0001);
write_reg(0x17, 0x0001); /* Power supply startup enable */
up_mdelay(5); /* Delay 50 ms */
/* Power control */
write_reg(0x10,0x17A0);
write_reg(0x11,0x0217); /* Feference voltage VC[2:0] Vciout = 1.00*Vcivl */
write_reg(0x12,0x011E); /* Vreg1out = Vcilvl*1.80 is it the same as Vgama1out ? */
write_reg(0x13,0x0F00); /* VDV[4:0]-->VCOM Amplitude VcomL = VcomH - Vcom Ampl */
write_reg(0x2A,0x0000);
write_reg(0x29,0x000A); /* Vcomh = VCM1[4:0]*Vreg1out gate source voltage?? */
write_reg(0x12,0x013E); /* Power supply on */
write_reg(0x10, 0x17a0);
write_reg(0x11, 0x0217); /* Feference voltage VC[2:0] Vciout = 1.00*Vcivl */
write_reg(0x12, 0x011e); /* Vreg1out = Vcilvl*1.80 is it the same as Vgama1out ? */
write_reg(0x13, 0x0f00); /* VDV[4:0]-->VCOM Amplitude VcomL = VcomH - Vcom Ampl */
write_reg(0x2a, 0x0000);
write_reg(0x29, 0x000a); /* Vcomh = VCM1[4:0]*Vreg1out gate source voltage?? */
write_reg(0x12, 0x013e); /* Power supply on */
/* Coordinates Control */
write_reg(0x50,0x0000);
write_reg(0x51,0x00EF);
write_reg(0x52,0x0000);
write_reg(0x53,0x013F);
write_reg(0x50, 0x0000);
write_reg(0x51, 0x00ef);
write_reg(0x52, 0x0000);
write_reg(0x53, 0x013f);
/* Panel Image Control */
write_reg(0x60,0x2700);
write_reg(0x61,0x0001);
write_reg(0x6A,0x0000);
write_reg(0x80,0x0000);
write_reg(0x60, 0x2700);
write_reg(0x61, 0x0001);
write_reg(0x6a, 0x0000);
write_reg(0x80, 0x0000);
/* Partial Image Control */
write_reg(0x81,0x0000);
write_reg(0x82,0x0000);
write_reg(0x83,0x0000);
write_reg(0x84,0x0000);
write_reg(0x85,0x0000);
write_reg(0x81, 0x0000);
write_reg(0x82, 0x0000);
write_reg(0x83, 0x0000);
write_reg(0x84, 0x0000);
write_reg(0x85, 0x0000);
/* Panel Interface Control */
write_reg(0x90,0x0013); /* Frequency */
write_reg(0x92,0x0300);
write_reg(0x93,0x0005);
write_reg(0x95,0x0000);
write_reg(0x97,0x0000);
write_reg(0x98,0x0000);
write_reg(0x90, 0x0013); /* Frequency */
write_reg(0x92, 0x0300);
write_reg(0x93, 0x0005);
write_reg(0x95, 0x0000);
write_reg(0x97, 0x0000);
write_reg(0x98, 0x0000);
write_reg(0x01,0x0100);
write_reg(0x02,0x0700);
write_reg(0x03,0x1030);
write_reg(0x04,0x0000);
write_reg(0x0C,0x0000);
write_reg(0x0F,0x0000);
write_reg(0x20,0x0000);
write_reg(0x21,0x0000);
write_reg(0x07,0x0021);
write_reg(0x01, 0x0100);
write_reg(0x02, 0x0700);
write_reg(0x03, 0x1030);
write_reg(0x04, 0x0000);
write_reg(0x0c, 0x0000);
write_reg(0x0f, 0x0000);
write_reg(0x20, 0x0000);
write_reg(0x21, 0x0000);
write_reg(0x07, 0x0021);
up_mdelay(20); /* Delay 200 ms */
write_reg(0x07,0x0061);
write_reg(0x07, 0x0061);
up_mdelay(20); /* Delay 200 ms */
write_reg(0x07,0x0173);
write_reg(0x07, 0x0173);
up_mdelay(20); /* Delay 200 ms */
}
@@ -806,7 +817,10 @@ static void lcd_backlight(void)
/* Set the capture compare register value (50% duty) */
// FIXME should be set to 0 (appl needs to call setpower to change it)
/* FIXME should be set to 0
* (appl needs to call setpower to change it)
*/
g_lcddev.power = (CONFIG_LCD_MAXPOWER + 1) / 2;
putreg16((LCD_BL_TIMER_PERIOD + 1) / 2, STM32_TIM3_CCR2);
@@ -814,7 +828,7 @@ static void lcd_backlight(void)
ccer &= !ATIM_CCER_CC2P;
/* Enable channel 2*/
/* Enable channel 2 */
ccer |= ATIM_CCER_CC2E;
@@ -827,7 +841,7 @@ static void lcd_backlight(void)
modifyreg16(STM32_TIM3_CR1, 0, ATIM_CR1_ARPE);
/* Enable Backlight Timer !!!!*/
/* Enable Backlight Timer !!!! */
modifyreg16(STM32_TIM3_CR1, 0, ATIM_CR1_CEN);
@@ -864,9 +878,9 @@ static void lcd_backlight(void)
* Name: board_lcd_initialize
*
* Description:
* Initialize the LCD video hardware. The initial state of the LCD is fully
* initialized, display memory cleared, and the LCD ready to use, but with the power
* setting at 0 (full off).
* Initialize the LCD video hardware. The initial state of the LCD is
* fully initialized, display memory cleared, and the LCD ready to use,
* but with the power setting at 0 (full off).
*
****************************************************************************/
@@ -913,8 +927,8 @@ int board_lcd_initialize(void)
* Name: board_lcd_getdev
*
* Description:
* Return a a reference to the LCD object for the specified LCD. This allows support
* for multiple LCD devices.
* Return a a reference to the LCD object for the specified LCD.
* This allows support for multiple LCD devices.
*
****************************************************************************/
boards/arm/stm32/maple/include/board.h
+8 -4
View File
@@ -54,13 +54,15 @@
* Pre-processor Definitions
****************************************************************************/
/* Clocking *************************************************************************/
/* Clocking *****************************************************************/
/* On-board crystal frequency is 8MHz (HSE) */
#define STM32_BOARD_XTAL 8000000ul
/* PLL source is HSE/1, PLL multipler is 9: PLL frequency is 8MHz (XTAL) x 9 = 72MHz */
/* PLL source is HSE/1, PLL multipler is 9:
* PLL frequency is 8MHz (XTAL) x 9 = 72MHz
*/
#define STM32_CFGR_PLLSRC RCC_CFGR_PLLSRC
#define STM32_CFGR_PLLXTPRE 0
@@ -109,7 +111,8 @@
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
* otherwise frequency is 2xAPBx.
* Note: TIM1,8 are on APB2, others on APB1 */
* Note: TIM1,8 are on APB2, others on APB1
*/
#define BOARD_TIM1_FREQUENCY STM32_HCLK_FREQUENCY
#define BOARD_TIM2_FREQUENCY STM32_HCLK_FREQUENCY
@@ -150,9 +153,10 @@
# define SDIO_SDXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT)
#endif
/* LED definitions ******************************************************************/
/* LED definitions **********************************************************/
/* The board has only one controllable LED */
#define LED_STARTED 0 /* No LEDs */
#define LED_HEAPALLOCATE 1 /* LED1 on */
#define LED_IRQSENABLED 2 /* LED2 on */
boards/arm/stm32/maple/src/stm32_boot.c
+8 -7
View File
@@ -64,9 +64,10 @@
* Name: stm32_boardinitialize
*
* Description:
* All STM32 architectures must provide the following entry point. This entry point
* is called early in the initialization -- after all memory has been configured
* and mapped but before any devices have been initialized.
* All STM32 architectures must provide the following entry point. This
* entry point is called early in the initialization -- after all memory
* has been configured and mapped but before any devices have been
* initialized.
*
****************************************************************************/
@@ -78,8 +79,8 @@ void stm32_boardinitialize(void)
board_autoled_initialize();
#endif
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak function
* stm32_spidev_initialize() has been brought into the link.
/* Configure SPI chip selects if 1) SPI is not disabled, and 2) the weak
* function stm32_spidev_initialize() has been brought into the link.
*/
#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2)
@@ -87,8 +88,8 @@ void stm32_boardinitialize(void)
#endif
/* Initialize USB is 1) USBDEV is selected, 2) the USB controller is not
* disabled, and 3) the weak function stm32_usbinitialize() has been brought
* into the build.
* disabled, and 3) the weak function stm32_usbinitialize() has been
* brought into the build.
*/
#if defined(CONFIG_USBDEV) && defined(CONFIG_STM32_USB)
boards/arm/stm32/maple/src/stm32_lcd.c
+1
View File
@@ -62,6 +62,7 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
#define EXTCOMIN_FREQ 24
boards/arm/stm32/maple/src/stm32_leds.c
+2
View File
@@ -98,6 +98,7 @@ void board_autoled_on(int led)
break;
case LED_PANIC:
/* For panic state, the LED is blinking */
set_led(true);
@@ -120,6 +121,7 @@ void board_autoled_off(int led)
{
case LED_STARTED:
case LED_PANIC:
/* For panic state, the LED is blinking */
set_led(false);
boards/arm/stm32/maple/src/stm32_spi.c
+22 -18
View File
@@ -82,22 +82,23 @@ void weak_function stm32_spidev_initialize(void)
* Name: stm32_spi1/2select and stm32_spi1/2status
*
* Description:
* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
* provided by board-specific logic. They are implementations of the select
* and status methods of the SPI interface defined by struct spi_ops_s (see
* include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize())
* are provided by common STM32 logic. To use this common SPI logic on your
* board:
* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status
* must be provided by board-specific logic. They are implementations of
* the select and status methods of the SPI interface defined by struct
* spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including
* stm32_spibus_initialize()) are provided by common STM32 logic.
* To use this common SPI logic on your board:
*
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
* pins.
* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
* board-specific logic. These functions will perform chip selection and
* status operations using GPIOs in the way your board is configured.
* 3. Add a calls to stm32_spibus_initialize() in your low level application
* initialization logic
* 4. The handle returned by stm32_spibus_initialize() may then be used to bind the
* SPI driver to higher level logic (e.g., calling
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip
* select pins.
* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions
* in your board-specific logic. These functions will perform chip
* selection and status operations using GPIOs in the way your board is
* configured.
* 3. Add a calls to stm32_spibus_initialize() in your low level
* application initialization logic
* 4. The handle returned by stm32_spibus_initialize() may then be used to
* bind the SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
@@ -107,7 +108,8 @@ void weak_function stm32_spidev_initialize(void)
void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid,
bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spiinfo("devid: %d CS: %s\n",
(int)devid, selected ? "assert" : "de-assert");
# if defined(CONFIG_LCD_SHARP_MEMLCD)
if (devid == SPIDEV_DISPLAY(0))
@@ -122,7 +124,8 @@ uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
return 0;
}
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
int stm32_spi1cmddata(FAR struct spi_dev_s *dev,
uint32_t devid, bool cmd)
{
return -ENODEV;
}
@@ -139,7 +142,8 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
return 0;
}
int stm32_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
int stm32_spi1cmddata(FAR struct spi_dev_s *dev,
uint32_t devid, bool cmd)
{
return -ENODEV;
}
boards/arm/stm32/maple/src/stm32_usbdev.c
+9 -9
View File
@@ -85,11 +85,11 @@ void stm32_usbinitialize(void)
* Name: stm32_usbpullup
*
* Description:
* If USB is supported and the board supports a pullup via GPIO (for USB software
* connect and disconnect), then the board software must provide stm32_pullup.
* See include/nuttx/usb/usbdev.h for additional description of this method.
* Alternatively, if no pull-up GPIO the following EXTERN can be redefined to be
* NULL.
* If USB is supported and the board supports a pullup via GPIO (for USB
* software connect and disconnect), then the board software must provide
* stm32_pullup. See include/nuttx/usb/usbdev.h for additional description
* of this method. Alternatively, if no pull-up GPIO the following EXTERN
* can be redefined to be NULL.
*
****************************************************************************/
@@ -104,10 +104,10 @@ int stm32_usbpullup(FAR struct usbdev_s *dev, bool enable)
* Name: stm32_usbsuspend
*
* Description:
* Board logic must provide the stm32_usbsuspend logic if the USBDEV driver is
* used. This function is called whenever the USB enters or leaves suspend mode.
* This is an opportunity for the board logic to shutdown clocks, power, etc.
* while the USB is suspended.
* Board logic must provide the stm32_usbsuspend logic if the USBDEV driver
* is used. This function is called whenever the USB enters or leaves
* suspend mode. This is an opportunity for the board logic to shutdown
* clocks, power, etc. while the USB is suspended.
*
****************************************************************************/
boards/arm/stm32/mikroe-stm32f4/src/stm32_clockconfig.c
+11 -7
View File
@@ -62,10 +62,11 @@
* Name: stm32_board_clockconfig
*
* Description:
* The Mikroe-STM32F4 board does not have an external crystal, so it must rely
* on the internal 16Mhz RC oscillator. The default clock configuration in the
* OS for the STM32 architecture assumes an external crystal, so we must provide
* a board specific clock configuration routine.
* The Mikroe-STM32F4 board does not have an external crystal, so it must
* rely on the internal 16Mhz RC oscillator. The default clock
* configuration in the OS for the STM32 architecture assumes an external
* crystal, so we must provide a board specific clock configuration
* routine.
*
****************************************************************************/
@@ -111,7 +112,7 @@ void stm32_board_clockconfig(void)
/* Set the PLL dividers and multipliers to configure the main PLL */
regval = (STM32_PLLCFG_PLLM | STM32_PLLCFG_PLLN |STM32_PLLCFG_PLLP |
regval = (STM32_PLLCFG_PLLM | STM32_PLLCFG_PLLN | STM32_PLLCFG_PLLP |
RCC_PLLCFG_PLLSRC_HSI | STM32_PLLCFG_PLLQ);
putreg32(regval, STM32_RCC_PLLCFG);
@@ -126,10 +127,13 @@ void stm32_board_clockconfig(void)
while ((getreg32(STM32_RCC_CR) & RCC_CR_PLLRDY) == 0)
;
/* Enable FLASH prefetch, instruction cache, data cache, and 5 wait states */
/* Enable FLASH prefetch, instruction cache, data cache, and 5 wait
* states
*/
#ifdef CONFIG_STM32_FLASH_PREFETCH
regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN | FLASH_ACR_PRFTEN);
regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN |
FLASH_ACR_DCEN | FLASH_ACR_PRFTEN);
#else
regval = (FLASH_ACR_LATENCY_5 | FLASH_ACR_ICEN | FLASH_ACR_DCEN);
#endif
boards/arm/stm32/mikroe-stm32f4/src/stm32_idle.c
+2
View File
@@ -61,7 +61,9 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* Does the board support an IDLE LED to indicate that the board is in the
* IDLE state?
*/
boards/arm/stm32/mikroe-stm32f4/src/stm32_mio283qt2.c
+41 -31
View File
@@ -1,7 +1,8 @@
/****************************************************************************
* boards/arm/stm32/mikroe-stm32f4/src/stm32_mio283qt2.c
*
* Interface definition for the MI0283QT-2 LCD from Multi-Inno Technology Co., Ltd.
* Interface definition for the MI0283QT-2 LCD from Multi-Inno Technology
* Co., Ltd.
* This LCD is based on the Himax HX8347-D LCD controller.
*
* Copyright (C) 2012-2013 Gregory Nutt. All rights reserved.
@@ -68,11 +69,13 @@
* Pre-processor Definitions
****************************************************************************/
/* Mikroe-STM32F4 Hardware Definitions ************************************************/
/* --- ---------------------------------- -------------------- ------------------------
/* Mikroe-STM32F4 Hardware Definitions **************************************/
/* --- --------------------- -------------------- ------------------------
* PIN CONFIGURATIONS SIGNAL NAME ON-BOARD CONNECTIONS
* (Family Data Sheet Table 1-1) (PIC32MX7 Schematic)
* --- ---------------------------------- -------------------- ------------------------
* (Family Data Sheet
* Table 1-1) (PIC32MX7 Schematic)
* --- --------------------- -------------------- ------------------------
* 39 PE8 LCD_RST TFT display
* 46 PE15 LCD-CS# TFT display
* 40 PE9 LCD_BLED LCD backlight LED
@@ -93,7 +96,7 @@
*
* TOUCHSCREEN PIN CONFIGURATIONS
* PIN CONFIGURATIONS SIGNAL NAME ON-BOARD CONNECTIONS
* --- ---------------------------------- -------------------- ------------------------
* --- --------------------- -------------------- ------------------------
* 35 PB0 LCD-YD TFT display
* ? LCD-XR TFT display
* ? LCD-YU TFT display
@@ -110,13 +113,14 @@ struct stm32f4_dev_s
{
struct mio283qt2_lcd_s dev; /* The externally visible part of the driver */
bool grammode; /* true=Writing to GRAM (16-bit write vs 8-bit) */
bool firstread;/* First GRAM read? */
bool firstread; /* First GRAM read? */
FAR struct lcd_dev_s *drvr; /* The saved instance of the LCD driver */
};
/****************************************************************************
* Private Function Protototypes
****************************************************************************/
/* Low Level LCD access */
static void stm32_select(FAR struct mio283qt2_lcd_s *dev);
@@ -132,7 +136,9 @@ static void stm32_backlight(FAR struct mio283qt2_lcd_s *dev, int power);
* Private Data
****************************************************************************/
/* This is the driver state structure (there is no retained state information) */
/* This is the driver state structure
* (there is no retained state information)
*/
static struct stm32f4_dev_s g_stm32f4_lcd =
{
@@ -248,11 +254,12 @@ static void stm32_index(FAR struct mio283qt2_lcd_s *dev, uint8_t index)
stm32_command();
/* Write the index register to the 8-bit GPIO pin bus. We are violating the
* datasheet here a little by driving the WR pin low at the same time as
* the data, but the fact is that all ASIC logic will latch on the rising
* edge of WR anyway, not the falling edge. We are just shaving off a few
* cycles every time this routine is called, which will be farirly often.
/* Write the index register to the 8-bit GPIO pin bus. We are violating
* the datasheet here a little by driving the WR pin low at the same time
* as the data, but the fact is that all ASIC logic will latch on the
* rising edge of WR anyway, not the falling edge. We are just shaving off
* a few cycles every time this routine is called, which will be farirly
* often.
*/
*g_portsetreset = index | ((uint8_t) (~index) << 16) |
@@ -294,13 +301,13 @@ static uint16_t stm32_read(FAR struct mio283qt2_lcd_s *dev)
/* Set the I/O Port to input mode. Ugly, but fast. */
*portmode &= 0xFFFF0000;
*portmode &= 0xffff0000;
/* Read the data */
*portsetreset = (1 << LCD_PMPRD_PIN) << 16;
stm32_tinydelay();
data = *portinput & 0x00FF;
data = *portinput & 0x00ff;
*portsetreset = (1 << LCD_PMPRD_PIN);
/* Test if a 16-bit read is needed (GRAM mode) */
@@ -327,20 +334,20 @@ static uint16_t stm32_read(FAR struct mio283qt2_lcd_s *dev)
/* Clip RED sample to 5-bits and shit to MSB */
data = (data & 0xF8) << 8;
data = (data & 0xf8) << 8;
/* Now read Green sample */
*portsetreset = (1 << LCD_PMPRD_PIN) << 16;
stm32_tinydelay();
data |= (*portinput & 0x00FC) << 3;
data |= (*portinput & 0x00fc) << 3;
*portsetreset = (1 << LCD_PMPRD_PIN);
/* Now read Blue sample */
*portsetreset = (1 << LCD_PMPRD_PIN) << 16;
stm32_tinydelay();
data |= (*portinput & 0x00F8) >> 3;
data |= (*portinput & 0x00f8) >> 3;
*portsetreset = (1 << LCD_PMPRD_PIN);
}
@@ -373,17 +380,19 @@ static void stm32_write(FAR struct mio283qt2_lcd_s *dev, uint16_t data)
if (priv->grammode)
{
/* Need to write 16-bit pixel data (16 BPP). Write the upper pixel data first */
/* Need to write 16-bit pixel data (16 BPP).
* Write the upper pixel data first
*/
*g_portsetreset = ((data>>8) & 0xFF) | (((~data>>8) & 0xFF) << 16) |
((1 << LCD_PMPWR_PIN) << 16);
*g_portsetreset = ((data >> 8) & 0xff) | (((~data >> 8) & 0xff) <<
16) | ((1 << LCD_PMPWR_PIN) << 16);
stm32_tinydelay();
*g_portsetreset = (1 << LCD_PMPWR_PIN);
}
/* Now write the lower 8-bit of data */
*g_portsetreset = (data & 0xFF) | ((~data & 0xFF) << 16) |
*g_portsetreset = (data & 0xff) | ((~data & 0xff) << 16) |
((1 << LCD_PMPWR_PIN) << 16);
stm32_tinydelay();
*g_portsetreset = (1 << LCD_PMPWR_PIN);
@@ -399,9 +408,9 @@ static void stm32_write(FAR struct mio283qt2_lcd_s *dev, uint16_t data)
static void stm32_backlight(FAR struct mio283qt2_lcd_s *dev, int power)
{
/* For now, we just control the backlight as a discrete. Pulse width modulation
* would be required to vary the backlight level. A low value turns the backlight
* off.
/* For now, we just control the backlight as a discrete. Pulse width
* modulation would be required to vary the backlight level. A low value
* turns the backlight off.
*/
stm32_gpiowrite(GPIO_LCD_BLED, power > 0);
@@ -463,15 +472,16 @@ void stm32_lcdinitialize(void)
* Name: board_lcd_initialize
*
* Description:
* Initialize the LCD video hardware. The initial state of the LCD is fully
* initialized, display memory cleared, and the LCD ready to use, but with the power
* setting at 0 (full off).
* Initialize the LCD video hardware. The initial state of the LCD is
* fully initialized, display memory cleared, and the LCD ready to use,
* but with the power setting at 0 (full off).
*
****************************************************************************/
int board_lcd_initialize(void)
{
/* Only initialize the driver once. NOTE: The LCD GPIOs were already configured
/* Only initialize the driver once.
* NOTE: The LCD GPIOs were already configured
* by stm32_lcdinitialize.
*/
@@ -509,8 +519,8 @@ int board_lcd_initialize(void)
* Name: board_lcd_getdev
*
* Description:
* Return a a reference to the LCD object for the specified LCD. This allows support
* for multiple LCD devices.
* Return a a reference to the LCD object for the specified LCD.
* This allows support for multiple LCD devices.
*
****************************************************************************/
boards/arm/stm32/mikroe-stm32f4/src/stm32_mio283qt9a.c
+40 -31
View File
@@ -1,7 +1,8 @@
/****************************************************************************
* boards/arm/stm32/mikroe-stm32f4/src/stm32_mio283qt9a.c
*
* Interface definition for the MI0283QT-9A LCD from Multi-Inno Technology Co., Ltd.
* Interface definition for the MI0283QT-9A LCD from Multi-Inno Technology
* Co., Ltd.
* LCD is based on the Ilitek ILI9341 LCD controller.
*
* Copyright (C) 2012-2014 Gregory Nutt. All rights reserved.
@@ -69,11 +70,13 @@
* Pre-processor Definitions
****************************************************************************/
/* Mikroe-STM32F4 Hardware Definitions ************************************************/
/* --- ---------------------------------- -------------------- ------------------------
/* Mikroe-STM32F4 Hardware Definitions **************************************/
/* --- ------------------ -------------------- ------------------------
* PIN CONFIGURATIONS SIGNAL NAME ON-BOARD CONNECTIONS
* (Family Data Sheet Table 1-1) (PIC32MX7 Schematic)
* --- ---------------------------------- -------------------- ------------------------
* (Family Data Sheet
* Table 1-1) (PIC32MX7 Schematic)
* --- ------------------ -------------------- ------------------------
* 39 PE8 LCD_RST TFT display
* 46 PE15 LCD-CS# TFT display
* 40 PE9 LCD_BLED LCD backlight LED
@@ -94,7 +97,7 @@
*
* TOUCHSCREEN PIN CONFIGURATIONS
* PIN CONFIGURATIONS SIGNAL NAME ON-BOARD CONNECTIONS
* --- ---------------------------------- -------------------- ------------------------
* --- ------------------ ----------------- --------------------------
* 35 PB0 LCD-YD TFT display
* ? LCD-XR TFT display
* ? LCD-YU TFT display
@@ -118,6 +121,7 @@ struct stm32f4_dev_s
/****************************************************************************
* Private Function Protototypes
****************************************************************************/
/* Low Level LCD access */
static void stm32_select(FAR struct mio283qt9a_lcd_s *dev);
@@ -133,7 +137,9 @@ static void stm32_backlight(FAR struct mio283qt9a_lcd_s *dev, int power);
* Private Data
****************************************************************************/
/* This is the driver state structure (there is no retained state information) */
/* This is the driver state structure
* (there is no retained state information)
*/
static struct stm32f4_dev_s g_stm32f4_lcd =
{
@@ -249,11 +255,12 @@ static void stm32_index(FAR struct mio283qt9a_lcd_s *dev, uint8_t index)
stm32_command();
/* Write the index register to the 8-bit GPIO pin bus. We are violating the
* datasheet here a little by driving the WR pin low at the same time as
* the data, but the fact is that all ASIC logic will latch on the rising
* edge of WR anyway, not the falling edge. We are just shaving off a few
* cycles every time this routine is called, which will be fairly often.
/* Write the index register to the 8-bit GPIO pin bus. We are violating
* the datasheet here a little by driving the WR pin low at the same time
* as the data, but the fact is that all ASIC logic will latch on the
* rising edge of WR anyway, not the falling edge. We are just shaving off
* a few cycles every time this routine is called, which will be fairly
* often.
*/
*g_portsetreset = index | ((uint8_t) (~index) << 16) |
@@ -295,13 +302,13 @@ static uint16_t stm32_read(FAR struct mio283qt9a_lcd_s *dev)
/* Set the I/O Port to input mode. Ugly, but fast. */
*portmode &= 0xFFFF0000;
*portmode &= 0xffff0000;
/* Read the data */
*portsetreset = (1 << LCD_PMPRD_PIN) << 16;
stm32_tinydelay();
data = *portinput & 0x00FF;
data = *portinput & 0x00ff;
*portsetreset = (1 << LCD_PMPRD_PIN);
/* Test if a 16-bit read is needed (GRAM mode) */
@@ -328,20 +335,20 @@ static uint16_t stm32_read(FAR struct mio283qt9a_lcd_s *dev)
/* Clip RED sample to 5-bits and shit to MSB */
data = (data & 0xF8) << 8;
data = (data & 0xf8) << 8;
/* Now read Green sample */
*portsetreset = (1 << LCD_PMPRD_PIN) << 16;
stm32_tinydelay();
data |= (*portinput & 0x00FC) << 3;
data |= (*portinput & 0x00fc) << 3;
*portsetreset = (1 << LCD_PMPRD_PIN);
/* Now read Blue sample */
*portsetreset = (1 << LCD_PMPRD_PIN) << 16;
stm32_tinydelay();
data |= (*portinput & 0x00F8) >> 3;
data |= (*portinput & 0x00f8) >> 3;
*portsetreset = (1 << LCD_PMPRD_PIN);
}
@@ -374,17 +381,19 @@ static void stm32_write(FAR struct mio283qt9a_lcd_s *dev, uint16_t data)
if (priv->grammode)
{
/* Need to write 16-bit pixel data (16 BPP). Write the upper pixel data first */
/* Need to write 16-bit pixel data (16 BPP).
* Write the upper pixel data first
*/
*g_portsetreset = ((data>>8) & 0xFF) | (((~data>>8) & 0xFF) << 16) |
((1 << LCD_PMPWR_PIN) << 16);
*g_portsetreset = ((data >> 8) & 0xff) | (((~data >> 8) & 0xff) <<
16) | ((1 << LCD_PMPWR_PIN) << 16);
stm32_tinydelay();
*g_portsetreset = (1 << LCD_PMPWR_PIN);
}
/* Now write the lower 8-bit of data */
*g_portsetreset = (data & 0xFF) | ((~data & 0xFF) << 16) |
*g_portsetreset = (data & 0xff) | ((~data & 0xff) << 16) |
((1 << LCD_PMPWR_PIN) << 16);
stm32_tinydelay();
*g_portsetreset = (1 << LCD_PMPWR_PIN);
@@ -400,9 +409,9 @@ static void stm32_write(FAR struct mio283qt9a_lcd_s *dev, uint16_t data)
static void stm32_backlight(FAR struct mio283qt9a_lcd_s *dev, int power)
{
/* For now, we just control the backlight as a discrete. Pulse width modulation
* would be required to vary the backlight level. A low value turns the backlight
* off.
/* For now, we just control the backlight as a discrete. Pulse width
* modulation would be required to vary the backlight level. A low value
* turns the backlight off.
*/
stm32_gpiowrite(GPIO_LCD_BLED, power > 0);
@@ -464,16 +473,16 @@ void stm32_lcdinitialize(void)
* Name: board_lcd_initialize
*
* Description:
* Initialize the LCD video hardware. The initial state of the LCD is fully
* initialized, display memory cleared, and the LCD ready to use, but with the power
* setting at 0 (full off).
* Initialize the LCD video hardware. The initial state of the LCD is
* fully initialized, display memory cleared, and the LCD ready to use,
* but with the power setting at 0 (full off).
*
****************************************************************************/
int board_lcd_initialize(void)
{
/* Only initialize the driver once. NOTE: The LCD GPIOs were already configured
* by stm32_lcdinitialize.
/* Only initialize the driver once.
* NOTE: The LCD GPIOs were already configured by stm32_lcdinitialize.
*/
if (!g_stm32f4_lcd.drvr)
@@ -510,8 +519,8 @@ int board_lcd_initialize(void)
* Name: board_lcd_getdev
*
* Description:
* Return a a reference to the LCD object for the specified LCD. This allows support
* for multiple LCD devices.
* Return a a reference to the LCD object for the specified LCD. This
* allows support for multiple LCD devices.
*
****************************************************************************/
boards/arm/stm32/mikroe-stm32f4/src/stm32_spi.c
+31 -23
View File
@@ -67,7 +67,8 @@
* Name: stm32_spidev_initialize
*
* Description:
* Called to configure SPI chip select GPIO pins for the mikroe_stm32f4 board.
* Called to configure SPI chip select GPIO pins for the mikroe_stm32f4
* board.
*
****************************************************************************/
@@ -90,6 +91,7 @@ void weak_function stm32_spidev_initialize(void)
#endif
/* Configure the EXP I/O cs for SPI3 */
stm32_configgpio(GPIO_CS_EXP_SPI3); /* Expander chip select */
#endif
@@ -99,32 +101,34 @@ void weak_function stm32_spidev_initialize(void)
* Name: stm32_spi1/2/3select and stm32_spi1/2/3status
*
* Description:
* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
* provided by board-specific logic. They are implementations of the select
* and status methods of the SPI interface defined by struct spi_ops_s (see
* include/nuttx/spi/spi.h). All other methods (including stm32_spibus_initialize())
* are provided by common STM32 logic. To use this common SPI logic on your
* board:
* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status
* must be provided by board-specific logic. They are implementations of
* the select and status methods of the SPI interface defined by struct
* spi_ops_s (see include/nuttx/spi/spi.h). All other methods (including
* stm32_spibus_initialize()) are provided by common STM32 logic.
* To use this common SPI logic on your board:
*
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
* pins.
* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
* board-specific logic. These functions will perform chip selection and
* status operations using GPIOs in the way your board is configured.
* 3. Add a calls to stm32_spibus_initialize() in your low level application
* initialization logic
* 4. The handle returned by stm32_spibus_initialize() may then be used to bind the
* SPI driver to higher level logic (e.g., calling
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip
* select pins.
* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions
* in your board-specific logic. These functions will perform chip
* selection and status operations using GPIOs in the way your board is
* configured.
* 3. Add a calls to stm32_spibus_initialize() in your low level
* application initialization logic
* 4. The handle returned by stm32_spibus_initialize() may then be used to
* bind the SPI driver to higher level logic (e.g., calling
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
* the SPI MMC/SD driver).
*
****************************************************************************/
#ifdef CONFIG_STM32_SPI3
void stm32_spi3select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
void stm32_spi3select(FAR struct spi_dev_s *dev,
uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spiinfo("devid: %d CS: %s\n",
(int)devid, selected ? "assert" : "de-assert");
#if defined(CONFIG_AUDIO_VS1053)
if (devid == SPIDEV_AUDIO_DATA(0))
@@ -183,9 +187,11 @@ uint8_t stm32_spi3status(FAR struct spi_dev_s *dev, uint32_t devid)
#endif
#ifdef CONFIG_STM32_SPI2
void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
void stm32_spi2select(FAR struct spi_dev_s *dev,
uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spiinfo("devid: %d CS: %s\n",
(int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
@@ -195,9 +201,11 @@ uint8_t stm32_spi2status(FAR struct spi_dev_s *dev, uint32_t devid)
#endif
#ifdef CONFIG_STM32_SPI1
void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
void stm32_spi1select(FAR struct spi_dev_s *dev,
uint32_t devid, bool selected)
{
spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
spiinfo("devid: %d CS: %s\n",
(int)devid, selected ? "assert" : "de-assert");
}
uint8_t stm32_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
boards/arm/stm32/mikroe-stm32f4/src/stm32_vs1053.c
+7 -4
View File
@@ -100,6 +100,7 @@ static int up_read_dreq(FAR const struct vs1053_lower_s *lower);
* following structure provides an MCU-independent mechanixm for controlling
* the VS1053 GPIO interrupt.
*/
static struct stm32_lower_s g_vs1053lower =
{
.lower =
@@ -165,7 +166,7 @@ static int up_read_dreq(FAR const struct vs1053_lower_s *lower)
* Name: up_vs1053initialize
****************************************************************************/
void up_vs1053initialize(FAR struct spi_dev_s* spi)
void up_vs1053initialize(FAR struct spi_dev_s * spi)
{
int ret;
char name[8];
@@ -173,7 +174,8 @@ void up_vs1053initialize(FAR struct spi_dev_s* spi)
/* Assumptions:
* 1) SPI pins were configured in up_spi.c early in the boot-up phase.
* 2) Clocking for the SPI3 peripheral was also provided earlier in boot-up.
* 2) Clocking for the SPI3 peripheral was also provided earlier in
* boot-up.
*/
/* NOTE: The RST line should be asserted early in the boot process
@@ -182,7 +184,7 @@ void up_vs1053initialize(FAR struct spi_dev_s* spi)
* until the RST line is asserted.
*/
//(void)stm32_configgpio(GPIO_VS1053_RST);
/* (void)stm32_configgpio(GPIO_VS1053_RST); */
/* Initialize the VS1053 DREQ GPIO line */
@@ -193,7 +195,8 @@ void up_vs1053initialize(FAR struct spi_dev_s* spi)
pVs1053 = vs1053_initialize(spi, &g_vs1053lower.lower, VS1053_DEVNO);
if (pVs1053 == NULL)
{
auderr("ERROR: Failed to bind SPI port %d VS1053 device\n", VS1053_DEVNO);
auderr("ERROR: Failed to bind SPI port %d VS1053 device\n",
VS1053_DEVNO);
return;
}
boards/arm/stm32/nucleo-f303re/src/nucleo-f303re.h
+5 -1
View File
@@ -49,6 +49,7 @@
****************************************************************************/
/* LED definitions **********************************************************/
/* The Nucleo F303RE board has three LEDs. Two of these are controlled by
* logic on the board and are not available for software control:
*
@@ -72,6 +73,7 @@
#define LED_DRIVER_PATH "/dev/userleds"
/* Button definitions *******************************************************/
/* The Nucleo F303RE supports two buttons; only one button is controllable
* by software:
*
@@ -89,6 +91,7 @@
#define GPIO_BTN_USER (GPIO_INPUT|GPIO_FLOAT|GPIO_EXTI|GPIO_PORTC|GPIO_PIN13)
/* PWM definitions **********************************************************/
/* The Nucleo F303RE has no real on-board PWM devices, but the board can be
* configured to output a pulse train using variously unused pins on the
* board for PWM output (see board.h for details of pins).
@@ -142,7 +145,8 @@ void weak_function stm32_spidev_initialize(void);
* Configure the timer driver.
*
* Input Parameters:
* devpath - The full path to the timer device. This should be of the form /dev/timer0
* devpath - The full path to the timer device.
* This should be of the form /dev/timer0
* timer - The timer's number.
*
* Returned Value:
boards/arm/stm32/nucleo-f303re/src/stm32_adc.c
+3
View File
@@ -104,6 +104,7 @@
#endif
/* The number of ADC channels in the conversion list */
/* TODO DMA */
#define ADC1_NCHANNELS 4
@@ -325,6 +326,7 @@ int stm32_adc_setup(void)
int i;
/* DEV1 */
/* Configure the pins as analog inputs for the selected channels */
for (i = 0; i < DEV1_NCHANNELS; i++)
@@ -353,6 +355,7 @@ int stm32_adc_setup(void)
#ifdef DEV2_PORT
/* DEV2 */
/* Configure the pins as analog inputs for the selected channels */
for (i = 0; i < DEV2_NCHANNELS; i++)

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