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i.MX6: Add definition of base address of ARM multi-core registers

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This commit is contained in:
Gregory Nutt
2016-03-01 08:26:30 -06:00
parent 6949ff553b
commit f2eb90cd1c
2 changed files with 13 additions and 4 deletions
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arch/arm/src/armv7-a/mpcore.h
+4 -4
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@@ -51,10 +51,10 @@
* Pre-processor Definitions
****************************************************************************/
/* GIC registers are memory mapped and accessed through a processor specific
* private address space via the SCU. The Cortex-A9 MCU chip.h header file
* must provide the definition CHIP_MPCORE_VBASE to access this the registers
* in this memory region.
/* MPCore registers are memory mapped and accessed through a processor
* specific private address space via the SCU. The Cortex-A9 MCU chip.h
* header file must provide the definition CHIP_MPCORE_VBASE to access this
* the registers in this memory region.
*/
/* Peripheral Base Offsets **************************************************/
arch/arm/src/imx6/chip.h
+9
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@@ -41,11 +41,20 @@
****************************************************************************/
#include <nuttx/config.h>
#include "chip/imx_memorymap.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* MPCore registers are memory mapped and accessed through a processor
* specific private address space via the SCU. The Cortex-A9 MCU chip.h
* header file must provide the definition CHIP_MPCORE_VBASE to access this
* the registers in this memory region.
*/
#define CHIP_MPCORE_VBASE IMX_ARMMP_VSECTION
/****************************************************************************
* Public Types
****************************************************************************/