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Add basic support for pulse count in the PWM interface

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4285 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
2012-01-09 18:23:30 +00:00
parent ab8ac3f115
commit ec10d82210
7 changed files with 756 additions and 133 deletions
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ChangeLog
+2
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@@ -2353,4 +2353,6 @@
* arch/arm/src/stm32/stm32_serial.c and stm32_lowputc.c: Support for
UART4-5 and USART6 added by Mike Smith. Also includes a more flexible
way of managing UART pin configurations.
* include/nuttx/pwm.h, drivers/pwm.c, arch/arm/src/stm32/stm32_pwm.c: Add
support for pulse count in order to better support stepper motors.
arch/arm/src/lpc17xx/lpc17_can.c
+1 -2
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@@ -473,9 +473,8 @@ static void can_putcommon(uint32_t addr, uint32_t value)
static void can_reset(FAR struct can_dev_s *dev)
{
FAR struct up_dev_s *priv = (FAR struct up_dev_s *)dev->cd_priv;
uint32_t baud;
int ret;
irqstate_t flags;
int ret;
canvdbg("CAN%d\n", priv->port);
arch/arm/src/stm32/stm32_pwm.c
+430 -105
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File diff suppressed because it is too large Load Diff
configs/stm3240g-eval/README.txt
+2
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@@ -595,7 +595,9 @@ Where <subdir> is one of the following:
be manually enabled by selecting:
CONFIG_PWM=y : Enable the generic PWM infrastructure
CONFIG_PWM_PULSECOUNT=n : Disable to support TIM1/8 pulse counts
CONFIG_STM32_TIM4_PWM=y : Use TIM4 to generate PWM output
CONFIG_STM32_TIM4_CHANNEL=2
See also apps/examples/README.txt
configs/stm3240g-eval/nsh/defconfig
+1
View File
@@ -353,6 +353,7 @@ CONFIG_STM32_ADC3_SAMPLE_FREQUENCY=100
# purpose.
#
CONFIG_PWM=n
CONFIG_PWM_PULSECOUNT=n
CONFIG_STM32_TIM4=y
CONFIG_STM32_TIM4_PWM=y
CONFIG_STM32_TIM4_CHANNEL=2
drivers/pwm.c
+236 -18
View File
@@ -89,10 +89,16 @@
struct pwm_upperhalf_s
{
uint8_t crefs; /* The number of times the device has been opened */
bool started; /* True: pulsed output is being generated */
sem_t sem; /* Supports mutual exclusion */
struct pwm_info_s info; /* Pulsed output characteristics */
uint8_t crefs; /* The number of times the device has been opened */
volatile bool started; /* True: pulsed output is being generated */
#ifdef CONFIG_PWM_PULSECOUNT
volatile bool waiting; /* True: Caller is waiting for the pulse count to expire */
#endif
sem_t exclsem; /* Supports mutual exclusion */
#ifdef CONFIG_PWM_PULSECOUNT
sem_t waitsem; /* Used to wait for the pulse count to expire */
#endif
struct pwm_info_s info; /* Pulsed output characteristics */
FAR struct pwm_lowerhalf_s *dev; /* lower-half state */
};
@@ -104,6 +110,7 @@ static int pwm_open(FAR struct file *filep);
static int pwm_close(FAR struct file *filep);
static ssize_t pwm_read(FAR struct file *filep, FAR char *buffer, size_t buflen);
static ssize_t pwm_write(FAR struct file *filep, FAR const char *buffer, size_t buflen);
static int pwm_start(FAR struct pwm_upperhalf_s *upper, unsigned int oflags);
static int pwm_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
/****************************************************************************
@@ -146,7 +153,7 @@ static int pwm_open(FAR struct file *filep)
/* Get exclusive access to the device structures */
ret = sem_wait(&upper->sem);
ret = sem_wait(&upper->exclsem);
if (ret < 0)
{
ret = -errno;
@@ -191,7 +198,7 @@ static int pwm_open(FAR struct file *filep)
ret = OK;
errout_with_sem:
sem_post(&upper->sem);
sem_post(&upper->exclsem);
errout:
return ret;
@@ -215,7 +222,7 @@ static int pwm_close(FAR struct file *filep)
/* Get exclusive access to the device structures */
ret = sem_wait(&upper->sem);
ret = sem_wait(&upper->exclsem);
if (ret < 0)
{
ret = -errno;
@@ -248,7 +255,7 @@ static int pwm_close(FAR struct file *filep)
ret = OK;
//errout_with_sem:
sem_post(&upper->sem);
sem_post(&upper->exclsem);
errout:
return ret;
@@ -282,6 +289,112 @@ static ssize_t pwm_write(FAR struct file *filep, FAR const char *buffer, size_t
return 0;
}
/************************************************************************************
* Name: pwm_start
*
* Description:
* Handle the PWMIOC_START ioctl command
*
************************************************************************************/
#ifdef CONFIG_PWM_PULSECOUNT
static int pwm_start(FAR struct pwm_upperhalf_s *upper, unsigned int oflags)
{
FAR struct pwm_lowerhalf_s *lower = upper->dev;
irqstate_t flags;
int ret = OK;
DEBUGASSERT(upper != NULL && lower->ops->start != NULL);
/* Verify that the PWM is not already running */
if (!upper->started)
{
/* Disable interrupts to avoid race conditions */
flags = irqsave();
/* Indicate that if will be waiting for the pulse count to complete.
* Note that we will only wait if a non-zero pulse count is specified
* and if the PWM driver was opened in normal, blocking mode. Also
* assume for now that the pulse train will be successfully started.
*
* We do these things before starting the PWM to avoid race conditions.
*/
upper->waiting = (upper->info.count > 0) && ((oflags & O_NONBLOCK) != 0);
upper->started = true;
/* Invoke the bottom half method to start the pulse train */
ret = lower->ops->start(lower, &upper->info, upper);
/* A return value of zero means that the pulse train was started
* successfully.
*/
if (ret == OK)
{
/* Should we wait for the pulse output to complete? Loop in
* in case the wakeup form sem_wait() is a false alarm.
*/
while (upper->waiting)
{
/* Wait until we are awakened by pwm_expired(). When
* pwm_expired is called, it will post the waitsem and
* clear the waiting flag.
*/
int tmp = sem_wait(&upper->waitsem);
DEBUGASSERT(tmp == OK || errno == EINTR);
}
}
else
{
/* Looks like we won't be waiting after all */
upper->started = false;
upper->waiting = false;
}
irqrestore(flags);
}
return ret;
}
#else
static int pwm_start(FAR struct pwm_upperhalf_s *upper, unsigned int oflags)
{
FAR struct pwm_lowerhalf_s *lower = upper->dev;
int ret = OK;
DEBUGASSERT(upper != NULL && lower->ops->start != NULL);
/* Verify that the PWM is not already running */
if (!upper->started)
{
/* Invoke the bottom half method to start the pulse train */
ret = lower->ops->start(lower, &upper->info);
/* A return value of zero means that the pulse train was started
* successfully.
*/
if (ret == OK)
{
/* Indicate that the pulse train has started */
upper->started = true;
}
}
return ret;
}
#endif
/************************************************************************************
* Name: pwm_ioctl
*
@@ -295,12 +408,20 @@ static int pwm_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
FAR struct inode *inode = filep->f_inode;
FAR struct pwm_upperhalf_s *upper = inode->i_private;
FAR struct pwm_lowerhalf_s *lower = upper->dev;
int ret = OK;
/* Handle built-in ioctl commands */
int ret;
pwmvdbg("cmd: %d arg: %ld\n", cmd, arg);
/* Get exclusive access to the device structures */
ret = sem_wait(&upper->exclsem);
if (ret < 0)
{
return ret;
}
/* Handle built-in ioctl commands */
switch (cmd)
{
/* PWMIOC_SETCHARACTERISTICS - Set the characteristics of the next pulsed
@@ -318,13 +439,27 @@ static int pwm_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
FAR const struct pwm_info_s *info = (FAR const struct pwm_info_s*)((uintptr_t)arg);
DEBUGASSERT(info != NULL && lower->ops->start != NULL);
#ifdef CONFIG_PWM_PULSECOUNT
pwmvdbg("PWMIOC_SETCHARACTERISTICS frequency: %d duty: %08x count: %d started: %d\n",
info->frequency, info->duty, info->count, upper->started);
#else
pwmvdbg("PWMIOC_SETCHARACTERISTICS frequency: %d duty: %08x started: %d\n",
info->frequency, info->duty, upper->started);
#endif
/* Save the pulse train characteristics */
memcpy(&upper->info, info, sizeof(struct pwm_info_s));
/* If PWM is already running, then re-start it with the new characteristics */
if (upper->started)
{
#ifdef CONFIG_PWM_PULSECOUNT
ret = lower->ops->start(lower, &upper->info, upper);
#else
ret = lower->ops->start(lower, &upper->info);
#endif
}
}
break;
@@ -342,8 +477,14 @@ static int pwm_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
DEBUGASSERT(info != NULL);
memcpy(info, &upper->info, sizeof(struct pwm_info_s));
#ifdef CONFIG_PWM_PULSECOUNT
pwmvdbg("PWMIOC_GETCHARACTERISTICS frequency: %d duty: %08x count: %d\n",
info->frequency, info->duty, info->count);
#else
pwmvdbg("PWMIOC_GETCHARACTERISTICS frequency: %d duty: %08x\n",
info->frequency, info->duty);
#endif
}
break;
@@ -355,16 +496,19 @@ static int pwm_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
case PWMIOC_START:
{
#ifdef CONFIG_PWM_PULSECOUNT
pwmvdbg("PWMIOC_START frequency: %d duty: %08x count: %d started: %d\n",
upper->info.frequency, upper->info.duty, upper->info.count,
upper->started);
#else
pwmvdbg("PWMIOC_START frequency: %d duty: %08x started: %d\n",
upper->info.frequency, upper->info.duty, upper->started);
#endif
DEBUGASSERT(lower->ops->start != NULL);
if (!upper->started)
{
ret = lower->ops->start(lower, &upper->info);
upper->started = true;
}
/* Start the pulse train */
ret = pwm_start(upper, filep->f_oflags);
}
break;
@@ -382,6 +526,12 @@ static int pwm_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
{
ret = lower->ops->stop(lower);
upper->started = false;
#ifdef CONFIG_PWM_PULSECOUNT
if (upper->waiting)
{
upper->waiting = FALSE;
}
#endif
}
}
break;
@@ -396,6 +546,8 @@ static int pwm_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
}
break;
}
sem_post(&upper->exclsem);
return ret;
}
@@ -443,7 +595,10 @@ int pwm_register(FAR const char *path, FAR struct pwm_lowerhalf_s *dev)
/* Initialize the PWM device structure (it was already zeroed by zalloc()) */
sem_init(&upper->sem, 0, 1);
sem_init(&upper->exclsem, 0, 1);
#ifdef CONFIG_PWM_PULSECOUNT
sem_init(&upper->waitsem, 0, 0);
#endif
upper->dev = dev;
/* Register the PWM device */
@@ -452,4 +607,67 @@ int pwm_register(FAR const char *path, FAR struct pwm_lowerhalf_s *dev)
return register_driver(path, &g_pwmops, 0666, upper);
}
/****************************************************************************
* Name: pwm_expired
*
* Description:
* If CONFIG_PWM_PULSECOUNT is defined and the pulse count was configured
* to a non-zero value, then the "upper half" driver will wait for the
* pulse count to expire. The sequence of expected events is as follows:
*
* 1. The upper half driver calls the start method, providing the lower
* half driver with the pulse train characteristics. If a fixed
* number of pulses is required, the 'count' value will be nonzero.
* 2. The lower half driver's start() methoc must verify that it can
* support the request pulse train (frequency, duty, AND pulse count).
* It it cannot, it should return an error. If the pulse count is
* non-zero, it should set up the hardware for that number of pulses
* and return success. NOTE: That is CONFIG_PWM_PULSECOUNT is
* defined, the start() method receives an additional parameter
* that must be used in this callback.
* 3. When the start() method returns success, the upper half driver
* will "sleep" until the pwm_expired method is called.
* 4. When the lower half detects that the pulse count has expired
* (probably through an interrupt), it must call the pwm_expired
* interface using the handle that was previously passed to the
* start() method
*
* Input parameters:
* handle - This is the handle that was provided to the lower-half
* start() method.
*
* Returned Value:
* None
*
* Assumptions:
* This function may be called from an interrupt handler.
*
****************************************************************************/
#ifdef CONFIG_PWM_PULSECOUNT
void pwm_expired(FAR void *handle)
{
FAR struct pwm_upperhalf_s *upper = (FAR struct pwm_upperhalf_s *)handle;
/* Make sure that the PWM is started */
if (upper->started)
{
/* Is there a thread waiting for the pulse train to complete? */
if (upper->waiting)
{
/* Yes.. clear the waiting flag and awakened the waiting thread */
upper->waiting = false;
sem_post(&upper->waitsem);
}
/* The PWM is now stopped */
upper->started = false;
}
}
#endif
#endif /* CONFIG_PWM */
include/nuttx/pwm.h
+84 -8
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@@ -1,7 +1,7 @@
/****************************************************************************
* include/nuttx/pwm.h
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2011-2012 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -66,6 +66,18 @@
/****************************************************************************
* Pre-Processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* CONFIG_PWM - Enables because PWM driver support
* CONFIG_PWM_PULSECOUNT - Some hardware will support generation of a fixed
* number of pulses. This might be used, for example to support a stepper
* motor. If the hardware will support a fixed pulse count, then this
* configuration should be set to enable the capability.
* CONFIG_DEBUG_PWM - If enabled (with CONFIG_DEBUG and, optionally,
* CONFIG_DEBUG_VERBOSE), this will generate output that can be use dto
* debug the PWM driver.
*/
/* IOCTL Commands ***********************************************************/
/* The PWM module uses a standard character driver framework. However, since
* the PWM driver is a devices control interface and not a data transfer
* interface, the majority of the functionality is implemented in driver
@@ -75,7 +87,8 @@
* output. This command will neither start nor stop the pulsed output.
* It will either setup the configuration that will be used when the
* output is started; or it will change the characteristics of the pulsed
* output on the fly if the timer is already started.
* output on the fly if the timer is already started. This command will
* set the PWM characteristics and return immediately.
*
* ioctl argument: A read-only reference to struct pwm_info_s that provides
* the characteristics of the pulsed output.
@@ -87,11 +100,16 @@
* characteristics of the pulsed output.
*
* PWMIOC_START - Start the pulsed output. The PWMIOC_SETCHARACTERISTICS
* command must have previously been sent.
* command must have previously been sent. If CONFIG_PWM_PULSECOUNT is
* defined and the pulse count was configured to a non-zero value, then
* this ioctl call will, by default, block until the programmed pulse count
* completes. That default blocking behavior can be overridden by using
* the O_NONBLOCK flag when the PWM driver is opened.
*
* ioctl argument: None
*
* PWMIOC_STOP - Stop the pulsed output.
* PWMIOC_STOP - Stop the pulsed output. This command will stop the PWM
* and return immediately.
*
* ioctl argument: None
*/
@@ -109,7 +127,13 @@
struct pwm_info_s
{
uint32_t frequency; /* Frequency of the pulse train */
ub16_t duty; /* Duty of the pulse train, "1" to "0" duration */
ub16_t duty; /* Duty of the pulse train, "1"-to-"0" duration.
* Maximum: 65535/65536 (0x0000ffff)
* Minimum: 1/65536 (0x00000001) */
#ifdef CONFIG_PWM_PULSECOUNT
uint32_t count; /* The number of pulse to generate. 0 means to
* generate an indefinite number of pulses */
#endif
};
/* This structure is a set a callback functions used to call from the upper-
@@ -134,9 +158,19 @@ struct pwm_ops_s
CODE int (*shutdown)(FAR struct pwm_lowerhalf_s *dev);
/* (Re-)initialize the timer resources and start the pulsed output */
/* (Re-)initialize the timer resources and start the pulsed output. The
* start method should return an error if it cannot start the timer with
* the given parameter (frequency, duty, or optionally pulse count)
*/
CODE int (*start)(FAR struct pwm_lowerhalf_s *dev, FAR const struct pwm_info_s *info);
#ifdef CONFIG_PWM_PULSECOUNT
CODE int (*start)(FAR struct pwm_lowerhalf_s *dev,
FAR const struct pwm_info_s *info,
FAR void *handle);
#else
CODE int (*start)(FAR struct pwm_lowerhalf_s *dev,
FAR const struct pwm_info_s *info);
#endif
/* Stop the pulsed output and reset the timer resources*/
@@ -144,7 +178,8 @@ struct pwm_ops_s
/* Lower-half logic may support platform-specific ioctl commands */
CODE int (*ioctl)(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg);
CODE int (*ioctl)(FAR struct pwm_lowerhalf_s *dev,
int cmd, unsigned long arg);
};
/* This structure is the generic form of state structure used by lower half
@@ -217,6 +252,47 @@ extern "C" {
int pwm_register(FAR const char *path, FAR struct pwm_lowerhalf_s *dev);
/****************************************************************************
* Name: pwm_expired
*
* Description:
* If CONFIG_PWM_PULSECOUNT is defined and the pulse count was configured
* to a non-zero value, then the "upper half" driver will wait for the
* pulse count to expire. The sequence of expected events is as follows:
*
* 1. The upper half driver calls the start method, providing the lower
* half driver with the pulse train characteristics. If a fixed
* number of pulses is required, the 'count' value will be nonzero.
* 2. The lower half driver's start() methoc must verify that it can
* support the request pulse train (frequency, duty, AND pulse count).
* It it cannot, it should return an error. If the pulse count is
* non-zero, it should set up the hardware for that number of pulses
* and return success. NOTE: That is CONFIG_PWM_PULSECOUNT is
* defined, the start() method receives an additional parameter
* that must be used in this callback.
* 3. When the start() method returns success, the upper half driver
* will "sleep" until the pwm_expired method is called.
* 4. When the lower half detects that the pulse count has expired
* (probably through an interrupt), it must call the pwm_expired
* interface using the handle that was previously passed to the
* start() method
*
* Input parameters:
* handle - This is the handle that was provided to the lower-half
* start() method.
*
* Returned Value:
* None
*
* Assumptions:
* This function may be called from an interrupt handler.
*
****************************************************************************/
#ifdef CONFIG_PWM_PULSECOUNT
EXTERN void pwm_expired(FAR void *handle);
#endif
/****************************************************************************
* Platform-Independent "Lower-Half" PWM Driver Interfaces
****************************************************************************/