mirror of
https://github.com/apache/nuttx.git
synced 2026-05-23 14:58:13 +08:00
arch/arm/src/imxrt: Add framework for eDMA support. Initial port is a rip off from the SAMA5Dx and is little more than the framework for the DMA support.
This commit is contained in:
Gregory Nutt
@@ -60,12 +60,12 @@
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#define IMXRT_IRQ_EDMA7_23 (IMXRT_IRQ_EXTINT + 7) /* eDMA Channel 7/23 Transfer Complete */
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#define IMXRT_IRQ_EDMA8_24 (IMXRT_IRQ_EXTINT + 8) /* eDMA Channel 8/24 Transfer Complete */
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#define IMXRT_IRQ_EDMA9_25 (IMXRT_IRQ_EXTINT + 9) /* eDMA Channel 9/25 Transfer Complete */
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#define IMXRT_IRQ_EDMA0_26 (IMXRT_IRQ_EXTINT + 10) /* eDMA Channel 10/26 Transfer Complete */
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#define IMXRT_IRQ_EDMA1_27 (IMXRT_IRQ_EXTINT + 11) /* eDMA Channel 11/27 Transfer Complete */
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#define IMXRT_IRQ_EDMA2_28 (IMXRT_IRQ_EXTINT + 12) /* eDMA Channel 12/28 Transfer Complete */
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#define IMXRT_IRQ_EDMA3_29 (IMXRT_IRQ_EXTINT + 13) /* eDMA Channel 13/29 Transfer Complete */
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#define IMXRT_IRQ_EDMA4_30 (IMXRT_IRQ_EXTINT + 14) /* eDMA Channel 14/30 Transfer Complete */
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#define IMXRT_IRQ_EDMA5_31 (IMXRT_IRQ_EXTINT + 15) /* eDMA Channel 15/31 Transfer Complete */
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#define IMXRT_IRQ_EDMA10_26 (IMXRT_IRQ_EXTINT + 10) /* eDMA Channel 10/26 Transfer Complete */
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#define IMXRT_IRQ_EDMA11_27 (IMXRT_IRQ_EXTINT + 11) /* eDMA Channel 11/27 Transfer Complete */
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#define IMXRT_IRQ_EDMA12_28 (IMXRT_IRQ_EXTINT + 12) /* eDMA Channel 12/28 Transfer Complete */
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#define IMXRT_IRQ_EDMA13_29 (IMXRT_IRQ_EXTINT + 13) /* eDMA Channel 13/29 Transfer Complete */
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#define IMXRT_IRQ_EDMA14_30 (IMXRT_IRQ_EXTINT + 14) /* eDMA Channel 14/30 Transfer Complete */
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#define IMXRT_IRQ_EDMA15_31 (IMXRT_IRQ_EXTINT + 15) /* eDMA Channel 15/31 Transfer Complete */
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#define IMXRT_IRQ_EDMA_ERROR (IMXRT_IRQ_EXTINT + 16) /* Error Interrupt, Channels 0-15 / 16-31 */
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#define IMXRT_IRQ_CM70 (IMXRT_IRQ_EXTINT + 17) /* CTI trigger outputs (internal: CTIIRQ[0]) */
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#define IMXRT_IRQ_CM71 (IMXRT_IRQ_EXTINT + 18) /* CTI trigger outputs (internal: CTIIRQ[1]) */
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@@ -70,6 +70,11 @@ endmenu # FlexIO Peripherals
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menu "LPUART Peripherals"
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config IMXRT_EDMA
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bool "eDMA"
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default n
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depends on EXPERIMENTAL
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config IMXRT_LPUART1
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bool "LPUART1"
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default n
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@@ -119,3 +119,7 @@ ifeq ($(CONFIG_BUILD_PROTECTED),y)
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CHIP_CSRCS += imxrt_userspace.c
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endif
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endif
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ifeq ($(CONFIG_IMXRT_EDMA),y)
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CHIP_CSRCS += imxrt_edma.c
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endif
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@@ -47,6 +47,8 @@
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* Pre-processor definitions
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****************************************************************************************************/
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#define IMXRT_EDMA_NCHANNELS 32
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/* eDMA Register Offsets ****************************************************************************/
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#define IMXRT_EDMA_CR_OFFSET 0x0000 /* Control */
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@@ -564,18 +566,18 @@
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#define IMXRT_EDMA_DCHPRI29 (IMXRT_EDMA_BASE + IMXRT_EDMA_DCHPRI2_OFFSET)
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#define IMXRT_EDMA_DCHPRI28 (IMXRT_EDMA_BASE + IMXRT_EDMA_DCHPRI3_OFFSET)
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#define IMXRT_EDMA_TCD(n) (IMXRT_EDMA_BASE + IMXRT_EDMA_TCD_OFFSET(n))
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#define IMXRT_EDMA_TCD_SADDR(n) (IMXRT_EDMA_TCD(n) + IMXRT_EDMA_TCD_SADDR_OFFSET)
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#define IMXRT_EDMA_TCD_SOFF(n) (IMXRT_EDMA_TCD(n) + IMXRT_EDMA_TCD_SOFF_OFFSET)
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#define IMXRT_EDMA_TCD_ATTR(n) (IMXRT_EDMA_TCD(n) + IMXRT_EDMA_TCD_ATTR_OFFSET)
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#define IMXRT_EDMA_TCD_NBYTES_ML(n) (IMXRT_EDMA_TCD(n) + IMXRT_EDMA_TCD_NBYTES_ML_OFFSET)
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#define IMXRT_EDMA_TCD_SLAST(n) (IMXRT_EDMA_TCD(n) + IMXRT_EDMA_TCD_SLAST_OFFSET)
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#define IMXRT_EDMA_TCD_DADDR(n) (IMXRT_EDMA_TCD(n) + IMXRT_EDMA_TCD_DADDR_OFFSET)
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#define IMXRT_EDMA_TCD_DOFF(n) (IMXRT_EDMA_TCD(n) + IMXRT_EDMA_TCD_DOFF_OFFSET)
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#define IMXRT_EDMA_TCD_CITER_ELINK(n) (IMXRT_EDMA_TCD(n) + IMXRT_EDMA_TCD_CITER_ELINK_OFFSET)
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#define IMXRT_EDMA_TCD_DLASTSGA(n) (IMXRT_EDMA_TCD(n) + IMXRT_EDMA_TCD_DLASTSGA_OFFSET)
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#define IMXRT_EDMA_TCD_CSR(n) (IMXRT_EDMA_TCD(n) + IMXRT_EDMA_TCD_CSR_OFFSET)
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#define IMXRT_EDMA_TCD_BITER_ELINK(n) (IMXRT_EDMA_TCD(n) + IMXRT_EDMA_TCD_BITER_ELINK_OFFSET)
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#define IMXRT_EDMA_TCD_BASE(n) (IMXRT_EDMA_BASE + IMXRT_EDMA_TCD_OFFSET(n))
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#define IMXRT_EDMA_TCD_SADDR(n) (IMXRT_EDMA_TCD_BASE(n) + IMXRT_EDMA_TCD_SADDR_OFFSET)
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#define IMXRT_EDMA_TCD_SOFF(n) (IMXRT_EDMA_TCD_BASE(n) + IMXRT_EDMA_TCD_SOFF_OFFSET)
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#define IMXRT_EDMA_TCD_ATTR(n) (IMXRT_EDMA_TCD_BASE(n) + IMXRT_EDMA_TCD_ATTR_OFFSET)
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#define IMXRT_EDMA_TCD_NBYTES_ML(n) (IMXRT_EDMA_TCD_BASE(n) + IMXRT_EDMA_TCD_NBYTES_ML_OFFSET)
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#define IMXRT_EDMA_TCD_SLAST(n) (IMXRT_EDMA_TCD_BASE(n) + IMXRT_EDMA_TCD_SLAST_OFFSET)
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#define IMXRT_EDMA_TCD_DADDR(n) (IMXRT_EDMA_TCD_BASE(n) + IMXRT_EDMA_TCD_DADDR_OFFSET)
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#define IMXRT_EDMA_TCD_DOFF(n) (IMXRT_EDMA_TCD_BASE(n) + IMXRT_EDMA_TCD_DOFF_OFFSET)
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#define IMXRT_EDMA_TCD_CITER_ELINK(n) (IMXRT_EDMA_TCD_BASE(n) + IMXRT_EDMA_TCD_CITER_ELINK_OFFSET)
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#define IMXRT_EDMA_TCD_DLASTSGA(n) (IMXRT_EDMA_TCD_BASE(n) + IMXRT_EDMA_TCD_DLASTSGA_OFFSET)
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#define IMXRT_EDMA_TCD_CSR(n) (IMXRT_EDMA_TCD_BASE(n) + IMXRT_EDMA_TCD_CSR_OFFSET)
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#define IMXRT_EDMA_TCD_BITER_ELINK(n) (IMXRT_EDMA_TCD_BASE(n) + IMXRT_EDMA_TCD_BITER_ELINK_OFFSET)
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#define IMXRT_EDMA_TCD0_SADDR (IMXRT_EDMA_BASE + IMXRT_EDMA_TCD0_SADDR_OFFSET)
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#define IMXRT_EDMA_TCD0_SOFF (IMXRT_EDMA_BASE + IMXRT_EDMA_TCD0_SOFF_OFFSET)
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,248 @@
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/************************************************************************************
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* arch/arm/src/imxrt/imxrt_dmac.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_IMXRT_IMXRT_EDMAC_H
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#define __ARCH_ARM_SRC_IMXRT_IMXRT_EDMAC_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* DMA ******************************************************************************/
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/* Flags used to characterize the DMA channel. The naming convention is that one
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* side is the peripheral and the other is memory (however, the interface could still
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* be used if, for example, both sides were memory although the naming would be
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* awkward)
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*/
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#define DMACH_FLAG_
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/************************************************************************************
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* Public Types
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************************************************************************************/
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typedef FAR void *DMA_HANDLE;
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typedef void (*dma_callback_t)(DMA_HANDLE handle, void *arg, int result);
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/* The following is used for sampling DMA registers when CONFIG DEBUG_DMA is selected */
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#ifdef CONFIG_DEBUG_DMA
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struct imxrt_dmaregs_s
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{
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/* eDMA Global Registers */
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uint32_t cr; /* Control */
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uint32_t es; /* Error Status */
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uint32_t erq; /* Enable Request */
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uint32_t req; /* Interrupt Request */
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uint32_t err; /* Error */
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uint32_t hrs; /* Hardware Request Status */
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uint32_t ears; /* Enable Asynchronous Request in Stop */
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/* eDMA Channel registers */
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uint8_t dchpri; /* Channel priority */
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/* eDMA TCD */
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uint32_t saddr; /* TCD Source Address */
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uint16_t soff; /* TCD Signed Source Address Offset */
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uint16_t attr; /* TCD Transfer Attributes */
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uint32_t nbml; /* TCD Signed Minor Loop Offset / Byte Count */
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uint32_t slast; /* TCD Last Source Address Adjustment */
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uint32_t daddr; /* TCD Destination Address */
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uint16_t doff; /* TCD Signed Destination Address Offset */
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uint16_t citer; /* TCD Current Minor Loop Link, Major Loop Count */
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uint32_t dlastsga; /* TCD Last Destination Address Adjustment/Scatter Gather Address */
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uint32_t csr; /* TCD Control and Status */
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uint16_t biter; /* TCD Beginning Minor Loop Link, Major Loop Count */
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/* DMAMUX registers */
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uint32_t dmamux; /* Channel configuration */
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};
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#endif /* CONFIG_DEBUG_DMA */
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/************************************************************************************
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* Inline Functions
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************************************************************************************/
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#ifndef __ASSEMBLY__
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/************************************************************************************
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* Public Data
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************************************************************************************/
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/************************************************************************************
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* Public Function Prototypes
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************************************************************************************/
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/************************************************************************************
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* Name: imxrt_dmachannel
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*
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* Description:
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* Allocate a DMA channel. This function sets aside a DMA channel then gives the
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* caller exclusive access to the DMA channel.
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*
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* The naming convention in all of the DMA interfaces is that one side is the
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* 'peripheral' and the other is 'memory'. However, the interface could still
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* be used if, for example, both sides were memory although the naming would be
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* awkward.
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*
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* Returned Value:
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* If a DMA channel is available, this function returns a non-NULL, void* DMA
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* channel handle. NULL is returned on any failure.
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*
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************************************************************************************/
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DMA_HANDLE imxrt_dmachannel(void);
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/************************************************************************************
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* Name: imxrt_dmafree
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*
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* Description:
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* Release a DMA channel. NOTE: The 'handle' used in this argument must NEVER be
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* used again until imxrt_dmachannel() is called again to re-gain a valid handle.
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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void imxrt_dmafree(DMA_HANDLE handle);
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/************************************************************************************
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* Name: imxrt_dmatxsetup
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*
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* Description:
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* Configure DMA for transmit of one buffer (memory to peripheral). This function
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* may be called multiple times to handle large and/or discontinuous transfers.
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* Calls to imxrt_dmatxsetup() and imxrt_dmarxsetup() must not be intermixed on the
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* same transfer, however.
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*
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************************************************************************************/
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int imxrt_dmatxsetup(DMA_HANDLE handle, uint8_t pchan, uint32_t maddr, size_t nbytes,
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uint32_t chflags);
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/************************************************************************************
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* Name: imxrt_dmarxsetup
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*
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* Description:
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* Configure DMA for receipt of one buffer (peripheral to memory). This function
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* may be called multiple times to handle large and/or discontinuous transfers.
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* Calls to imxrt_dmatxsetup() and imxrt_dmarxsetup() must not be intermixed on the
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* same transfer, however.
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*
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************************************************************************************/
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int imxrt_dmarxsetup(DMA_HANDLE handle, uint8_t pchan, uint32_t maddr, size_t nbytes,
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uint32_t chflags);
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/************************************************************************************
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* Name: imxrt_dmastart
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*
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* Description:
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* Start the DMA transfer
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*
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************************************************************************************/
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int imxrt_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg);
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/************************************************************************************
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* Name: imxrt_dmastop
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*
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* Description:
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* Cancel the DMA. After imxrt_dmastop() is called, the DMA channel is reset and
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* imxrt_dmarx/txsetup() must be called before imxrt_dmastart() can be called again
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*
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************************************************************************************/
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void imxrt_dmastop(DMA_HANDLE handle);
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/************************************************************************************
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* Name: imxrt_dmasample
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*
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* Description:
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* Sample DMA register contents
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*
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************************************************************************************/
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#ifdef CONFIG_DEBUG_DMA
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void imxrt_dmasample(DMA_HANDLE handle, struct imxrt_dmaregs_s *regs);
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#else
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# define imxrt_dmasample(handle,regs)
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#endif
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/************************************************************************************
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* Name: imxrt_dmadump
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*
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* Description:
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* Dump previously sampled DMA register contents
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*
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************************************************************************************/
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#ifdef CONFIG_DEBUG_DMA
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void imxrt_dmadump(DMA_HANDLE handle, const struct imxrt_dmaregs_s *regs,
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const char *msg);
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#else
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# define imxrt_dmadump(handle,regs,msg)
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#endif
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_SRC_IMXRT_IMXRT_EDMAC_H */
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@@ -132,8 +132,8 @@ void kinetis_dmafree(DMA_HANDLE handle)
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*
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****************************************************************************/
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int kinetis_dmarxsetup(DMA_HANDLE handle, uint32_t control, uint32_t config,
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uint32_t srcaddr, uint32_t destaddr, size_t nbytes)
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int kinetis_dmasetup(DMA_HANDLE handle, uint32_t control, uint32_t config,
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uint32_t srcaddr, uint32_t destaddr, size_t nbytes)
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{
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return -1;
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}
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@@ -156,8 +156,8 @@ void kinetis_dmafree(DMA_HANDLE handle);
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*
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****************************************************************************/
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int kinetis_dmarxsetup(DMA_HANDLE handle, uint32_t control, uint32_t config,
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uint32_t srcaddr, uint32_t destaddr, size_t nbytes);
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int kinetis_dmasetup(DMA_HANDLE handle, uint32_t control, uint32_t config,
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uint32_t srcaddr, uint32_t destaddr, size_t nbytes);
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/****************************************************************************
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* Name: kinetis_dmastart
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@@ -460,8 +460,8 @@ void lpc43_dmafree(DMA_HANDLE handle)
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*
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****************************************************************************/
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int lpc43_dmarxsetup(DMA_HANDLE handle, uint32_t control, uint32_t config,
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uint32_t srcaddr, uint32_t destaddr, size_t nbytes)
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int lpc43_dmasetup(DMA_HANDLE handle, uint32_t control, uint32_t config,
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uint32_t srcaddr, uint32_t destaddr, size_t nbytes)
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{
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struct lpc43_dmach_s *dmach = (DMA_HANDLE)handle;
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uint32_t chbit;
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@@ -158,8 +158,8 @@ void lpc43_dmafree(DMA_HANDLE handle);
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*
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****************************************************************************/
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int lpc43_dmarxsetup(DMA_HANDLE handle, uint32_t control, uint32_t config,
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uint32_t srcaddr, uint32_t destaddr, size_t nbytes);
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int lpc43_dmasetup(DMA_HANDLE handle, uint32_t control, uint32_t config,
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uint32_t srcaddr, uint32_t destaddr, size_t nbytes);
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/****************************************************************************
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* Name: lpc43_dmastart
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