Updates to the PIC32 USB driver (still kind of buggy); Fix for STM32 CAN2 -- Need to enable CAN1 clocking to use CAN2

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4493 42af7a65-404d-4744-a932-0658087f49c3

arch/arm/src/stm32/stm32f10xxx_rcc.c

@@ -287,9 +287,9 @@ static inline void rcc_enableapb1(void)
 #endif
 
 #ifdef CONFIG_STM32_CAN2
-  /* CAN2 clock enable */
+  /* CAN2 clock enable.  NOTE: CAN2 needs CAN1 clock as well. */
 
-  regval |= RCC_APB1ENR_CAN2EN;
+  regval |= (RCC_APB1ENR_CAN1EN | RCC_APB1ENR_CAN2EN);
 #endif
 
 #ifdef CONFIG_STM32_BKP

arch/arm/src/stm32/stm32f20xxx_rcc.c

@@ -1,7 +1,7 @@
 /****************************************************************************
  * arch/arm/src/stm32/stm32f20xxx_rcc.c
  *
- *   Copyright (C) 2011 Gregory Nutt. All rights reserved.
+ *   Copyright (C) 2012 Gregory Nutt. All rights reserved.
  *   Author: Gregory Nutt <spudmonkey@racsa.co.cr>
  *
  * Redistribution and use in source and binary forms, with or without
@@ -420,9 +420,9 @@ static inline void rcc_enableapb1(void)
 #endif
 
 #if CONFIG_STM32_CAN2
-  /* CAN 2 clock enable */
+  /* CAN2 clock enable.  NOTE: CAN2 needs CAN1 clock as well. */
 
-  regval |= RCC_APB1ENR_CAN2EN;
+  regval |= (RCC_APB1ENR_CAN1EN | RCC_APB1ENR_CAN2EN);
 #endif
 
   /* Power interface clock enable.  The PWR block is always enabled so that

arch/arm/src/stm32/stm32f40xxx_rcc.c

@@ -420,9 +420,9 @@ static inline void rcc_enableapb1(void)
 #endif
 
 #ifdef CONFIG_STM32_CAN2
-  /* CAN 2 clock enable */
+  /* CAN2 clock enable.  NOTE: CAN2 needs CAN1 clock as well. */
 
-  regval |= RCC_APB1ENR_CAN2EN;
+  regval |= (RCC_APB1ENR_CAN1EN | RCC_APB1ENR_CAN2EN);
 #endif
 
   /* Power interface clock enable.  The PWR block is always enabled so that