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Merged in kyChuGit/nuttx (pull request #1076)

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stm32l4 peripheral driver update

* arch/arm/src/stm32l4/hardware/stm32l4_spi.h:  change the spi speed limitation to 40MHz.

* arch/arm/src/stm32l4/stm32l4_lptim.c:  clear the warning message of "-Wundef".

Approved-by: Gregory Nutt <gnutt@nuttx.org>
This commit is contained in:
kyChu
2019-11-25 14:01:39 +00:00
committed by Gregory Nutt
parent f691d774cc
commit e423e15a56
2 changed files with 13 additions and 13 deletions
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arch/arm/src/stm32l4/hardware/stm32l4_spi.h
+1 -1
View File
@@ -52,7 +52,7 @@
#if defined(CONFIG_STM32L4_STM32F40XX) #if defined(CONFIG_STM32L4_STM32F40XX)
# define STM32L4_SPI_CLK_MAX 37500000UL # define STM32L4_SPI_CLK_MAX 37500000UL
#else #else
# define STM32L4_SPI_CLK_MAX 18000000UL # define STM32L4_SPI_CLK_MAX 40000000UL
#endif #endif
/* Register Offsets *****************************************************************/ /* Register Offsets *****************************************************************/
arch/arm/src/stm32l4/stm32l4_lptim.c
+12 -12
View File
@@ -130,7 +130,7 @@ static const struct stm32l4_lptim_ops_s stm32l4_lptim_ops =
.setchannel = &stm32l4_lptim_setchannel, .setchannel = &stm32l4_lptim_setchannel,
}; };
#if CONFIG_STM32L4_LPTIM1 #if defined(CONFIG_STM32L4_LPTIM1)
static struct stm32l4_lptim_priv_s stm32l4_lptim1_priv = static struct stm32l4_lptim_priv_s stm32l4_lptim1_priv =
{ {
.ops = &stm32l4_lptim_ops, .ops = &stm32l4_lptim_ops,
@@ -140,7 +140,7 @@ static struct stm32l4_lptim_priv_s stm32l4_lptim1_priv =
}; };
#endif #endif
#if CONFIG_STM32L4_LPTIM2 #if defined(CONFIG_STM32L4_LPTIM2)
static struct stm32l4_lptim_priv_s stm32l4_lptim2_priv = static struct stm32l4_lptim_priv_s stm32l4_lptim2_priv =
{ {
.ops = &stm32l4_lptim_ops, .ops = &stm32l4_lptim_ops,
@@ -162,11 +162,11 @@ static struct stm32l4_lptim_dev_s *stm32l4_lptim_getstruct(int timer)
{ {
switch (timer) switch (timer)
{ {
#if CONFIG_STM32L4_LPTIM1 #if defined(CONFIG_STM32L4_LPTIM1)
case 1: case 1:
return (struct stm32l4_lptim_dev_s *)&stm32l4_lptim1_priv; return (struct stm32l4_lptim_dev_s *)&stm32l4_lptim1_priv;
#endif #endif
#if CONFIG_STM32L4_LPTIM2 #if defined(CONFIG_STM32L4_LPTIM2)
case 2: case 2:
return (struct stm32l4_lptim_dev_s *)&stm32l4_lptim2_priv; return (struct stm32l4_lptim_dev_s *)&stm32l4_lptim2_priv;
#endif #endif
@@ -196,12 +196,12 @@ static int stm32l4_lptim_enable(FAR struct stm32l4_lptim_dev_s *dev)
switch (((struct stm32l4_lptim_priv_s *)dev)->base) switch (((struct stm32l4_lptim_priv_s *)dev)->base)
{ {
#if CONFIG_STM32L4_LPTIM1 #if defined(CONFIG_STM32L4_LPTIM1)
case STM32L4_LPTIM1_BASE: case STM32L4_LPTIM1_BASE:
modifyreg32(STM32L4_RCC_APB1ENR1, 0, RCC_APB1ENR1_LPTIM1EN); modifyreg32(STM32L4_RCC_APB1ENR1, 0, RCC_APB1ENR1_LPTIM1EN);
break; break;
#endif #endif
#if CONFIG_STM32L4_LPTIM2 #if defined(CONFIG_STM32L4_LPTIM2)
case STM32L4_LPTIM2_BASE: case STM32L4_LPTIM2_BASE:
modifyreg32(STM32L4_RCC_APB1ENR2, 0, RCC_APB1ENR2_LPTIM2EN); modifyreg32(STM32L4_RCC_APB1ENR2, 0, RCC_APB1ENR2_LPTIM2EN);
break; break;
@@ -224,12 +224,12 @@ static int stm32l4_lptim_disable(FAR struct stm32l4_lptim_dev_s *dev)
switch (((struct stm32l4_lptim_priv_s *)dev)->base) switch (((struct stm32l4_lptim_priv_s *)dev)->base)
{ {
#if CONFIG_STM32L4_LPTIM1 #if defined(CONFIG_STM32L4_LPTIM1)
case STM32L4_LPTIM1_BASE: case STM32L4_LPTIM1_BASE:
modifyreg32(STM32L4_RCC_APB1ENR1, RCC_APB1ENR1_LPTIM1EN, 0); modifyreg32(STM32L4_RCC_APB1ENR1, RCC_APB1ENR1_LPTIM1EN, 0);
break; break;
#endif #endif
#if CONFIG_STM32L4_LPTIM2 #if defined(CONFIG_STM32L4_LPTIM2)
case STM32L4_LPTIM2_BASE: case STM32L4_LPTIM2_BASE:
modifyreg32(STM32L4_RCC_APB1ENR2, RCC_APB1ENR2_LPTIM2EN, 0); modifyreg32(STM32L4_RCC_APB1ENR2, RCC_APB1ENR2_LPTIM2EN, 0);
break; break;
@@ -252,13 +252,13 @@ static int stm32l4_lptim_reset(FAR struct stm32l4_lptim_dev_s *dev)
switch (((struct stm32l4_lptim_priv_s *)dev)->base) switch (((struct stm32l4_lptim_priv_s *)dev)->base)
{ {
#if CONFIG_STM32L4_LPTIM1 #if defined(CONFIG_STM32L4_LPTIM1)
case STM32L4_LPTIM1_BASE: case STM32L4_LPTIM1_BASE:
modifyreg32(STM32L4_RCC_APB1RSTR1, 0, RCC_APB1RSTR1_LPTIM1RST); modifyreg32(STM32L4_RCC_APB1RSTR1, 0, RCC_APB1RSTR1_LPTIM1RST);
modifyreg32(STM32L4_RCC_APB1RSTR1, RCC_APB1RSTR1_LPTIM1RST, 0); modifyreg32(STM32L4_RCC_APB1RSTR1, RCC_APB1RSTR1_LPTIM1RST, 0);
break; break;
#endif #endif
#if CONFIG_STM32L4_LPTIM2 #if defined(CONFIG_STM32L4_LPTIM2)
case STM32L4_LPTIM2_BASE: case STM32L4_LPTIM2_BASE:
modifyreg32(STM32L4_RCC_APB1RSTR2, 0, RCC_APB1RSTR2_LPTIM2RST); modifyreg32(STM32L4_RCC_APB1RSTR2, 0, RCC_APB1RSTR2_LPTIM2RST);
modifyreg32(STM32L4_RCC_APB1RSTR2, RCC_APB1RSTR2_LPTIM2RST, 0); modifyreg32(STM32L4_RCC_APB1RSTR2, RCC_APB1RSTR2_LPTIM2RST, 0);
@@ -283,7 +283,7 @@ static int stm32l4_lptim_get_gpioconfig(FAR struct stm32l4_lptim_dev_s *dev,
switch (((struct stm32l4_lptim_priv_s *)dev)->base) switch (((struct stm32l4_lptim_priv_s *)dev)->base)
{ {
#if CONFIG_STM32L4_LPTIM1 #if defined(CONFIG_STM32L4_LPTIM1)
case STM32L4_LPTIM1_BASE: case STM32L4_LPTIM1_BASE:
switch (channel) switch (channel)
{ {
@@ -308,7 +308,7 @@ static int stm32l4_lptim_get_gpioconfig(FAR struct stm32l4_lptim_dev_s *dev,
break; break;
#endif /* CONFIG_STM32L4_LPTIM1 */ #endif /* CONFIG_STM32L4_LPTIM1 */
#if CONFIG_STM32L4_LPTIM2 #if defined(CONFIG_STM32L4_LPTIM2)
case STM32L4_LPTIM2_BASE: case STM32L4_LPTIM2_BASE:
switch (channel) switch (channel)
{ {