mirror of
https://github.com/apache/nuttx.git
synced 2026-05-31 23:40:19 +08:00
arch/arm/src/s32k1xx: Bring in Cortex-M0+ Systick and interrupt handling from samd2l2; bring in Cortex-M4F Systick and interrupt handling from LPC54xx.
This commit is contained in:
@@ -58,8 +58,7 @@ endif
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# Source file specific to the S32k11x family
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CHIP_ASRCS =
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CHIP_CSRCS = s32k11x_irq.c s32k11x_lowputc.c s32k11x_port.c s32k11x_serial.c
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CHIP_CSRCS += s32k11x_lpuart.c
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CHIP_CSRCS = s32k11x_irq.c
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# Configuration-dependent S32k11x files
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@@ -0,0 +1,336 @@
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/****************************************************************************
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* arch/arm/src/s32k1xx/s32k11x/s32k11x_irq.c
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*
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* Copyright (C) 2019 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
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||||
*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <debug.h>
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#include <nuttx/irq.h>
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#include <nuttx/arch.h>
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#include <arch/irq.h>
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#include "nvic.h"
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#include "up_arch.h"
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#include "up_internal.h"
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#include "s32k14x/s32k14x_irq.h"
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Get a 32-bit version of the default priority */
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#define DEFPRIORITY32 \
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(NVIC_SYSH_PRIORITY_DEFAULT << 24 | NVIC_SYSH_PRIORITY_DEFAULT << 16 | \
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NVIC_SYSH_PRIORITY_DEFAULT << 8 | NVIC_SYSH_PRIORITY_DEFAULT)
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/* g_current_regs[] holds a references to the current interrupt level
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* register storage structure. If is non-NULL only during interrupt
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* processing. Access to g_current_regs[] must be through the macro
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* CURRENT_REGS for portability.
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*/
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volatile uint32_t *g_current_regs[1];
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: s32k11x_nmi, s32k11x_busfault, s32k11x_usagefault, s32k11x_pendsv,
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* s32k11x_dbgmonitor, s32k11x_pendsv, s32k11x_reserved
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*
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* Description:
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* Handlers for various execptions. None are handled and all are fatal
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* error conditions. The only advantage these provided over the default
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* unexpected interrupt handler is that they provide a diagnostic output.
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*
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****************************************************************************/
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#ifdef CONFIG_DEBUG_FEATURES
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static int s32k11x_nmi(int irq, FAR void *context, FAR void *arg)
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{
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(void)up_irq_save();
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_err("PANIC!!! NMI received\n");
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PANIC();
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return 0;
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}
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static int s32k11x_pendsv(int irq, FAR void *context, FAR void *arg)
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{
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(void)up_irq_save();
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_err("PANIC!!! PendSV received\n");
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PANIC();
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return 0;
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}
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static int s32k11x_reserved(int irq, FAR void *context, FAR void *arg)
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{
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(void)up_irq_save();
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_err("PANIC!!! Reserved interrupt\n");
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PANIC();
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return 0;
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}
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#endif
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/****************************************************************************
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* Name: s32k11x_clrpend
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*
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* Description:
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* Clear a pending interrupt at the NVIC.
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*
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****************************************************************************/
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static inline void s32k11x_clrpend(int irq)
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{
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/* This will be called on each interrupt exit whether the interrupt can be
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* enambled or not. So this assertion is necessarily lame.
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*/
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DEBUGASSERT((unsigned)irq < NR_IRQS);
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/* Check for an external interrupt */
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if (irq >= S32K1XX_IRQ_INTERRUPT && irq < S32K1XX_IRQ_INTERRUPT + S32K1XX_IRQ_NINTS)
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{
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/* Set the appropriate bit in the ISER register to enable the
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* interrupt
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*/
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putreg32((1 << (irq - S32K1XX_IRQ_INTERRUPT)), ARMV6M_NVIC_ICPR);
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}
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_irqinitialize
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****************************************************************************/
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void up_irqinitialize(void)
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{
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uint32_t regaddr;
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int i;
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/* Disable all interrupts */
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putreg32(0xffffffff, ARMV6M_NVIC_ICER);
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/* Set all interrupts (and exceptions) to the default priority */
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putreg32(DEFPRIORITY32, ARMV6M_SYSCON_SHPR2);
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putreg32(DEFPRIORITY32, ARMV6M_SYSCON_SHPR3);
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/* Now set all of the interrupt lines to the default priority */
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for (i = 0; i < 8; i++)
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{
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regaddr = ARMV6M_NVIC_IPR(i);
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putreg32(DEFPRIORITY32, regaddr);
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}
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/* currents_regs is non-NULL only while processing an interrupt */
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CURRENT_REGS = NULL;
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/* Attach the SVCall and Hard Fault exception handlers. The SVCall
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* exception is used for performing context switches; The Hard Fault
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* must also be caught because a SVCall may show up as a Hard Fault
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* under certain conditions.
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*/
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irq_attach(S32K1XX_IRQ_SVCALL, up_svcall, NULL);
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irq_attach(S32K1XX_IRQ_HARDFAULT, up_hardfault, NULL);
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/* Attach all other processor exceptions (except reset and sys tick) */
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#ifdef CONFIG_DEBUG_FEATURES
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irq_attach(S32K1XX_IRQ_NMI, s32k11x_nmi, NULL);
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irq_attach(S32K1XX_IRQ_PENDSV, s32k11x_pendsv, NULL);
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irq_attach(S32K1XX_IRQ_RESERVED, s32k11x_reserved, NULL);
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#endif
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s32k11x_dumpnvic("initial", NR_IRQS);
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#ifndef CONFIG_SUPPRESS_INTERRUPTS
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/* And finally, enable interrupts */
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up_irq_enable();
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#endif
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}
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/****************************************************************************
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* Name: up_disable_irq
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*
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* Description:
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* Disable the IRQ specified by 'irq'
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*
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****************************************************************************/
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void up_disable_irq(int irq)
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{
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DEBUGASSERT((unsigned)irq < NR_IRQS);
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/* Check for an external interrupt */
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if (irq >= S32K1XX_IRQ_INTERRUPT && irq < S32K1XX_IRQ_INTERRUPT + S32K1XX_IRQ_NINTS)
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{
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/* Set the appropriate bit in the ICER register to disable the
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* interrupt
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*/
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putreg32((1 << (irq - S32K1XX_IRQ_INTERRUPT)), ARMV6M_NVIC_ICER);
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}
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/* Handle processor exceptions. Only SysTick can be disabled */
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else if (irq == S32K1XX_IRQ_SYSTICK)
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{
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modifyreg32(ARMV6M_SYSTICK_CSR, SYSTICK_CSR_ENABLE, 0);
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}
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s32k11x_dumpnvic("disable", irq);
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}
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/****************************************************************************
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* Name: up_enable_irq
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*
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* Description:
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* Enable the IRQ specified by 'irq'
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*
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****************************************************************************/
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void up_enable_irq(int irq)
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{
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/* This will be called on each interrupt exit whether the interrupt can be
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* enambled or not. So this assertion is necessarily lame.
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*/
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DEBUGASSERT((unsigned)irq < NR_IRQS);
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/* Check for external interrupt */
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if (irq >= S32K1XX_IRQ_INTERRUPT && irq < S32K1XX_IRQ_INTERRUPT + S32K1XX_IRQ_NINTS)
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{
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/* Set the appropriate bit in the ISER register to enable the
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* interrupt
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*/
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putreg32((1 << (irq - S32K1XX_IRQ_INTERRUPT)), ARMV6M_NVIC_ISER);
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}
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/* Handle processor exceptions. Only SysTick can be disabled */
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else if (irq == S32K1XX_IRQ_SYSTICK)
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{
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modifyreg32(ARMV6M_SYSTICK_CSR, 0, SYSTICK_CSR_ENABLE);
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}
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s32k11x_dumpnvic("enable", irq);
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}
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/****************************************************************************
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* Name: up_ack_irq
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*
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* Description:
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* Acknowledge the IRQ
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*
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****************************************************************************/
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void up_ack_irq(int irq)
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{
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s32k11x_clrpend(irq);
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}
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/****************************************************************************
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* Name: s32k11x_dumpnvic
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*
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* Description:
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* Dump some interesting NVIC registers
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*
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****************************************************************************/
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#ifdef CONFIG_DEBUG_IRQ_INFO
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void s32k11x_dumpnvic(const char *msg, int irq)
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{
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irqstate_t flags;
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flags = enter_critical_section();
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irqinfo("NVIC (%s, irq=%d):\n", msg, irq);
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irqinfo(" ISER: %08x ICER: %08x\n",
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getreg32(ARMV6M_NVIC_ISER), getreg32(ARMV6M_NVIC_ICER));
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irqinfo(" ISPR: %08x ICPR: %08x\n",
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getreg32(ARMV6M_NVIC_ISPR), getreg32(ARMV6M_NVIC_ICPR));
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irqinfo(" IRQ PRIO: %08x %08x %08x %08x\n",
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getreg32(ARMV6M_NVIC_IPR0), getreg32(ARMV6M_NVIC_IPR1),
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getreg32(ARMV6M_NVIC_IPR2), getreg32(ARMV6M_NVIC_IPR3));
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irqinfo(" %08x %08x %08x %08x\n",
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getreg32(ARMV6M_NVIC_IPR4), getreg32(ARMV6M_NVIC_IPR5),
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getreg32(ARMV6M_NVIC_IPR6), getreg32(ARMV6M_NVIC_IPR7));
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irqinfo("SYSCON:\n");
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irqinfo(" CPUID: %08x\n",
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getreg32(ARMV6M_SYSCON_CPUID));
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irqinfo(" ICSR: %08x AIRCR: %08x\n",
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getreg32(ARMV6M_SYSCON_ICSR), getreg32(ARMV6M_SYSCON_AIRCR));
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irqinfo(" SCR: %08x CCR: %08x\n",
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getreg32(ARMV6M_SYSCON_SCR), getreg32(ARMV6M_SYSCON_CCR));
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irqinfo(" SHPR2: %08x SHPR3: %08x\n",
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getreg32(ARMV6M_SYSCON_SHPR2), getreg32(ARMV6M_SYSCON_SHPR3));
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leave_critical_section(flags);
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}
|
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#else
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# define s32k11x_dumpnvic(msg, irq)
|
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#endif
|
||||
@@ -0,0 +1,63 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/s32k1xx/s32k11x_irq.h
|
||||
*
|
||||
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_S32K1XX_S32K11X_S32K11X_IRQ_H
|
||||
#define __ARCH_ARM_SRC_S32K1XX_S32K11X_S32K11X_IRQ_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: s32k11x_dumpnvic
|
||||
*
|
||||
* Description:
|
||||
* Dump some interesting NVIC registers
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_DEBUG_IRQ_INFO
|
||||
void s32k11x_dumpnvic(const char *msg, int irq);
|
||||
#else
|
||||
# define s32k11x_dumpnvic(msg, irq)
|
||||
#endif
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_S32K1XX_S32K11X_S32K11X_IRQ_H */
|
||||
@@ -0,0 +1,143 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/s32k1xx/s32k11x/s32k11x_timerisr.c
|
||||
*
|
||||
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdint.h>
|
||||
#include <time.h>
|
||||
#include <debug.h>
|
||||
#include <nuttx/arch.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "nvic.h"
|
||||
#include "clock/clock.h"
|
||||
#include "up_internal.h"
|
||||
#include "up_arch.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* The desired timer interrupt frequency is provided by the definition
|
||||
* CLK_TCK (see include/time.h). CLK_TCK defines the desired number of
|
||||
* system clock ticks per second. That value is a user configurable setting
|
||||
* that defaults to 100 (100 ticks per second = 10 MS interval).
|
||||
*
|
||||
* Then, for example, if the CPU clock is the SysTick and
|
||||
* BOARD_CPU_FREQUENCY is 48MHz and CLK_TCK is 100, then the reload value
|
||||
* would be:
|
||||
*
|
||||
* SYSTICK_RELOAD = (48,000,000 / 100) - 1
|
||||
* = 479,999
|
||||
* = 0x752ff
|
||||
*
|
||||
* Which fits within the maximum 24-bit reload value.
|
||||
*/
|
||||
|
||||
#define SYSTICK_RELOAD ((BOARD_CPU_FREQUENCY / CLK_TCK) - 1)
|
||||
|
||||
/* The size of the reload field is 24 bits. Verify that the reload value
|
||||
* will fit in the reload register.
|
||||
*/
|
||||
|
||||
#if SYSTICK_RELOAD > 0x00ffffff
|
||||
# error SYSTICK_RELOAD exceeds the range of the RELOAD register
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Function: s32k11x_timerisr
|
||||
*
|
||||
* Description:
|
||||
* The timer ISR will perform a variety of services for various portions
|
||||
* of the systems.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int s32k11x_timerisr(int irq, uint32_t *regs, void *arg)
|
||||
{
|
||||
/* Process timer interrupt */
|
||||
|
||||
nxsched_process_timer();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Function: arm_timer_initialize
|
||||
*
|
||||
* Description:
|
||||
* This function is called during start-up to initialize
|
||||
* the timer interrupt.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void arm_timer_initialize(void)
|
||||
{
|
||||
uint32_t regval;
|
||||
|
||||
/* Set the SysTick interrupt to the default priority */
|
||||
|
||||
regval = getreg32(ARMV6M_SYSCON_SHPR3);
|
||||
regval &= ~SYSCON_SHPR3_PRI_15_MASK;
|
||||
regval |= (NVIC_SYSH_PRIORITY_DEFAULT << SYSCON_SHPR3_PRI_15_SHIFT);
|
||||
putreg32(regval, ARMV6M_SYSCON_SHPR3);
|
||||
|
||||
/* Configure SysTick to interrupt at the requested rate */
|
||||
|
||||
putreg32(SYSTICK_RELOAD, ARMV6M_SYSTICK_RVR);
|
||||
|
||||
/* Attach the timer interrupt vector */
|
||||
|
||||
(void)irq_attach(SAM_IRQ_SYSTICK, (xcpt_t)s32k11x_timerisr, NULL);
|
||||
|
||||
/* Enable SysTick interrupts */
|
||||
|
||||
putreg32((SYSTICK_CSR_TICKINT | SYSTICK_CSR_ENABLE), ARMV6M_SYSTICK_CSR);
|
||||
|
||||
/* And enable the timer interrupt */
|
||||
|
||||
up_enable_irq(SAM_IRQ_SYSTICK);
|
||||
}
|
||||
@@ -77,6 +77,12 @@ endif
|
||||
CHIP_ASRCS =
|
||||
CHIP_CSRCS = s32k14x_irq.c s32k14x_clrpend.c
|
||||
|
||||
# Configuration-dependent S32k14x files
|
||||
|
||||
ifneq ($(CONFIG_SCHED_TICKLESS),y)
|
||||
CHIP_CSRCS += s32k14x_timerisr.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_BUILD_PROTECTED),y)
|
||||
CHIP_CSRCS += s32k14x_userspace.c s32k14x_mpuinit.c
|
||||
endif
|
||||
|
||||
@@ -0,0 +1,82 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/s32k1xx/s32k14x/s32k14x_clrpend.c
|
||||
*
|
||||
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <arch/irq.h>
|
||||
|
||||
#include "nvic.h"
|
||||
#include "up_arch.h"
|
||||
|
||||
#include "s32k14x_irq.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: s32k14x_clrpend
|
||||
*
|
||||
* Description:
|
||||
* Clear a pending interrupt at the NVIC. This does not seem to be required
|
||||
* for most interrupts. Don't know why... but the LPC54xx Ethernet EMAC
|
||||
* interrupt definitely needs it!
|
||||
*
|
||||
* This function is logically a part of s32k14x_irq.c, but I will keep it in
|
||||
* a separate file so that it will not increase the footprint on LPC54xx
|
||||
* platforms that do not need this function.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void s32k14x_clrpend(int irq)
|
||||
{
|
||||
/* Check for external interrupt */
|
||||
|
||||
if (irq >= LPC54_IRQ_EXTINT)
|
||||
{
|
||||
if (irq < (LPC54_IRQ_EXTINT + 32))
|
||||
{
|
||||
putreg32(1 << (irq - LPC54_IRQ_EXTINT), NVIC_IRQ0_31_CLRPEND);
|
||||
}
|
||||
else if (irq < LPC54_IRQ_NIRQS)
|
||||
{
|
||||
putreg32(1 << (irq - LPC54_IRQ_EXTINT - 32), NVIC_IRQ32_63_CLRPEND);
|
||||
}
|
||||
}
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,60 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/s32k1xx/s32k14x/s32k14x_irq.h
|
||||
*
|
||||
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_S32K1XX_S32K14X_S32K14X_IRQ_H
|
||||
#define __ARCH_ARM_SRC_S32K1XX_S32K14X_S32K14X_IRQ_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: s32k14x_clrpend
|
||||
*
|
||||
* Description:
|
||||
* Clear a pending interrupt at the NVIC. This does not seem to be
|
||||
* required for most interrupts.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void s32k14x_clrpend(int irq);
|
||||
|
||||
#endif /* __ARCH_ARM_SRC_S32K1XX_S32K14X_S32K14X_IRQ_H */
|
||||
@@ -0,0 +1,173 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/lpc54xx/lpc54_timerisr.c
|
||||
*
|
||||
* Copyright (C) 2017 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include <stdint.h>
|
||||
#include <time.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/arch.h>
|
||||
#include <arch/board/board.h>
|
||||
|
||||
#include "nvic.h"
|
||||
#include "clock/clock.h"
|
||||
#include "up_internal.h"
|
||||
#include "up_arch.h"
|
||||
|
||||
#include "hardware/lpc54_syscon.h"
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* The SysTick clock may be clocked internally either by the by the system
|
||||
* clock (CLKSOURCE==1) or by the SysTick function clock (CLKSOURCE==0).
|
||||
* The SysTick Function clock is equal to:
|
||||
*
|
||||
* Fsystick = Fmainclk / SYSTICKCLKDIV
|
||||
*
|
||||
* Both the divider value (BOARD_SYSTICKCLKDIV) and the resulting SysTick
|
||||
* function clock frequency (Fsystick, BOARD_SYSTICK_CLOCK)
|
||||
*
|
||||
* The desired timer interrupt frequency is provided by the definition
|
||||
* CLK_TCK (see include/time.h). CLK_TCK defines the desired number of
|
||||
* system clock ticks per second. That value is a user configurable setting
|
||||
* that defaults to 100 (100 ticks per second = 10 MS interval).
|
||||
*
|
||||
* reload = (Fsystick / CLK_TICK) - 1
|
||||
*
|
||||
* Tips for selecting BOARD_SYSTICKCLKDIV: The resulting reload value
|
||||
* should be as large as possible, but must be less than 2^24:
|
||||
*
|
||||
* SYSTICKDIV > Fmainclk / CLK_TCK / 2^24
|
||||
*/
|
||||
|
||||
#define SYSTICK_RELOAD ((BOARD_SYSTICK_CLOCK / CLK_TCK) - 1)
|
||||
|
||||
/* The size of the reload field is 24 bits. Verify that the reload value
|
||||
* will fit in the reload register.
|
||||
*/
|
||||
|
||||
#if SYSTICK_RELOAD > 0x00ffffff
|
||||
# error SYSTICK_RELOAD exceeds the range of the RELOAD register
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Function: lpc54_timerisr
|
||||
*
|
||||
* Description:
|
||||
* The timer ISR will perform a variety of services for various portions
|
||||
* of the systems.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static int lpc54_timerisr(int irq, uint32_t *regs, void *arg)
|
||||
{
|
||||
/* Process timer interrupt */
|
||||
|
||||
nxsched_process_timer();
|
||||
return 0;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Function: arm_timer_initialize
|
||||
*
|
||||
* Description:
|
||||
* This function is called during start-up to initialize
|
||||
* the timer interrupt.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void arm_timer_initialize(void)
|
||||
{
|
||||
uint32_t regval;
|
||||
|
||||
/* May be clocked internally by the system clock or the SysTick function
|
||||
* clock. Set the SysTick clock divider in the SYSCON_SYSTICK register.
|
||||
* Since this function is called early after reset, it is safe to assume
|
||||
* that the SysTick is disabled and so that no reset or halt actions are
|
||||
* necessary.
|
||||
*/
|
||||
|
||||
regval = (SYSCON_SYSTICKCLKDIV_DIV(BOARD_SYSTICKCLKDIV) |
|
||||
SYSCON_SYSTICKCLKDIV_REQFLAG);
|
||||
putreg32(regval, LPC54_SYSCON_SYSTICKCLKDIV);
|
||||
|
||||
/* The request flag will be cleared when the divider change is complete */
|
||||
|
||||
while ((getreg32(LPC54_SYSCON_SYSTICKCLKDIV) & SYSCON_SYSTICKCLKDIV_REQFLAG) != 0)
|
||||
{
|
||||
}
|
||||
|
||||
/* Make sure that the SYSTICK clock source is set to use the SysTick
|
||||
* function clock (CLKSOURCE==0).
|
||||
*
|
||||
* REVISIT: This is over-writted with CLKSOURCE==1 below.
|
||||
*/
|
||||
|
||||
regval = getreg32(NVIC_SYSTICK_CTRL);
|
||||
regval &= ~NVIC_SYSTICK_CTRL_CLKSOURCE;
|
||||
putreg32(regval, NVIC_SYSTICK_CTRL);
|
||||
|
||||
/* Configure SysTick to interrupt at the requested rate */
|
||||
|
||||
putreg32(SYSTICK_RELOAD, NVIC_SYSTICK_RELOAD);
|
||||
|
||||
/* Attach the timer interrupt vector */
|
||||
|
||||
(void)irq_attach(LPC54_IRQ_SYSTICK, (xcpt_t)lpc54_timerisr, NULL);
|
||||
|
||||
/* Enable SysTick interrupts */
|
||||
|
||||
putreg32((NVIC_SYSTICK_CTRL_CLKSOURCE | NVIC_SYSTICK_CTRL_TICKINT |
|
||||
NVIC_SYSTICK_CTRL_ENABLE), NVIC_SYSTICK_CTRL);
|
||||
|
||||
/* And enable the timer interrupt */
|
||||
|
||||
up_enable_irq(LPC54_IRQ_SYSTICK);
|
||||
}
|
||||
@@ -90,7 +90,7 @@
|
||||
* of the TxFIFO, read clock of the RxFIFO and synchronization of the modem
|
||||
* control input pins. It must always be running when UART is enabled.
|
||||
*
|
||||
* The default lpuart1 ipg_clk is 66MHz (max 66.5MHz). ipg_clk is shared
|
||||
* The default lpuart0 ipg_clk is 66MHz (max 66.5MHz). ipg_clk is shared
|
||||
* among many modules and should not be controlled by the UART logic.
|
||||
*
|
||||
* The module_clock is for all the state machines, writing RxFIFO, reading
|
||||
@@ -99,10 +99,10 @@
|
||||
* peripheral_clock without changing configuration of baud rate.
|
||||
*
|
||||
* The default ipg_perclk is 80MHz (max 80MHz). ipg_perclk is gated by
|
||||
* CCGR5[CG12], lpuart1_clk_enable. The clock generation sequence is:
|
||||
* CCGR5[CG12], lpuart0_clk_enable. The clock generation sequence is:
|
||||
*
|
||||
* pll3_sw_clk (480M) -> CCGR5[CG12] -> 3 bit divider cg podf=6 ->
|
||||
* PLL3_80M (80Mhz) -> CDCDR1: lpuart1_clk_podf ->
|
||||
* PLL3_80M (80Mhz) -> CDCDR1: lpuart0_clk_podf ->
|
||||
* 6 bit divider default=1 -> LPUART0_CLK_ROOT
|
||||
*
|
||||
* REVISIT: This logic assumes that all dividers are at the default value
|
||||
@@ -138,15 +138,15 @@ void s32k1xx_lpuart_clock_enable (uint32_t base)
|
||||
{
|
||||
if (base == S32K1XX_LPUART0_BASE)
|
||||
{
|
||||
s32k1xx_clockall_lpuart1();
|
||||
s32k1xx_clockall_lpuart0();
|
||||
}
|
||||
else if (base == S32K1XX_LPUART1_BASE)
|
||||
{
|
||||
s32k1xx_clockall_lpuart2();
|
||||
s32k1xx_clockall_lpuart1();
|
||||
}
|
||||
else if (base == S32K1XX_LPUART2_BASE)
|
||||
{
|
||||
s32k1xx_clockall_lpuart3();
|
||||
s32k1xx_clockall_lpuart2();
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* arch/arm/src/samd2l2/sam_irq.h
|
||||
*
|
||||
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
|
||||
@@ -31,20 +31,20 @@
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM_SRC_SAMD2L2_SAM_IRQ_H
|
||||
#define __ARCH_ARM_SRC_SAMD2L2_SAM_IRQ_H
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/************************************************************************************
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
************************************************************************************/
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: sam_dumpnvic
|
||||
|
||||
Reference in New Issue
Block a user