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Squashed commit of the following:

Browse Source 
Author: Gregory Nutt <gnutt@nuttx.org>

    Run all .c and .h modified in PR through nxstyle.

Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>

    feature k210 (#16)

    * arch: risc-v: Add support for __LP64__ to types.h
    * arch: risc-v: Add support for RV64GC to common files
    * arch: risc-v: Add support for Kendryte K210 processor (RV64GC)
    * boards: risk-v: Add support for Sipeed Maix Bit with K210
    * tools: Add support for Kendryte K210 processor
This commit is contained in:
Masayuki Ishikawa
2019-12-31 09:06:20 -06:00
committed by Gregory Nutt
parent 3c2fbe3d9c
commit e33fc3dc89
68 changed files with 6482 additions and 19 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/risc-v/Kconfig
+19 -1
View File
@@ -16,6 +16,12 @@ config ARCH_CHIP_FE310
---help---
SiFive FE310 processor (E31 RISC-V Core with MAC extensions).
config ARCH_CHIP_K210
bool "Kendryte K210"
select ARCH_RV64GC
---help---
Kendryte K210 processor (RISC-V 64bit core with GC extensions)
config ARCH_CHIP_NR5
bool "NEXT NanoRisc5"
select ARCH_RV32IM
@@ -39,13 +45,19 @@ config ARCH_RV32IM
bool
default n
config ARCH_RV64GC
bool
default n
config ARCH_FAMILY
string
default "rv32im" if ARCH_RM32IM
default "rv32im" if ARCH_RV32IM
default "rv64gc" if ARCH_RV64GC
config ARCH_CHIP
string
default "fe310" if ARCH_CHIP_FE310
default "k210" if ARCH_CHIP_K210
default "nr5m100" if ARCH_CHIP_NR5
default "gap8" if ARCH_CHIP_GAP8
@@ -62,9 +74,15 @@ config NR5_MPU
if ARCH_RV32IM
source arch/risc-v/src/rv32im/Kconfig
endif
if ARCH_RV64GC
source arch/risc-v/src/rv64gc/Kconfig
endif
if ARCH_CHIP_FE310
source arch/risc-v/src/fe310/Kconfig
endif
if ARCH_CHIP_K210
source arch/risc-v/src/k210/Kconfig
endif
if ARCH_CHIP_NR5
source arch/risc-v/src/nr5m100/Kconfig
endif
arch/risc-v/include/irq.h
+4
View File
@@ -53,6 +53,10 @@
# include <arch/rv32im/irq.h>
#endif
#if defined(CONFIG_ARCH_RV64GC)
# include <arch/rv64gc/irq.h>
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
arch/risc-v/include/k210/chip.h
+36
View File
@@ -0,0 +1,36 @@
/****************************************************************************
* arch/risc-v/include/k210/chip.h
*
* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_RISCV_INCLUDE_K210_CHIP_H
#define __ARCH_RISCV_INCLUDE_K210_CHIP_H
#endif /* __ARCH_RISCV_INCLUDE_K210_CHIP_H */
arch/risc-v/include/k210/irq.h
+121
View File
@@ -0,0 +1,121 @@
/****************************************************************************
* arch/risc-v/include/k210/irq.h
*
* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_RISCV_INCLUDE_K210_IRQ_H
#define __ARCH_RISCV_INCLUDE_K210_IRQ_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <arch/irq.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Machine Interrupt Enable bit in mstatus register */
#define MSTATUS_MIE (0x1 << 3)
/* In mie (machine interrupt enable) register */
#define MIE_MTIE (0x1 << 7) /* Machine Timer Interrupt Enable */
#define MIE_MEIE (0x1 << 11) /* Machine External Interrupt Enable */
/* Map RISC-V exception code to NuttX IRQ */
/* IRQ 0-15 : (exception:interrupt=0) */
#define K210_IRQ_IAMISALIGNED (0) /* Instruction Address Misaligned */
#define K210_IRQ_IAFAULT (1) /* Instruction Address Fault */
#define K210_IRQ_IINSTRUCTION (2) /* Illegal Instruction */
#define K210_IRQ_BPOINT (3) /* Break Point */
#define K210_IRQ_LAMISALIGNED (4) /* Load Address Misaligned */
#define K210_IRQ_LAFAULT (5) /* Load Access Fault */
#define K210_IRQ_SAMISALIGNED (6) /* Store/AMO Address Misaligned */
#define K210_IRQ_SAFAULT (7) /* Store/AMO Access Fault */
#define K210_IRQ_ECALLU (8) /* Environment Call from U-mode */
/* 9-10: Reserved */
#define K210_IRQ_ECALLM (11) /* Environment Call from M-mode */
/* 12-15: Reserved */
/* IRQ 16- : (async event:interrupt=1) */
#define K210_IRQ_ASYNC (16)
#define K210_IRQ_MSOFT (K210_IRQ_ASYNC + 3) /* Machine Software Int */
#define K210_IRQ_MTIMER (K210_IRQ_ASYNC + 7) /* Machine Timer Int */
#define K210_IRQ_MEXT (K210_IRQ_ASYNC + 11) /* Machine External Int */
/* Machine Grobal External Interrupt */
#define K210_IRQ_UART0 (K210_IRQ_MEXT + 33)
/* Total number of IRQs */
#define NR_IRQS (K210_IRQ_UART0 + 1)
/****************************************************************************
* Public Types
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Data
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
EXTERN irqstate_t up_irq_save(void);
EXTERN void up_irq_restore(irqstate_t);
EXTERN irqstate_t up_irq_enable(void);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_RISCV_INCLUDE_K210_IRQ_H */
arch/risc-v/include/limits.h
+16
View File
@@ -87,4 +87,20 @@
#endif /* defined(CONFIG_ARCH_32IM) || defined(CONFIG_ARCH_32I) */
#if defined(CONFIG_ARCH_RV64GC)
#define LONG_MIN (-LONG_MAX - 1)
#define LONG_MAX 9223372036854775807L
#define ULONG_MAX 18446744073709551615UL
#define LLONG_MIN (-LLONG_MAX - 1)
#define LLONG_MAX 9223372036854775807LL
#define ULLONG_MAX 18446744073709551615ULL
#define PTR_MIN (-PTR_MAX - 1)
#define PTR_MAX 9223372036854775807
#define UPTR_MAX 18446744073709551615U
#endif
#endif /* __ARCH_RISCV_INCLUDE_LIMITS_H */
arch/risc-v/include/rv64gc/irq.h
+352
View File
@@ -0,0 +1,352 @@
/****************************************************************************
* arch/risc-v/include/rv64gc/irq.h
*
* Copyright (C) 2011, 2013, 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Modified for RISC-V:
*
* Copyright (C) 2016 Ken Pettit. All rights reserved.
* Author: Ken Pettit <pettitkd@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* This file should never be included directed but, rather, only indirectly
* through nuttx/irq.h
*/
#ifndef __ARCH_RISCV_INCLUDE_RV64GC_IRQ_H
#define __ARCH_RISCV_INCLUDE_RV64GC_IRQ_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/types.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ************************************************************/
/* If this is a kernel build, how many nested system calls should we support? */
#ifndef CONFIG_SYS_NNEST
# define CONFIG_SYS_NNEST 2
#endif
/* Processor PC */
#define REG_EPC_NDX 0
/* General pupose registers
* $0: Zero register does not need to be saved
* $1: ra (return address)
*/
#define REG_X1_NDX 1
/* $2: Stack POinter
* $3: Global Pointer
* $4: Thread Pointer
*/
#define REG_X2_NDX 2
#define REG_X3_NDX 3
#define REG_X4_NDX 4
/* $5-$7 = t0-t3: Temporary registers */
#define REG_X5_NDX 5
#define REG_X6_NDX 6
#define REG_X7_NDX 7
/* $8: s0 / fp Frame pointer */
#define REG_X8_NDX 8
/* $89 s1 Saved register */
#define REG_X9_NDX 9
/* $10-$17 = a0-a7: Argument registers */
#define REG_X10_NDX 10
#define REG_X11_NDX 11
#define REG_X12_NDX 12
#define REG_X13_NDX 13
#define REG_X14_NDX 14
#define REG_X15_NDX 15
#define REG_X16_NDX 16
#define REG_X17_NDX 17
/* $18-$27 = s2-s11: Saved registers */
#define REG_X18_NDX 18
#define REG_X19_NDX 19
#define REG_X20_NDX 20
#define REG_X21_NDX 21
#define REG_X22_NDX 22
#define REG_X23_NDX 23
#define REG_X24_NDX 24
#define REG_X25_NDX 25
#define REG_X26_NDX 26
#define REG_X27_NDX 27
/* $28-31 = t3-t6: Temporary (Volatile) registers */
#define REG_X28_NDX 28
#define REG_X29_NDX 29
#define REG_X30_NDX 30
#define REG_X31_NDX 31
/* Interrupt Context register */
#define REG_INT_CTX_NDX 32
#define XCPTCONTEXT_REGS 33
#define XCPTCONTEXT_SIZE (8*XCPTCONTEXT_REGS)
/* In assembly language, values have to be referenced as byte address
* offsets. But in C, it is more convenient to reference registers as
* register save table offsets.
*/
#ifdef __ASSEMBLY__
# define REG_EPC (8*REG_EPC_NDX)
# define REG_X1 (8*REG_X1_NDX)
# define REG_X2 (8*REG_X2_NDX)
# define REG_X3 (8*REG_X3_NDX)
# define REG_X4 (8*REG_X4_NDX)
# define REG_X5 (8*REG_X5_NDX)
# define REG_X6 (8*REG_X6_NDX)
# define REG_X7 (8*REG_X7_NDX)
# define REG_X8 (8*REG_X8_NDX)
# define REG_X9 (8*REG_X9_NDX)
# define REG_X10 (8*REG_X10_NDX)
# define REG_X11 (8*REG_X11_NDX)
# define REG_X12 (8*REG_X12_NDX)
# define REG_X13 (8*REG_X13_NDX)
# define REG_X14 (8*REG_X14_NDX)
# define REG_X15 (8*REG_X15_NDX)
# define REG_X16 (8*REG_X16_NDX)
# define REG_X17 (8*REG_X17_NDX)
# define REG_X18 (8*REG_X18_NDX)
# define REG_X19 (8*REG_X19_NDX)
# define REG_X20 (8*REG_X20_NDX)
# define REG_X21 (8*REG_X21_NDX)
# define REG_X22 (8*REG_X22_NDX)
# define REG_X23 (8*REG_X23_NDX)
# define REG_X24 (8*REG_X24_NDX)
# define REG_X25 (8*REG_X25_NDX)
# define REG_X26 (8*REG_X26_NDX)
# define REG_X27 (8*REG_X27_NDX)
# define REG_X28 (8*REG_X28_NDX)
# define REG_X29 (8*REG_X29_NDX)
# define REG_X30 (8*REG_X30_NDX)
# define REG_X31 (8*REG_X31_NDX)
# define REG_INT_CTX (8*REG_INT_CTX_NDX)
#else
# define REG_EPC REG_EPC_NDX
# define REG_X1 REG_X1_NDX
# define REG_X2 REG_X2_NDX
# define REG_X3 REG_X3_NDX
# define REG_X4 REG_X4_NDX
# define REG_X5 REG_X5_NDX
# define REG_X6 REG_X6_NDX
# define REG_X7 REG_X7_NDX
# define REG_X8 REG_X8_NDX
# define REG_X9 REG_X9_NDX
# define REG_X10 REG_X10_NDX
# define REG_X11 REG_X11_NDX
# define REG_X12 REG_X12_NDX
# define REG_X13 REG_X13_NDX
# define REG_X14 REG_X14_NDX
# define REG_X15 REG_X15_NDX
# define REG_X16 REG_X16_NDX
# define REG_X17 REG_X17_NDX
# define REG_X18 REG_X18_NDX
# define REG_X19 REG_X19_NDX
# define REG_X20 REG_X20_NDX
# define REG_X21 REG_X21_NDX
# define REG_X22 REG_X22_NDX
# define REG_X23 REG_X23_NDX
# define REG_X24 REG_X24_NDX
# define REG_X25 REG_X25_NDX
# define REG_X26 REG_X26_NDX
# define REG_X27 REG_X27_NDX
# define REG_X28 REG_X28_NDX
# define REG_X29 REG_X29_NDX
# define REG_X30 REG_X30_NDX
# define REG_X31 REG_X31_NDX
# define REG_INT_CTX REG_INT_CTX_NDX
#endif
/* Now define more user friendly alternative name that can be used either
* in assembly or C contexts.
*/
/* $1 = ra: Return address */
#define REG_RA REG_X1
/* $2 = sp: The value of the stack pointer on return from the exception */
#define REG_SP REG_X2
/* $3 = gp: Only needs to be saved under conditions where there are
* multiple, per-thread values for the GP.
*/
#define REG_GP REG_X3
/* $4 = tp: Thread Pointer */
#define REG_TP REG_X4
/* $5-$7 = t0-t2: Caller saved temporary registers */
#define REG_T0 REG_X5
#define REG_T1 REG_X6
#define REG_T2 REG_X7
/* $8 = either s0 or fp: Depends if a frame pointer is used or not */
#define REG_S0 REG_X8
#define REG_FP REG_X8
/* $9 = s1: Caller saved register */
#define REG_S1 REG_X9
/* $10-$17 = a0-a7: Argument registers */
#define REG_A0 REG_X10
#define REG_A1 REG_X11
#define REG_A2 REG_X12
#define REG_A3 REG_X13
#define REG_A4 REG_X14
#define REG_A5 REG_X15
#define REG_A6 REG_X16
#define REG_A7 REG_X17
/* $18-$27 = s2-s11: Callee saved registers */
#define REG_S2 REG_X18
#define REG_S3 REG_X19
#define REG_S4 REG_X20
#define REG_S5 REG_X21
#define REG_S6 REG_X22
#define REG_S7 REG_X23
#define REG_S8 REG_X24
#define REG_S9 REG_X25
#define REG_S10 REG_X26
#define REG_S11 REG_X27
/* $28-$31 = t3-t6: Caller saved temporary registers */
#define REG_T3 REG_X28
#define REG_T4 REG_X29
#define REG_T5 REG_X30
#define REG_T6 REG_X31
/****************************************************************************
* Public Types
****************************************************************************/
#ifndef __ASSEMBLY__
/* This structure represents the return state from a system call */
#ifdef CONFIG_BUILD_KERNEL
struct xcpt_syscall_s
{
uint64_t sysreturn; /* The return PC */
};
#endif
/* The following structure is included in the TCB and defines the complete
* state of the thread.
*/
struct xcptcontext
{
/* The following function pointer is non-NULL if there are pending signals
* to be processed.
*/
void *sigdeliver; /* Actual type is sig_deliver_t */
/* These additional register save locations are used to implement the
* signal delivery trampoline.
*
* REVISIT: Because there is only one copy of these save areas,
* only a single signal handler can be active. This precludes
* queuing of signal actions. As a result, signals received while
* another signal handler is executing will be ignored!
*/
uint64_t saved_epc; /* Trampoline PC */
uint64_t saved_int_ctx; /* Interrupt context with interrupts disabled. */
#ifdef CONFIG_BUILD_KERNEL
/* This is the saved address to use when returning from a user-space
* signal handler.
*/
uint32_t sigreturn;
#endif
#ifdef CONFIG_BUILD_KERNEL
/* The following array holds information needed to return from each nested
* system call.
*/
uint8_t nsyscalls;
struct xcpt_syscall_s syscall[CONFIG_SYS_NNEST];
#endif
/* Register save area */
uint64_t regs[XCPTCONTEXT_REGS];
};
#endif /* __ASSEMBLY__ */
/****************************************************************************
* Public Variables
****************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#endif /* __ARCH_RISCV_INCLUDE_RV64GC_IRQ_H */
arch/risc-v/include/rv64gc/syscall.h
+209
View File
@@ -0,0 +1,209 @@
/****************************************************************************
* arch/risc-v/include/rv64gc/syscall.h
*
* Copyright (C) 2011-2013, 2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* This file should never be included directed but, rather, only indirectly
* through include/syscall.h or include/sys/sycall.h
*/
#ifndef __ARCH_RISCV_INCLUDE_RV64GC_SYSCALL_H
#define __ARCH_RISCV_INCLUDE_RV64GC_SYSCALL_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define SYS_syscall 0x00
/* Configuration ************************************************************/
/* SYS call 1 and 2 are defined for internal use by the RISC-V port (see
* arch/risc-v/include/rv64gc/syscall.h). In addition, SYS call 3 is the
* return from a SYS call in kernel mode. The first four syscall values must,
* therefore, be reserved (0 is not used).
*/
#ifdef CONFIG_BUILD_KERNEL
# ifndef CONFIG_SYS_RESERVED
# error "CONFIG_SYS_RESERVED must be defined to the value 4"
# elif CONFIG_SYS_RESERVED != 4
# error "CONFIG_SYS_RESERVED must have the value 4"
# endif
#endif
/* sys_call macros **********************************************************/
#ifndef __ASSEMBLY__
/* Context switching system calls *******************************************/
/* SYS call 0: (not used) */
/* SYS call 1:
*
* void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
*/
#define SYS_restore_context (1)
#define up_fullcontextrestore(restoreregs) \
(void)sys_call1(SYS_restore_context, (uintptr_t)restoreregs)
/* SYS call 2:
*
* void up_switchcontext(uint32_t *saveregs, uint32_t *restoreregs);
*/
#define SYS_switch_context (2)
#define up_switchcontext(saveregs, restoreregs) \
(void)sys_call2(SYS_switch_context, (uintptr_t)saveregs, (uintptr_t)restoreregs)
#ifdef CONFIG_BUILD_KERNEL
/* SYS call 3:
*
* void up_syscall_return(void);
*/
#define SYS_syscall_return (3)
#define up_syscall_return() (void)sys_call0(SYS_syscall_return)
#endif
#endif /* __ASSEMBLY__ */
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Inline functions
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Data
****************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Name: up_syscall0
*
* Description:
* System call SYS_ argument and no additional parameters.
*
****************************************************************************/
uintptr_t sys_call0(unsigned int nbr);
/****************************************************************************
* Name: up_syscall1
*
* Description:
* System call SYS_ argument and one additional parameter.
*
****************************************************************************/
uintptr_t sys_call1(unsigned int nbr, uintptr_t parm1);
/****************************************************************************
* Name: up_syscall2
*
* Description:
* System call SYS_ argument and two additional parameters.
*
****************************************************************************/
uintptr_t sys_call2(unsigned int nbr, uintptr_t parm1, uintptr_t parm2);
/****************************************************************************
* Name: up_syscall3
*
* Description:
* System call SYS_ argument and three additional parameters.
*
****************************************************************************/
uintptr_t sys_call3(unsigned int nbr, uintptr_t parm1, uintptr_t parm2,
uintptr_t parm3);
/****************************************************************************
* Name: up_syscall4
*
* Description:
* System call SYS_ argument and four additional parameters.
*
****************************************************************************/
uintptr_t sys_call4(unsigned int nbr, uintptr_t parm1, uintptr_t parm2,
uintptr_t parm3, uintptr_t parm4);
/****************************************************************************
* Name: up_syscall5
*
* Description:
* System call SYS_ argument and five additional parameters.
*
****************************************************************************/
uintptr_t sys_call5(unsigned int nbr, uintptr_t parm1, uintptr_t parm2,
uintptr_t parm3, uintptr_t parm4, uintptr_t parm5);
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_RISCV_INCLUDE_RV64GC_SYSCALL_H */
arch/risc-v/include/syscall.h
+4
View File
@@ -52,6 +52,10 @@
# include <arch/rv32im/syscall.h>
#endif
#ifdef CONFIG_ARCH_RV64GC
# include <arch/rv64gc/syscall.h>
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
arch/risc-v/include/types.h
+7 -2
View File
@@ -44,8 +44,6 @@
* Included Files
****************************************************************************/
//#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
@@ -78,10 +76,17 @@ typedef signed long long _int64_t;
typedef unsigned long long _uint64_t;
#define __INT64_DEFINED
#ifdef __LP64__
/* A pointer is 8 bytes */
typedef signed long _intptr_t;
typedef unsigned long _uintptr_t;
#else
/* A pointer is 4 bytes */
typedef signed int _intptr_t;
typedef unsigned int _uintptr_t;
#endif
/* This is the size of the interrupt state save returned by irqsave(). */
arch/risc-v/src/Makefile
+2
View File
@@ -42,6 +42,8 @@ ifeq ($(CONFIG_ARCH_RV32I),y) # Base Integer support
ARCH_SUBDIR = rv32i
else ifeq ($(CONFIG_ARCH_RV32IM),y) # Integer + math support
ARCH_SUBDIR = rv32im
else ifeq ($(CONFIG_ARCH_RV64GC),y) # GC=IMAFDC
ARCH_SUBDIR = rv64gc
else
ARCH_SUBDIR = rv32i # Default to base RV32I core
endif
arch/risc-v/src/common/up_arch.h
+1 -1
View File
@@ -77,7 +77,7 @@ extern "C"
/* Atomic modification of registers */
void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits);
void modifyreg32(uintptr_t addr, uint32_t clearbits, uint32_t setbits);
#undef EXTERN
#if defined(__cplusplus)
arch/risc-v/src/common/up_createstack.c
+4 -4
View File
@@ -60,7 +60,7 @@
* however, the stack must be aligned to 8-byte addresses.
*/
#ifdef CONFIG_LIBC_FLOATINGPOINT
#if defined(CONFIG_LIBC_FLOATINGPOINT) || defined (CONFIG_ARCH_RV64GC)
# define STACK_ALIGNMENT 8
#else
# define STACK_ALIGNMENT 4
@@ -181,7 +181,7 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
* the stack are referenced as positive word offsets from sp.
*/
top_of_stack = (uint32_t)tcb->stack_alloc_ptr + stack_size - 4;
top_of_stack = (uintptr_t)tcb->stack_alloc_ptr + stack_size - 4;
/* The MIPS stack must be aligned at word (4 byte) boundaries; for
* floating point use, the stack must be aligned to 8-byte addresses.
@@ -190,7 +190,7 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
*/
top_of_stack = STACK_ALIGN_DOWN(top_of_stack);
size_of_stack = top_of_stack - (uint32_t)tcb->stack_alloc_ptr + 4;
size_of_stack = top_of_stack - (uintptr_t)tcb->stack_alloc_ptr + 4;
/* Save the adjusted stack values in the struct tcb_s */
@@ -210,7 +210,7 @@ int up_create_stack(FAR struct tcb_s *tcb, size_t stack_size, uint8_t ttype)
return OK;
}
return ERROR;
return ERROR;
}
/****************************************************************************
arch/risc-v/src/common/up_internal.h
+14
View File
@@ -69,7 +69,11 @@
* only a referenced is passed to get the state from the TCB.
*/
#ifdef CONFIG_ARCH_RV64GC
#define up_savestate(regs) up_copystate(regs, (uint64_t*)g_current_regs)
#else
#define up_savestate(regs) up_copystate(regs, (uint32_t*)g_current_regs)
#endif
#define up_restorestate(regs) (g_current_regs = regs)
/* Determine which (if any) console driver to use. If a console is enabled
@@ -113,8 +117,13 @@ extern "C"
#define EXTERN extern
#endif
#ifdef CONFIG_ARCH_RV64GC
EXTERN volatile uint64_t *g_current_regs;
EXTERN uintptr_t g_idle_topstack;
#else
EXTERN volatile uint32_t *g_current_regs;
EXTERN uint32_t g_idle_topstack;
#endif
/* Address of the saved user stack pointer */
@@ -163,7 +172,12 @@ void up_allocate_heap(FAR void **heap_start, size_t *heap_size);
void up_irqinitialize(void);
void up_ack_irq(int irq);
#ifdef CONFIG_ARCH_RV64GC
void up_copystate(uint64_t *dest, uint64_t *src);
#else
void up_copystate(uint32_t *dest, uint32_t *src);
#endif
void up_sigdeliver(void);
int up_swint(int irq, FAR void *context, FAR void *arg);
uint32_t up_get_newintctx(void);
arch/risc-v/src/common/up_modifyreg32.c
+1 -1
View File
@@ -59,7 +59,7 @@
*
****************************************************************************/
void modifyreg32(unsigned int addr, uint32_t clearbits, uint32_t setbits)
void modifyreg32(uintptr_t addr, uint32_t clearbits, uint32_t setbits)
{
irqstate_t flags;
uint32_t regval;
arch/risc-v/src/common/up_stackframe.c
+4 -3
View File
@@ -51,11 +51,12 @@
/****************************************************************************
* Pre-processor Macros
****************************************************************************/
/* MIPS requires at least a 4-byte stack alignment. For floating point use,
* however, the stack must be aligned to 8-byte addresses.
*/
#ifdef CONFIG_LIBC_FLOATINGPOINT
#if defined(CONFIG_LIBC_FLOATINGPOINT) || defined (CONFIG_ARCH_RV64GC)
# define STACK_ALIGNMENT 8
#else
# define STACK_ALIGNMENT 4
@@ -134,10 +135,10 @@ FAR void *up_stack_frame(FAR struct tcb_s *tcb, size_t frame_size)
/* Reset the initial stack pointer */
tcb->xcp.regs[REG_SP] = (uint32_t)tcb->adj_stack_ptr;
tcb->xcp.regs[REG_SP] = (uintptr_t)tcb->adj_stack_ptr;
/* And return the pointer to the allocated region */
return (FAR void *)(topaddr + sizeof(uint32_t));
return (FAR void *)(topaddr);
}
arch/risc-v/src/common/up_usestack.c
+4 -4
View File
@@ -57,7 +57,7 @@
* however, the stack must be aligned to 8-byte addresses.
*/
#ifdef CONFIG_LIBC_FLOATINGPOINT
#if defined(CONFIG_LIBC_FLOATINGPOINT) || defined (CONFIG_ARCH_RV64GC)
# define STACK_ALIGNMENT 8
#else
# define STACK_ALIGNMENT 4
@@ -133,7 +133,7 @@ int up_use_stack(struct tcb_s *tcb, void *stack, size_t stack_size)
* as positive word offsets from sp.
*/
top_of_stack = (uint32_t)tcb->stack_alloc_ptr + stack_size - 4;
top_of_stack = (uintptr_t)tcb->stack_alloc_ptr + stack_size - 4;
/* The MIPS stack must be aligned at word (4 byte) or double word (8 byte)
* boundaries. If necessary top_of_stack must be rounded down to the
@@ -141,11 +141,11 @@ int up_use_stack(struct tcb_s *tcb, void *stack, size_t stack_size)
*/
top_of_stack = STACK_ALIGN_DOWN(top_of_stack);
size_of_stack = top_of_stack - (uint32_t)tcb->stack_alloc_ptr + 4;
size_of_stack = top_of_stack - (uintptr_t)tcb->stack_alloc_ptr + 4;
/* Save the adjusted stack values in the struct tcb_s */
tcb->adj_stack_ptr = (uint32_t *)top_of_stack;
tcb->adj_stack_ptr = (uintptr_t *)top_of_stack;
tcb->adj_stack_size = size_of_stack;
return OK;
arch/risc-v/src/k210/Kconfig
+28
View File
@@ -0,0 +1,28 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
comment "K210 Configuration Options"
menu "K210 Peripheral Support"
# These "hidden" settings determine is a peripheral option is available for the
# selection MCU
config K210_HAVE_UART0
bool
default y
select UART0_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
# These are the peripheral selections proper
config K210_UART0
bool "UART0"
default y
select ARCH_HAVE_UART0
select ARCH_HAVE_SERIAL_TERMIOS
select K210_UART
endmenu
arch/risc-v/src/k210/Make.defs
+62
View File
@@ -0,0 +1,62 @@
############################################################################
# arch/risc-v/src/k210/Make.defs
#
# Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
# Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
#
# # Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
# Specify our HEAD assembly file. This will be linked as
# the first object file, so it will appear at address 0
HEAD_ASRC = k210_vectors.S
# Specify our general Assembly files
CHIP_ASRCS = k210_head.S up_syscall.S
# Specify C code within the common directory to be included
CMN_CSRCS += up_initialize.c up_swint.c
CMN_CSRCS += up_allocateheap.c up_createstack.c up_exit.c
CMN_CSRCS += up_assert.c up_blocktask.c up_copystate.c up_initialstate.c
CMN_CSRCS += up_interruptcontext.c up_modifyreg32.c up_puts.c
CMN_CSRCS += up_releasepending.c up_reprioritizertr.c
CMN_CSRCS += up_releasestack.c up_stackframe.c up_schedulesigaction.c
CMN_CSRCS += up_sigdeliver.c up_unblocktask.c up_usestack.c
ifeq ($(CONFIG_STACK_COLORATION),y)
CMN_CSRCS += up_checkstack.c
endif
ifeq ($(CONFIG_ARCH_HAVE_VFORK),y)
CMN_CSRCS += up_vfork.c
endif
# Specify our C code within this directory to be included
CHIP_CSRCS = k210_allocateheap.c k210_clockconfig.c
CHIP_CSRCS += k210_idle.c k210_irq.c k210_irq_dispatch.c
CHIP_CSRCS += k210_lowputc.c k210_serial.c
CHIP_CSRCS += k210_start.c k210_timerisr.c
arch/risc-v/src/k210/chip.h
+45
View File
@@ -0,0 +1,45 @@
/****************************************************************************
* arch/risc-v/src/k210/chip.h
*
* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_K210_CHIP_H
#define __ARCH_RISCV_SRC_K210_CHIP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include "k210_memorymap.h"
#endif /* __ARCH_RISCV_SRC_K210_CHIP_H */
arch/risc-v/src/k210/hardware/k210_clint.h
+43
View File
@@ -0,0 +1,43 @@
/****************************************************************************
* arch/risc-v/src/k210/hardware/k210_clint.h
*
* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_K210_HARDWARE_K210_CLINT_H
#define __ARCH_RISCV_SRC_K210_HARDWARE_K210_CLINT_H
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define K210_CLINT_MTIMECMP (K210_CLINT_BASE + 0x4000)
#define K210_CLINT_MTIME (K210_CLINT_BASE + 0xbff8)
#endif /* __ARCH_RISCV_SRC_K210_HARDWARE_K210_CLINT_H */
arch/risc-v/src/k210/hardware/k210_memorymap.h
+49
View File
@@ -0,0 +1,49 @@
/****************************************************************************
* arch/risc-v/src/k210/hardware/k210_memorymap.h
*
* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_K210_HARDWARE_K210_MEMORYMAP_H
#define __ARCH_RISCV_SRC_K210_HARDWARE_K210_MEMORYMAP_H
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Register Base Address ****************************************************/
#define K210_CLINT_BASE 0x02000000
#define K210_PLIC_BASE 0x0c000000
#define K210_UART0_BASE 0x38000000
#define K210_GPIO_BASE 0x38001000
#endif /* __ARCH_RISCV_SRC_K210_HARDWARE_K210_MEMORYMAP_H */
arch/risc-v/src/k210/hardware/k210_plic.h
+47
View File
@@ -0,0 +1,47 @@
/****************************************************************************
* arch/risc-v/src/k210/hardware/k210_plic.h
*
* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_K210_HARDWARE_K210_PLIC_H
#define __ARCH_RISCV_SRC_K210_HARDWARE_K210_PLIC_H
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define K210_PLIC_PRIORITY (K210_PLIC_BASE + 0x000000)
#define K210_PLIC_PENDING1 (K210_PLIC_BASE + 0x001000)
#define K210_PLIC_ENABLE1 (K210_PLIC_BASE + 0x002000)
#define K210_PLIC_ENABLE2 (K210_PLIC_BASE + 0x002004)
#define K210_PLIC_THRESHOLD (K210_PLIC_BASE + 0x200000)
#define K210_PLIC_CLAIM (K210_PLIC_BASE + 0x200004)
#endif /* __ARCH_RISCV_SRC_K210_HARDWARE_K210_PLIC_H */
arch/risc-v/src/k210/hardware/k210_uart.h
+72
View File
@@ -0,0 +1,72 @@
/****************************************************************************
* arch/risc-v/src/k210/hardware/k210_uart.h
*
* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef ARCH_RISCV_SRC_K210_CHIP_K210_UART_H
#define ARCH_RISCV_SRC_K210_CHIP_K210_UART_H
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define UART_TXDATA_OFFSET 0x00
#define UART_RXDATA_OFFSET 0x04
#define UART_TXCTL_OFFSET 0x08
#define UART_RXCTL_OFFSET 0x0c
#define UART_IE_OFFSET 0x10
#define UART_IP_OFFSET 0x14
#define UART_DIV_OFFSET 0x18
#ifdef CONFIG_K210_UART0
# define K210_UART0_TXDATA (K210_UART0_BASE + UART_TXDATA_OFFSET)
# define K210_UART0_RXDATA (K210_UART0_BASE + UART_RXDATA_OFFSET)
# define K210_UART0_TXCTRL (K210_UART0_BASE + UART_TXCTRL_OFFSET)
# define K210_UART0_RXCTRL (K210_UART0_BASE + UART_RXCTRL_OFFSET)
# define K210_UART0_IE (K210_UART0_BASE + UART_IE_OFFSET)
# define K210_UART0_IP (K210_UART0_BASE + UART_IP_OFFSET)
# define K210_UART0_DIV (K210_UART0_BASE + UART_DIV_OFFSET)
#endif
#define UART_TX_FULL (1 << 31) /* TX FIFO full (in TXDATA) */
#define UART_RX_EMPTY (1 << 31) /* RX FIFO empty (in RXDATA) */
#define UART_TX_EN (1 << 0) /* Enable TX (in TXCTL) */
#define UART_NSTOP (1 << 1) /* Number of stop bits (in TXCTL) */
#define UART_RX_EN (1 << 0) /* Enable RX (in RXCTL) */
#define UART_IE_TXWM (1 << 0) /* Enable TX wartermark int (in IE) */
#define UART_IE_RXWM (1 << 1) /* Enable RX wartermark int (in IE) */
#define UART_IP_TXWM (1 << 0) /* TX wartermark pending (in IP) */
#define UART_IP_RXWM (1 << 1) /* RX wartermark pending (in IP) */
#endif /* _ARCH_RISCV_SRC_K210_CHIP_K210_UART_H */
arch/risc-v/src/k210/k210.h
+54
View File
@@ -0,0 +1,54 @@
/****************************************************************************
* arch/risc-v/src/k210/k210.h
*
* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_K210_K210_H
#define __ARCH_RISCV_SRC_K210_K210_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <arch/irq.h>
#include "up_internal.h"
#include "chip.h"
#include "k210_lowputc.h"
#endif /* __ARCH_RISCV_SRC_K210_K210_H */
arch/risc-v/src/k210/k210_allocateheap.c
+54
View File
@@ -0,0 +1,54 @@
/****************************************************************************
* arch/risc-v/src/k210/k210_allocateheap.c
*
* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/board/board.h>
#include "k210.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_addregion
****************************************************************************/
void up_addregion(void)
{
}
arch/risc-v/src/k210/k210_clockconfig.c
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/****************************************************************************
* arch/arm/src/k210/k210_clockconfig.c
*
* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "k210_clockconfig.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: k210_get_cpuclk
****************************************************************************/
uint32_t k210_get_cpuclk(void)
{
return 416000000; /* TODO */
}
/****************************************************************************
* Name: k210_clockconfig
****************************************************************************/
void k210_clockconfig(void)
{
/* TODO */
}
arch/risc-v/src/k210/k210_clockconfig.h
+80
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/****************************************************************************
* arch/arm/src/k210/k210_clockconfig.h
*
* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_K210_K210_CLOCKCONFIG_H
#define __ARCH_RISCV_SRC_K210_K210_CLOCKCONFIG_H
/****************************************************************************
* Included Files
****************************************************************************/
#include "k210_memorymap.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Types
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Data
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
EXTERN uint32_t k210_get_cpuclk(void);
EXTERN void k210_clockconfig(void);
#if defined(__cplusplus)
}
#endif
#undef EXTERN
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_RISCV_SRC_K210_K210_CLOCKCONFIG_H */
arch/risc-v/src/k210/k210_config.h
+69
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/****************************************************************************
* arch/risc-v/src/k210/k210_config.h
*
* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_K210_K210_CONFIG_H
#define __ARCH_RISCV_SRC_K210_K210_CONFIG_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/chip/chip.h>
#include <arch/board/board.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#undef HAVE_UART_DEVICE
#if defined(CONFIG_K210_UART0) || defined(CONFIG_K210_UART1)
# define HAVE_UART_DEVICE 1
#endif
#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_K210_UART0)
# undef CONFIG_UART1_SERIAL_CONSOLE
# define HAVE_SERIAL_CONSOLE 1
#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_K210_UART1)
# undef CONFIG_UART0_SERIAL_CONSOLE
# define HAVE_SERIAL_CONSOLE 1
#else
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef HAVE_SERIAL_CONSOLE
#endif
#endif /* __ARCH_RISCV_SRC_K210_K210_CONFIG_H */
arch/risc-v/src/k210/k210_head.S
+213
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/****************************************************************************
* arch/risc-v/src/k210/k210_head.S
*
* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/rv64gc/irq.h>
#include "chip.h"
/****************************************************************************
* Public Symbols
****************************************************************************/
.global exception_common
/* Imported symbols */
.extern __trap_vec
.section .text
.global __start
__start:
/* Set stack pointer to the idle thread stack */
la sp, K210_IDLESTACK_TOP
/* Disable all interrupts (i.e. timer, external) in mie */
csrw mie, zero
/* Initialize the Machine Trap Vector */
la t0, __trap_vec
csrw mtvec, t0
/* Jump to __k210_start */
jal x1, __k210_start
/* We shouldn't return from __k210_start */
.global _init
.global _fini
_init:
_fini:
/* These don't have to do anything since we use init_array/fini_array. */
ret
/****************************************************************************
* Name: exception_common
****************************************************************************/
exception_common:
addi sp, sp, -XCPTCONTEXT_SIZE
sd x1, 1*8(sp) /* ra */
sd x3, 3*8(sp) /* gp */
sd x4, 4*8(sp) /* tp */
sd x5, 5*8(sp) /* t0 */
sd x6, 6*8(sp) /* t1 */
sd x7, 7*8(sp) /* t2 */
sd x8, 8*8(sp) /* s0 */
sd x9, 9*8(sp) /* s1 */
sd x10, 10*8(sp) /* a0 */
sd x11, 11*8(sp) /* a1 */
sd x12, 12*8(sp) /* a2 */
sd x13, 13*8(sp) /* a3 */
sd x14, 14*8(sp) /* a4 */
sd x15, 15*8(sp) /* a5 */
sd x16, 16*8(sp) /* a6 */
sd x17, 17*8(sp) /* a7 */
sd x18, 18*8(sp) /* s2 */
sd x19, 19*8(sp) /* s3 */
sd x20, 20*8(sp) /* s4 */
sd x21, 21*8(sp) /* s5 */
sd x22, 22*8(sp) /* s6 */
sd x23, 23*8(sp) /* s7 */
sd x24, 24*8(sp) /* s8 */
sd x25, 25*8(sp) /* s9 */
sd x26, 26*8(sp) /* s10 */
sd x27, 27*8(sp) /* s11 */
sd x28, 28*8(sp) /* t3 */
sd x29, 29*8(sp) /* t4 */
sd x30, 30*8(sp) /* t5 */
sd x31, 31*8(sp) /* t6 */
csrr s0, mstatus
sd s0, 32*8(sp) /* mstatus */
addi s0, sp, XCPTCONTEXT_SIZE
sd s0, 2*8(sp) /* original SP */
/* Setup arg0(exeption cause), arg1(context) */
csrr a0, mcause /* exception cause */
csrr s0, mepc
sd s0, 0(sp) /* exception PC */
mv a1, sp /* context = sp */
#if CONFIG_ARCH_INTERRUPTSTACK > 3
/* Switch to interrupt stack */
la sp, g_intstackbase
#endif
/* Call interrupt handler in C */
jal x1, k210_dispatch_irq
/* If context switch is needed, return a new sp */
mv sp, a0
ld s0, 0(sp) /* restore mepc */
csrw mepc, s0
ld s0, 32*8(sp) /* restore mstatus */
csrw mstatus, s0
ld x3, 3*8(sp) /* gp */
ld x4, 4*8(sp) /* tp */
ld x5, 5*8(sp) /* t0 */
ld x6, 6*8(sp) /* t1 */
ld x7, 7*8(sp) /* t2 */
ld x8, 8*8(sp) /* s0 */
ld x9, 9*8(sp) /* s1 */
ld x10, 10*8(sp) /* a0 */
ld x11, 11*8(sp) /* a1 */
ld x12, 12*8(sp) /* a2 */
ld x13, 13*8(sp) /* a3 */
ld x14, 14*8(sp) /* a4 */
ld x15, 15*8(sp) /* a5 */
ld x16, 16*8(sp) /* a6 */
ld x17, 17*8(sp) /* a7 */
ld x18, 18*8(sp) /* s2 */
ld x19, 19*8(sp) /* s3 */
ld x20, 20*8(sp) /* s4 */
ld x21, 21*8(sp) /* s5 */
ld x22, 22*8(sp) /* s6 */
ld x23, 23*8(sp) /* s7 */
ld x24, 24*8(sp) /* s8 */
ld x25, 25*8(sp) /* s9 */
ld x26, 26*8(sp) /* s10 */
ld x27, 27*8(sp) /* s11 */
ld x28, 28*8(sp) /* t3 */
ld x29, 29*8(sp) /* t4 */
ld x30, 30*8(sp) /* t5 */
ld x31, 31*8(sp) /* t6 */
ld x1, 1*8(sp) /* ra */
ld sp, 2*8(sp) /* restore original sp */
/* Return from Machine Interrupt */
mret
/************************************************************************************
* Name: g_intstackalloc and g_intstackbase
************************************************************************************/
#if CONFIG_ARCH_INTERRUPTSTACK > 7
.bss
.align 8
.global g_intstackalloc
.global g_intstackbase
.type g_intstackalloc, object
.type g_intstackbase, object
g_intstackalloc:
.skip ((CONFIG_ARCH_INTERRUPTSTACK & ~7))
g_intstackbase:
.skip 8
.size g_intstackbase, 8
.size g_intstackalloc, (CONFIG_ARCH_INTERRUPTSTACK & ~7)
#endif
arch/risc-v/src/k210/k210_idle.c
+82
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/****************************************************************************
* arch/risc-v/src/k210/k210_idle.c
*
* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
*
* Based on arch/risc-v/src/common/up_idle.c
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "up_internal.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_idle
*
* Description:
* up_idle() is the logic that will be executed when their is no other
* ready-to-run task. This is processor idle time and will continue until
* some interrupt occurs to cause a context switch from the idle task.
*
* Processing in this state may be processor-specific. e.g., this is where
* power management operations might be performed.
*
****************************************************************************/
void up_idle(void)
{
#if defined(CONFIG_SUPPRESS_INTERRUPTS) || defined(CONFIG_SUPPRESS_TIMER_INTS)
/* If the system is idle and there are no timer interrupts, then process
* "fake" timer interrupts. Hopefully, something will wake up.
*/
nxsched_process_timer();
#else
/* This would be an appropriate place to put some MCU-specific logic to
* sleep in a reduced power mode until an interrupt occurs to save power
*/
asm("WFI");
#endif
}
arch/risc-v/src/k210/k210_irq.c
+272
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/****************************************************************************
* arch/risc-v/src/k210/k210_irq.c
*
* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdio.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <arch/irq.h>
#include "up_internal.h"
#include "up_arch.h"
#include "k210.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_irqinitialize
****************************************************************************/
void up_irqinitialize(void)
{
/* Disable Machine interrupts */
(void)up_irq_save();
/* Disable all global interrupts */
putreg32(0x0, K210_PLIC_ENABLE1);
putreg32(0x0, K210_PLIC_ENABLE2);
/* Clear pendings in PLIC */
uint32_t val = getreg32(K210_PLIC_CLAIM);
putreg32(val, K210_PLIC_CLAIM);
/* Colorize the interrupt stack for debug purposes */
#if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 7
size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~7);
up_stack_color((FAR void *)((uintptr_t)&g_intstackbase - intstack_size),
intstack_size);
#endif
/* Set priority for all global interrupts to 1 (lowest) */
int id;
for (id = 1; id <= 52; id++)
{
putreg32(1, (uintptr_t)K210_PLIC_PRIORITY + (4 * id));
}
/* Set irq threshold to 0 (permits all global interrupts) */
putreg32(0, K210_PLIC_THRESHOLD);
/* currents_regs is non-NULL only while processing an interrupt */
g_current_regs = NULL;
/* Attach the ecall interrupt handler */
irq_attach(K210_IRQ_ECALLM, up_swint, NULL);
up_enable_irq(K210_IRQ_ECALLM);
#ifndef CONFIG_SUPPRESS_INTERRUPTS
/* And finally, enable interrupts */
(void)up_irq_enable();
#endif
}
/****************************************************************************
* Name: up_disable_irq
*
* Description:
* Disable the IRQ specified by 'irq'
*
****************************************************************************/
void up_disable_irq(int irq)
{
int extirq;
uint32_t oldstat;
if (irq == K210_IRQ_MTIMER)
{
/* Read mstatus & clear machine timer interrupt enable in mie */
asm volatile ("csrrc %0, mie, %1": "=r" (oldstat) : "r"(MIE_MTIE));
}
else if (irq > K210_IRQ_MEXT)
{
extirq = irq - K210_IRQ_MEXT;
/* Clear enable bit for the irq */
if (0 <= extirq && extirq <= 63)
{
modifyreg32(K210_PLIC_ENABLE1 + (4 * (extirq / 32)),
1 << (extirq % 32), 0);
}
else
{
ASSERT(false);
}
}
}
/****************************************************************************
* Name: up_enable_irq
*
* Description:
* Enable the IRQ specified by 'irq'
*
****************************************************************************/
void up_enable_irq(int irq)
{
int extirq;
uint32_t oldstat;
if (irq == K210_IRQ_MTIMER)
{
/* Read mstatus & set machine timer interrupt enable in mie */
asm volatile ("csrrs %0, mie, %1": "=r" (oldstat) : "r"(MIE_MTIE));
}
else if (irq > K210_IRQ_MEXT)
{
extirq = irq - K210_IRQ_MEXT;
/* Set enable bit for the irq */
if (0 <= extirq && extirq <= 63)
{
modifyreg32(K210_PLIC_ENABLE1 + (4 * (extirq / 32)),
0, 1 << (extirq % 32));
}
else
{
ASSERT(false);
}
}
}
/****************************************************************************
* Name: up_get_newintctx
*
* Description:
* Return a value for EPIC. But K210 doesn't use EPIC for event control.
*
****************************************************************************/
uint32_t up_get_newintctx(void)
{
return 0;
}
/****************************************************************************
* Name: up_ack_irq
*
* Description:
* Acknowledge the IRQ
*
****************************************************************************/
void up_ack_irq(int irq)
{
}
/****************************************************************************
* Name: up_irq_save
*
* Description:
* Return the current interrupt state and disable interrupts
*
****************************************************************************/
irqstate_t up_irq_save(void)
{
uint32_t oldstat;
/* Read mstatus & clear machine interrupt enable (MIE) in mstatus */
asm volatile ("csrrc %0, mstatus, %1": "=r" (oldstat) : "r"(MSTATUS_MIE));
return oldstat;
}
/****************************************************************************
* Name: up_irq_restore
*
* Description:
* Restore previous IRQ mask state
*
****************************************************************************/
void up_irq_restore(irqstate_t flags)
{
/* Machine mode - mstatus */
asm volatile("csrw mstatus, %0" : /* no output */ : "r" (flags));
}
/****************************************************************************
* Name: up_irq_enable
*
* Description:
* Return the current interrupt state and enable interrupts
*
****************************************************************************/
irqstate_t up_irq_enable(void)
{
uint32_t oldstat;
#if 1
/* Enable MEIE (machine external interrupt enable) */
/* TODO: should move to up_enable_irq() */
asm volatile ("csrrs %0, mie, %1": "=r" (oldstat) : "r"(MIE_MEIE));
#endif
/* Read mstatus & set machine interrupt enable (MIE) in mstatus */
asm volatile ("csrrs %0, mstatus, %1": "=r" (oldstat) : "r"(MSTATUS_MIE));
return oldstat;
}
arch/risc-v/src/k210/k210_irq_dispatch.c
+121
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/****************************************************************************
* arch/risc-v/src/k210/k210_irq_dispatch.c
*
* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <assert.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "up_internal.h"
#include "group/group.h"
/****************************************************************************
* Public Data
****************************************************************************/
volatile uint64_t * g_current_regs;
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* k210_dispatch_irq
****************************************************************************/
void *k210_dispatch_irq(uint64_t vector, uint64_t *regs)
{
uint32_t irq = (vector >> (27 + 32)) | (vector & 0xf);
uint64_t *mepc = regs;
if (K210_IRQ_MEXT == irq)
{
/* Read & write K210_PLIC_CLAIM to clear pending */
uint32_t val = getreg32(K210_PLIC_CLAIM);
putreg32(val, K210_PLIC_CLAIM);
irq += val;
}
/* NOTE: In case of ecall, we need to adjust mepc in the context */
if (K210_IRQ_ECALLM == irq)
{
*mepc += 4;
}
#ifdef CONFIG_SUPPRESS_INTERRUPTS
PANIC();
#else
/* Nested interrupts are not supported */
DEBUGASSERT(g_current_regs == NULL);
/* Current regs non-zero indicates that we are processing an interrupt;
* CURRENT_REGS is also used to manage interrupt level context switches.
*/
g_current_regs = regs;
/* Deliver the IRQ */
irq_dispatch(irq, regs);
#endif
/* If a context switch occurred while processing the interrupt then
* g_current_regs may have change value. If we return any value different
* from the input regs, then the lower level will know that a context
* switch occurred during interrupt processing.
*/
regs = (uint64_t *)g_current_regs;
g_current_regs = NULL;
/* Set machine previous privilege mode to machine mode */
*(regs + REG_INT_CTX_NDX) |= 0x3 << 11;
return regs;
}
arch/risc-v/src/k210/k210_lowputc.c
+140
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/****************************************************************************
* arch/risc-v/src/k210/k210_lowputc.c
*
* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <arch/board/board.h>
#include "up_internal.h"
#include "up_arch.h"
#include "k210_config.h"
#include "hardware/k210_memorymap.h"
#include "hardware/k210_uart.h"
#include "k210_clockconfig.h"
#include "k210.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Select UART parameters for the selected console */
#ifdef HAVE_SERIAL_CONSOLE
# if defined(CONFIG_UART0_SERIAL_CONSOLE)
# define K210_CONSOLE_BASE K210_UART0_BASE
# define K210_CONSOLE_BAUD CONFIG_UART0_BAUD
# define K210_CONSOLE_BITS CONFIG_UART0_BITS
# define K210_CONSOLE_PARITY CONFIG_UART0_PARITY
# define K210_CONSOLE_2STOP CONFIG_UART0_2STOP
# define K210_CONSOLE_TX GPIO_UART0_TX
# define K210_CONSOLE_RX GPIO_UART0_RX
# define HAVE_UART
# elif defined(CONFIG_UART1_SERIAL_CONSOLE)
# define K210_CONSOLE_BASE K210_UART1_BASE
# define K210_CONSOLE_BAUD CONFIG_UART1_BAUD
# define K210_CONSOLE_BITS CONFIG_UART1_BITS
# define K210_CONSOLE_PARITY CONFIG_UART1_PARITY
# define K210_CONSOLE_2STOP CONFIG_UART1_2STOP
# define K210_CONSOLE_TX GPIO_UART1_TX
# define K210_CONSOLE_RX GPIO_UART1_RX
# define HAVE_UART
# endif
#endif /* HAVE_CONSOLE */
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_lowputc
*
* Description:
* Output one byte on the serial console
*
****************************************************************************/
void up_lowputc(char ch)
{
#ifdef HAVE_SERIAL_CONSOLE
/* Wait until the TX data register is empty */
while ((getreg32(K210_CONSOLE_BASE + UART_TXDATA_OFFSET) & UART_TX_FULL))
;
/* Then send the character */
putreg32((uint32_t)ch, K210_CONSOLE_BASE + UART_TXDATA_OFFSET);
#endif /* HAVE_CONSOLE */
}
/****************************************************************************
* Name: k210_lowsetup
*
* Description:
* This performs basic initialization of the UART used for the serial
* console. Its purpose is to get the console output available as soon
* as possible.
*
****************************************************************************/
void k210_lowsetup(void)
{
#if defined(HAVE_UART)
/* Enable and configure the selected console device */
#if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
/* Configure the UART Baud Rate */
uint32_t cpuclk = k210_get_cpuclk();
uint32_t div = (cpuclk / 115200) - 1;
putreg32(div, K210_CONSOLE_BASE + UART_DIV_OFFSET);
/* Enable TX */
putreg32(1, K210_CONSOLE_BASE + UART_TXCTL_OFFSET);
#endif /* HAVE_SERIAL_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
#endif /* HAVE_UART */
}
arch/risc-v/src/k210/k210_lowputc.h
+75
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/****************************************************************************
* arch/risc-v/src/k210/k210_lowputc.h
*
* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_K210_K210_LOWPUTC_H
#define __ARCH_RISCV_SRC_K210_K210_LOWPUTC_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/****************************************************************************
* Public Functions
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Name: k210_lowsetup
****************************************************************************/
EXTERN void k210_lowsetup(void);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_RISCV_SRC_K210_K210_LOWPUTC_H */
arch/risc-v/src/k210/k210_memorymap.h
+61
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/****************************************************************************
* arch/risc-v/src/k210/k210_memorymap.h
*
* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef _ARCH_RISCV_SRC_K210_K210_MEMORYMAP_H
#define _ARCH_RISCV_SRC_K210_K210_MEMORYMAP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include "hardware/k210_memorymap.h"
#include "hardware/k210_uart.h"
#include "hardware/k210_clint.h"
#include "hardware/k210_plic.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Idle thread stack starts from _ebss */
#ifndef __ASSEMBLY__
#define K210_IDLESTACK_BASE (uintptr_t)&_ebss
#else
#define K210_IDLESTACK_BASE _ebss
#endif
#define K210_IDLESTACK_SIZE (CONFIG_IDLETHREAD_STACKSIZE & ~7)
#define K210_IDLESTACK_TOP (K210_IDLESTACK_BASE + K210_IDLESTACK_SIZE)
#endif /* _ARCH_RISCV_SRC_K210_K210_MEMORYMAP_H */
arch/risc-v/src/k210/k210_serial.c
+745
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arch/risc-v/src/k210/k210_start.c
+133
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/****************************************************************************
* arch/risc-v/src/k210/k210_init.c
*
* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/board/board.h>
#include "k210_clockconfig.h"
#include "k210.h"
#include "chip.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifdef CONFIG_DEBUG_FEATURES
# define showprogress(c) up_lowputc(c)
#else
# define showprogress(c)
#endif
/****************************************************************************
* Public Data
****************************************************************************/
/* g_idle_topstack: _sbss is the start of the BSS region as defined by the
* linker script. _ebss lies at the end of the BSS region. The idle task
* stack starts at the end of BSS and is of size CONFIG_IDLETHREAD_STACKSIZE.
* The IDLE thread is the thread that the system boots on and, eventually,
* becomes the IDLE, do nothing task that runs only when there is nothing
* else to run. The heap continues from there until the end of memory.
* g_idle_topstack is a read-only variable the provides this computed
* address.
*/
uintptr_t g_idle_topstack = K210_IDLESTACK_TOP;
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: k210_start
****************************************************************************/
void __k210_start(void)
{
const uint32_t *src;
uint32_t *dest;
/* Clear .bss. We'll do this inline (vs. calling memset) just to be
* certain that there are no issues with the state of global variables.
*/
for (dest = &_sbss; dest < &_ebss; )
{
*dest++ = 0;
}
/* Move the initialized data section from his temporary holding spot in
* FLASH into the correct place in SRAM. The correct place in SRAM is
* give by _sdata and _edata. The temporary location is in FLASH at the
* end of all of the other read-only data (.text, .rodata) at _eronly.
*/
for (src = &_eronly, dest = &_sdata; dest < &_edata; )
{
*dest++ = *src++;
}
/* Setup PLL */
k210_clockconfig();
/* Configure the UART so we can get debug output */
k210_lowsetup();
showprogress('A');
#ifdef USE_EARLYSERIALINIT
up_earlyserialinit();
#endif
showprogress('B');
/* Do board initialization */
k210_boardinitialize();
showprogress('C');
/* Call nx_start() */
nx_start();
/* Shouldn't get here */
for (; ; );
}
arch/risc-v/src/k210/k210_timerisr.c
+145
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/****************************************************************************
* arch/risc-v/src/k210/k210_timerisr.c
*
* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <time.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "k210.h"
#include "k210_clockconfig.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define getreg64(a) (*(volatile uint64_t *)(a))
#define putreg64(v,a) (*(volatile uint64_t *)(a) = (v))
#define TICK_COUNT ((k210_get_cpuclk() / 50) / TICK_PER_SEC)
/****************************************************************************
* Private Data
****************************************************************************/
static bool _b_tick_started = false;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: k210_reload_mtimecmp
****************************************************************************/
static void k210_reload_mtimecmp(void)
{
irqstate_t flags = spin_lock_irqsave();
uint64_t current;
uint64_t next;
if (!_b_tick_started)
{
_b_tick_started = true;
current = getreg64(K210_CLINT_MTIME);
}
else
{
current = getreg64(K210_CLINT_MTIMECMP);
}
uint64_t tick = TICK_COUNT;
next = current + tick;
putreg64(next, K210_CLINT_MTIMECMP);
spin_unlock_irqrestore(flags);
}
/****************************************************************************
* Name: k210_timerisr
****************************************************************************/
static int k210_timerisr(int irq, void *context, FAR void *arg)
{
k210_reload_mtimecmp();
/* Process timer interrupt */
nxsched_process_timer();
return 0;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: riscv_timer_initialize
*
* Description:
* This function is called during start-up to initialize
* the timer interrupt.
*
****************************************************************************/
void riscv_timer_initialize(void)
{
#if 1
/* Attach timer interrupt handler */
(void)irq_attach(K210_IRQ_MTIMER, k210_timerisr, NULL);
/* Reload CLINT mtimecmp */
k210_reload_mtimecmp();
/* And enable the timer interrupt */
up_enable_irq(K210_IRQ_MTIMER);
#endif
}
arch/risc-v/src/k210/k210_vectors.S
+55
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/****************************************************************************
* arch/risc-v/src/k210/k210_vectors.S
*
* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/************************************************************************************
* Included Files
************************************************************************************/
.section .text.vec
.global __reset_vec
.global __trap_vec
/****************************************************************************
* Name: __reset_vec
****************************************************************************/
__reset_vec:
jal __start
/****************************************************************************
* Name: exception_common
****************************************************************************/
__trap_vec:
j exception_common
nop
arch/risc-v/src/k210/up_schedulesigaction.c
+209
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@@ -0,0 +1,209 @@
/****************************************************************************
* arch/risc-v/src/k210/up_schedulesigaction.c
*
* Copyright (C) 2019 Masayuki Ishikawa. All rights reserved.
* Author: Masayuki Ishikawa <masayuki.ishikawa@gmail.com>
*
* Based on arch/risc-v/src/nr5m100/up_schedulesigaction.c
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <sched.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <arch/k210/irq.h>
#include "sched/sched.h"
#include "up_internal.h"
#include "up_arch.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_schedule_sigaction
*
* Description:
* This function is called by the OS when one or more
* signal handling actions have been queued for execution.
* The architecture specific code must configure things so
* that the 'igdeliver' callback is executed on the thread
* specified by 'tcb' as soon as possible.
*
* This function may be called from interrupt handling logic.
*
* This operation should not cause the task to be unblocked
* nor should it cause any immediate execution of sigdeliver.
* Typically, a few cases need to be considered:
*
* (1) This function may be called from an interrupt handler
* During interrupt processing, all xcptcontext structures
* should be valid for all tasks. That structure should
* be modified to invoke sigdeliver() either on return
* from (this) interrupt or on some subsequent context
* switch to the recipient task.
* (2) If not in an interrupt handler and the tcb is NOT
* the currently executing task, then again just modify
* the saved xcptcontext structure for the recipient
* task so it will invoke sigdeliver when that task is
* later resumed.
* (3) If not in an interrupt handler and the tcb IS the
* currently executing task -- just call the signal
* handler now.
*
****************************************************************************/
void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
{
irqstate_t flags;
uint32_t int_ctx;
sinfo("tcb=0x%p sigdeliver=0x%p\n", tcb, sigdeliver);
/* Make sure that interrupts are disabled */
flags = enter_critical_section();
/* Refuse to handle nested signal actions */
if (!tcb->xcp.sigdeliver)
{
/* First, handle some special cases when the signal is
* being delivered to the currently executing task.
*/
sinfo("rtcb=0x%p g_current_regs=0x%p\n",
this_task(), g_current_regs);
if (tcb == this_task())
{
/* CASE 1: We are not in an interrupt handler and
* a task is signalling itself for some reason.
*/
if (!g_current_regs)
{
/* In this case just deliver the signal now. */
sigdeliver(tcb);
}
/* CASE 2: We are in an interrupt handler AND the
* interrupted task is the same as the one that
* must receive the signal, then we will have to modify
* the return state as well as the state in the TCB.
*
* Hmmm... there looks like a latent bug here: The following
* logic would fail in the strange case where we are in an
* interrupt handler, the thread is signalling itself, but
* a context switch to another task has occurred so that
* g_current_regs does not refer to the thread of this_task()!
*/
else
{
/* Save the return EPC and STATUS registers. These will be
* restored by the signal trampoline after the signals have
* been delivered.
*/
tcb->xcp.sigdeliver = sigdeliver;
tcb->xcp.saved_epc = g_current_regs[REG_EPC];
tcb->xcp.saved_int_ctx = g_current_regs[REG_INT_CTX];
/* Then set up to vector to the trampoline with interrupts
* disabled
*/
g_current_regs[REG_EPC] = (uintptr_t)up_sigdeliver;
int_ctx = g_current_regs[REG_INT_CTX];
int_ctx &= ~MSTATUS_MIE;
g_current_regs[REG_INT_CTX] = int_ctx;
/* And make sure that the saved context in the TCB
* is the same as the interrupt return context.
*/
up_savestate(tcb->xcp.regs);
sinfo("PC/STATUS Saved: %08x/%08x New: %08x/%08x\n",
tcb->xcp.saved_epc, tcb->xcp.saved_status,
g_current_regs[REG_EPC], g_current_regs[REG_INT_CTX]);
}
}
/* Otherwise, we are (1) signaling a task is not running
* from an interrupt handler or (2) we are not in an
* interrupt handler and the running task is signalling
* some non-running task.
*/
else
{
/* Save the return EPC and STATUS registers. These will be
* restored by the signal trampoline after the signals have
* been delivered.
*/
tcb->xcp.sigdeliver = sigdeliver;
tcb->xcp.saved_epc = tcb->xcp.regs[REG_EPC];
tcb->xcp.saved_int_ctx = tcb->xcp.regs[REG_INT_CTX];
/* Then set up to vector to the trampoline with interrupts
* disabled
*/
tcb->xcp.regs[REG_EPC] = (uintptr_t)up_sigdeliver;
int_ctx = tcb->xcp.regs[REG_INT_CTX];
int_ctx &= ~MSTATUS_MIE;
tcb->xcp.regs[REG_INT_CTX] = int_ctx;
sinfo("PC/STATUS Saved: %08x/%08x New: %08x/%08x\n",
tcb->xcp.saved_epc, tcb->xcp.saved_status,
tcb->xcp.regs[REG_EPC], tcb->xcp.regs[REG_INT_CTX]);
}
}
leave_critical_section(flags);
}
arch/risc-v/src/rv64gc/Kconfig
+29
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@@ -0,0 +1,29 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
comment "RV64GC Configuration Options"
choice
prompt "Toolchain Selection"
default RV64GC_TOOLCHAIN_GNU_RVGW if TOOLCHAIN_WINDOWS
default RV64GC_TOOLCHAIN_GNU_RVGL if !TOOLCHAIN_WINDOWS
config RV64GC_TOOLCHAIN_GNU_RVGL
bool "Generic GNU RVG toolchain under Linux (or other POSIX environment)"
select ARCH_TOOLCHAIN_GNU
---help---
This option should work for any modern GNU toolchain (GCC 5.2 or newer)
configured for riscv64-unknown-elf.
config RV64GC_TOOLCHAIN_GNU_RVGW
bool "Generic GNU RVG toolchain under Windows"
select ARCH_TOOLCHAIN_GNU
depends on TOOLCHAIN_WINDOWS
---help---
This option should work for any modern GNU toolchain (GCC 5.2 or newer)
configured for riscv64-unknown-elf.
endchoice
arch/risc-v/src/rv64gc/Toolchain.defs
+93
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@@ -0,0 +1,93 @@
############################################################################
# arch/risc-v/src/rv64gc/Toolchain.defs
#
# Copyright (C) 2012-2013, 2015 Gregory Nutt. All rights reserved.
# Author: Gregory Nutt <gnutt@nuttx.org>
#
# modified for RISC-V:
#
# Copyright (C) 2016 Ken Pettit. All rights reserved.
# Author: Ken Pettit <pettitkd@gmail.com>
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# 1. Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# 2. Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
# POSSIBILITY OF SUCH DAMAGE.
#
############################################################################
# Setup for the selected toolchain
#
# Handle old-style chip-specific toolchain names in the absence of
# a new-style toolchain specification, force the selection of a single
# toolchain and allow the selected toolchain to be overridden by a
# command-line selection.
#
ifeq ($(filter y, $(CONFIG_RV64GC_TOOLCHAIN_GNU_RVGL)),y)
CONFIG_RISCV_TOOLCHAIN ?= GNU_RVGL
endif
ifeq ($(filter y, $(CONFIG_RV64GC_TOOLCHAIN_GNU_RVGW)),y)
CONFIG_RISCV_TOOLCHAIN ?= GNU_RVGW
endif
#
# Supported toolchains
#
# Each toolchain definition should set:
#
# CROSSDEV The GNU toolchain triple (command prefix)
# ARCROSSDEV If required, an alternative prefix used when
# invoking ar and nm.
# ARCHCPUFLAGS CPU-specific flags selecting the instruction set
# options, etc.
# MAXOPTIMIZATION The maximum optimization level that results in
# reliable code generation.
#
ifeq ($(CONFIG_DEBUG_CUSTOMOPT),y)
MAXOPTIMIZATION := $(CONFIG_DEBUG_OPTLEVEL)
endif
# Generic GNU RVG toolchain on OS X, Linux or any typical Posix system
ifeq ($(CONFIG_RISCV_TOOLCHAIN),GNU_RVGL)
CROSSDEV ?= riscv64-unknown-elf-
ARCROSSDEV ?= riscv64-unknown-elf-
endif
ifeq ($(CONFIG_RISCV_TOOLCHAIN),GNU_RVGW)
CROSSDEV ?= riscv32-unknown-elf-
ARCROSSDEV ?= riscv32-unknown-elf-
ifneq ($(CONFIG_WINDOWS_NATIVE),y)
WINTOOL = y
endif
endif
# Individual tools may limit the optimization level but, by default, the
# optimization level will be set to -Os
ifeq ($(CONFIG_DEBUG_SYMBOLS),)
MAXOPTIMIZATION ?= -Os
endif
arch/risc-v/src/rv64gc/up_assert.c
+411
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@@ -0,0 +1,411 @@
/****************************************************************************
* arch/risc-v/src/rv64gc/up_assert.c
*
* Copyright (C) 2011-2015, 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdlib.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <nuttx/syslog/syslog.h>
#include <nuttx/usb/usbdev_trace.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "sched/sched.h"
#include "up_internal.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* USB trace dumping */
#ifndef CONFIG_USBDEV_TRACE
# undef CONFIG_ARCH_USBDUMP
#endif
#ifndef CONFIG_BOARD_RESET_ON_ASSERT
# define CONFIG_BOARD_RESET_ON_ASSERT 0
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
#ifdef CONFIG_ARCH_STACKDUMP
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: up_getsp
****************************************************************************/
static inline uint64_t up_getsp(void)
{
register uint64_t sp;
__asm__
(
"\tadd %0, x0, x2\n"
: "=r"(sp)
);
return sp;
}
/****************************************************************************
* Name: up_stackdump
****************************************************************************/
static void up_stackdump(uint64_t sp, uintptr_t stack_base)
{
uintptr_t stack;
for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
{
uint32_t *ptr = (uint32_t *)stack;
_alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
stack, ptr[0], ptr[1], ptr[2], ptr[3],
ptr[4], ptr[5], ptr[6], ptr[7]);
}
}
/****************************************************************************
* Name: up_taskdump
****************************************************************************/
#ifdef CONFIG_STACK_COLORATION
static void up_taskdump(FAR struct tcb_s *tcb, FAR void *arg)
{
/* Dump interesting properties of this task */
#if CONFIG_TASK_NAME_SIZE > 0
_alert("%s: PID=%d Stack Used=%lu of %lu\n",
tcb->name, tcb->pid, (unsigned long)up_check_tcbstack(tcb),
(unsigned long)tcb->adj_stack_size);
#else
_alert("PID: %d Stack Used=%lu of %lu\n",
tcb->pid, (unsigned long)up_check_tcbstack(tcb),
(unsigned long)tcb->adj_stack_size);
#endif
}
#endif
/****************************************************************************
* Name: up_showtasks
****************************************************************************/
#ifdef CONFIG_STACK_COLORATION
static inline void up_showtasks(void)
{
/* Dump interesting properties of each task in the crash environment */
sched_foreach(up_taskdump, NULL);
}
#else
# define up_showtasks()
#endif
/****************************************************************************
* Name: up_registerdump
****************************************************************************/
static inline void up_registerdump(void)
{
/* Are user registers available from interrupt processing? */
if (g_current_regs)
{
_alert("EPC:%016x \n",
g_current_regs[REG_EPC]);
_alert("A0:%016x A1:%016x A2:%016x A3:%016x \n",
g_current_regs[REG_A0], g_current_regs[REG_A1],
g_current_regs[REG_A2], g_current_regs[REG_A3]);
_alert("A4:%016x A5:%016x A6:%016x A7:%016x \n",
g_current_regs[REG_A4], g_current_regs[REG_A5],
g_current_regs[REG_A6], g_current_regs[REG_A7]);
_alert("T0:%016x T1:%016x T2:%016x T3:%016x \n",
g_current_regs[REG_T0], g_current_regs[REG_T1],
g_current_regs[REG_T2], g_current_regs[REG_T3]);
_alert("T4:%016x T5:%016x T6:%016x \n",
g_current_regs[REG_T4], g_current_regs[REG_T5],
g_current_regs[REG_T6]);
_alert("S0:%016x S1:%016x S2:%016x S3:%016x \n",
g_current_regs[REG_S0], g_current_regs[REG_S1],
g_current_regs[REG_S2], g_current_regs[REG_S3]);
_alert("S4:%016x S5:%016x S6:%016x S7:%016x \n",
g_current_regs[REG_S4], g_current_regs[REG_S5],
g_current_regs[REG_S6], g_current_regs[REG_S7]);
_alert("S8:%016x S9:%016x S10:%016x S11:%016x \n",
g_current_regs[REG_S8], g_current_regs[REG_S9],
g_current_regs[REG_S10], g_current_regs[REG_S11]);
#ifdef RISCV_SAVE_GP
_alert("GP:%016x SP:%016x FP:%016x TP:%016x RA:%016x \n",
g_current_regs[REG_GP], g_current_regs[REG_SP],
g_current_regs[REG_FP], g_current_regs[REG_TP],
g_current_regs[REG_RA]);
#else
_alert("SP:%016x FP:%016x TP:%016x RA:%016x \n",
g_current_regs[REG_SP], g_current_regs[REG_FP],
g_current_regs[REG_TP], g_current_regs[REG_RA]);
#endif
}
}
/****************************************************************************
* Name: up_dumpstate
****************************************************************************/
static void up_dumpstate(void)
{
struct tcb_s *rtcb = running_task();
uint64_t sp = up_getsp();
uintptr_t ustackbase;
uintptr_t ustacksize;
#if CONFIG_ARCH_INTERRUPTSTACK > 7
uintptr_t istackbase;
uintptr_t istacksize;
#endif
/* Dump the registers (if available) */
up_registerdump();
/* Get the limits on the user stack memory */
if (rtcb->pid == 0) /* Check for CPU0 IDLE thread */
{
ustackbase = g_idle_topstack - 8;
ustacksize = CONFIG_IDLETHREAD_STACKSIZE;
}
else
{
ustackbase = (uintptr_t)rtcb->adj_stack_ptr;
ustacksize = (uintptr_t)rtcb->adj_stack_size;
}
/* Get the limits on the interrupt stack memory */
#if CONFIG_ARCH_INTERRUPTSTACK > 7
istackbase = (uintptr_t)&g_intstackbase;
istacksize = (CONFIG_ARCH_INTERRUPTSTACK & ~7) - 8;
/* Show interrupt stack info */
_alert("sp: %016x\n", sp);
_alert("IRQ stack:\n");
_alert(" base: %016x\n", istackbase);
_alert(" size: %016x\n", istacksize);
/* Does the current stack pointer lie within the interrupt
* stack?
*/
if (sp <= istackbase && sp > istackbase - istacksize)
{
/* Yes.. dump the interrupt stack */
up_stackdump(sp, istackbase);
/* Extract the user stack pointer */
sp = g_current_regs[REG_SP];
_alert("sp: %016x\n", sp);
}
else if (g_current_regs)
{
_alert("ERROR: Stack pointer is not within the interrupt stack\n");
up_stackdump(istackbase - istacksize, istackbase);
}
/* Show user stack info */
_alert("User stack:\n");
_alert(" base: %016x\n", ustackbase);
_alert(" size: %016x\n", ustacksize);
#else
_alert("sp: %016x\n", sp);
_alert("stack base: %016x\n", ustackbase);
_alert("stack size: %016x\n", ustacksize);
#endif
/* Dump the user stack if the stack pointer lies within the allocated user
* stack memory.
*/
if (sp > ustackbase || sp <= ustackbase - ustacksize)
{
_alert("ERROR: Stack pointer is not within allocated stack\n");
up_stackdump(ustackbase - ustacksize, ustackbase);
}
else
{
up_stackdump(sp, ustackbase);
}
}
#endif /* CONFIG_ARCH_STACKDUMP */
/****************************************************************************
* Name: _up_assert
****************************************************************************/
static void _up_assert(int errorcode) noreturn_function;
static void _up_assert(int errorcode)
{
/* Flush any buffered SYSLOG data */
(void)syslog_flush();
/* Are we in an interrupt handler or the idle task? */
if (g_current_regs || running_task()->flink == NULL)
{
(void)up_irq_save();
for (; ; )
{
#if CONFIG_BOARD_RESET_ON_ASSERT >= 1
board_reset(CONFIG_BOARD_ASSERT_RESET_VALUE);
#endif
#ifdef CONFIG_ARCH_LEDS
board_autoled_on(LED_PANIC);
up_mdelay(250);
board_autoled_off(LED_PANIC);
up_mdelay(250);
#endif
}
}
else
{
#if CONFIG_BOARD_RESET_ON_ASSERT >= 2
board_reset(CONFIG_BOARD_ASSERT_RESET_VALUE);
#endif
exit(errorcode);
}
}
/****************************************************************************
* Name: assert_tracecallback
****************************************************************************/
#ifdef CONFIG_ARCH_USBDUMP
static int usbtrace_syslog(FAR const char *fmt, ...)
{
va_list ap;
int ret;
/* Let nx_vsyslog do the real work */
va_start(ap, fmt);
ret = nx_vsyslog(LOG_EMERG, fmt, &ap);
va_end(ap);
return ret;
}
static int assert_tracecallback(FAR struct usbtrace_s *trace, FAR void *arg)
{
usbtrace_trprintf(usbtrace_syslog, trace->event, trace->value);
return 0;
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_assert
****************************************************************************/
void up_assert(const uint8_t *filename, int lineno)
{
#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT)
struct tcb_s *rtcb = running_task();
#endif
board_autoled_on(LED_ASSERTION);
/* Flush any buffered SYSLOG data (from prior to the assertion) */
(void)syslog_flush();
#if CONFIG_TASK_NAME_SIZE > 0
_alert("Assertion failed at file:%s line: %d task: %s\n",
filename, lineno, rtcb->name);
#else
_alert("Assertion failed at file:%s line: %d\n",
filename, lineno);
#endif
up_dumpstate();
/* Dump the state of all tasks (if available) */
up_showtasks();
#ifdef CONFIG_ARCH_USBDUMP
/* Dump USB trace data */
(void)usbtrace_enumerate(assert_tracecallback, NULL);
#endif
/* Flush any buffered SYSLOG data (from the above) */
(void)syslog_flush();
#ifdef CONFIG_BOARD_CRASHDUMP
board_crashdump(up_getsp(), running_task(), filename, lineno);
#endif
_up_assert(EXIT_FAILURE);
}
arch/risc-v/src/rv64gc/up_blocktask.c
+179
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@@ -0,0 +1,179 @@
/****************************************************************************
* arch/risc-v/src/rv64gc/up_blocktask.c
*
* Copyright (C) 2011, 2013-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <sched.h>
#include <syscall.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/sched.h>
#include "sched/sched.h"
#include "group/group.h"
#include "up_internal.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_block_task
*
* Description:
* The currently executing task at the head of
* the ready to run list must be stopped. Save its context
* and move it to the inactive list specified by task_state.
*
* Input Parameters:
* tcb: Refers to a task in the ready-to-run list (normally
* the task at the head of the list). It most be
* stopped, its context saved and moved into one of the
* waiting task lists. It it was the task at the head
* of the ready-to-run list, then a context to the new
* ready to run task must be performed.
* task_state: Specifies which waiting task list should be
* hold the blocked task TCB.
*
****************************************************************************/
void up_block_task(struct tcb_s *tcb, tstate_t task_state)
{
struct tcb_s *rtcb = this_task();
bool switch_needed;
/* Verify that the context switch can be performed */
DEBUGASSERT((tcb->task_state >= FIRST_READY_TO_RUN_STATE) &&
(tcb->task_state <= LAST_READY_TO_RUN_STATE));
/* Remove the tcb task from the ready-to-run list. If we
* are blocking the task at the head of the task list (the
* most likely case), then a context switch to the next
* ready-to-run task is needed. In this case, it should
* also be true that rtcb == tcb.
*/
switch_needed = sched_removereadytorun(tcb);
/* Add the task to the specified blocked task list */
sched_addblocked(tcb, (tstate_t)task_state);
/* If there are any pending tasks, then add them to the ready-to-run
* task list now
*/
if (g_pendingtasks.head)
{
switch_needed |= sched_mergepending();
}
/* Now, perform the context switch if one is needed */
if (switch_needed)
{
/* Update scheduler parameters */
sched_suspend_scheduler(rtcb);
/* Are we in an interrupt handler? */
if (g_current_regs)
{
/* Yes, then we have to do things differently.
* Just copy the g_current_regs into the OLD rtcb.
*/
up_savestate(rtcb->xcp.regs);
/* Restore the exception context of the rtcb at the (new) head
* of the ready-to-run task list.
*/
rtcb = this_task();
/* Reset scheduler parameters */
sched_resume_scheduler(rtcb);
/* Then switch contexts. Any necessary address environment
* changes will be made when the interrupt returns.
*/
up_restorestate(rtcb->xcp.regs);
}
/* No, then we will need to perform the user context switch */
else
{
/* Get the context of the task at the head of the ready to
* run list.
*/
struct tcb_s *nexttcb = this_task();
#ifdef CONFIG_ARCH_ADDRENV
/* Make sure that the address environment for the previously
* running task is closed down gracefully (data caches dump,
* MMU flushed) and set up the address environment for the new
* thread at the head of the ready-to-run list.
*/
(void)group_addrenv(nexttcb);
#endif
/* Reset scheduler parameters */
sched_resume_scheduler(nexttcb);
/* Then switch contexts */
up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
/* up_switchcontext forces a context switch to the task at the
* head of the ready-to-run list. It does not 'return' in the
* normal sense. When it does return, it is because the blocked
* task is again ready to run and has execution priority.
*/
}
}
}
arch/risc-v/src/rv64gc/up_copystate.c
+86
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@@ -0,0 +1,86 @@
/****************************************************************************
* arch/risc-v/src/rv64gc/up_copystate.c
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <arch/irq.h>
#include "up_internal.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_copystate
****************************************************************************/
/* A little faster than most memcpy's */
void up_copystate(uint64_t *dest, uint64_t *src)
{
int i;
/* In the RISC-V model, the state is copied from the stack to the TCB,
* but only a reference is passed to get the state from the TCB. So the
* following check avoids copying the TCB save area onto itself:
*/
if (src != dest)
{
for (i = 0; i < XCPTCONTEXT_REGS; i++)
{
*dest++ = *src++;
}
}
}
arch/risc-v/src/rv64gc/up_initialstate.c
+121
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@@ -0,0 +1,121 @@
/****************************************************************************
* arch/risc-v/src/rv64gc/up_initialstate.c
*
* Copyright (C) 2011 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <string.h>
#include <nuttx/arch.h>
#include <arch/irq.h>
#include "up_internal.h"
#include "up_arch.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_initial_state
*
* Description:
* A new thread is being started and a new TCB
* has been created. This function is called to initialize
* the processor specific portions of the new TCB.
*
* This function must setup the initial architecture registers
* and/or stack so that execution will begin at tcb->start
* on the next context switch.
*
****************************************************************************/
void up_initial_state(struct tcb_s *tcb)
{
struct xcptcontext *xcp = &tcb->xcp;
uint32_t regval;
/* Initialize the initial exception register context structure */
memset(xcp, 0, sizeof(struct xcptcontext));
/* Save the initial stack pointer. Hmmm.. the stack is set to the very
* beginning of the stack region. Some functions may want to store data on
* the caller's stack and it might be good to reserve some space. However,
* only the start function would do that and we have control over that one
*/
xcp->regs[REG_SP] = (uintptr_t)tcb->adj_stack_ptr;
/* Save the task entry point */
xcp->regs[REG_EPC] = (uintptr_t)tcb->start;
/* If this task is running PIC, then set the PIC base register to the
* address of the allocated D-Space region.
*/
#ifdef CONFIG_PIC
# warning "Missing logic"
#endif
/* Set privileged- or unprivileged-mode, depending on how NuttX is
* configured and what kind of thread is being started.
*
* If the kernel build is not selected, then all threads run in
* privileged thread mode.
*/
#ifdef CONFIG_BUILD_KERNEL
# warning "Missing logic"
#endif
/* Set the initial value of the interrupt context register.
*
* Since various RISC-V platforms use different interrupt
* methodologies, the value of the interrupt context is
* part specific.
*
*/
regval = up_get_newintctx();
xcp->regs[REG_INT_CTX] = regval;
}
arch/risc-v/src/rv64gc/up_releasepending.c
+149
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/****************************************************************************
* arch/risc-v/src/rv64gc/up_releasepending.c
*
* Copyright (C) 2011, 2014-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sched.h>
#include <syscall.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/sched.h>
#include "sched/sched.h"
#include "group/group.h"
#include "up_internal.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_release_pending
*
* Description:
* Release and ready-to-run tasks that have
* collected in the pending task list. This can call a
* context switch if a new task is placed at the head of
* the ready to run list.
*
****************************************************************************/
void up_release_pending(void)
{
struct tcb_s *rtcb = this_task();
sinfo("From TCB=%p\n", rtcb);
/* Merge the g_pendingtasks list into the ready-to-run task list */
/* sched_lock(); */
if (sched_mergepending())
{
/* The currently active task has changed! We will need to switch
* contexts.
*
* Update scheduler parameters.
*/
sched_suspend_scheduler(rtcb);
/* Are we operating in interrupt context? */
if (g_current_regs)
{
/* Yes, then we have to do things differently.
* Just copy the g_current_regs into the OLD rtcb.
*/
up_savestate(rtcb->xcp.regs);
/* Restore the exception context of the rtcb at the (new) head
* of the ready-to-run task list.
*/
rtcb = this_task();
/* Update scheduler parameters */
sched_resume_scheduler(rtcb);
/* Then switch contexts. Any necessary address environment
* changes will be made when the interrupt returns.
*/
up_restorestate(rtcb->xcp.regs);
}
/* No, then we will need to perform the user context switch */
else
{
/* Switch context to the context of the task at the head of the
* ready to run list.
*/
struct tcb_s *nexttcb = this_task();
#ifdef CONFIG_ARCH_ADDRENV
/* Make sure that the address environment for the previously
* running task is closed down gracefully (data caches dump,
* MMU flushed) and set up the address environment for the new
* thread at the head of the ready-to-run list.
*/
(void)group_addrenv(nexttcb);
#endif
/* Update scheduler parameters */
sched_resume_scheduler(nexttcb);
/* Then switch contexts */
up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
/* up_switchcontext forces a context switch to the task at the
* head of the ready-to-run list. It does not 'return' in the
* normal sense. When it does return, it is because the blocked
* task is again ready to run and has execution priority.
*/
}
}
}
arch/risc-v/src/rv64gc/up_reprioritizertr.c
+203
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@@ -0,0 +1,203 @@
/****************************************************************************
* arch/risc-v/src/rv64gc/up_reprioritizertr.c
*
* Copyright (C) 2011, 2013-2015 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include <sched.h>
#include <syscall.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/sched.h>
#include "sched/sched.h"
#include "group/group.h"
#include "up_internal.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_reprioritize_rtr
*
* Description:
* Called when the priority of a running or
* ready-to-run task changes and the reprioritization will
* cause a context switch. Two cases:
*
* 1) The priority of the currently running task drops and the next
* task in the ready to run list has priority.
* 2) An idle, ready to run task's priority has been raised above the
* the priority of the current, running task and it now has the
* priority.
*
* Input Parameters:
* tcb: The TCB of the task that has been reprioritized
* priority: The new task priority
*
****************************************************************************/
void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
{
/* Verify that the caller is sane */
if (tcb->task_state < FIRST_READY_TO_RUN_STATE ||
tcb->task_state > LAST_READY_TO_RUN_STATE
#if SCHED_PRIORITY_MIN > 0
|| priority < SCHED_PRIORITY_MIN
#endif
#if SCHED_PRIORITY_MAX < UINT8_MAX
|| priority > SCHED_PRIORITY_MAX
#endif
)
{
DEBUGPANIC();
}
else
{
struct tcb_s *rtcb = this_task();
bool switch_needed;
sinfo("TCB=%p PRI=%d\n", tcb, priority);
/* Remove the tcb task from the ready-to-run list.
* sched_removereadytorun will return true if we just
* remove the head of the ready to run list.
*/
switch_needed = sched_removereadytorun(tcb);
/* Setup up the new task priority */
tcb->sched_priority = (uint8_t)priority;
/* Return the task to the specified blocked task list.
* sched_addreadytorun will return true if the task was
* added to the new list. We will need to perform a context
* switch only if the EXCLUSIVE or of the two calls is non-zero
* (i.e., one and only one the calls changes the head of the
* ready-to-run list).
*/
switch_needed ^= sched_addreadytorun(tcb);
/* Now, perform the context switch if one is needed */
if (switch_needed)
{
/* If we are going to do a context switch, then now is the right
* time to add any pending tasks back into the ready-to-run list.
* task list now
*/
if (g_pendingtasks.head)
{
sched_mergepending();
}
/* Update scheduler parameters */
sched_suspend_scheduler(rtcb);
/* Are we in an interrupt handler? */
if (g_current_regs)
{
/* Yes, then we have to do things differently.
* Just copy the g_current_regs into the OLD rtcb.
*/
up_savestate(rtcb->xcp.regs);
/* Restore the exception context of the rtcb at the (new) head
* of the ready-to-run task list.
*/
rtcb = this_task();
/* Update scheduler parameters */
sched_resume_scheduler(rtcb);
/* Then switch contexts. Any necessary address environment
* changes will be made when the interrupt returns.
*/
up_restorestate(rtcb->xcp.regs);
}
/* No, then we will need to perform the user context switch */
else
{
/* Switch context to the context of the task at the head of the
* ready to run list.
*/
struct tcb_s *nexttcb = this_task();
#ifdef CONFIG_ARCH_ADDRENV
/* Make sure that the address environment for the previously
* running task is closed down gracefully (data caches dump,
* MMU flushed) and set up the address environment for the new
* thread at the head of the ready-to-run list.
*/
(void)group_addrenv(nexttcb);
#endif
/* Update scheduler parameters */
sched_resume_scheduler(nexttcb);
/* Then switch contexts */
up_switchcontext(rtcb->xcp.regs, nexttcb->xcp.regs);
/* up_switchcontext forces a context switch to the task at the
* head of the ready-to-run list. It does not 'return' in the
* normal sense. When it does return, it is because the blocked
* task is again ready to run and has execution priority.
*/
}
}
}
}
arch/risc-v/src/rv64gc/up_sigdeliver.c
+146
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@@ -0,0 +1,146 @@
/****************************************************************************
* arch/risc-v/src/rv64gc/up_sigdeliver.c
*
* Copyright (C) 2011, 2015, 2018-2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Modified for RISC-V:
*
* Copyright (C) 2016 Ken Pettit. All rights reserved.
* Author: Ken Pettit <pettitkd@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <sched.h>
#include <syscall.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "sched/sched.h"
#include "up_internal.h"
#include "up_arch.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_sigdeliver
*
* Description:
* This is the a signal handling trampoline. When a signal action was
* posted. The task context was mucked with and forced to branch to this
* location with interrupts disabled.
*
****************************************************************************/
void up_sigdeliver(void)
{
struct tcb_s *rtcb = this_task();
uint64_t regs[XCPTCONTEXT_REGS];
/* Save the errno. This must be preserved throughout the signal handling
* so that the user code final gets the correct errno value (probably
* EINTR).
*/
int saved_errno = rtcb->pterrno;
board_autoled_on(LED_SIGNAL);
sinfo("rtcb=%p sigdeliver=%p sigpendactionq.head=%p\n",
rtcb, rtcb->xcp.sigdeliver, rtcb->sigpendactionq.head);
DEBUGASSERT(rtcb->xcp.sigdeliver != NULL);
/* Save the return state on the stack. */
up_copystate(regs, rtcb->xcp.regs);
#ifndef CONFIG_SUPPRESS_INTERRUPTS
/* Then make sure that interrupts are enabled. Signal handlers must always
* run with interrupts enabled.
*/
up_irq_enable();
#endif
/* Deliver the signals */
((sig_deliver_t)rtcb->xcp.sigdeliver)(rtcb);
/* Output any debug messages BEFORE restoring errno (because they may
* alter errno), then disable interrupts again and restore the original
* errno that is needed by the user logic (it is probably EINTR).
*/
sinfo("Resuming EPC: %08x INT_CTX: %08x\n",
regs[REG_EPC], regs[REG_INT_CTX]);
(void)up_irq_save();
rtcb->pterrno = saved_errno;
/* Modify the saved return state with the actual saved values in the
* TCB. This depends on the fact that nested signal handling is
* not supported. Therefore, these values will persist throughout the
* signal handling action.
*
* Keeping this data in the TCB resolves a security problem in protected
* and kernel mode: The regs[] array is visible on the user stack and
* could be modified by a hostile program.
*/
regs[REG_EPC] = rtcb->xcp.saved_epc;
regs[REG_INT_CTX] = rtcb->xcp.saved_int_ctx;
rtcb->xcp.sigdeliver = NULL; /* Allows next handler to be scheduled */
/* Then restore the correct state for this thread of
* execution.
*/
board_autoled_off(LED_SIGNAL);
up_fullcontextrestore(regs);
/* up_fullcontextrestore() should not return but could if the software
* interrupts are disabled.
*/
DEBUGPANIC();
}
arch/risc-v/src/rv64gc/up_swint.c
+286
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@@ -0,0 +1,286 @@
/****************************************************************************
* arch/riscv/src/rv64gc/up_swint.c
*
* Copyright (C) 2011-2012, 2015, 2019 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <string.h>
#include <syscall.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/sched.h>
#include <arch/irq.h>
#include "signal/signal.h"
#include "up_internal.h"
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: up_registerdump
****************************************************************************/
#ifdef CONFIG_DEBUG_SYSCALL_INFO
static void up_registerdump(const uint64_t *regs)
{
svcinfo("EPC:%08x\n",
regs[REG_EPC]);
svcinfo("A0:%08x A1:%08x A2:%08x A3:%08x A4:%08x A5:%08x A6:%08x A7:%08x\n",
regs[REG_A0], regs[REG_A1], regs[REG_A2], regs[REG_A3],
regs[REG_A4], regs[REG_A5], regs[REG_A6], regs[REG_A7]);
svcinfo("T0:%08x T1:%08x T2:%08x T3:%08x T4:%08x T5:%08x T6:%08x\n",
regs[REG_T0], regs[REG_T1], regs[REG_T2], regs[REG_T3],
regs[REG_T4], regs[REG_T5], regs[REG_T6]);
svcinfo("S0:%08x S1:%08x S2:%08x S3:%08x S4:%08x S5:%08x S6:%08x S7:%08x\n",
regs[REG_S0], regs[REG_S1], regs[REG_S2], regs[REG_S3],
regs[REG_S4], regs[REG_S5], regs[REG_S6], regs[REG_S7]);
svcinfo("S8:%08x S9:%08x S10:%08x S11:%08x\n",
regs[REG_S8], regs[REG_S9], regs[REG_S10], regs[REG_S11]);
#ifdef RISCV_SAVE_GP
svcinfo("GP:%08x SP:%08x FP:%08x TP:%08x RA:%08x\n",
regs[REG_GP], regs[REG_SP], regs[REG_FP], regs[REG_TP],
regs[REG_RA]);
#else
svcinfo("SP:%08x FP:%08x TP:%08x RA:%08x\n",
regs[REG_SP], regs[REG_FP], regs[REG_TP], regs[REG_RA]);
#endif
}
#else
# define up_registerdump(regs)
#endif
/****************************************************************************
* Name: dispatch_syscall
*
* Description:
* Call the stub function corresponding to the system call.
*
****************************************************************************/
#ifdef CONFIG_BUILD_KERNEL
static void dispatch_syscall(void) naked_function;
static void dispatch_syscall(void)
{
# error "Missing logic"
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_swint
*
* Description:
* This is software interrupt exception handler that performs context
* switching and manages system calls
*
****************************************************************************/
int up_swint(int irq, FAR void *context, FAR void *arg)
{
uint64_t *regs = (uint64_t *)context;
DEBUGASSERT(regs && regs == g_current_regs);
/* Software interrupt 0 is invoked with REG_A0 (REG_X10) = system call
* command and REG_A1-6 = variable number of
* arguments depending on the system call.
*/
#ifdef CONFIG_DEBUG_SYSCALL_INFO
svcinfo("Entry: regs: %p cmd: %d\n", regs, regs[REG_A0]);
up_registerdump(regs);
#endif
/* Handle the SWInt according to the command in $a0 */
switch (regs[REG_A0])
{
/* A0=SYS_restore_context: This a restore context command:
*
* void up_fullcontextrestore(uint32_t *restoreregs) noreturn_function;
*
* At this point, the following values are saved in context:
*
* A0 = SYS_restore_context
* A1 = restoreregs
*
* In this case, we simply need to set g_current_regs to restore register
* area referenced in the saved R1. context == g_current_regs is the normal
* exception return. By setting g_current_regs = context[R1], we force
* the return to the saved context referenced in $a1.
*/
case SYS_restore_context:
{
DEBUGASSERT(regs[REG_A1] != 0);
g_current_regs = (uint64_t *)regs[REG_A1];
}
break;
/* A0=SYS_switch_context: This a switch context command:
*
* void up_switchcontext(uint64_t *saveregs, uint64_t *restoreregs);
*
* At this point, the following values are saved in context:
*
* A0 = SYS_switch_context
* A1 = saveregs
* A2 = restoreregs
*
* In this case, we save the context registers to the save register
* area referenced by the saved contents of R5 and then set
* g_current_regs to the save register area referenced by the saved
* contents of R6.
*/
case SYS_switch_context:
{
DEBUGASSERT(regs[REG_A1] != 0 && regs[REG_A2] != 0);
up_copystate((uint64_t *)regs[REG_A1], regs);
g_current_regs = (uint64_t *)regs[REG_A2];
}
break;
/* A0=SYS_syscall_return: This a switch context command:
*
* void up_sycall_return(void);
*
* At this point, the following values are saved in context:
*
* A0 = SYS_syscall_return
*
* We need to restore the saved return address and return in
* unprivileged thread mode.
*/
#ifdef CONFIG_BUILD_KERNEL
case SYS_syscall_return:
{
struct tcb_s *rtcb = sched_self();
int index = (int)rtcb->xcp.nsyscalls - 1;
/* Make sure that there is a saved syscall return address. */
DEBUGASSERT(index >= 0);
/* Setup to return to the saved syscall return address in
* the original mode.
*/
g_current_regs[REG_EPC] = rtcb->xcp.syscall[index].sysreturn;
#error "Missing logic -- need to restore the original mode"
rtcb->xcp.nsyscalls = index;
/* Handle any signal actions that were deferred while processing
* the system call.
*/
rtcb->flags &= ~TCB_FLAG_SYSCALL;
(void)nxsig_unmask_pendingsignal();
}
break;
#endif
/* This is not an architecture-specify system call. If NuttX is built
* as a standalone kernel with a system call interface, then all of the
* additional system calls must be handled as in the default case.
*/
default:
{
#ifdef CONFIG_BUILD_KERNEL
FAR struct tcb_s *rtcb = sched_self();
int index = rtcb->xcp.nsyscalls;
/* Verify that the SYS call number is within range */
DEBUGASSERT(g_current_regs[REG_A0] < SYS_maxsyscall);
/* Make sure that we got here that there is a no saved syscall
* return address. We cannot yet handle nested system calls.
*/
DEBUGASSERT(index < CONFIG_SYS_NNEST);
/* Setup to return to dispatch_syscall in privileged mode. */
rtcb->xcpsyscall[index].sysreturn = regs[REG_EPC];
#error "Missing logic -- Need to save mode"
rtcb->xcp.nsyscalls = index + 1;
regs[REG_EPC] = (uint32_t)dispatch_syscall;
#error "Missing logic -- Need to set privileged mode"
/* Offset R0 to account for the reserved values */
g_current_regs[REG_A0] -= CONFIG_SYS_RESERVED;
/* Indicate that we are in a syscall handler. */
rtcb->flags |= TCB_FLAG_SYSCALL;
#else
svcerr("ERROR: Bad SYS call: %d\n", regs[REG_A0]);
#endif
}
break;
}
/* Report what happened. That might difficult in the case of a context switch */
#ifdef CONFIG_DEBUG_SYSCALL_INFO
if (regs != g_current_regs)
{
svcinfo("SWInt Return: Context switch!\n");
up_registerdump((const uint32_t *)g_current_regs);
}
else
{
svcinfo("SWInt Return: %d\n", regs[REG_A0]);
}
#endif
return OK;
}

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