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arch/arm/src/samv7: add support for AFEC (ADC) driver
This commit adds microcontroller support for Analog Front End driver to samv7 MCUs. Only software trigger via IOCTL is currently supported, averaging can be set by configuration option CONFIG_SAMV7_AFECn_RES. Signed-off-by: Michal Lenc <michallenc@seznam.cz>
This commit is contained in:
Michal Lenc
Xiang Xiao
@@ -196,6 +196,10 @@ config SAMV7_HAVE_MCAN1
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bool
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default n
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config SAMV7_AFEC
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bool
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default n
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config SAMV7_DAC
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bool
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default n
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@@ -313,10 +317,42 @@ config SAMV7_ADC
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config SAMV7_AFEC0
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bool "Analog Front End 0 (AFEC0)"
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default n
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select SAMV7_AFEC
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if SAMV7_AFEC0
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config SAMV7_AFEC0_RES
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int "AFEC0 Resolution"
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default 0
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range 0 5
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---help---
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0 no average
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1 low resolution
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2 OSR4
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3 OSR16
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4 OSR64
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5 OSR256
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endif
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config SAMV7_AFEC1
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bool "Analog Front End 1 (AFEC1)"
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default n
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select SAMV7_AFEC
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if SAMV7_AFEC1
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config SAMV7_AFEC1_RES
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int "AFEC1 Resolution"
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default 0
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range 0 5
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---help---
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0 no average
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1 low resolution
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2 OSR4
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3 OSR16
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4 OSR64
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5 OSR256
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endif
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config SAMV7_MCAN0
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bool "CAN controller 0 (MCAN0)"
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@@ -166,6 +166,10 @@ ifeq ($(CONFIG_SAMV7_MCAN),y)
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CHIP_CSRCS += sam_mcan.c
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endif
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ifeq ($(CONFIG_SAMV7_AFEC),y)
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CHIP_CSRCS += sam_afec.c
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endif
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ifeq ($(CONFIG_SAMV7_USBDEVHS),y)
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CHIP_CSRCS += sam_usbdevhs.c
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endif
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@@ -222,7 +222,9 @@
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# define AFEC_EMR_CMPFILTER(n) ((uint32_t)(n) << AFEC_EMR_CMPFILTER_SHIFT)
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#define AFEC_EMR_RES_SHIFT (16) /* Bits 16-18: Resolution */
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#define AFEC_EMR_RES_MASK (7 << AFEC_EMR_RES_SHIFT)
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#define AFEC_EMR_RES(n) ((uint32_t)(n) << AFEC_EMR_RES_SHIFT)
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# define AFEC_EMR_RES_NOAVG (0 << AFEC_EMR_RES_SHIFT) /* 12-bit resolution, AFEC sample rate is maximum (no averaging) */
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# define AFEC_EMR_RES_LOWRES (1 << AFEC_EMR_RES_SHIFT) /* 10-bit resolution, AFEC sample rate is maximum (no averaging) */
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# define AFEC_EMR_RES_OSR4 (2 << AFEC_EMR_RES_SHIFT) /* 13-bit resolution, AFEC sample rate divided by 4 (averaging) */
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# define AFEC_EMR_RES_OSR16 (3 << AFEC_EMR_RES_SHIFT) /* 14-bit resolution, AFEC sample rate divided by 16 (averaging) */
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# define AFEC_EMR_RES_OSR64 (4 << AFEC_EMR_RES_SHIFT) /* 15-bit resolution, AFEC sample rate divided by 64 (averaging) */
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@@ -368,10 +370,10 @@
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/* Compare Window Register */
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#define AFEC_CWR_LOWTHRES_SHIFT (0) /* Bits 0-11: Low Threshold */
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#define AFEC_CWR_LOWTHRES_MASK (0xfff << AFEC_CWR_LOWTHRES_SHIFT)
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#define AFEC_CWR_LOWTHRES_MASK (0xffff << AFEC_CWR_LOWTHRES_SHIFT)
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# define AFEC_CWR_LOWTHRES(n) ((uint32_t)(n) << AFEC_CWR_LOWTHRES_SHIFT)
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#define AFEC_CWR_HIGHTHRES_SHIFT (16) /* Bits 16-27: High Threshold */
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#define AFEC_CWR_HIGHTHRES_MASK (0xfff << AFEC_CWR_LOWTHRES_SHIFT)
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#define AFEC_CWR_HIGHTHRES_MASK (0xffff << AFEC_CWR_LOWTHRES_SHIFT)
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# define AFEC_CWR_HIGHTHRES(n)K ((uint32_t)(n) << AFEC_CWR_LOWTHRES_SHIFT)
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/* Channel Gain Register */
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@@ -453,7 +455,7 @@
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/* Channel Selection Register */
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#define AFEC_CSELR_CSEL_SHIFT (0) /* Bits 0-3: Channel Selection */
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#define AFEC_CSELR_CSEL_MASK (15 << AFEC_CSELR_CSEL_SHIFT)
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#define AFEC_CSELR_CSEL_MASK (0xf << AFEC_CSELR_CSEL_SHIFT)
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# define AFEC_CSELR_CSEL(n) ((uint32_t)(n) << AFEC_CSELR_CSEL_SHIFT)
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/* Channel Data Register */
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@@ -462,7 +464,7 @@
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/* Channel Offset Compensation Register */
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#define AFEC_COCR_MASK (0x00000fff) /* Bits 0-12: Analog Offset */
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#define AFEC_COCR_MASK (0x000003ff) /* Bits 0-9: Analog Offset */
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/* Temperature Sensor Mode Register */
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@@ -487,7 +489,7 @@
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#define AFEC_ACR_PGA0EN (1 << 2) /* Bit 2: PGA0 Enable */
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#define AFEC_ACR_PGA1EN (1 << 3) /* Bit 3: PGA1 Enable */
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#define AFEC_ACR_IBCTL_SHIFT (9) /* Bits 8-9: AFEC Bias Current Control */
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#define AFEC_ACR_IBCTL_SHIFT (8) /* Bits 8-9: AFEC Bias Current Control */
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#define AFEC_ACR_IBCTL_MASK (3 << AFEC_ACR_IBCTL_SHIFT)
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# define AFEC_ACR_IBCTL(n) ((uint32_t)(n) << AFEC_ACR_IBCTL_SHIFT)
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,91 @@
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/****************************************************************************
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* arch/arm/src/samv7/sam_afec.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_SRC_SAMV7_SAM_AFEC_H
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#define __ARCH_ARM_SRC_SAMV7_SAM_AFEC_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include "chip.h"
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#include "hardware/sam_afec.h"
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#if defined(CONFIG_ADC) && (defined(CONFIG_SAMV7_AFEC0) || \
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defined(CONFIG_SAMV7_AFEC1))
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Port numbers for use with sam_mcan_initialize() */
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#define AFEC0 0
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#define AFEC1 1
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/****************************************************************************
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* Public Types
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Name: sam_afec_initialize
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*
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* Description:
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* Initialize the adc
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*
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* Input Parameters:
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* intf - ADC number (1 or 2)
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* chanlist - The list of channels
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* nchannels - Number of channels
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*
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* Returned Value:
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* Valid can device structure reference on success; a NULL on failure
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*
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****************************************************************************/
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FAR struct adc_dev_s *sam_afec_initialize(int intf,
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FAR const uint8_t *chanlist,
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int nchannels);
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* CONFIG_ADC && (CONFIG_SAMV7_AFEC0 || CONFIG_SAMV7_AFEC1) */
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#endif /* __ARCH_ARM_SRC_SAMV7_SAM_AFEC_H */
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