xtensa: inline up_cpu_index

Signed-off-by: chenxiaoyi <chenxiaoyi@xiaomi.com>
This commit is contained in:
chenxiaoyi
2025-01-22 09:59:28 +08:00
committed by Xiang Xiao
parent d9270f9ea8
commit de55f64a7f
7 changed files with 39 additions and 113 deletions
+17
View File
@@ -495,6 +495,23 @@ static inline_function int esp32_irq_gpio(int cpu)
#endif
#endif
#ifdef CONFIG_ARCH_HAVE_MULTICPU
noinstrument_function
static inline_function int xtensa_cpu_index(void)
{
int index;
__asm__ __volatile__
(
"rsr.prid %0\n"
"extui %0,%0,13,1\n"
: "=r"(index)
);
return index;
}
#endif /* CONFIG_ARCH_HAVE_MULTICPU */
/****************************************************************************
* Public Data
****************************************************************************/
+17
View File
@@ -498,6 +498,23 @@
* Inline functions
****************************************************************************/
#ifdef CONFIG_ARCH_HAVE_MULTICPU
noinstrument_function
static inline_function int xtensa_cpu_index(void)
{
int index;
__asm__ __volatile__
(
"rsr.prid %0\n"
"extui %0,%0,13,1\n"
: "=r"(index)
);
return index;
}
#endif /* CONFIG_ARCH_HAVE_MULTICPU */
/****************************************************************************
* Public Data
****************************************************************************/
+5 -1
View File
@@ -408,7 +408,11 @@ irqstate_t xtensa_disable_interrupts(irqstate_t mask);
****************************************************************************/
#ifdef CONFIG_ARCH_HAVE_MULTICPU
int up_cpu_index(void) noinstrument_function;
noinstrument_function
static inline_function int up_cpu_index(void)
{
return xtensa_cpu_index();
}
#endif /* CONFIG_ARCH_HAVE_MULTICPU */
/****************************************************************************
-4
View File
@@ -133,10 +133,6 @@ ifeq ($(CONFIG_SMP),y)
CHIP_CSRCS += esp32_cpuidlestack.c esp32_cpustart.c esp32_intercpu_interrupt.c
endif
ifeq ($(CONFIG_ARCH_HAVE_MULTICPU),y)
CHIP_ASRCS = esp32_cpuindex.S
endif
ifeq ($(CONFIG_ESP32_UART),y)
CHIP_CSRCS += esp32_serial.c
endif
-52
View File
@@ -1,52 +0,0 @@
/****************************************************************************
* arch/xtensa/src/esp32/esp32_cpuindex.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
.file "xtensa_cpumacros.S"
/****************************************************************************
* Included Files
****************************************************************************/
#include <arch/xtensa/xtensa_abi.h>
#include "chip_macros.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_cpu_index
*
* Description:
* Return the real core number regardless CONFIG_SMP setting
*
****************************************************************************/
.text
.align 4
.global up_cpu_index
.type up_cpu_index, @function
up_cpu_index:
ENTRY(16)
getcoreid a2
RET(16)
.size up_cpu_index, . - up_cpu_index
-4
View File
@@ -47,10 +47,6 @@ ifeq ($(CONFIG_SMP),y)
CHIP_CSRCS += esp32s3_cpuidlestack.c esp32s3_cpustart.c esp32s3_intercpu_interrupt.c
endif
ifeq ($(CONFIG_ARCH_HAVE_MULTICPU),y)
CHIP_ASRCS = esp32s3_cpuindex.S
endif
ifeq ($(CONFIG_ESP32S3_EFUSE),y)
CHIP_CSRCS += esp32s3_efuse.c
CHIP_CSRCS += esp32s3_efuse_table.c
@@ -1,52 +0,0 @@
/****************************************************************************
* arch/xtensa/src/esp32s3/esp32s3_cpuindex.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
.file "esp32s3_cpuindex.S"
/****************************************************************************
* Included Files
****************************************************************************/
#include <arch/xtensa/xtensa_abi.h>
#include "chip_macros.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_cpu_index
*
* Description:
* Return the real core number regardless CONFIG_SMP setting
*
****************************************************************************/
.text
.align 4
.global up_cpu_index
.type up_cpu_index, @function
up_cpu_index:
ENTRY(16)
getcoreid a2
RET(16)
.size up_cpu_index, . - up_cpu_index