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arch: arm: cxd56xx: nxstyle fixes

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nxstyle fixes for cxd56 arch

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
This commit is contained in:
Alin Jerpelea
2020-04-14 10:39:01 +02:00
committed by Xiang Xiao
parent df57cacd61
commit dd2f3deaaf
16 changed files with 643 additions and 617 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/src/cxd56xx/hardware/cxd5602_backupmem.h
+4 -4
View File
@@ -39,9 +39,9 @@
#ifndef __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD5602_BACKUPMEM_H
#define __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD5602_BACKUPMEM_H
/***************************************************************************
/****************************************************************************
* Included Files
***************************************************************************/
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
@@ -70,7 +70,7 @@ typedef struct
uint32_t irq_inv_map[4]; /* 0x04400060 ~ 0x0440006f */
uint8_t reserved0[0x100 - 0x70]; /* 0x04400070 ~ 0x044000ff */
uint8_t power_monitor_data[0x420]; /* 0x04400100 ~ 0x0440051f */
uint8_t reserved1[2 * 1024 - 0x520]; /* 0x04400520 ~ 0x044007ff (2KB-0x520)*/
uint8_t reserved1[2 * 1024 - 0x520]; /* 0x04400520 ~ 0x044007ff (2KB-0x520) */
uint8_t gnss_backup_data[24 * 1024]; /* 0x04400800 ~ 0x044067ff (24KB) */
uint8_t gnss_pvtlog_data[4 * 1024]; /* 0x04406800 ~ 0x044077ff (4KB) */
uint8_t reserved_romcode[2 * 1024]; /* 0x04407800 ~ 0x04407fff (2KB) */
@@ -82,7 +82,7 @@ typedef struct
****************************************************************************/
/****************************************************************************
* Public Functions
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD5602_BACKUPMEM_H */
arch/arm/src/cxd56xx/hardware/cxd5602_isop.h
+446 -440
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File diff suppressed because it is too large Load Diff
arch/arm/src/cxd56xx/hardware/cxd5602_pinconfig.h
+141 -127
View File
@@ -52,10 +52,12 @@
/* Set the standard pinconf macro Definitions
* - If it's used as input pin, then set 1. Otherwise set 0 (default).
* - If it's drived in 4mA, then set 1. Otherwise set 0 (default 2mA).
* - If it's used as weak pull-up/down, then set PINCONF_PULLUP/PINCONF_PULLDOWN.
* - If it's used as weak pull-up/down,
* then set PINCONF_PULLUP/PINCONF_PULLDOWN.
* Otherwise set 0 (default).
*
*/
#define PINCONF(pin, mode, input, drive, pull) \
( \
(PINCONF_SET_PIN(pin)) | \
@@ -67,128 +69,134 @@
/* CXD5602 Pin Configuration Table
*
* Group Pin 100 185 Mode0 Mode1 Mode2 Mode3
* ================ =============== === === ======= =============== =============== ===============
* I2C4 I2C4_BCK o o GPIO I2C4(PMIC) - -
* I2C4_BDT o o GPIO I2C4(PMIC) - -
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* PMIC_INT PMIC_INT o o GPIO PMIC_INT PMIC_INT(OD) -
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* RTC_IRQ_OUT RTC_IRQ_OUT - o GPIO RTC_IRQ_OUT RTC_IRQ_OUT(OD) -
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* AP_CLK AP_CLK o o GPIO AP_CLK PMU_WDT PMU_WDT(OD)
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* GNSS_1PPS_OUT GNSS_1PPS_OUT - o GPIO GNSS_1PPS_OUT CPU_WDT CPU_WDT(OD)
* ---------------- --------------- --- --- --------------- ------- --------------- ---------------
* SPI0A SPI0_CS_X o o GPIO UART1(DBG) SPI0(CFG) SYS_MONOUT0
* SPI0_SCK o o GPIO UART1(DBG) SPI0(CFG) SYS_MONOUT1
* ---------------- --------------- --- --- ------- --------------- ---------------
* SPI0B SPI0_MOSI - o GPIO I2C2(CFG) SPI0(CFG) SYS_MONOUT2
* SPI0_MISO - o GPIO I2C2(CFG) SPI0(CFG) SYS_MONOUT3
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* SPI1A SPI1_CS_X o o GPIO SPI1(Flash) SPI0(CFG) SYS_MONOUT4
* SPI1_SCK o o GPIO SPI1(Flash) SPI0(CFG) SYS_MONOUT5
* SPI1_IO0 o o GPIO SPI1(Flash) SPI0(CFG) SYS_MONOUT6
* SPI1_IO1 o o GPIO SPI1(Flash) SPI0(CFG) SYS_MONOUT7
* ---------------- --------------- --- --- ------- --------------- ---------------
* SPI1B SPI1_IO2 o o GPIO SPI1(Flash) - SYS_MONOUT8
* SPI1_IO3 o o GPIO SPI1(Flash) - SYS_MONOUT9
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* SPI2A SPI2_CS_X o o GPIO SPI2(HostIF) UART0(HostIF) I2C3(HostIF)
* SPI2_SCK o o GPIO SPI2(HostIF) UART0(HostIF) I2C3(HostIF)
* ---------------- --------------- --- --- ------- --------------- ---------------
* SPI2B SPI2_MOSI o o GPIO SPI2(HostIF) UART0(HostIF) -
* SPI2_MISO o o GPIO SPI2(HostIF) UART0(HostIF) -
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* HIFIRQ HIF_IRQ_OUT o o GPIO HIF_IRQ_OUT HIF_IRQ_OUT(OD) GNSS_1PPS_OUT
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* HIFEXT HIF_GPIO0 - o GPIO - - GPS_EXTLD
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* SEN_IRQ_IN SEN_IRQ_IN o o GPIO SEN_IRQ_IN SYS_MONOUT0 DBG_LOGGER
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* SPI3_CS0_X SPI3_CS0_X o o GPIO SPI3_CS0_X SYS_MONOUT1 DBG_LOGGER
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* SPI3_CS1_X SPI3_CS1_X o o GPIO SPI3_CS1_X SYS_MONOUT2 DBG_LOGGER
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* SPI3_CS2_X SPI3_CS2_X o o GPIO SPI3_CS2_X SYS_MONOUT3 DBG_LOGGER
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* SPI3 SPI3_SCK o o GPIO SPI3(Sensor) SYS_MONOUT4 DBG_LOGGER
* SPI3_MOSI o o GPIO SPI3(Sensor) SYS_MONOUT5 DBG_LOGGER
* SPI3_MISO o o GPIO SPI3(Sensor) SYS_MONOUT6 DBG_LOGGER
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* I2C0 I2C0_BCK o o GPIO I2C0(Sensor) SYS_MONOUT7 DBG_LOGGER
* I2C0_BDT o o GPIO I2C0(Sensor) SYS_MONOUT8 DBG_LOGGER
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* PWMA PWM0 o o GPIO PWMA SYS_MONOUT9 DBG_LOGGER
* PWM1 o o GPIO PWMA GPIO DBG_LOGGER
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* PWMB PWM2 o o GPIO PWMB I2C1(Sensor) DBG_LOGGER
* PWM3 o o GPIO PWMB I2C1(Sensor) DBG_LOGGER
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* IS IS_CLK - o GPIO IS - -
* IS_VSYNC - o GPIO IS - -
* IS_HSYNC - o GPIO IS - -
* IS_DATA0 - o GPIO IS - -
* IS_DATA1 - o GPIO IS - -
* IS_DATA2 - o GPIO IS - -
* IS_DATA3 - o GPIO IS - -
* IS_DATA4 - o GPIO IS - -
* IS_DATA5 - o GPIO IS - -
* IS_DATA6 - o GPIO IS - -
* IS_DATA7 - o GPIO IS - -
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* UART2 UART2_TXD o o GPIO UART2(APP) APP_MONOUT0 -
* UART2_RXD o o GPIO UART2(APP) APP_MONOUT1 -
* UART2_CTS o o GPIO UART2(APP) APP_MONOUT2 -
* UART2_RTS o o GPIO UART2(APP) APP_MONOUT3 -
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* SPI4 SPI4_CS_X o o GPIO SPI4(APP) APP_MONOUT4 -
* SPI4_SCK o o GPIO SPI4(APP) APP_MONOUT5 -
* SPI4_MOSI o o GPIO SPI4(APP) APP_MONOUT6 -
* SPI4_MISO o o GPIO SPI4(APP) APP_MONOUT7 -
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* EMMCA EMMC_CLK o o GPIO EMMC SPI5(APP) -
* EMMC_CMD o o GPIO EMMC SPI5(APP) -
* EMMC_DATA0 o o GPIO EMMC SPI5(APP) -
* EMMC_DATA1 o o GPIO EMMC SPI5(APP) -
* ---------------- --------------- --- --- ------- --------------- ---------------
* EMMCB EMMC_DATA2 o o GPIO EMMC APP_MONOUT8 -
* EMMC_DATA3 o o GPIO EMMC APP_MONOUT9 -
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* SDIOA SDIO_CLK - o GPIO SDIO SPI5(APP) -
* SDIO_CMD - o GPIO SDIO SPI5(APP) -
* SDIO_DATA0 - o GPIO SDIO SPI5(APP) -
* SDIO_DATA1 - o GPIO SDIO SPI5(APP) -
* SDIO_DATA2 - o GPIO SDIO GPIO -
* SDIO_DATA3 - o GPIO SDIO GPIO -
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* SDIOB SDIO_CD - o GPIO SDIO - -
* SDIO_WP - o GPIO SDIO - -
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* SDIOC SDIO_CMDDIR - o GPIO SDIO - -
* SDIO_DIR0 - o GPIO SDIO - -
* SDIO_DIR1_3 - o GPIO SDIO - -
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* SDIOD SDIO_CLKI - o GPIO SDIO - -
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* I2S0 I2S0_BCK o o GPIO I2S0 APP_MONOUT0 -
* I2S0_LRCK o o GPIO I2S0 APP_MONOUT1 -
* I2S0_DATA_IN o o GPIO I2S0 APP_MONOUT2 -
* I2S0_DATA_OUT o o GPIO I2S0 APP_MONOUT3 -
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* I2S1 I2S1_BCK - o GPIO I2S1 APP_MONOUT4 -
* I2S1_LRCK - o GPIO I2S1 APP_MONOUT5 -
* I2S1_DATA_IN - o GPIO I2S1 APP_MONOUT6 -
* I2S1_DATA_OUT - o GPIO I2S1 APP_MONOUT7 -
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* MCLK MCLK o o GPIO MCLK APP_MONOUT8 -
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* PDM PDM_CLK o o GPIO PDM APP_MONOUT9 -
* PDM_IN o o GPIO PDM GPIO -
* PDM_OUT o o GPIO PDM GPIO -
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* USBVBUS USB_VBUSINT o o GPIO USB_VBUSINT - DBG_LOGGER
* ---------------- --------------- --- --- ------- --------------- --------------- ---------------
* Group Pin 100 Mode0 Mode1 Mode2 Mode3
* ========= ============= = = ==== ============= =============== ==========
* I2C4 I2C4_BCK o o GPIO I2C4(PMIC) - -
* I2C4_BDT o o GPIO I2C4(PMIC) - -
* --------- ------------- - - ---- ------------- --------------- ----------
* PMIC_INT PMIC_INT o o GPIO PMIC_INT PMIC_INT(OD) -
* --------- ------------- - - ---- ------------- --------------- ----------
* RTC_IRQ
* _OUT RTC_IRQ_OUT - o GPIO RTC_IRQ_OUT RTC_IRQ_OUT(OD) -
* --------- ------------- - - ---- ------------- --------------- ----------
* AP_CLK AP_CLK o o GPIO AP_CLK PMU_WDT PMU_WDT(OD)
* --------- ------------- - - ---- ------------- --------------- ----------
* GNSS_1PPS
* _OUT GNSS_1PPS_OUT - o GPIO GNSS_1PPS_OUT CPU_WDT CPU_WDT(OD)
* --------- ------------- - - ---- ------------- --------------- ----------
* SPI0A SPI0_CS_X o o GPIO UART1(DBG) SPI0(CFG) SYS_MONOUT0
* SPI0_SCK o o GPIO UART1(DBG) SPI0(CFG) SYS_MONOUT1
* --------- ------------- - - ---- ------------- --------------- ----------
* SPI0B SPI0_MOSI - o GPIO I2C2(CFG) SPI0(CFG) SYS_MONOUT2
* SPI0_MISO - o GPIO I2C2(CFG) SPI0(CFG) SYS_MONOUT3
* --------- ------------- - - ---- ------------- --------------- ----------
* SPI1A SPI1_CS_X o o GPIO SPI1(Flash) SPI0(CFG) SYS_MONOUT4
* SPI1_SCK o o GPIO SPI1(Flash) SPI0(CFG) SYS_MONOUT5
* SPI1_IO0 o o GPIO SPI1(Flash) SPI0(CFG) SYS_MONOUT6
* SPI1_IO1 o o GPIO SPI1(Flash) SPI0(CFG) SYS_MONOUT7
* --------- ------------- - - ---- ------------- --------------- ----------
* SPI1B SPI1_IO2 o o GPIO SPI1(Flash) - SYS_MONOUT8
* SPI1_IO3 o o GPIO SPI1(Flash) - SYS_MONOUT9
* --------- ------------- - - ---- ------------- --------------- ----------
* SPI2A SPI2_CS_X o o GPIO SPI2(HostIF) UART0(HostIF) I2C3(Host)
* SPI2_SCK o o GPIO SPI2(HostIF) UART0(HostIF) I2C3(Host)
* --------- ------------- - - ---- ------------- --------------- ----------
* SPI2B SPI2_MOSI o o GPIO SPI2(HostIF) UART0(HostIF) -
* SPI2_MISO o o GPIO SPI2(HostIF) UART0(HostIF) -
* --------- ------------- - - ---- ------------- --------------- ----------
* HIFIRQ HIF_IRQ_OUT o o GPIO HIF_IRQ_OUT HIF_IRQ_OUT(OD) GNSS_1PPS
* _OUT
* --------- ------------- - - ---- ------------- --------------- ----------
* HIFEXT HIF_GPIO0 - o GPIO - - GPS_EXTLD
* --------- ------------- - - ---- ------------- --------------- ----------
* SEN_IRQ_I SEN_IRQ_IN o o GPIO SEN_IRQ_IN SYS_MONOUT0 DBG_LOGGER
* --------- ------------- - - ---- ------------- --------------- ----------
* SPI3
* _CS0_ SPI3_CS0_X o o GPIO SPI3_CS0_X SYS_MONOUT1 DBG_LOGGER
* --------- ------------- - - ---- ------------- --------------- ----------
* SPI3
* _CS1_ SPI3_CS1_X o o GPIO SPI3_CS1_X SYS_MONOUT2 DBG_LOGGER
* --------- ------------- - - ---- ------------- --------------- ----------
* SPI3
* _CS2_X SPI3_CS2_X o o GPIO SPI3_CS2_X SYS_MONOUT3 DBG_LOGGER
* --------- ------------- - - ---- ------------- --------------- ----------
* SPI3 SPI3_SCK o o GPIO SPI3(Sensor) SYS_MONOUT4 DBG_LOGGER
* SPI3_MOSI o o GPIO SPI3(Sensor) SYS_MONOUT5 DBG_LOGGER
* SPI3_MISO o o GPIO SPI3(Sensor) SYS_MONOUT6 DBG_LOGGER
* --------- ------------- - - ---- ------------- --------------- ----------
* I2C0 I2C0_BCK o o GPIO I2C0(Sensor) SYS_MONOUT7 DBG_LOGGER
* I2C0_BDT o o GPIO I2C0(Sensor) SYS_MONOUT8 DBG_LOGGER
* --------- ------------- - - ---- ------------- --------------- ----------
* PWMA PWM0 o o GPIO PWMA SYS_MONOUT9 DBG_LOGGER
* PWM1 o o GPIO PWMA GPIO DBG_LOGGER
* --------- ------------- - - ---- ------------- --------------- ----------
* PWMB PWM2 o o GPIO PWMB I2C1(Sensor) DBG_LOGGER
* PWM3 o o GPIO PWMB I2C1(Sensor) DBG_LOGGER
* --------- ------------- - - ---- ------------- --------------- ----------
* IS IS_CLK - o GPIO IS - -
* IS_VSYNC - o GPIO IS - -
* IS_HSYNC - o GPIO IS - -
* IS_DATA0 - o GPIO IS - -
* IS_DATA1 - o GPIO IS - -
* IS_DATA2 - o GPIO IS - -
* IS_DATA3 - o GPIO IS - -
* IS_DATA4 - o GPIO IS - -
* IS_DATA5 - o GPIO IS - -
* IS_DATA6 - o GPIO IS - -
* IS_DATA7 - o GPIO IS - -
* --------- ------------- - - ---- ------------- --------------- ----------
* UART2 UART2_TXD o o GPIO UART2(APP) APP_MONOUT0 -
* UART2_RXD o o GPIO UART2(APP) APP_MONOUT1 -
* UART2_CTS o o GPIO UART2(APP) APP_MONOUT2 -
* UART2_RTS o o GPIO UART2(APP) APP_MONOUT3 -
* --------- ------------- - - ---- ------------- --------------- ----------
* SPI4 SPI4_CS_X o o GPIO SPI4(APP) APP_MONOUT4 -
* SPI4_SCK o o GPIO SPI4(APP) APP_MONOUT5 -
* SPI4_MOSI o o GPIO SPI4(APP) APP_MONOUT6 -
* SPI4_MISO o o GPIO SPI4(APP) APP_MONOUT7 -
* --------- ------------- - - ---- ------------- --------------- ----------
* EMMCA EMMC_CLK o o GPIO EMMC SPI5(APP) -
* EMMC_CMD o o GPIO EMMC SPI5(APP) -
* EMMC_DATA0 o o GPIO EMMC SPI5(APP) -
* EMMC_DATA1 o o GPIO EMMC SPI5(APP) -
* --------- ------------- - - ---- ------------- --------------- ----------
* EMMCB EMMC_DATA2 o o GPIO EMMC APP_MONOUT8 -
* EMMC_DATA3 o o GPIO EMMC APP_MONOUT9 -
* --------- ------------- - - ---- ------------- --------------- ----------
* SDIOA SDIO_CLK - o GPIO SDIO SPI5(APP) -
* SDIO_CMD - o GPIO SDIO SPI5(APP) -
* SDIO_DATA0 - o GPIO SDIO SPI5(APP) -
* SDIO_DATA1 - o GPIO SDIO SPI5(APP) -
* SDIO_DATA2 - o GPIO SDIO GPIO -
* SDIO_DATA3 - o GPIO SDIO GPIO -
* --------- ------------- - - ---- ------------- --------------- ----------
* SDIOB SDIO_CD - o GPIO SDIO - -
* SDIO_WP - o GPIO SDIO - -
* --------- ------------- - - ---- ------------- --------------- ----------
* SDIOC SDIO_CMDDIR - o GPIO SDIO - -
* SDIO_DIR0 - o GPIO SDIO - -
* SDIO_DIR1_3 - o GPIO SDIO - -
* --------- ------------- - - ---- ------------- --------------- ----------
* SDIOD SDIO_CLKI - o GPIO SDIO - -
* --------- ------------- - - ---- ------------- --------------- ----------
* I2S0 I2S0_BCK o o GPIO I2S0 APP_MONOUT0 -
* I2S0_LRCK o o GPIO I2S0 APP_MONOUT1 -
* I2S0_DATA_IN o o GPIO I2S0 APP_MONOUT2 -
* I2S0_DATA_OUT o o GPIO I2S0 APP_MONOUT3 -
* --------- ------------- - - ---- ------------- --------------- ----------
* I2S1 I2S1_BCK - o GPIO I2S1 APP_MONOUT4 -
* I2S1_LRCK - o GPIO I2S1 APP_MONOUT5 -
* I2S1_DATA_IN - o GPIO I2S1 APP_MONOUT6 -
* I2S1_DATA_OUT - o GPIO I2S1 APP_MONOUT7 -
* --------- ------------- - - ---- ------------- --------------- ----------
* MCLK MCLK o o GPIO MCLK APP_MONOUT8 -
* --------- ------------- - - ---- ------------- --------------- ----------
* PDM PDM_CLK o o GPIO PDM APP_MONOUT9 -
* PDM_IN o o GPIO PDM GPIO -
* PDM_OUT o o GPIO PDM GPIO -
* --------- ------------- - - ---- ------------- --------------- ----------
* USBVBUS USB_VBUSINT o o GPIO USB_VBUSINT - DBG_LOGGER
* --------- ------------- - - ---- ------------- --------------- ----------
*/
/* Default pin configurations
@@ -196,10 +204,10 @@
* ENZI: 1=Input Enable, 0=Input Disable
* 4mA : Drive Current 1=4mA, 0=2mA
* Pull: 0=HiZ floating, PINCONF_PULLUP, PINCONF_PULLDOWN
* M E P
* P o N 4 u
* i d Z m l
* n e I A l
* M E P
* P o N 4 u
* i d Z m l
* n e I A l
*/
#define PINCONF_I2C4_BCK_GPIO PINCONF(PIN_I2C4_BCK, 0, 0, 0, 0)
@@ -621,6 +629,7 @@
#define PINCONFS_SDIOD_GPIO { PINCONF_SDIO_CLKI_GPIO }
#define PINCONFS_SDIOD_SDIO { PINCONF_SDIO_CLKI }
#endif /* CONFIG_CXD56_FCBGA */
#define PINCONFS_I2S0_GPIO { PINCONF_I2S0_BCK_GPIO, PINCONF_I2S0_LRCK_GPIO, \
PINCONF_I2S0_DATA_IN_GPIO, PINCONF_I2S0_DATA_OUT_GPIO }
#define PINCONFS_I2S0_M_HIGH { PINCONF_I2S0_BCK_M_HIGH, PINCONF_I2S0_LRCK_M_HIGH, \
@@ -643,6 +652,7 @@
#define PINCONFS_I2S1_S_NORM { PINCONF_I2S1_BCK_S, PINCONF_I2S1_LRCK_S, \
PINCONF_I2S1_DATA_IN, PINCONF_I2S1_DATA_OUT_NORM }
#endif /* CONFIG_CXD56_FCBGA */
#define PINCONFS_MCLK_GPIO { PINCONF_MCLK_GPIO }
#define PINCONFS_MCLK { PINCONF_MCLK }
#define PINCONFS_PDM_GPIO { PINCONF_PDM_CLK_GPIO, PINCONF_PDM_IN_GPIO, PINCONF_PDM_OUT_GPIO }
@@ -651,6 +661,10 @@
#define PINCONFS_USB_VBUSINT_GPIO { PINCONF_USB_VBUSINT_GPIO }
#define PINCONFS_USB_VBUSINT { PINCONF_USB_VBUSINT }
/****************************************************************************
* Included Files
****************************************************************************/
#ifdef CONFIG_CXD56_CUSTOM_PINCONFIG
/* Change the pin configuration depending on each board */
arch/arm/src/cxd56xx/hardware/cxd56_cpufifo.h
+4 -4
View File
@@ -36,15 +36,15 @@
#ifndef __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_CPUFIFO_H
#define __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_CPUFIFO_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
#define CXD56_FIF_PUSH_FULL (CXD56_CPUFIFO_BASE + 0x00)
#define CXD56_FIF_PUSH_WRD0 (CXD56_CPUFIFO_BASE + 0x04)
arch/arm/src/cxd56xx/hardware/cxd56_crg.h
+2 -2
View File
@@ -68,7 +68,7 @@
#define CXD56_CRG_APP_TILE_CLK_GATING_ENB (CXD56_ADSP_BASE + 0x02001084)
/* RESET register bits **********************************************************************/
/* RESET register bits ******************************************************/
#define XRS_AUD (1<<0)
#define XRS_IMG (1<<4)
@@ -78,7 +78,7 @@
#define XRS_MMC_CRG (1<<11)
#define XRS_DSP_GEN (1<<22)
/* CK_GATE_AHB register bits ****************************************************************/
/* CK_GATE_AHB register bits ************************************************/
#define CK_GATE_AUD (1<<0)
#define CK_GATE_IMG (1<<4)
arch/arm/src/cxd56xx/hardware/cxd56_emmc.h
+9 -9
View File
@@ -181,15 +181,15 @@
#define EMMC_IDSTS_INT_CLEAR (0x000003FFu)
#define EMMC_IDSTS_FSM (0xFu << 13) /* DMAC FSM present state */
#define EMMC_IDSTS_EB_RESP (1u << 11) /* This bit valids when EMMC_IDSTS_FBE */
#define EMMC_IDSTS_EB_TRANS (1u << 10) /* This bit valids when EMMC_IDSTS_FBE */
#define EMMC_IDSTS_AIS (1u << 9) /* Abnormal Interrupt Summary */
#define EMMC_IDSTS_NIS (1u << 8) /* Normal Interrupt Summary */
#define EMMC_IDSTS_CES (1u << 5) /* Card Error Summary */
#define EMMC_IDSTS_DU (1u << 4) /* Descriptor Unavailable Interrupt */
#define EMMC_IDSTS_FBE (1u << 2) /* Fatal Bus Error Interrupt */
#define EMMC_IDSTS_RI (1u << 1) /* Receive Interrupt */
#define EMMC_IDSTS_TI (1u << 0) /* Transmit Interrupt */
#define EMMC_IDSTS_EB_RESP (1u << 11) /* This bit valids when EMMC_IDSTS_FBE */
#define EMMC_IDSTS_EB_TRANS (1u << 10) /* This bit valids when EMMC_IDSTS_FBE */
#define EMMC_IDSTS_AIS (1u << 9) /* Abnormal Interrupt Summary */
#define EMMC_IDSTS_NIS (1u << 8) /* Normal Interrupt Summary */
#define EMMC_IDSTS_CES (1u << 5) /* Card Error Summary */
#define EMMC_IDSTS_DU (1u << 4) /* Descriptor Unavailable Interrupt */
#define EMMC_IDSTS_FBE (1u << 2) /* Fatal Bus Error Interrupt */
#define EMMC_IDSTS_RI (1u << 1) /* Receive Interrupt */
#define EMMC_IDSTS_TI (1u << 0) /* Transmit Interrupt */
/* EMMC_IDINTEN */
arch/arm/src/cxd56xx/hardware/cxd56_ge2d.h
+4
View File
@@ -36,6 +36,10 @@
#ifndef __ARCH_ARM_SRC_CXD56XX_CXD56_GE2D_H
#define __ARCH_ARM_SRC_CXD56XX_CXD56_GE2D_H
/****************************************************************************
* Included Files
****************************************************************************/
#include "hardware/cxd5602_memorymap.h"
/****************************************************************************
arch/arm/src/cxd56xx/hardware/cxd56_i2c.h
+1 -1
View File
@@ -203,7 +203,7 @@
****************************************************************************/
/****************************************************************************
* Public Functions
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_I2C_H */
arch/arm/src/cxd56xx/hardware/cxd56_rtc.h
+2 -2
View File
@@ -83,7 +83,7 @@
#define RTC_DBGSETALMPOSTCNT2 (0xa0)
#define RTC_DBGSETALMPRECNT2 (0xa4)
/* Register Addresses *******************************************************************/
/* Register Addresses *******************************************************/
#define CXD56_RTC0_WRREGPOSTCNT (CXD56_RTC0_BASE + RTC_WRREGPOSTCNT)
#define CXD56_RTC0_WRREGPRECNT (CXD56_RTC0_BASE + RTC_WRREGPRECNT)
@@ -105,7 +105,7 @@
#define CXD56_RTC0_ALMOUTEN(id) (CXD56_RTC0_BASE + RTC_ALMOUTEN(id))
#define CXD56_RTC0_ALMFLG (CXD56_RTC0_BASE + RTC_ALMFLG)
/* Register bit definitions *************************************************************/
/* Register bit definitions *************************************************/
/* Flag/Clear Register */
arch/arm/src/cxd56xx/hardware/cxd56_scufifo.h
+4 -2
View File
@@ -60,9 +60,11 @@
#define SCUFIFO_OVERRUNCLR (1 << 0) /* [R] Clear FIFO over run error */
#define SCUFIFO_OVERWRITE (1 << 4) /* [W] Over write when FIFO is full. */
#define SCUFIFO_ENADCINTERVAL (1 << 12) /* [W] Enable ADC interval instead of
* PREDIV. */
* PREDIV.
*/
#define SCUFIFO_ADCINTERVAL(x) (((x) & 0xf) << 8) /* [W] ADC interval */
#define SCUFIFO_BPS(x) ((x) & 0xf) /* [W] Bytes per sample */
#define SCUFIFO_BPS(x) ((x) & 0xf) /* [W] Bytes per sample */
#define SCUFIFO_D0_W0_S_CTRL0 (CXD56_SCU_FIFO_REG_BASE + 0x0)
#define SCUFIFO_D0_W0_S_CTRL1 (CXD56_SCU_FIFO_REG_BASE + 0x4)
arch/arm/src/cxd56xx/hardware/cxd56_sph.h
+4 -4
View File
@@ -36,15 +36,15 @@
#ifndef __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_SPH_H
#define __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_SPH_H
/*****************************************************************************
/****************************************************************************
* Included Files
*****************************************************************************/
****************************************************************************/
#include "chip.h"
/*****************************************************************************
/****************************************************************************
* Pre-processor Definitions
*****************************************************************************/
****************************************************************************/
#define CXD56_SPH_REQ(n) (CXD56_SPH_BASE + ((n) * 16) + 0)
#define CXD56_SPH_STS(n) (CXD56_SPH_BASE + ((n) * 16) + 4)
arch/arm/src/cxd56xx/hardware/cxd56_spi.h
+13 -13
View File
@@ -53,18 +53,18 @@
/* Register offsets *********************************************************/
#define CXD56_SPI_CR0_OFFSET 0x0000 /* Control Register 0 */
#define CXD56_SPI_CR1_OFFSET 0x0004 /* Control Register 1 */
#define CXD56_SPI_DR_OFFSET 0x0008 /* Data Register */
#define CXD56_SPI_SR_OFFSET 0x000c /* Status Register */
#define CXD56_SPI_CPSR_OFFSET 0x0010 /* Clock Prescale Register */
#define CXD56_SPI_IMSC_OFFSET 0x0014 /* Interrupt Mask Set and Clear Reg */
#define CXD56_SPI_RIS_OFFSET 0x0018 /* Raw Interrupt Status Register */
#define CXD56_SPI_MIS_OFFSET 0x001c /* Masked Interrupt Status Register */
#define CXD56_SPI_ICR_OFFSET 0x0020 /* Interrupt Clear Register */
#define CXD56_SPI_DMACR_OFFSET 0x0024 /* DMA Control Register */
#define CXD56_SPI_CSMODE_OFFSET 0x0090 /* CS control mode */
#define CXD56_SPI_CS_OFFSET 0x0094 /* CS output */
#define CXD56_SPI_CR0_OFFSET 0x0000 /* Control Register 0 */
#define CXD56_SPI_CR1_OFFSET 0x0004 /* Control Register 1 */
#define CXD56_SPI_DR_OFFSET 0x0008 /* Data Register */
#define CXD56_SPI_SR_OFFSET 0x000c /* Status Register */
#define CXD56_SPI_CPSR_OFFSET 0x0010 /* Clock Prescale Register */
#define CXD56_SPI_IMSC_OFFSET 0x0014 /* Interrupt Mask Set and Clear Reg */
#define CXD56_SPI_RIS_OFFSET 0x0018 /* Raw Interrupt Status Register */
#define CXD56_SPI_MIS_OFFSET 0x001c /* Masked Interrupt Status Register */
#define CXD56_SPI_ICR_OFFSET 0x0020 /* Interrupt Clear Register */
#define CXD56_SPI_DMACR_OFFSET 0x0024 /* DMA Control Register */
#define CXD56_SPI_CSMODE_OFFSET 0x0090 /* CS control mode */
#define CXD56_SPI_CS_OFFSET 0x0094 /* CS output */
#define CXD56_SPI_SLAVETYPE_OFFSET 0x0098 /* Slave type */
/* Register addresses *******************************************************/
@@ -205,7 +205,7 @@
****************************************************************************/
/****************************************************************************
* Public Functions
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_SPI_H */
arch/arm/src/cxd56xx/hardware/cxd56_timer.h
+1 -1
View File
@@ -111,7 +111,7 @@
****************************************************************************/
/****************************************************************************
* Public Functions
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_TIMER_H */
arch/arm/src/cxd56xx/hardware/cxd56_uart.h
+2 -2
View File
@@ -107,7 +107,7 @@
#define UART_INTR_PE (1u << 8) /* Parity error interrupt */
#define UART_INTR_BE (1u << 9) /* Break error interrupt */
#define UART_INTR_OE (1u << 10) /* Overrun error interrupt */
#define UART_INTR_ALL (0x7ff) /* All of interrupts */
#define UART_INTR_ALL (0x7ff) /* All of interrupts */
#define UART_FLAG_RI (1u << 8) /* Ring indicator */
#define UART_FLAG_TXFE (1u << 7) /* Transmit FIFO empty */
@@ -128,7 +128,7 @@
****************************************************************************/
/****************************************************************************
* Public Functions
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_UART_H */
arch/arm/src/cxd56xx/hardware/cxd56_udmac.h
+5 -5
View File
@@ -133,10 +133,10 @@
#define DMA_CTRL_NEXT_USEBURST (1 << 3)
#define DMA_CTRL_CYCLE_CTRL_INVALID 0x0 /* Invalid cycle type */
#define DMA_CTRL_CYCLE_CTRL_BASIC 0x1 /* Basic cycle type */
#define DMA_CTRL_CYCLE_CTRL_AUTO 0x2 /* Auto cycle type */
#define DMA_CTRL_CYCLE_CTRL_PINGPONG 0x3 /* PingPong cycle type */
#define DMA_CTRL_CYCLE_CTRL_INVALID 0x0 /* Invalid cycle type */
#define DMA_CTRL_CYCLE_CTRL_BASIC 0x1 /* Basic cycle type */
#define DMA_CTRL_CYCLE_CTRL_AUTO 0x2 /* Auto cycle type */
#define DMA_CTRL_CYCLE_CTRL_PINGPONG 0x3 /* PingPong cycle type */
#define DMA_CTRL_CYCLE_CTRL_MEM_SCATTER_GATHER 0x4 /* Memory scatter gather cycle type */
#define DMA_CTRL_CYCLE_CTRL_MEM_SCATTER_GATHER_ALT 0x5 /* Memory scatter gather using alternate structure */
#define DMA_CTRL_CYCLE_CTRL_PER_SCATTER_GATHER 0x6 /* Peripheral scatter gather cycle type */
@@ -161,7 +161,7 @@ struct dma_descriptor_s
****************************************************************************/
/****************************************************************************
* Public Functions
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_UDMAC_H */
arch/arm/src/cxd56xx/hardware/cxd56_wdt.h
+1 -1
View File
@@ -102,7 +102,7 @@
****************************************************************************/
/****************************************************************************
* Public Functions
* Public Functions Prototypes
****************************************************************************/
#endif /* __ARCH_ARM_SRC_CXD56XX_HARDWARE_CXD56_WDT_H */