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b-g474e-dpow1: Add support for FLASH bootloader
boards/arm/stm32/b-g474e-dpow1/scripts/ld.script.dfu:
* New file. Reserve up to 24KiB at the start of FLASH for a
bootloader.
boards/arm/stm32/b-g474e-dpow1/scripts/Make.defs:
* When building with CONFIG_STM32_DFU, use the new ld.script.dfu
to leave room in FLASH for a bootloader.
boards/arm/stm32/b-g474e-dpow1/README.txt:
* "FLASH Bootloader Support": New section.
This commit is contained in:
committed by
Xiang Xiao
parent
d788b2e16c
commit
dc4c4102c3
@@ -22,6 +22,7 @@ Contents
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- LEDs
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- RGB Power LED
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- Serial Consoles
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- FLASH Bootloader Support
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- Configurations
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@@ -114,6 +115,28 @@ Serial Consoles
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differ.
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FLASH Bootloader Support
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========================
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If implementing a FLASH bootloader, turn on Kconfig option CONFIG_STM32_DFU.
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This option activates an alternate linker script, scripts/ld.script.dfu,
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which causes NuttX to leave a gap at the start of FLASH, leaving that space
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for the FLASH bootloader. See scripts/ld.script.dfu for details. It also
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causes NuttX to relocate its vector table and possibly make other
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adjustments.
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One possible bootloader is STmicro's OpenBootloader "middleware" supplied
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with STM32CubeG4 version 1.3.0. On the host (PC), it should be possible to
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use STmicro's STM32CubeProgrammer or the stm32loader.py script from
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https://github.com/jsnyder/stm32loader. That script can be invoked with
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parameters such as:
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stm32loader.py -p /dev/ttyACM0 -a 0x08006000 -e -w -v -g 0x08006000 nuttx.bin
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where the given address (0x08006000 in this case) must match the starting
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address in scripts/ld.script.dfu.
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Configurations
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==============
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@@ -22,12 +22,18 @@ include $(TOPDIR)/.config
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include $(TOPDIR)/tools/Config.mk
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include $(TOPDIR)/arch/arm/src/armv7-m/Toolchain.defs
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ifeq ($(CONFIG_STM32_DFU),y)
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LDSCRIPT = ld.script.dfu
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else
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LDSCRIPT = ld.script
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endif
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ifeq ($(CONFIG_CYGWIN_WINTOOL),y)
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# Windows-native toolchains
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ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)ld.script}"
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ARCHSCRIPT = -T "${shell cygpath -w $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)}"
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else
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# Linux/Cygwin-native toolchain
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ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)ld.script
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ARCHSCRIPT = -T$(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
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endif
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ifeq ($(CONFIG_DEBUG_SYMBOLS),y)
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127
boards/arm/stm32/b-g474e-dpow1/scripts/ld.script.dfu
Normal file
127
boards/arm/stm32/b-g474e-dpow1/scripts/ld.script.dfu
Normal file
@@ -0,0 +1,127 @@
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/****************************************************************************
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* boards/arm/stm32/b-g474e-dpow1/scripts/ld.script
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* The STM32G474RE has 512 KiB of FLASH beginning at address 0x0800:0000.
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*
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* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
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* where the code expects to begin execution by jumping to the entry point in
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* the 0x0800:0000 address range. The FLASH bootloader is located there and
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* allocated up to 24KiB (6 pages of 4k if single bank mode or 12 pages of 2k
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* if dual bank mode), so our executable will begin at 0x0800:6000, leaving
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* 488KiB.
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*
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* The STM32G474RE has a total of 128 KiB of SRAM in three separate areas:
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*
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* 1) 80 KiB SRAM1 mapped at 0x2000:0000 thru 0x2001:3fff.
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* 2) 16 KiB SRAM2 mapped at 0x2001:4000 thru 0x2001:7fff.
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*
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* CCM SRAM (Routine Booster):
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*
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* 3) 32 KiB CCM SRAM mapped at 0x1000:0000 thru 0x1000:7fff
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* but also aliased at at 0x2001:8000 thru 0x2001:ffff to be contiguous
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* with the SRAM1 and SRAM2.
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*
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* Because SRAM1 and SRAM2 are contiguous, they are treated as one region
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* by this logic.
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*
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* CCM SRAM is also contiguous to SRAM1 and SRAM2, however it is excluded
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* from this linker script, to keep it reserved for special uses in code.
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* REVISIT: Is this the correct way to handle CCM SRAM?
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*/
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MEMORY
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{
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flash (rx) : ORIGIN = 0x08006000, LENGTH = 488K
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sram (rwx) : ORIGIN = 0x20000000, LENGTH = 96K
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}
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OUTPUT_ARCH(arm)
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EXTERN(_vectors)
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ENTRY(_stext)
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SECTIONS
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{
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.text : {
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_stext = ABSOLUTE(.);
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*(.vectors)
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*(.text .text.*)
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*(.fixup)
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*(.gnu.warning)
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*(.rodata .rodata.*)
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*(.gnu.linkonce.t.*)
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*(.glue_7)
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*(.glue_7t)
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*(.got)
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*(.gcc_except_table)
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*(.gnu.linkonce.r.*)
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_etext = ABSOLUTE(.);
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} > flash
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.init_section : ALIGN(4) {
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_sinit = ABSOLUTE(.);
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*(.init_array .init_array.*)
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_einit = ABSOLUTE(.);
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} > flash
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.ARM.extab : ALIGN(4) {
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*(.ARM.extab*)
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} > flash
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.ARM.exidx : ALIGN(4) {
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__exidx_start = ABSOLUTE(.);
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*(.ARM.exidx*)
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__exidx_end = ABSOLUTE(.);
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} > flash
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_eronly = ABSOLUTE(.);
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.data : ALIGN(4) {
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_sdata = ABSOLUTE(.);
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*(.data .data.*)
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*(.gnu.linkonce.d.*)
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CONSTRUCTORS
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. = ALIGN(4);
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_edata = ABSOLUTE(.);
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} > sram AT > flash
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.bss : ALIGN(4) {
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_sbss = ABSOLUTE(.);
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*(.bss .bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = ABSOLUTE(.);
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} > sram
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_info 0 : { *(.debug_info) }
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.debug_line 0 : { *(.debug_line) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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.debug_aranges 0 : { *(.debug_aranges) }
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}
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