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boards/arm/s32k1xx/s32k118evb: Implement board support for LEDs and buttons. This is taken from the Freedom-K66f with has the same LED and button configuation as the S32K116EVB and uses the same GPIO IP.

Browse Source 
boards/arm/s32k1xx/s32k118evb/include/board.h:  Add LPUART0 pin disambiguation.

arch/arm/src/s32k1xx/hardware:  Add pin mux definitions for S32K116, 118, 142, 144, 146, and 148.

arch/arm/src/s32k1xx/s32k1xx_pin.c and .h:  Add support for PIDR register that disables a gneral purpose pin from acting as an input.

arch/arm/src/s32k1xx/s32k1xx_pin.c and .h:  The device does not support slew rate controls or open drain (on all the pins).  Only pins that are configured for a protocol that requires open-drain (e.g;, LPI2C, LPUART single-wire) will work in open-drain mode.
This commit is contained in:
Gregory Nutt
2019-08-18 12:02:54 -06:00
parent ac36b1de3b
commit db0641556e
16 changed files with 3739 additions and 269 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/src/s32k1xx/hardware/s32k116_pinmux.h
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/********************************************************************************************
* arch/arm/src/s32k1xx/hardware/s32k116_pinmux.h
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_S32K1XX_HARDWARE_S32K116_PINMUX_H
#define __ARCH_ARM_SRC_S32K1XX_HARDWARE_S32K116_PINMUX_H
/********************************************************************************************
* Included Files
********************************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/********************************************************************************************
* Pre-processor Definitions
********************************************************************************************/
/* In most cases, there are alternative configurations for various pins. Those alternative
* pins are labeled with a suffix like _1, _2, etc. in order to distinguish them. Logic in
* the board.h file must select the correct pin configuration for the board by defining a pin
* configuration (with no suffix) that maps to the correct alternative.
*
* WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!!
* Additional effort is required to select specific GPIO options such as frequency,
* and pull-up/down! Just the basics are defined for most pins in the initial version of
* this file.
*/
/* ADC */
#define PIN_ADC0_SE0 (PIN_ANALOG | PIN_PORTA | PIN0)
#define PIN_ADC0_SE1 (PIN_ANALOG | PIN_PORTA | PIN1)
#define PIN_ADC0_SE3 (PIN_ANALOG | PIN_PORTA | PIN7)
#define PIN_ADC0_SE4 (PIN_ANALOG | PIN_PORTB | PIN0)
#define PIN_ADC0_SE5 (PIN_ANALOG | PIN_PORTB | PIN1)
#define PIN_ADC0_SE6 (PIN_ANALOG | PIN_PORTB | PIN2)
#define PIN_ADC0_SE7 (PIN_ANALOG | PIN_PORTB | PIN3)
#define PIN_ADC0_SE9 (PIN_ANALOG | PIN_PORTC | PIN1)
#define PIN_ADC0_SE10 (PIN_ANALOG | PIN_PORTC | PIN2)
#define PIN_ADC0_SE11 (PIN_ANALOG | PIN_PORTC | PIN3)
#define PIN_ADC0_SE12 (PIN_ANALOG | PIN_PORTC | PIN14)
#define PIN_ADC0_SE13 (PIN_ANALOG | PIN_PORTC | PIN15)
#define PIN_ADC0_SE14 (PIN_ANALOG | PIN_PORTC | PIN16)
/* CAN */
#define PIN_CAN0_RX_1 (PIN_ALT3 | PIN_PORTC | PIN2)
#define PIN_CAN0_RX_2 (PIN_ALT5 | PIN_PORTB | PIN0)
#define PIN_CAN0_RX_3 (PIN_ALT5 | PIN_PORTE | PIN4)
#define PIN_CAN0_TX_1 (PIN_ALT3 | PIN_PORTC | PIN3)
#define PIN_CAN0_TX_2 (PIN_ALT5 | PIN_PORTB | PIN1)
#define PIN_CAN0_TX_3 (PIN_ALT5 | PIN_PORTE | PIN5)
/* Output clock */
#define PIN_CLKOUT (PIN_ALT5 | PIN_PORTB | PIN5)
/* Comparators */
#define PIN_CMP0_IN0 (PIN_ANALOG | PIN_PORTA | PIN0)
#define PIN_CMP0_IN1 (PIN_ANALOG | PIN_PORTA | PIN1)
#define PIN_CMP0_IN2 (PIN_ANALOG | PIN_PORTC | PIN4)
#define PIN_CMP0_IN3 (PIN_ANALOG | PIN_PORTE | PIN8)
#define PIN_CMP0_IN4 (PIN_ANALOG | PIN_PORTC | PIN3)
#define PIN_CMP0_IN5 (PIN_ANALOG | PIN_PORTC | PIN2)
#define PIN_CMP0_OUT (PIN_ALT4 | PIN_PORTA | PIN4)
#define PIN_CMP0_RRT_1 (PIN_ALT5 | PIN_PORTA | PIN11)
#define PIN_CMP0_RRT_2 (PIN_ALT5 | PIN_PORTD | PIN16)
/* FlexTimer Module (FTM) */
#define PIN_FTM0_CH0 (PIN_ALT2 | PIN_PORTD | PIN15)
#define PIN_FTM0_CH1_1 (PIN_ALT2 | PIN_PORTB | PIN13)
#define PIN_FTM0_CH1_2 (PIN_ALT2 | PIN_PORTC | PIN1)
#define PIN_FTM0_CH1_3 (PIN_ALT2 | PIN_PORTD | PIN16)
#define PIN_FTM0_CH2_1 (PIN_ALT2 | PIN_PORTC | PIN2)
#define PIN_FTM0_CH2_2 (PIN_ALT2 | PIN_PORTD | PIN0)
#define PIN_FTM0_CH3_1 (PIN_ALT2 | PIN_PORTC | PIN3)
#define PIN_FTM0_CH3_2 (PIN_ALT2 | PIN_PORTD | PIN1)
#define PIN_FTM0_CH4 (PIN_ALT2 | PIN_PORTB | PIN4)
#define PIN_FTM0_CH5 (PIN_ALT2 | PIN_PORTB | PIN5)
#define PIN_FTM0_CH6 (PIN_ALT2 | PIN_PORTE | PIN8)
#define PIN_FTM0_CH7 (PIN_ALT2 | PIN_PORTE | PIN9)
#define PIN_FTM0_FLT2 (PIN_ALT2 | PIN_PORTA | PIN7)
#define PIN_FTM1_CH0_1 (PIN_ALT2 | PIN_PORTB | PIN2)
#define PIN_FTM1_CH0_2 (PIN_ALT2 | PIN_PORTC | PIN4)
#define PIN_FTM1_CH1_1 (PIN_ALT2 | PIN_PORTA | PIN1)
#define PIN_FTM1_CH1_2 (PIN_ALT2 | PIN_PORTB | PIN3)
#define PIN_FTM1_CH2 (PIN_ALT2 | PIN_PORTC | PIN14)
#define PIN_FTM1_CH3 (PIN_ALT2 | PIN_PORTC | PIN15)
#define PIN_FTM1_CH4 (PIN_ALT2 | PIN_PORTA | PIN10)
#define PIN_FTM1_CH5 (PIN_ALT2 | PIN_PORTA | PIN11)
#define PIN_FTM1_CH6 (PIN_ALT2 | PIN_PORTA | PIN12)
#define PIN_FTM1_CH7_1 (PIN_ALT2 | PIN_PORTA | PIN13)
#define PIN_FTM1_CH7_2 (PIN_ALT6 | PIN_PORTC | PIN1)
#define PIN_FTM1_FLT0 (PIN_ALT3 | PIN_PORTC | PIN8)
#define PIN_FTM1_FLT1 (PIN_ALT3 | PIN_PORTC | PIN9)
#define PIN_FTM1_FLT2 (PIN_ALT2 | PIN_PORTC | PIN16)
#define PIN_FTM1_QD_PHA_1 (PIN_ALT4 | PIN_PORTB | PIN3)
#define PIN_FTM1_QD_PHA_2 (PIN_ALT5 | PIN_PORTA | PIN1)
#define PIN_FTM1_QD_PHA_3 (PIN_ALT6 | PIN_PORTC | PIN7)
#define PIN_FTM1_QD_PHB_1 (PIN_ALT4 | PIN_PORTB | PIN2)
#define PIN_FTM1_QD_PHB_2 (PIN_ALT6 | PIN_PORTC | PIN4)
#define PIN_FTM1_QD_PHB_3 (PIN_ALT6 | PIN_PORTC | PIN6)
/* FlexIO */
#define PIN_FXIO_D0_1 (PIN_ALT4 | PIN_PORTA | PIN10)
#define PIN_FXIO_D0_2 (PIN_ALT6 | PIN_PORTD | PIN0)
#define PIN_FXIO_D1_1 (PIN_ALT4 | PIN_PORTA | PIN11)
#define PIN_FXIO_D1_2 (PIN_ALT6 | PIN_PORTD | PIN1)
#define PIN_FXIO_D2 (PIN_ALT4 | PIN_PORTA | PIN0)
#define PIN_FXIO_D3 (PIN_ALT4 | PIN_PORTA | PIN1)
#define PIN_FXIO_D4_1 (PIN_ALT4 | PIN_PORTD | PIN2)
#define PIN_FXIO_D4_2 (PIN_ALT5 | PIN_PORTA | PIN2)
#define PIN_FXIO_D5_1 (PIN_ALT4 | PIN_PORTD | PIN3)
#define PIN_FXIO_D5_2 (PIN_ALT5 | PIN_PORTA | PIN3)
#define PIN_FXIO_D6_1 (PIN_ALT5 | PIN_PORTD | PIN2)
#define PIN_FXIO_D6_2 (PIN_ALT6 | PIN_PORTE | PIN4)
#define PIN_FXIO_D7_1 (PIN_ALT5 | PIN_PORTD | PIN3)
#define PIN_FXIO_D7_2 (PIN_ALT6 | PIN_PORTE | PIN5)
/* JTAG */
#define PIN_JTAG_TCLK (PIN_ALT7 | PIN_PORTC | PIN4)
#define PIN_JTAG_TDI (PIN_ALT7 | PIN_PORTC | PIN5)
#define PIN_JTAG_TDO (PIN_ALT7 | PIN_PORTA | PIN10)
#define PIN_JTAG_TMS (PIN_ALT7 | PIN_PORTA | PIN4)
/* LPI2C */
#define PIN_LPI2C0_SCL_1 (PIN_ALT2 | PIN_PORTB | PIN7)
#define PIN_LPI2C0_SCL_2 (PIN_ALT3 | PIN_PORTA | PIN3)
#define PIN_LPI2C0_SCLS (PIN_ALT3 | PIN_PORTA | PIN0)
#define PIN_LPI2C0_SDA_1 (PIN_ALT2 | PIN_PORTB | PIN6)
#define PIN_LPI2C0_SDA_2 (PIN_ALT3 | PIN_PORTA | PIN2)
#define PIN_LPI2C0_SDAS (PIN_ALT3 | PIN_PORTA | PIN1)
#define PIN_LPSPI0_PCS0_1 (PIN_ALT3 | PIN_PORTB | PIN0)
#define PIN_LPSPI0_PCS0_2 (PIN_ALT4 | PIN_PORTB | PIN5)
#define PIN_LPSPI0_PCS1 (PIN_ALT3 | PIN_PORTB | PIN5)
#define PIN_LPSPI0_SCK_1 (PIN_ALT3 | PIN_PORTB | PIN2)
#define PIN_LPSPI0_SCK_2 (PIN_ALT4 | PIN_PORTD | PIN15)
#define PIN_LPSPI0_SIN_1 (PIN_ALT3 | PIN_PORTB | PIN3)
#define PIN_LPSPI0_SIN_2 (PIN_ALT4 | PIN_PORTD | PIN16)
#define PIN_LPSPI0_SOUT_1 (PIN_ALT3 | PIN_PORTB | PIN1)
#define PIN_LPSPI0_SOUT_2 (PIN_ALT3 | PIN_PORTB | PIN4)
/* LPTimer */
#define PIN_LPTMR0_ALT2 (PIN_ALT3 | PIN_PORTD | PIN5)
#define PIN_LPTMR0_ALT3 (PIN_ALT4 | PIN_PORTB | PIN0)
/* LPUARTs */
#define PIN_LPUART0_CTS_1 (PIN_ALT6 | PIN_PORTA | PIN0)
#define PIN_LPUART0_CTS_2 (PIN_ALT6 | PIN_PORTC | PIN8)
#define PIN_LPUART0_RTS_1 (PIN_ALT6 | PIN_PORTA | PIN1)
#define PIN_LPUART0_RTS_2 (PIN_ALT6 | PIN_PORTC | PIN9)
#define PIN_LPUART0_RX_1 (PIN_ALT2 | PIN_PORTB | PIN0)
#define PIN_LPUART0_RX_2 (PIN_ALT4 | PIN_PORTC | PIN2)
#define PIN_LPUART0_RX_3 (PIN_ALT6 | PIN_PORTA | PIN2)
#define PIN_LPUART0_TX_1 (PIN_ALT2 | PIN_PORTB | PIN1)
#define PIN_LPUART0_TX_2 (PIN_ALT4 | PIN_PORTC | PIN3)
#define PIN_LPUART0_TX_3 (PIN_ALT6 | PIN_PORTA | PIN3)
#define PIN_LPUART1_RTS (PIN_ALT6 | PIN_PORTA | PIN7)
#define PIN_LPUART1_RX_1 (PIN_ALT2 | PIN_PORTC | PIN6)
#define PIN_LPUART1_RX_2 (PIN_ALT2 | PIN_PORTC | PIN8)
#define PIN_LPUART1_TX_1 (PIN_ALT2 | PIN_PORTC | PIN7)
#define PIN_LPUART1_TX_2 (PIN_ALT2 | PIN_PORTC | PIN9)
/* NMI */
#define PIN_NMI (PIN_ALT7 | PIN_PORTD | PIN3)
/* GPIO */
#define PIN_PTA0 (PIN_ALT1 | PIN_PORTA | PIN0)
#define PIN_PTA1 (PIN_ALT1 | PIN_PORTA | PIN1)
#define PIN_PTA2 (PIN_ALT1 | PIN_PORTA | PIN2)
#define PIN_PTA3 (PIN_ALT1 | PIN_PORTA | PIN3)
#define PIN_PTA4 (PIN_ALT1 | PIN_PORTA | PIN4)
#define PIN_PTA5 (PIN_ALT1 | PIN_PORTA | PIN5)
#define PIN_PTA7 (PIN_ALT1 | PIN_PORTA | PIN7)
#define PIN_PTA10 (PIN_ALT1 | PIN_PORTA | PIN10)
#define PIN_PTA11 (PIN_ALT1 | PIN_PORTA | PIN11)
#define PIN_PTA12 (PIN_ALT1 | PIN_PORTA | PIN12)
#define PIN_PTA13 (PIN_ALT1 | PIN_PORTA | PIN13)
#define PIN_PTB0 (PIN_ALT1 | PIN_PORTB | PIN0)
#define PIN_PTB1 (PIN_ALT1 | PIN_PORTB | PIN1)
#define PIN_PTB2 (PIN_ALT1 | PIN_PORTB | PIN2)
#define PIN_PTB3 (PIN_ALT1 | PIN_PORTB | PIN3)
#define PIN_PTB4 (PIN_ALT1 | PIN_PORTB | PIN4)
#define PIN_PTB5 (PIN_ALT1 | PIN_PORTB | PIN5)
#define PIN_PTB6 (PIN_ALT1 | PIN_PORTB | PIN6)
#define PIN_PTB7 (PIN_ALT1 | PIN_PORTB | PIN7)
#define PIN_PTB13 (PIN_ALT1 | PIN_PORTB | PIN13)
#define PIN_PTC1 (PIN_ALT1 | PIN_PORTC | PIN1)
#define PIN_PTC2 (PIN_ALT1 | PIN_PORTC | PIN2)
#define PIN_PTC3 (PIN_ALT1 | PIN_PORTC | PIN3)
#define PIN_PTC4 (PIN_ALT1 | PIN_PORTC | PIN4)
#define PIN_PTC5 (PIN_ALT1 | PIN_PORTC | PIN5)
#define PIN_PTC6 (PIN_ALT1 | PIN_PORTC | PIN6)
#define PIN_PTC7 (PIN_ALT1 | PIN_PORTC | PIN7)
#define PIN_PTC8 (PIN_ALT1 | PIN_PORTC | PIN8)
#define PIN_PTC9 (PIN_ALT1 | PIN_PORTC | PIN9)
#define PIN_PTC14 (PIN_ALT1 | PIN_PORTC | PIN14)
#define PIN_PTC15 (PIN_ALT1 | PIN_PORTC | PIN15)
#define PIN_PTC16 (PIN_ALT1 | PIN_PORTC | PIN16)
#define PIN_PTD0 (PIN_ALT1 | PIN_PORTD | PIN0)
#define PIN_PTD1 (PIN_ALT1 | PIN_PORTD | PIN1)
#define PIN_PTD2 (PIN_ALT1 | PIN_PORTD | PIN2)
#define PIN_PTD3 (PIN_ALT1 | PIN_PORTD | PIN3)
#define PIN_PTD5 (PIN_ALT1 | PIN_PORTD | PIN5)
#define PIN_PTE4 (PIN_ALT1 | PIN_PORTE | PIN4)
#define PIN_PTE5 (PIN_ALT1 | PIN_PORTE | PIN5)
#define PIN_PTE8 (PIN_ALT1 | PIN_PORTE | PIN8)
#define PIN_PTE9 (PIN_ALT1 | PIN_PORTE | PIN9)
#define PIN_PTD15 (PIN_ALT1 | PIN_PORTD | PIN15)
#define PIN_PTD16 (PIN_ALT1 | PIN_PORTD | PIN16)
/* Reset */
#define PIN_RESET (PIN_ALT7 | PIN_PORTA | PIN5)
/* RTC */
#define PIN_RTC_CLKIN (PIN_ALT4 | PIN_PORTA | PIN7)
#define PIN_RTC_CLKOUT_1 (PIN_ALT3 | PIN_PORTC | PIN4)
#define PIN_RTC_CLKOUT_2 (PIN_ALT3 | PIN_PORTC | PIN5)
/* SWD */
#define PIN_SWD_CLK (PIN_ALT7 | PIN_PORTC | PIN4)
#define PIN_SWD_DIO (PIN_ALT7 | PIN_PORTA | PIN4)
/* Test Clock Input (TCLK) */
#define PIN_TCLK0 (PIN_ALT4 | PIN_PORTB | PIN1)
#define PIN_TCLK1 (PIN_ALT3 | PIN_PORTA | PIN5)
#define PIN_TCLK2 (PIN_ALT2 | PIN_PORTE | PIN5)
/* Trigger Mux Control (TRGMUX) */
#define PIN_TRGMUX_IN0 (PIN_ALT6 | PIN_PORTB | PIN5)
#define PIN_TRGMUX_IN1 (PIN_ALT6 | PIN_PORTB | PIN4)
#define PIN_TRGMUX_IN2 (PIN_ALT6 | PIN_PORTB | PIN3)
#define PIN_TRGMUX_IN3 (PIN_ALT6 | PIN_PORTB | PIN2)
#define PIN_TRGMUX_IN4 (PIN_ALT6 | PIN_PORTD | PIN3)
#define PIN_TRGMUX_IN5 (PIN_ALT6 | PIN_PORTD | PIN2)
#define PIN_TRGMUX_IN7 (PIN_ALT6 | PIN_PORTD | PIN5)
#define PIN_TRGMUX_IN8 (PIN_ALT6 | PIN_PORTC | PIN15)
#define PIN_TRGMUX_IN9 (PIN_ALT6 | PIN_PORTC | PIN14)
#define PIN_TRGMUX_OUT0 (PIN_ALT7 | PIN_PORTA | PIN1)
#define PIN_TRGMUX_OUT1 (PIN_ALT7 | PIN_PORTD | PIN0)
#define PIN_TRGMUX_OUT2 (PIN_ALT7 | PIN_PORTD | PIN1)
#define PIN_TRGMUX_OUT3 (PIN_ALT7 | PIN_PORTA | PIN0)
/* External Crystal */
#define PIN_EXTAL (PIN_ANALOG | PIN_PORTB | PIN7)
#define PIN_XTAL (PIN_ANALOG | PIN_PORTB | PIN6)
#endif /* __ARCH_ARM_SRC_S32K1XX_HARDWARE_S32K116_PINMUX_H */
arch/arm/src/s32k1xx/hardware/s32k118_pinmux.h
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/********************************************************************************************
* arch/arm/src/s32k1xx/hardware/s32k118_pinmux.h
*
* Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_S32K1XX_HARDWARE_S32K118_PINMUX_H
#define __ARCH_ARM_SRC_S32K1XX_HARDWARE_S32K118_PINMUX_H
/********************************************************************************************
* Included Files
********************************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/********************************************************************************************
* Pre-processor Definitions
********************************************************************************************/
/* In most cases, there are alternative configurations for various pins. Those alternative
* pins are labeled with a suffix like _1, _2, etc. in order to distinguish them. Logic in
* the board.h file must select the correct pin configuration for the board by defining a pin
* configuration (with no suffix) that maps to the correct alternative.
*
* WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!! WARNING!!!
* Additional effort is required to select specific GPIO options such as frequency,
* and pull-up/down! Just the basics are defined for most pins in the initial version of
* this file.
*/
/* ADC */
#define PIN_ADC0_SE0 (PIN_ANALOG | PIN_PORTA | PIN0)
#define PIN_ADC0_SE1 (PIN_ANALOG | PIN_PORTA | PIN1)
#define PIN_ADC0_SE2 (PIN_ANALOG | PIN_PORTA | PIN6)
#define PIN_ADC0_SE3 (PIN_ANALOG | PIN_PORTA | PIN7)
#define PIN_ADC0_SE4 (PIN_ANALOG | PIN_PORTB | PIN0)
#define PIN_ADC0_SE5 (PIN_ANALOG | PIN_PORTB | PIN1)
#define PIN_ADC0_SE6 (PIN_ANALOG | PIN_PORTB | PIN2)
#define PIN_ADC0_SE7 (PIN_ANALOG | PIN_PORTB | PIN3)
#define PIN_ADC0_SE8 (PIN_ANALOG | PIN_PORTC | PIN0)
#define PIN_ADC0_SE9 (PIN_ANALOG | PIN_PORTC | PIN1)
#define PIN_ADC0_SE10 (PIN_ANALOG | PIN_PORTC | PIN2)
#define PIN_ADC0_SE11 (PIN_ANALOG | PIN_PORTC | PIN3)
#define PIN_ADC0_SE12 (PIN_ANALOG | PIN_PORTC | PIN14)
#define PIN_ADC0_SE13 (PIN_ANALOG | PIN_PORTC | PIN15)
#define PIN_ADC0_SE14 (PIN_ANALOG | PIN_PORTC | PIN16)
#define PIN_ADC0_SE15 (PIN_ANALOG | PIN_PORTC | PIN17)
/* CAN */
#define PIN_CAN0_RX_1 (PIN_ALT3 | PIN_PORTC | PIN2)
#define PIN_CAN0_RX_2 (PIN_ALT5 | PIN_PORTB | PIN0)
#define PIN_CAN0_RX_3 (PIN_ALT5 | PIN_PORTE | PIN4)
#define PIN_CAN0_TX_1 (PIN_ALT3 | PIN_PORTC | PIN3)
#define PIN_CAN0_TX_2 (PIN_ALT5 | PIN_PORTB | PIN1)
#define PIN_CAN0_TX_3 (PIN_ALT5 | PIN_PORTE | PIN5)
/* Output clock */
#define PIN_CLKOUT_1 (PIN_ALT2 | PIN_PORTE | PIN10)
#define PIN_CLKOUT_2 (PIN_ALT5 | PIN_PORTB | PIN5)
/* Comparators */
#define PIN_CMP0_IN0 (PIN_ANALOG | PIN_PORTA | PIN0)
#define PIN_CMP0_IN1 (PIN_ANALOG | PIN_PORTA | PIN1)
#define PIN_CMP0_IN2 (PIN_ANALOG | PIN_PORTC | PIN4)
#define PIN_CMP0_IN3 (PIN_ANALOG | PIN_PORTE | PIN8)
#define PIN_CMP0_IN4 (PIN_ANALOG | PIN_PORTC | PIN3)
#define PIN_CMP0_IN5 (PIN_ANALOG | PIN_PORTC | PIN2)
#define PIN_CMP0_IN6 (PIN_ANALOG | PIN_PORTD | PIN7)
#define PIN_CMP0_IN7 (PIN_ANALOG | PIN_PORTD | PIN6)
#define PIN_CMP0_OUT_1 (PIN_ALT4 | PIN_PORTA | PIN4)
#define PIN_CMP0_OUT_2 (PIN_ALT7 | PIN_PORTE | PIN3)
#define PIN_CMP0_RRT_1 (PIN_ALT5 | PIN_PORTA | PIN11)
#define PIN_CMP0_RRT_2 (PIN_ALT5 | PIN_PORTD | PIN16)
/* FlexTimer Module (FTM) */
#define PIN_FTM0_CH0_1 (PIN_ALT2 | PIN_PORTB | PIN12)
#define PIN_FTM0_CH0_2 (PIN_ALT2 | PIN_PORTC | PIN0)
#define PIN_FTM0_CH0_3 (PIN_ALT2 | PIN_PORTD | PIN15)
#define PIN_FTM0_CH1_1 (PIN_ALT2 | PIN_PORTB | PIN13)
#define PIN_FTM0_CH1_2 (PIN_ALT2 | PIN_PORTC | PIN1)
#define PIN_FTM0_CH1_3 (PIN_ALT2 | PIN_PORTD | PIN16)
#define PIN_FTM0_CH2_1 (PIN_ALT2 | PIN_PORTC | PIN2)
#define PIN_FTM0_CH2_2 (PIN_ALT2 | PIN_PORTD | PIN0)
#define PIN_FTM0_CH3_1 (PIN_ALT2 | PIN_PORTC | PIN3)
#define PIN_FTM0_CH3_2 (PIN_ALT2 | PIN_PORTD | PIN1)
#define PIN_FTM0_CH4 (PIN_ALT2 | PIN_PORTB | PIN4)
#define PIN_FTM0_CH5 (PIN_ALT2 | PIN_PORTB | PIN5)
#define PIN_FTM0_CH6 (PIN_ALT2 | PIN_PORTE | PIN8)
#define PIN_FTM0_CH7_1 (PIN_ALT2 | PIN_PORTE | PIN7)
#define PIN_FTM0_CH7_2 (PIN_ALT2 | PIN_PORTE | PIN9)
#define PIN_FTM0_FLT0 (PIN_ALT2 | PIN_PORTE | PIN3)
#define PIN_FTM0_FLT1 (PIN_ALT2 | PIN_PORTA | PIN6)
#define PIN_FTM0_FLT2 (PIN_ALT2 | PIN_PORTA | PIN7)
#define PIN_FTM0_FLT3 (PIN_ALT2 | PIN_PORTD | PIN4)
#define PIN_FTM1_CH0_1 (PIN_ALT2 | PIN_PORTB | PIN2)
#define PIN_FTM1_CH0_2 (PIN_ALT2 | PIN_PORTC | PIN4)
#define PIN_FTM1_CH1_1 (PIN_ALT2 | PIN_PORTA | PIN1)
#define PIN_FTM1_CH1_2 (PIN_ALT2 | PIN_PORTB | PIN3)
#define PIN_FTM1_CH2 (PIN_ALT2 | PIN_PORTC | PIN14)
#define PIN_FTM1_CH3 (PIN_ALT2 | PIN_PORTC | PIN15)
#define PIN_FTM1_CH4 (PIN_ALT2 | PIN_PORTA | PIN10)
#define PIN_FTM1_CH5 (PIN_ALT2 | PIN_PORTA | PIN11)
#define PIN_FTM1_CH6_1 (PIN_ALT2 | PIN_PORTA | PIN12)
#define PIN_FTM1_CH6_2 (PIN_ALT6 | PIN_PORTC | PIN0)
#define PIN_FTM1_CH7_1 (PIN_ALT2 | PIN_PORTA | PIN13)
#define PIN_FTM1_CH7_2 (PIN_ALT6 | PIN_PORTC | PIN1)
#define PIN_FTM1_FLT0 (PIN_ALT3 | PIN_PORTC | PIN8)
#define PIN_FTM1_FLT1_1 (PIN_ALT3 | PIN_PORTC | PIN9)
#define PIN_FTM1_FLT1_2 (PIN_ALT6 | PIN_PORTE | PIN1)
#define PIN_FTM1_FLT2_1 (PIN_ALT2 | PIN_PORTC | PIN16)
#define PIN_FTM1_FLT2_2 (PIN_ALT6 | PIN_PORTE | PIN0)
#define PIN_FTM1_FLT3 (PIN_ALT2 | PIN_PORTC | PIN17)
#define PIN_FTM1_QD_PHA_1 (PIN_ALT4 | PIN_PORTB | PIN3)
#define PIN_FTM1_QD_PHA_2 (PIN_ALT5 | PIN_PORTA | PIN1)
#define PIN_FTM1_QD_PHA_3 (PIN_ALT6 | PIN_PORTC | PIN7)
#define PIN_FTM1_QD_PHB_1 (PIN_ALT4 | PIN_PORTB | PIN2)
#define PIN_FTM1_QD_PHB_2 (PIN_ALT6 | PIN_PORTC | PIN4)
#define PIN_FTM1_QD_PHB_3 (PIN_ALT6 | PIN_PORTC | PIN6)
/* FlexIO */
#define PIN_FXIO_D0_1 (PIN_ALT4 | PIN_PORTA | PIN10)
#define PIN_FXIO_D0_2 (PIN_ALT6 | PIN_PORTD | PIN0)
#define PIN_FXIO_D1_1 (PIN_ALT4 | PIN_PORTA | PIN11)
#define PIN_FXIO_D1_2 (PIN_ALT6 | PIN_PORTD | PIN1)
#define PIN_FXIO_D2 (PIN_ALT4 | PIN_PORTA | PIN0)
#define PIN_FXIO_D3 (PIN_ALT4 | PIN_PORTA | PIN1)
#define PIN_FXIO_D4_1 (PIN_ALT4 | PIN_PORTD | PIN2)
#define PIN_FXIO_D4_2 (PIN_ALT5 | PIN_PORTA | PIN2)
#define PIN_FXIO_D4_3 (PIN_ALT6 | PIN_PORTE | PIN10)
#define PIN_FXIO_D5_1 (PIN_ALT4 | PIN_PORTD | PIN3)
#define PIN_FXIO_D5_2 (PIN_ALT5 | PIN_PORTA | PIN3)
#define PIN_FXIO_D5_3 (PIN_ALT6 | PIN_PORTE | PIN11)
#define PIN_FXIO_D6_1 (PIN_ALT5 | PIN_PORTD | PIN2)
#define PIN_FXIO_D6_2 (PIN_ALT6 | PIN_PORTE | PIN4)
#define PIN_FXIO_D7_1 (PIN_ALT5 | PIN_PORTD | PIN3)
#define PIN_FXIO_D7_2 (PIN_ALT6 | PIN_PORTE | PIN5)
/* JTAG */
#define PIN_JTAG_TCLK (PIN_ALT7 | PIN_PORTC | PIN4)
#define PIN_JTAG_TDI (PIN_ALT7 | PIN_PORTC | PIN5)
#define PIN_JTAG_TDO (PIN_ALT7 | PIN_PORTA | PIN10)
#define PIN_JTAG_TMS (PIN_ALT7 | PIN_PORTA | PIN4)
/* LPI2C */
#define PIN_LPI2C0_HREQ (PIN_ALT3 | PIN_PORTE | PIN1)
#define PIN_LPI2C0_SCL_1 (PIN_ALT2 | PIN_PORTB | PIN7)
#define PIN_LPI2C0_SCL_2 (PIN_ALT3 | PIN_PORTA | PIN3)
#define PIN_LPI2C0_SCLS (PIN_ALT3 | PIN_PORTA | PIN0)
#define PIN_LPI2C0_SDA_1 (PIN_ALT2 | PIN_PORTB | PIN6)
#define PIN_LPI2C0_SDA_2 (PIN_ALT3 | PIN_PORTA | PIN2)
#define PIN_LPI2C0_SDAS (PIN_ALT3 | PIN_PORTA | PIN1)
#define PIN_LPSPI0_PCS0_1 (PIN_ALT3 | PIN_PORTB | PIN0)
#define PIN_LPSPI0_PCS0_2 (PIN_ALT4 | PIN_PORTB | PIN5)
#define PIN_LPSPI0_PCS1 (PIN_ALT3 | PIN_PORTB | PIN5)
#define PIN_LPSPI0_PCS2 (PIN_ALT2 | PIN_PORTE | PIN6)
#define PIN_LPSPI0_SCK_1 (PIN_ALT2 | PIN_PORTE | PIN0)
#define PIN_LPSPI0_SCK_2 (PIN_ALT3 | PIN_PORTB | PIN2)
#define PIN_LPSPI0_SCK (PIN_ALT4 | PIN_PORTD | PIN15)
#define PIN_LPSPI0_SIN_1 (PIN_ALT2 | PIN_PORTE | PIN1)
#define PIN_LPSPI0_SIN_2 (PIN_ALT3 | PIN_PORTB | PIN3)
#define PIN_LPSPI0_SIN_3 (PIN_ALT4 | PIN_PORTD | PIN16)
#define PIN_LPSPI0_SOUT_1 (PIN_ALT2 | PIN_PORTE | PIN2)
#define PIN_LPSPI0_SOUT_2 (PIN_ALT3 | PIN_PORTB | PIN1)
#define PIN_LPSPI0_SOUT_3 (PIN_ALT3 | PIN_PORTB | PIN4)
#define PIN_LPSPI1_PCS0_1 (PIN_ALT3 | PIN_PORTD | PIN3)
#define PIN_LPSPI1_PCS0_2 (PIN_ALT5 | PIN_PORTE | PIN1)
#define PIN_LPSPI1_PCS1 (PIN_ALT3 | PIN_PORTA | PIN6)
#define PIN_LPSPI1_SCK (PIN_ALT3 | PIN_PORTD | PIN0)
#define PIN_LPSPI1_SIN (PIN_ALT3 | PIN_PORTD | PIN1)
#define PIN_LPSPI1_SOUT_1 (PIN_ALT3 | PIN_PORTD | PIN2)
#define PIN_LPSPI1_SOUT_2 (PIN_ALT5 | PIN_PORTE | PIN0)
/* LPTimer */
#define PIN_LPTMR0_ALT1 (PIN_ALT3 | PIN_PORTE | PIN11)
#define PIN_LPTMR0_ALT2 (PIN_ALT3 | PIN_PORTD | PIN5)
#define PIN_LPTMR0_ALT3_1 (PIN_ALT3 | PIN_PORTE | PIN2)
#define PIN_LPTMR0_ALT3_2 (PIN_ALT4 | PIN_PORTB | PIN0)
/* LPUART */
#define PIN_LPUART0_CTS_1 (PIN_ALT6 | PIN_PORTA | PIN0)
#define PIN_LPUART0_CTS_2 (PIN_ALT6 | PIN_PORTC | PIN8)
#define PIN_LPUART0_RTS_1 (PIN_ALT6 | PIN_PORTA | PIN1)
#define PIN_LPUART0_RTS_2 (PIN_ALT6 | PIN_PORTC | PIN9)
#define PIN_LPUART0_RX_1 (PIN_ALT2 | PIN_PORTB | PIN0)
#define PIN_LPUART0_RX_2 (PIN_ALT4 | PIN_PORTC | PIN2)
#define PIN_LPUART0_RX_3 (PIN_ALT6 | PIN_PORTA | PIN2)
#define PIN_LPUART0_TX_1 (PIN_ALT2 | PIN_PORTB | PIN1)
#define PIN_LPUART0_TX_2 (PIN_ALT4 | PIN_PORTC | PIN3)
#define PIN_LPUART0_TX_3 (PIN_ALT6 | PIN_PORTA | PIN3)
#define PIN_LPUART1_CTS_1 (PIN_ALT6 | PIN_PORTA | PIN6)
#define PIN_LPUART1_CTS_2 (PIN_ALT6 | PIN_PORTE | PIN2)
#define PIN_LPUART1_RTS_1 (PIN_ALT6 | PIN_PORTA | PIN7)
#define PIN_LPUART1_RTS_2 (PIN_ALT6 | PIN_PORTE | PIN6)
#define PIN_LPUART1_RX_1 (PIN_ALT2 | PIN_PORTC | PIN6)
#define PIN_LPUART1_RX_2 (PIN_ALT2 | PIN_PORTC | PIN8)
#define PIN_LPUART1_TX_1 (PIN_ALT2 | PIN_PORTC | PIN7)
#define PIN_LPUART1_TX_2 (PIN_ALT2 | PIN_PORTC | PIN9)
/* NMI */
#define PIN_NMI (PIN_ALT7 | PIN_PORTD | PIN3)
/* GPIO */
#define PIN_PTA0 (PIN_ALT1 | PIN_PORTA | PIN0)
#define PIN_PTA1 (PIN_ALT1 | PIN_PORTA | PIN1)
#define PIN_PTA2 (PIN_ALT1 | PIN_PORTA | PIN2)
#define PIN_PTA3 (PIN_ALT1 | PIN_PORTA | PIN3)
#define PIN_PTA4 (PIN_ALT1 | PIN_PORTA | PIN4)
#define PIN_PTA5 (PIN_ALT1 | PIN_PORTA | PIN5)
#define PIN_PTA6 (PIN_ALT1 | PIN_PORTA | PIN6)
#define PIN_PTA7 (PIN_ALT1 | PIN_PORTA | PIN7)
#define PIN_PTA10 (PIN_ALT1 | PIN_PORTA | PIN10)
#define PIN_PTA11 (PIN_ALT1 | PIN_PORTA | PIN11)
#define PIN_PTA12 (PIN_ALT1 | PIN_PORTA | PIN12)
#define PIN_PTA13 (PIN_ALT1 | PIN_PORTA | PIN13)
#define PIN_PTB0 (PIN_ALT1 | PIN_PORTB | PIN0)
#define PIN_PTB1 (PIN_ALT1 | PIN_PORTB | PIN1)
#define PIN_PTB2 (PIN_ALT1 | PIN_PORTB | PIN2)
#define PIN_PTB3 (PIN_ALT1 | PIN_PORTB | PIN3)
#define PIN_PTB4 (PIN_ALT1 | PIN_PORTB | PIN4)
#define PIN_PTB5 (PIN_ALT1 | PIN_PORTB | PIN5)
#define PIN_PTB6 (PIN_ALT1 | PIN_PORTB | PIN6)
#define PIN_PTB7 (PIN_ALT1 | PIN_PORTB | PIN7)
#define PIN_PTB12 (PIN_ALT1 | PIN_PORTB | PIN12)
#define PIN_PTB13 (PIN_ALT1 | PIN_PORTB | PIN13)
#define PIN_PTC0 (PIN_ALT1 | PIN_PORTC | PIN0)
#define PIN_PTC1 (PIN_ALT1 | PIN_PORTC | PIN1)
#define PIN_PTC2 (PIN_ALT1 | PIN_PORTC | PIN2)
#define PIN_PTC3 (PIN_ALT1 | PIN_PORTC | PIN3)
#define PIN_PTC4 (PIN_ALT1 | PIN_PORTC | PIN4)
#define PIN_PTC5 (PIN_ALT1 | PIN_PORTC | PIN5)
#define PIN_PTC6 (PIN_ALT1 | PIN_PORTC | PIN6)
#define PIN_PTC7 (PIN_ALT1 | PIN_PORTC | PIN7)
#define PIN_PTC8 (PIN_ALT1 | PIN_PORTC | PIN8)
#define PIN_PTC9 (PIN_ALT1 | PIN_PORTC | PIN9)
#define PIN_PTC14 (PIN_ALT1 | PIN_PORTC | PIN14)
#define PIN_PTC15 (PIN_ALT1 | PIN_PORTC | PIN15)
#define PIN_PTC16 (PIN_ALT1 | PIN_PORTC | PIN16)
#define PIN_PTC17 (PIN_ALT1 | PIN_PORTC | PIN17)
#define PIN_PTD0 (PIN_ALT1 | PIN_PORTD | PIN0)
#define PIN_PTD1 (PIN_ALT1 | PIN_PORTD | PIN1)
#define PIN_PTD2 (PIN_ALT1 | PIN_PORTD | PIN2)
#define PIN_PTD3 (PIN_ALT1 | PIN_PORTD | PIN3)
#define PIN_PTD4 (PIN_ALT1 | PIN_PORTD | PIN4)
#define PIN_PTD5 (PIN_ALT1 | PIN_PORTD | PIN5)
#define PIN_PTD6 (PIN_ALT1 | PIN_PORTD | PIN6)
#define PIN_PTD7 (PIN_ALT1 | PIN_PORTD | PIN7)
#define PIN_PTD15 (PIN_ALT1 | PIN_PORTD | PIN15)
#define PIN_PTD16 (PIN_ALT1 | PIN_PORTD | PIN16)
#define PIN_PTE0 (PIN_ALT1 | PIN_PORTE | PIN0)
#define PIN_PTE1 (PIN_ALT1 | PIN_PORTE | PIN1)
#define PIN_PTE2 (PIN_ALT1 | PIN_PORTE | PIN2)
#define PIN_PTE3 (PIN_ALT1 | PIN_PORTE | PIN3)
#define PIN_PTE4 (PIN_ALT1 | PIN_PORTE | PIN4)
#define PIN_PTE5 (PIN_ALT1 | PIN_PORTE | PIN5)
#define PIN_PTE6 (PIN_ALT1 | PIN_PORTE | PIN6)
#define PIN_PTE7 (PIN_ALT1 | PIN_PORTE | PIN7)
#define PIN_PTE8 (PIN_ALT1 | PIN_PORTE | PIN8)
#define PIN_PTE9 (PIN_ALT1 | PIN_PORTE | PIN9)
#define PIN_PTE10 (PIN_ALT1 | PIN_PORTE | PIN10)
#define PIN_PTE11 (PIN_ALT1 | PIN_PORTE | PIN11)
/* Reset */
#define PIN_RESET (PIN_ALT7 | PIN_PORTA | PIN5)
/* RTC */
#define PIN_RTC_CLKIN (PIN_ALT4 | PIN_PORTA | PIN7)
#define PIN_RTC_CLKOUT_1 (PIN_ALT3 | PIN_PORTC | PIN4)
#define PIN_RTC_CLKOUT_2 (PIN_ALT3 | PIN_PORTC | PIN5)
/* SWD */
#define PIN_SWD_CLK (PIN_ALT7 | PIN_PORTC | PIN4)
#define PIN_SWD_DIO (PIN_ALT7 | PIN_PORTA | PIN4)
/* Test Clock Input (TCLK) */
#define PIN_TCLK0 (PIN_ALT4 | PIN_PORTB | PIN1)
#define PIN_TCLK1_1 (PIN_ALT3 | PIN_PORTA | PIN5)
#define PIN_TCLK1_2 (PIN_ALT3 | PIN_PORTE | PIN0)
#define PIN_TCLK2 (PIN_ALT2 | PIN_PORTE | PIN5)
/* Trigger Mux Control (TRGMUX) */
#define PIN_TRGMUX_IN0 (PIN_ALT6 | PIN_PORTB | PIN5)
#define PIN_TRGMUX_IN1 (PIN_ALT6 | PIN_PORTB | PIN4)
#define PIN_TRGMUX_IN2 (PIN_ALT6 | PIN_PORTB | PIN3)
#define PIN_TRGMUX_IN3 (PIN_ALT6 | PIN_PORTB | PIN2)
#define PIN_TRGMUX_IN4 (PIN_ALT6 | PIN_PORTD | PIN3)
#define PIN_TRGMUX_IN5 (PIN_ALT6 | PIN_PORTD | PIN2)
#define PIN_TRGMUX_IN6 (PIN_ALT6 | PIN_PORTE | PIN3)
#define PIN_TRGMUX_IN7 (PIN_ALT6 | PIN_PORTD | PIN5)
#define PIN_TRGMUX_IN8 (PIN_ALT6 | PIN_PORTC | PIN15)
#define PIN_TRGMUX_IN9 (PIN_ALT6 | PIN_PORTC | PIN14)
#define PIN_TRGMUX_OUT0 (PIN_ALT7 | PIN_PORTA | PIN1)
#define PIN_TRGMUX_OUT1 (PIN_ALT7 | PIN_PORTD | PIN0)
#define PIN_TRGMUX_OUT2 (PIN_ALT7 | PIN_PORTD | PIN1)
#define PIN_TRGMUX_OUT3 (PIN_ALT7 | PIN_PORTA | PIN0)
#define PIN_TRGMUX_OUT4 (PIN_ALT7 | PIN_PORTE | PIN10)
#define PIN_TRGMUX_OUT5 (PIN_ALT7 | PIN_PORTE | PIN11)
/* External Crystal */
#define PIN_EXTAL (PIN_ANALOG | PIN_PORTB | PIN7)
#define PIN_XTAL (PIN_ANALOG | PIN_PORTB | PIN6)
#endif /* __ARCH_ARM_SRC_S32K1XX_HARDWARE_S32K118_PINMUX_H */
arch/arm/src/s32k1xx/hardware/s32k142_pinmux.h
+530
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File diff suppressed because it is too large Load Diff
arch/arm/src/s32k1xx/hardware/s32k144_pinmux.h
+561
View File
File diff suppressed because it is too large Load Diff
arch/arm/src/s32k1xx/hardware/s32k146_pinmux.h
+680
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File diff suppressed because it is too large Load Diff
arch/arm/src/s32k1xx/hardware/s32k148_pinmux.h
+908
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File diff suppressed because it is too large Load Diff
arch/arm/src/s32k1xx/hardware/s32k1xx_pinmux.h
+1 -6
View File
@@ -44,11 +44,7 @@
#include "chip.h"
#warning REVISIT
#if 0 /* Need pin multiplexing files */
/* This file is just a wrapper around pin muxing header files for the S32K1xx family selected
* by the logic in chip.h.
*/
/* This file is just a wrapper around pin muxing header files for the select S32K1xx family. */
#if defined(CONFIG_ARCH_CHIP_S32K116)
# include "hardware/s32k116_pinmux.h"
@@ -65,7 +61,6 @@
#else
# error "No pin multiplexing for this S32K1xx part"
#endif
#endif
/********************************************************************************************
* Pre-processor Definitions
arch/arm/src/s32k1xx/s32k1xx_lowputc.c
+12 -12
View File
@@ -131,14 +131,14 @@ void s32k1xx_lowsetup(void)
* control is enabled.
*/
(void)s32k1xx_pinconfig(GPIO_LPUART0_RX);
(void)s32k1xx_pinconfig(GPIO_LPUART0_TX);
(void)s32k1xx_pinconfig(PIN_LPUART0_RX);
(void)s32k1xx_pinconfig(PIN_LPUART0_TX);
#ifdef CONFIG_LPUART0_OFLOWCONTROL
(void)s32k1xx_pinconfig(GPIO_LPUART0_CTS);
(void)s32k1xx_pinconfig(PIN_LPUART0_CTS);
#endif
#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART0_RS485RTSCONTROL)) || \
(defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_LPUART0_IFLOWCONTROL)))
(void)s32k1xx_pinconfig(GPIO_LPUART0_RTS);
(void)s32k1xx_pinconfig(PIN_LPUART0_RTS);
#endif
#endif
@@ -148,14 +148,14 @@ void s32k1xx_lowsetup(void)
* control is enabled.
*/
(void)s32k1xx_pinconfig(GPIO_LPUART1_RX);
(void)s32k1xx_pinconfig(GPIO_LPUART1_TX);
(void)s32k1xx_pinconfig(PIN_LPUART1_RX);
(void)s32k1xx_pinconfig(PIN_LPUART1_TX);
#ifdef CONFIG_LPUART1_OFLOWCONTROL
(void)s32k1xx_pinconfig(GPIO_LPUART1_CTS);
(void)s32k1xx_pinconfig(PIN_LPUART1_CTS);
#endif
#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART1_RS485RTSCONTROL)) || \
(defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_LPUART1_IFLOWCONTROL)))
(void)s32k1xx_pinconfig(GPIO_LPUART1_RTS);
(void)s32k1xx_pinconfig(PIN_LPUART1_RTS);
#endif
#endif
@@ -165,14 +165,14 @@ void s32k1xx_lowsetup(void)
* control is enabled.
*/
(void)s32k1xx_pinconfig(GPIO_LPUART2_RX);
(void)s32k1xx_pinconfig(GPIO_LPUART2_TX);
(void)s32k1xx_pinconfig(PIN_LPUART2_RX);
(void)s32k1xx_pinconfig(PIN_LPUART2_TX);
#ifdef CONFIG_LPUART2_OFLOWCONTROL
(void)s32k1xx_pinconfig(GPIO_LPUART2_CTS);
(void)s32k1xx_pinconfig(PIN_LPUART2_CTS);
#endif
#if ((defined(CONFIG_SERIAL_RS485CONTROL) && defined(CONFIG_LPUART2_RS485RTSCONTROL)) || \
(defined(CONFIG_SERIAL_IFLOWCONTROL) && defined(CONFIG_LPUART2_IFLOWCONTROL)))
(void)s32k1xx_pinconfig(GPIO_LPUART2_RTS);
(void)s32k1xx_pinconfig(PIN_LPUART2_RTS);
#endif
#endif
arch/arm/src/s32k1xx/s32k1xx_pin.c
+17 -19
View File
@@ -107,7 +107,6 @@ int s32k1xx_pinconfig(uint32_t cfgset)
regval = (mode << PORT_PCR_MUX_SHIFT);
if ((cfgset & _PIN_IO_MASK) == _PIN_INPUT)
{
/* Handle input-only digital options */
/* Check for pull-up or pull-down */
if ((cfgset & _PIN_INPUT_PULLMASK) == _PIN_INPUT_PULLDOWN)
@@ -121,24 +120,6 @@ int s32k1xx_pinconfig(uint32_t cfgset)
}
else
{
/* Handle output-only digital options */
/* Check for slow slew rate setting */
#warning REVISIT
#if 0 /* REVISIT -- bits don't exist in the S32K1xx PCR */
if ((cfgset & _PIN_OUTPUT_SLEW_MASK) == _PIN_OUTPUT_SLOW)
{
regval |= PORT_PCR_SRE;
}
/* Check for open drain output */
if ((cfgset & _PIN_OUTPUT_OD_MASK) == _PIN_OUTPUT_OPENDRAIN)
{
regval |= PORT_PCR_ODE;
}
#endif
/* Check for high drive output */
if ((cfgset & _PIN_OUTPUT_DRIVE_MASK) == _PIN_OUTPUT_HIGHDRIVE)
@@ -173,8 +154,25 @@ int s32k1xx_pinconfig(uint32_t cfgset)
{
regval &= ~(1 << pin);
}
putreg32(regval, base + S32K1XX_PORT_DFER_OFFSET);
/* Check if we should disable each general-purpose pin from acting
* as an input
*/
regval = getreg32(base + S32K1XX_GPIO_PIDR_OFFSET);
if ((cfgset & PIN_DISABLE_INPUT) != 0)
{
regval |= (1 << pin);
}
else
{
regval &= ~(1 << pin);
}
putreg32(regval, base + S32K1XX_GPIO_PIDR_OFFSET);
/* Additional configuration for the case of Alternative 1 (GPIO) modes */
if (mode == PIN_MODE_GPIO)
arch/arm/src/s32k1xx/s32k1xx_pin.h
+148 -176
View File
@@ -69,147 +69,118 @@
* `------- oooo: options (may be combined)
*/
#define _PIN_MODE_SHIFT (25) /* Bits 25-27: Pin mode */
#define _PIN_MODE_MASK (7 << _PIN_MODE_SHIFT)
#define _PIN_OPTIONS_SHIFT (28) /* Bits 28-31: Pin mode options */
#define _PIN_OPTIONS_MASK (15 << _PIN_OPTIONS_SHIFT)
#define _PIN_MODE_SHIFT (25) /* Bits 25-27: Pin mode */
#define _PIN_MODE_MASK (7 << _PIN_MODE_SHIFT)
#define _PIN_OPTIONS_SHIFT (28) /* Bits 28-31: Pin mode options */
#define _PIN_OPTIONS_MASK (15 << _PIN_OPTIONS_SHIFT)
/* Port Modes */
/* Unshifted versions: */
#define PIN_MODE_ANALOG (0) /* 000 Pin Disabled (Analog) */
#define PIN_MODE_ALT1 (1) /* 001 Alternative 1 */
#define PIN_MODE_GPIO PIN_MODE_ALT1 /* 001 Alternative 1 (GPIO) */
#define PIN_MODE_ALT2 (2) /* 010 Alternative 2 */
#define PIN_MODE_ALT3 (3) /* 011 Alternative 3 */
#define PIN_MODE_ALT4 (4) /* 100 Alternative 4 */
#define PIN_MODE_ALT5 (5) /* 101 Alternative 5 */
#define PIN_MODE_ALT6 (6) /* 110 Alternative 6 */
#define PIN_MODE_ALT7 (7) /* 111 Alternative 7 */
#define PIN_MODE_ANALOG (0) /* 000 Pin Disabled (Analog) */
#define PIN_MODE_ALT1 (1) /* 001 Alternative 1 */
#define PIN_MODE_GPIO PIN_MODE_ALT1 /* 001 Alternative 1 (GPIO) */
#define PIN_MODE_ALT2 (2) /* 010 Alternative 2 */
#define PIN_MODE_ALT3 (3) /* 011 Alternative 3 */
#define PIN_MODE_ALT4 (4) /* 100 Alternative 4 */
#define PIN_MODE_ALT5 (5) /* 101 Alternative 5 */
#define PIN_MODE_ALT6 (6) /* 110 Alternative 6 */
#define PIN_MODE_ALT7 (7) /* 111 Alternative 7 */
/* Shifted versions: */
#define _PIN_MODE_ANALOG (0 << _PIN_MODE_SHIFT) /* 000 Pin Disabled (Analog) */
#define _PIN_MODE_ALT1 (1 << _PIN_MODE_SHIFT) /* 001 Alternative 1 */
#define _PIN_MODE_GPIO (1 << _PIN_MODE_SHIFT) /* 001 Alternative 1 (GPIO) */
#define _PIN_MODE_ALT2 (2 << _PIN_MODE_SHIFT) /* 010 Alternative 2 */
#define _PIN_MODE_ALT3 (3 << _PIN_MODE_SHIFT) /* 011 Alternative 3 */
#define _PIN_MODE_ALT4 (4 << _PIN_MODE_SHIFT) /* 100 Alternative 4 */
#define _PIN_MODE_ALT5 (5 << _PIN_MODE_SHIFT) /* 101 Alternative 5 */
#define _PIN_MODE_ALT6 (6 << _PIN_MODE_SHIFT) /* 110 Alternative 6 */
#define _PIN_MODE_ALT7 (7 << _PIN_MODE_SHIFT) /* 111 Alternative 7 */
#define _PIN_MODE_ANALOG (0 << _PIN_MODE_SHIFT) /* 000 Pin Disabled (Analog) */
#define _PIN_MODE_ALT1 (1 << _PIN_MODE_SHIFT) /* 001 Alternative 1 */
#define _PIN_MODE_GPIO (1 << _PIN_MODE_SHIFT) /* 001 Alternative 1 (GPIO) */
#define _PIN_MODE_ALT2 (2 << _PIN_MODE_SHIFT) /* 010 Alternative 2 */
#define _PIN_MODE_ALT3 (3 << _PIN_MODE_SHIFT) /* 011 Alternative 3 */
#define _PIN_MODE_ALT4 (4 << _PIN_MODE_SHIFT) /* 100 Alternative 4 */
#define _PIN_MODE_ALT5 (5 << _PIN_MODE_SHIFT) /* 101 Alternative 5 */
#define _PIN_MODE_ALT6 (6 << _PIN_MODE_SHIFT) /* 110 Alternative 6 */
#define _PIN_MODE_ALT7 (7 << _PIN_MODE_SHIFT) /* 111 Alternative 7 */
/* Options for all digital modes (Alternatives 1-7). None of the digital
* options apply if the analog mode is selected.
*/
#define _PIN_IO_MASK (1 << _PIN_OPTIONS_SHIFT) /* xxx1 Digital input/output mask */
#define _PIN_INPUT (0 << _PIN_OPTIONS_SHIFT) /* xxx0 Digital input */
#define _PIN_OUTPUT (1 << _PIN_OPTIONS_SHIFT) /* xxx1 Digital output */
#define _PIN_IO_MASK (1 << _PIN_OPTIONS_SHIFT) /* xxx1 Digital input/output mask */
#define _PIN_INPUT (0 << _PIN_OPTIONS_SHIFT) /* xxx0 Digital input */
#define _PIN_OUTPUT (1 << _PIN_OPTIONS_SHIFT) /* xxx1 Digital output */
#define _PIN_INPUT_PULLMASK (7 << _PIN_OPTIONS_SHIFT) /* x111 Mask for pull-up or -down bits */
#define _PIN_INPUT_PULLDOWN (2 << _PIN_OPTIONS_SHIFT) /* x010 Input with internal pull-down resistor */
#define _PIN_INPUT_PULLUP (6 << _PIN_OPTIONS_SHIFT) /* x110 Input with internal pull-up resistor */
#define _PIN_INPUT_PULLMASK (7 << _PIN_OPTIONS_SHIFT) /* x111 Mask for pull-up or -down bits */
# define _PIN_INPUT_PULLDOWN (2 << _PIN_OPTIONS_SHIFT) /* x010 Input with internal pull-down resistor */
# define _PIN_INPUT_PULLUP (6 << _PIN_OPTIONS_SHIFT) /* x110 Input with internal pull-up resistor */
#define _PIN_OUTPUT_SLEW_MASK (3 << _PIN_OPTIONS_SHIFT) /* xx11 Mask to test for slow slew rate */
#define _PIN_OUTPUT_FAST (1 << _PIN_OPTIONS_SHIFT) /* xx01 Output with fast slew rate */
#define _PIN_OUTPUT_SLOW (3 << _PIN_OPTIONS_SHIFT) /* xx11 Output with slow slew rate */
#define _PIN_OUTPUT_OD_MASK (5 << _PIN_OPTIONS_SHIFT) /* x1x1 Mask to test for open drain */
#define _PIN_OUTPUT_OPENDRAIN (5 << _PIN_OPTIONS_SHIFT) /* x1x1 Output with open drain enabled */
#define _PIN_OUTPUT_DRIVE_MASK (9 << _PIN_OPTIONS_SHIFT) /* 1xx1 Mask to test for high drive strengh */
#define _PIN_OUTPUT_LOWDRIVE (1 << _PIN_OPTIONS_SHIFT) /* 0xx1 Output with low drive strength */
#define _PIN_OUTPUT_HIGHDRIVE (9 << _PIN_OPTIONS_SHIFT) /* 1xx1 Output with high drive strength */
#define _PIN_OUTPUT_DRIVE_MASK (9 << _PIN_OPTIONS_SHIFT) /* 1xx1 Mask to test for high drive strengh */
# define _PIN_OUTPUT_LOWDRIVE (1 << _PIN_OPTIONS_SHIFT) /* 0xx1 Output with low drive strength */
# define _PIN_OUTPUT_HIGHDRIVE (9 << _PIN_OPTIONS_SHIFT) /* 1xx1 Output with high drive strength */
/* End-user pin modes and configurations. Notes: (1) None of the digital options
* are available for the analog mode, (2) digital settings may be combined (OR'ed)
* provided that input-only and output-only options are not intermixed.
*/
#define PIN_ANALOG _PIN_MODE_ANALOG
#define PIN_ANALOG _PIN_MODE_ANALOG
#define GPIO_INPUT (_PIN_MODE_GPIO | _PIN_INPUT)
#define GPIO_PULLDOWN (_PIN_MODE_GPIO | _PIN_INPUT_PULLDOWN)
#define GPIO_PULLUP (_PIN_MODE_GPIO | _PIN_INPUT_PULLUP)
#define GPIO_OUTPUT (_PIN_MODE_GPIO | _PIN_OUTPUT)
#define GPIO_FAST (_PIN_MODE_GPIO | _PIN_OUTPUT_FAST)
#define GPIO_SLOW (_PIN_MODE_GPIO | _PIN_OUTPUT_SLOW)
#define GPIO_OPENDRAIN (_PIN_MODE_GPIO | _PIN_OUTPUT_OPENDRAIN)
#define GPIO_LOWDRIVE (_PIN_MODE_GPIO | _PIN_OUTPUT_LOWDRIVE)
#define GPIO_HIGHDRIVE (_PIN_MODE_GPIO | _PIN_OUTPUT_HIGHDRIVE)
#define GPIO_INPUT (_PIN_MODE_GPIO | _PIN_INPUT)
#define GPIO_PULLDOWN (_PIN_MODE_GPIO | _PIN_INPUT_PULLDOWN)
#define GPIO_PULLUP (_PIN_MODE_GPIO | _PIN_INPUT_PULLUP)
#define GPIO_OUTPUT (_PIN_MODE_GPIO | _PIN_OUTPUT)
#define GPIO_LOWDRIVE (_PIN_MODE_GPIO | _PIN_OUTPUT_LOWDRIVE)
#define GPIO_HIGHDRIVE (_PIN_MODE_GPIO | _PIN_OUTPUT_HIGHDRIVE)
#define PIN_ALT1 _PIN_MODE_ALT1
#define PIN_ALT1_INPUT (_PIN_MODE_ALT1 | _PIN_INPUT)
#define PIN_ALT1_PULLDOWN (_PIN_MODE_ALT1 | _PIN_INPUT_PULLDOWN)
#define PIN_ALT1_PULLUP (_PIN_MODE_ALT1 | _PIN_INPUT_PULLUP)
#define PIN_ALT1_OUTPUT (_PIN_MODE_ALT1 | _PIN_OUTPUT)
#define PIN_ALT1_FAST (_PIN_MODE_ALT1 | _PIN_OUTPUT_FAST)
#define PIN_ALT1_SLOW (_PIN_MODE_ALT1 | _PIN_OUTPUT_SLOW)
#define PIN_ALT1_OPENDRAIN (_PIN_MODE_ALT1 | _PIN_OUTPUT_OPENDRAIN)
#define PIN_ALT1_LOWDRIVE (_PIN_MODE_ALT1 | _PIN_OUTPUT_LOWDRIVE)
#define PIN_ALT1_HIGHDRIVE (_PIN_MODE_ALT1 | _PIN_OUTPUT_HIGHDRIVE)
#define PIN_ALT1 _PIN_MODE_ALT1
#define PIN_ALT1_INPUT (_PIN_MODE_ALT1 | _PIN_INPUT)
#define PIN_ALT1_PULLDOWN (_PIN_MODE_ALT1 | _PIN_INPUT_PULLDOWN)
#define PIN_ALT1_PULLUP (_PIN_MODE_ALT1 | _PIN_INPUT_PULLUP)
#define PIN_ALT1_OUTPUT (_PIN_MODE_ALT1 | _PIN_OUTPUT)
#define PIN_ALT1_LOWDRIVE (_PIN_MODE_ALT1 | _PIN_OUTPUT_LOWDRIVE)
#define PIN_ALT1_HIGHDRIVE (_PIN_MODE_ALT1 | _PIN_OUTPUT_HIGHDRIVE)
#define PIN_ALT2 _PIN_MODE_ALT2
#define PIN_ALT2_INPUT (_PIN_MODE_ALT2 | _PIN_INPUT)
#define PIN_ALT2_PULLDOWN (_PIN_MODE_ALT2 | _PIN_INPUT_PULLDOWN)
#define PIN_ALT2_PULLUP (_PIN_MODE_ALT2 | _PIN_INPUT_PULLUP)
#define PIN_ALT2_OUTPUT (_PIN_MODE_ALT2 | _PIN_OUTPUT)
#define PIN_ALT2_FAST (_PIN_MODE_ALT2 | _PIN_OUTPUT_FAST)
#define PIN_ALT2_SLOW (_PIN_MODE_ALT2 | _PIN_OUTPUT_SLOW)
#define PIN_ALT2_OPENDRAIN (_PIN_MODE_ALT2 | _PIN_OUTPUT_OPENDRAIN)
#define PIN_ALT2_LOWDRIVE (_PIN_MODE_ALT2 | _PIN_OUTPUT_LOWDRIVE)
#define PIN_ALT2_HIGHDRIVE (_PIN_MODE_ALT2 | _PIN_OUTPUT_HIGHDRIVE)
#define PIN_ALT2 _PIN_MODE_ALT2
#define PIN_ALT2_INPUT (_PIN_MODE_ALT2 | _PIN_INPUT)
#define PIN_ALT2_PULLDOWN (_PIN_MODE_ALT2 | _PIN_INPUT_PULLDOWN)
#define PIN_ALT2_PULLUP (_PIN_MODE_ALT2 | _PIN_INPUT_PULLUP)
#define PIN_ALT2_OUTPUT (_PIN_MODE_ALT2 | _PIN_OUTPUT)
#define PIN_ALT2_LOWDRIVE (_PIN_MODE_ALT2 | _PIN_OUTPUT_LOWDRIVE)
#define PIN_ALT2_HIGHDRIVE (_PIN_MODE_ALT2 | _PIN_OUTPUT_HIGHDRIVE)
#define PIN_ALT3 _PIN_MODE_ALT3
#define PIN_ALT3_INPUT (_PIN_MODE_ALT3 | _PIN_INPUT)
#define PIN_ALT3_PULLDOWN (_PIN_MODE_ALT3 | _PIN_INPUT_PULLDOWN)
#define PIN_ALT3_PULLUP (_PIN_MODE_ALT3 | _PIN_INPUT_PULLUP)
#define PIN_ALT3_OUTPUT (_PIN_MODE_ALT3 | _PIN_OUTPUT)
#define PIN_ALT3_FAST (_PIN_MODE_ALT3 | _PIN_OUTPUT_FAST)
#define PIN_ALT3_SLOW (_PIN_MODE_ALT3 | _PIN_OUTPUT_SLOW)
#define PIN_ALT3_OPENDRAIN (_PIN_MODE_ALT3 | _PIN_OUTPUT_OPENDRAIN)
#define PIN_ALT3_LOWDRIVE (_PIN_MODE_ALT3 | _PIN_OUTPUT_LOWDRIVE)
#define PIN_ALT3_HIGHDRIVE (_PIN_MODE_ALT3 | _PIN_OUTPUT_HIGHDRIVE)
#define PIN_ALT3 _PIN_MODE_ALT3
#define PIN_ALT3_INPUT (_PIN_MODE_ALT3 | _PIN_INPUT)
#define PIN_ALT3_PULLDOWN (_PIN_MODE_ALT3 | _PIN_INPUT_PULLDOWN)
#define PIN_ALT3_PULLUP (_PIN_MODE_ALT3 | _PIN_INPUT_PULLUP)
#define PIN_ALT3_OUTPUT (_PIN_MODE_ALT3 | _PIN_OUTPUT)
#define PIN_ALT3_LOWDRIVE (_PIN_MODE_ALT3 | _PIN_OUTPUT_LOWDRIVE)
#define PIN_ALT3_HIGHDRIVE (_PIN_MODE_ALT3 | _PIN_OUTPUT_HIGHDRIVE)
#define PIN_ALT4 _PIN_MODE_ALT4
#define PIN_ALT4_INPUT (_PIN_MODE_ALT4 | _PIN_INPUT)
#define PIN_ALT4_PULLDOWN (_PIN_MODE_ALT4 | _PIN_INPUT_PULLDOWN)
#define PIN_ALT4_PULLUP (_PIN_MODE_ALT4 | _PIN_INPUT_PULLUP)
#define PIN_ALT4_OUTPUT (_PIN_MODE_ALT4 | _PIN_OUTPUT)
#define PIN_ALT4_FAST (_PIN_MODE_ALT4 | _PIN_OUTPUT_FAST)
#define PIN_ALT4_SLOW (_PIN_MODE_ALT4 | _PIN_OUTPUT_SLOW)
#define PIN_ALT4_OPENDRAIN (_PIN_MODE_ALT4 | _PIN_OUTPUT_OPENDRAIN)
#define PIN_ALT4_LOWDRIVE (_PIN_MODE_ALT4 | _PIN_OUTPUT_LOWDRIVE)
#define PIN_ALT4_HIGHDRIVE (_PIN_MODE_ALT4 | _PIN_OUTPUT_HIGHDRIVE)
#define PIN_ALT4 _PIN_MODE_ALT4
#define PIN_ALT4_INPUT (_PIN_MODE_ALT4 | _PIN_INPUT)
#define PIN_ALT4_PULLDOWN (_PIN_MODE_ALT4 | _PIN_INPUT_PULLDOWN)
#define PIN_ALT4_PULLUP (_PIN_MODE_ALT4 | _PIN_INPUT_PULLUP)
#define PIN_ALT4_OUTPUT (_PIN_MODE_ALT4 | _PIN_OUTPUT)
#define PIN_ALT4_LOWDRIVE (_PIN_MODE_ALT4 | _PIN_OUTPUT_LOWDRIVE)
#define PIN_ALT4_HIGHDRIVE (_PIN_MODE_ALT4 | _PIN_OUTPUT_HIGHDRIVE)
#define PIN_ALT5 _PIN_MODE_ALT5
#define PIN_ALT5_INPUT (_PIN_MODE_ALT5 | _PIN_INPUT)
#define PIN_ALT5_PULLDOWN (_PIN_MODE_ALT5 | _PIN_INPUT_PULLDOWN)
#define PIN_ALT5_PULLUP (_PIN_MODE_ALT5 | _PIN_INPUT_PULLUP)
#define PIN_ALT5_OUTPUT (_PIN_MODE_ALT5 | _PIN_OUTPUT)
#define PIN_ALT5_FAST (_PIN_MODE_ALT5 | _PIN_OUTPUT_FAST)
#define PIN_ALT5_SLOW (_PIN_MODE_ALT5 | _PIN_OUTPUT_SLOW)
#define PIN_ALT5_OPENDRAIN (_PIN_MODE_ALT5 | _PIN_OUTPUT_OPENDRAIN)
#define PIN_ALT5_LOWDRIVE (_PIN_MODE_ALT5 | _PIN_OUTPUT_LOWDRIVE)
#define PIN_ALT5_HIGHDRIVE (_PIN_MODE_ALT5 | _PIN_OUTPUT_HIGHDRIVE)
#define PIN_ALT5 _PIN_MODE_ALT5
#define PIN_ALT5_INPUT (_PIN_MODE_ALT5 | _PIN_INPUT)
#define PIN_ALT5_PULLDOWN (_PIN_MODE_ALT5 | _PIN_INPUT_PULLDOWN)
#define PIN_ALT5_PULLUP (_PIN_MODE_ALT5 | _PIN_INPUT_PULLUP)
#define PIN_ALT5_OUTPUT (_PIN_MODE_ALT5 | _PIN_OUTPUT)
#define PIN_ALT5_LOWDRIVE (_PIN_MODE_ALT5 | _PIN_OUTPUT_LOWDRIVE)
#define PIN_ALT5_HIGHDRIVE (_PIN_MODE_ALT5 | _PIN_OUTPUT_HIGHDRIVE)
#define PIN_ALT6 _PIN_MODE_ALT6
#define PIN_ALT6_INPUT (_PIN_MODE_ALT6 | _PIN_INPUT)
#define PIN_ALT6_PULLDOWN (_PIN_MODE_ALT6 | _PIN_INPUT_PULLDOWN)
#define PIN_ALT6_PULLUP (_PIN_MODE_ALT6 | _PIN_INPUT_PULLUP)
#define PIN_ALT6_OUTPUT (_PIN_MODE_ALT6 | _PIN_OUTPUT)
#define PIN_ALT6_FAST (_PIN_MODE_ALT6 | _PIN_OUTPUT_FAST)
#define PIN_ALT6_SLOW (_PIN_MODE_ALT6 | _PIN_OUTPUT_SLOW)
#define PIN_ALT6_OPENDRAIN (_PIN_MODE_ALT6 | _PIN_OUTPUT_OPENDRAIN)
#define PIN_ALT6_LOWDRIVE (_PIN_MODE_ALT6 | _PIN_OUTPUT_LOWDRIVE)
#define PIN_ALT6_HIGHDRIVE (_PIN_MODE_ALT6 | _PIN_OUTPUT_HIGHDRIVE)
#define PIN_ALT6 _PIN_MODE_ALT6
#define PIN_ALT6_INPUT (_PIN_MODE_ALT6 | _PIN_INPUT)
#define PIN_ALT6_PULLDOWN (_PIN_MODE_ALT6 | _PIN_INPUT_PULLDOWN)
#define PIN_ALT6_PULLUP (_PIN_MODE_ALT6 | _PIN_INPUT_PULLUP)
#define PIN_ALT6_OUTPUT (_PIN_MODE_ALT6 | _PIN_OUTPUT)
#define PIN_ALT6_LOWDRIVE (_PIN_MODE_ALT6 | _PIN_OUTPUT_LOWDRIVE)
#define PIN_ALT6_HIGHDRIVE (_PIN_MODE_ALT6 | _PIN_OUTPUT_HIGHDRIVE)
#define PIN_ALT7 _PIN_MODE_ALT7
#define PIN_ALT7_INPUT (_PIN_MODE_ALT7 | _PIN_INPUT)
#define PIN_ALT7_PULLDOWN (_PIN_MODE_ALT7 | _PIN_INPUT_PULLDOWN)
#define PIN_ALT7_PULLUP (_PIN_MODE_ALT7 | _PIN_INPUT_PULLUP)
#define PIN_ALT7_OUTPUT (_PIN_MODE_ALT7 | _PIN_OUTPUT)
#define PIN_ALT7_FAST (_PIN_MODE_ALT7 | _PIN_OUTPUT_FAST)
#define PIN_ALT7_SLOW (_PIN_MODE_ALT7 | _PIN_OUTPUT_SLOW)
#define PIN_ALT7_OPENDRAIN (_PIN_MODE_ALT7 | _PIN_OUTPUT_OPENDRAIN)
#define PIN_ALT7_LOWDRIVE (_PIN_MODE_ALT7 | _PIN_OUTPUT_LOWDRIVE)
#define PIN_ALT7_HIGHDRIVE (_PIN_MODE_ALT7 | _PIN_OUTPUT_HIGHDRIVE)
#define PIN_ALT7 _PIN_MODE_ALT7
#define PIN_ALT7_INPUT (_PIN_MODE_ALT7 | _PIN_INPUT)
#define PIN_ALT7_PULLDOWN (_PIN_MODE_ALT7 | _PIN_INPUT_PULLDOWN)
#define PIN_ALT7_PULLUP (_PIN_MODE_ALT7 | _PIN_INPUT_PULLUP)
#define PIN_ALT7_OUTPUT (_PIN_MODE_ALT7 | _PIN_OUTPUT)
#define PIN_ALT7_LOWDRIVE (_PIN_MODE_ALT7 | _PIN_OUTPUT_LOWDRIVE)
#define PIN_ALT7_HIGHDRIVE (_PIN_MODE_ALT7 | _PIN_OUTPUT_HIGHDRIVE)
/* The initial value for GPIO (Alternative 1 outputs):
*
@@ -219,8 +190,8 @@
* muxing modes.
*/
#define GPIO_OUTPUT_ONE (1 << 24) /* Bit 24: 1:Initial output value=1 */
#define GPIO_OUTPUT_ZERO (0) /* Bit 24: 0:Initial output value=0 */
#define GPIO_OUTPUT_ONE (1 << 24) /* Bit 24: 1:Initial output value=1 */
#define GPIO_OUTPUT_ZERO (0) /* Bit 24: 0:Initial output value=0 */
/* Five bits are used to incode DMA/interrupt options:
*
@@ -230,22 +201,22 @@
* (restricted to inputs).
*/
#define _PIN_INT_SHIFT (19)
#define _PIN_INT_MASK (31 << _PIN_INT_SHIFT)
#define _PIN_INT_SHIFT (19)
#define _PIN_INT_MASK (31 << _PIN_INT_SHIFT)
#define _PIN_INTDMA_MASK (3 << _PIN_INT_SHIFT)
#define _PIN_INTDMA_NONE (0 << _PIN_INT_SHIFT)
#define _PIN_DMA (1 << _PIN_INT_SHIFT)
#define _PIN_INTERRUPT (2 << _PIN_INT_SHIFT)
#define _PIN_INTDMA_MASK (3 << _PIN_INT_SHIFT)
#define _PIN_INTDMA_NONE (0 << _PIN_INT_SHIFT)
#define _PIN_DMA (1 << _PIN_INT_SHIFT)
#define _PIN_INTERRUPT (2 << _PIN_INT_SHIFT)
#define PIN_DMA_RISING (5 << _PIN_INT_SHIFT) /* 00101 DMA Request on rising edge */
#define PIN_DMA_FALLING (9 << _PIN_INT_SHIFT) /* 01001 DMA Request on falling edge */
#define PIN_DMA_BOTH (13 << _PIN_INT_SHIFT) /* 01101 DMA Request on either edge */
#define PIN_INT_ZERO (2 << _PIN_INT_SHIFT) /* 00010 Interrupt when logic zero */
#define PIN_INT_RISING (6 << _PIN_INT_SHIFT) /* 00110 Interrupt on rising edge */
#define PIN_INT_FALLING (10 << _PIN_INT_SHIFT) /* 01010 Interrupt on falling edge */
#define PIN_INT_BOTH (14 << _PIN_INT_SHIFT) /* 01110 Interrupt on either edge */
#define PIN_INT_ONE (18 << _PIN_INT_SHIFT) /* 10010 Interrupt when logic one */
#define PIN_DMA_RISING (5 << _PIN_INT_SHIFT) /* 00101 DMA Request on rising edge */
#define PIN_DMA_FALLING (9 << _PIN_INT_SHIFT) /* 01001 DMA Request on falling edge */
#define PIN_DMA_BOTH (13 << _PIN_INT_SHIFT) /* 01101 DMA Request on either edge */
#define PIN_INT_ZERO (2 << _PIN_INT_SHIFT) /* 00010 Interrupt when logic zero */
#define PIN_INT_RISING (6 << _PIN_INT_SHIFT) /* 00110 Interrupt on rising edge */
#define PIN_INT_FALLING (10 << _PIN_INT_SHIFT) /* 01010 Interrupt on falling edge */
#define PIN_INT_BOTH (14 << _PIN_INT_SHIFT) /* 01110 Interrupt on either edge */
#define PIN_INT_ONE (18 << _PIN_INT_SHIFT) /* 10010 Interrupt when logic one */
/* Two bits is used to enable the filter options:
*
@@ -255,64 +226,65 @@
* muxing modes.
*/
#define PIN_PASV_FILTER (1 << 18) /* Bit 18: Enable passive filter */
#define PIN_DIG_FILTER (1 << 17) /* Bit 17: Enable digital filter */
#define PIN_PASV_FILTER (1 << 18) /* Bit 18: Enable passive filter */
#define PIN_DIG_FILTER (1 << 17) /* Bit 17: Enable digital filter */
#define PIN_DISABLE_INPUT (1 << 16) /* Bit 16: Disable pin from acting as an input */
/* Three bits are used to define the port number:
*
* ---- ---- ---- ---- ---- -ppp ---- ----
*/
#define _PIN_PORT_SHIFT (8) /* Bits 8-10: port number */
#define _PIN_PORT_MASK (7 << _PIN_PORT_SHIFT)
#define _PIN_PORT_SHIFT (8) /* Bits 8-10: port number */
#define _PIN_PORT_MASK (7 << _PIN_PORT_SHIFT)
#define PIN_PORTA (S32K1XX_PORTA << _PIN_PORT_SHIFT)
#define PIN_PORTB (S32K1XX_PORTB << _PIN_PORT_SHIFT)
#define PIN_PORTC (S32K1XX_PORTC << _PIN_PORT_SHIFT)
#define PIN_PORTD (S32K1XX_PORTD << _PIN_PORT_SHIFT)
#define PIN_PORTE (S32K1XX_PORTE << _PIN_PORT_SHIFT)
#define PIN_PORTA (S32K1XX_PORTA << _PIN_PORT_SHIFT)
#define PIN_PORTB (S32K1XX_PORTB << _PIN_PORT_SHIFT)
#define PIN_PORTC (S32K1XX_PORTC << _PIN_PORT_SHIFT)
#define PIN_PORTD (S32K1XX_PORTD << _PIN_PORT_SHIFT)
#define PIN_PORTE (S32K1XX_PORTE << _PIN_PORT_SHIFT)
/* Five bits are used to define the pin number:
*
* ---- ---- ---- ---- ---- ---- ---b bbbb
*/
#define _PIN_SHIFT (0) /* Bits 0-4: port number */
#define _PIN_MASK (31 << _PIN_SHIFT)
#define _PIN_SHIFT (0) /* Bits 0-4: port number */
#define _PIN_MASK (31 << _PIN_SHIFT)
#define PIN(n) ((n) << _PIN_SHIFT)
#define PIN0 (0 << _PIN_SHIFT)
#define PIN1 (1 << _PIN_SHIFT)
#define PIN2 (2 << _PIN_SHIFT)
#define PIN3 (3 << _PIN_SHIFT)
#define PIN4 (4 << _PIN_SHIFT)
#define PIN5 (5 << _PIN_SHIFT)
#define PIN6 (6 << _PIN_SHIFT)
#define PIN7 (7 << _PIN_SHIFT)
#define PIN8 (8 << _PIN_SHIFT)
#define PIN9 (9 << _PIN_SHIFT)
#define PIN10 (10 << _PIN_SHIFT)
#define PIN11 (11 << _PIN_SHIFT)
#define PIN12 (12 << _PIN_SHIFT)
#define PIN13 (13 << _PIN_SHIFT)
#define PIN14 (14 << _PIN_SHIFT)
#define PIN15 (15 << _PIN_SHIFT)
#define PIN16 (16 << _PIN_SHIFT)
#define PIN17 (17 << _PIN_SHIFT)
#define PIN18 (18 << _PIN_SHIFT)
#define PIN19 (19 << _PIN_SHIFT)
#define PIN20 (20 << _PIN_SHIFT)
#define PIN21 (21 << _PIN_SHIFT)
#define PIN22 (22 << _PIN_SHIFT)
#define PIN23 (23 << _PIN_SHIFT)
#define PIN24 (24 << _PIN_SHIFT)
#define PIN25 (25 << _PIN_SHIFT)
#define PIN26 (26 << _PIN_SHIFT)
#define PIN27 (27 << _PIN_SHIFT)
#define PIN28 (28 << _PIN_SHIFT)
#define PIN29 (29 << _PIN_SHIFT)
#define PIN30 (30 << _PIN_SHIFT)
#define PIN31 (31 << _PIN_SHIFT)
#define PIN(n) ((n) << _PIN_SHIFT)
#define PIN0 (0 << _PIN_SHIFT)
#define PIN1 (1 << _PIN_SHIFT)
#define PIN2 (2 << _PIN_SHIFT)
#define PIN3 (3 << _PIN_SHIFT)
#define PIN4 (4 << _PIN_SHIFT)
#define PIN5 (5 << _PIN_SHIFT)
#define PIN6 (6 << _PIN_SHIFT)
#define PIN7 (7 << _PIN_SHIFT)
#define PIN8 (8 << _PIN_SHIFT)
#define PIN9 (9 << _PIN_SHIFT)
#define PIN10 (10 << _PIN_SHIFT)
#define PIN11 (11 << _PIN_SHIFT)
#define PIN12 (12 << _PIN_SHIFT)
#define PIN13 (13 << _PIN_SHIFT)
#define PIN14 (14 << _PIN_SHIFT)
#define PIN15 (15 << _PIN_SHIFT)
#define PIN16 (16 << _PIN_SHIFT)
#define PIN17 (17 << _PIN_SHIFT)
#define PIN18 (18 << _PIN_SHIFT)
#define PIN19 (19 << _PIN_SHIFT)
#define PIN20 (20 << _PIN_SHIFT)
#define PIN21 (21 << _PIN_SHIFT)
#define PIN22 (22 << _PIN_SHIFT)
#define PIN23 (23 << _PIN_SHIFT)
#define PIN24 (24 << _PIN_SHIFT)
#define PIN25 (25 << _PIN_SHIFT)
#define PIN26 (26 << _PIN_SHIFT)
#define PIN27 (27 << _PIN_SHIFT)
#define PIN28 (28 << _PIN_SHIFT)
#define PIN29 (29 << _PIN_SHIFT)
#define PIN30 (30 << _PIN_SHIFT)
#define PIN31 (31 << _PIN_SHIFT)
/************************************************************************************
* Inline Functions
boards/arm/s32k1xx/s32k118evb/README.txt
+14 -12
View File
@@ -50,18 +50,20 @@ LEDs and Buttons
the s32k118evb. The following definitions describe how NuttX controls the
LEDs:
======================+========+========+=========
RED GREEN BLUE
======================+========+========+=========
LED_STARTED OFF OFF OFF
LED_HEAPALLOCATE OFF OFF OFF
LED_IRQSENABLED OFF OFF OFF
LED_STACKCREATED OFF ON OFF
LED_INIRQ OFF N/C ON
LED_SIGNAL OFF N/C ON
LED_ASSERTION OFF N/C ON
LED_PANIC Flashing OFF N/C
======================+========+========+=========
==========================================+========+========+=========
RED GREEN BLUE
==========================================+========+========+=========
LED_STARTED NuttX has been started OFF OFF OFF
LED_HEAPALLOCATE Heap has been allocated OFF OFF ON
LED_IRQSENABLED Interrupts enabled OFF OFF ON
LED_STACKCREATED Idle stack created OFF ON OFF
LED_INIRQ In an interrupt (no change)
LED_SIGNAL In a signal handler (no change)
LED_ASSERTION An assertion failed (no change)
LED_PANIC The system has crashed FLASH OFF OFF
LED_IDLE S32K118EVN in sleep mode (no change)
==========================================+========+========+=========
Buttons
-------
boards/arm/s32k1xx/s32k118evb/include/board.h
+30 -16
View File
@@ -77,30 +77,36 @@
/* LED index values for use with board_userled() */
#define BOARD_RED 0
#define BOARD_BLUE 1
#define BOARD_GREEN 2
#define BOARD_NLEDS 3
#define BOARD_LED_R 0
#define BOARD_LED_G 1
#define BOARD_LED_B 2
#define BOARD_NLEDS 3
/* LED bits for use with board_userled_all() */
#define BOARD_REDLED_BIT (1 << BOARD_RED)
#define BOARD_GREENLED_BIT (1 << BOARD_BLUE)
#define BOARD_BLUELED_BIT (1 << BOARD_GREEN)
#define BOARD_LED_R_BIT (1 << BOARD_LED_R)
#define BOARD_LED_G_BIT (1 << BOARD_LED_G)
#define BOARD_LED_B_BIT (1 << BOARD_LED_B)
/* If CONFIG_ARCH_LEDs is defined, then NuttX will control the LEDs on board
* the s32k118evb. The following definitions describe how NuttX controls the
* LEDs:
*
*
* SYMBOL Meaning LED state
* RED GREEN BLUE
* ------------------- ---------------------------- -----------------
*/
/* RED GREEN BLUE */
#define LED_STARTED 0 /* OFF OFF OFF */
#define LED_HEAPALLOCATE 0 /* OFF OFF OFF */
#define LED_IRQSENABLED 0 /* OFF OFF OFF */
#define LED_STACKCREATED 1 /* OFF ON OFF */
#define LED_INIRQ 2 /* OFF N/C ON */
#define LED_SIGNAL 2 /* OFF N/C ON */
#define LED_ASSERTION 2 /* OFF N/C ON */
#define LED_PANIC 3 /* Flashing OFF N/C */
#define LED_STARTED 1 /* NuttX has been started OFF OFF OFF */
#define LED_HEAPALLOCATE 2 /* Heap has been allocated OFF OFF ON */
#define LED_IRQSENABLED 0 /* Interrupts enabled OFF OFF ON */
#define LED_STACKCREATED 3 /* Idle stack created OFF ON OFF */
#define LED_INIRQ 0 /* In an interrupt (no change) */
#define LED_SIGNAL 0 /* In a signal handler (no change) */
#define LED_ASSERTION 0 /* An assertion failed (no change) */
#define LED_PANIC 4 /* The system has crashed FLASH OFF OFF */
#undef LED_IDLE /* S32K118EVN in sleep mode (Not used) */
/* Button definitions *******************************************************/
@@ -119,6 +125,14 @@
/* Alternate function pin selections ****************************************/
/* By default, the serial console will be provided on the OpenSDA VCOM port:
*
* OpenSDA UART TX PTB1(LPUART0_TX)
* OpenSDA UART RX PTB0(LPUART0_RX)
*/
#define PIN_LPUART0_RX PIN_LPUART0_RX_1 /* PTB0 */
#define PIN_LPUART0_TX PIN_LPUART0_TX_1 /* PTB1 */
/* DMA Channel/Stream Selections ********************************************/
boards/arm/s32k1xx/s32k118evb/src/s32k118_autoleds.c
+74 -1
View File
@@ -32,6 +32,30 @@
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* The S32K118EVB has one RGB LED:
*
* RedLED PTD16 (FTM0CH1)
* GreenLED PTD15 (FTM0CH0)
* BlueLED PTE8 (FTM0CH6)
*
*
* If CONFIG_ARCH_LEDs is defined, then NuttX will control the LED on board
* the Freedom K66F. The following definitions describe how NuttX controls
* the LEDs:
*
* SYMBOL Meaning LED state
* RED GREEN BLUE
* ------------------- ----------------------- -----------------
* LED_STARTED NuttX has been started OFF OFF OFF
* LED_HEAPALLOCATE Heap has been allocated OFF OFF ON
* LED_IRQSENABLED Interrupts enabled OFF OFF ON
* LED_STACKCREATED Idle stack created OFF ON OFF
* LED_INIRQ In an interrupt (no change)
* LED_SIGNAL In a signal handler (no change)
* LED_ASSERTION An assertion failed (no change)
* LED_PANIC The system has crashed FLASH OFF OFF
* LED_IDLE K66 is in sleep mode (Optional, not used)
*/
/****************************************************************************
* Included Files
@@ -46,18 +70,28 @@
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "chip.h"
#include "up_arch.h"
#include "up_internal.h"
#include "s32k1xx_pin.h"
#include "s32k118evb.h"
#include <arch/board/board.h>
#ifdef CONFIG_ARCH_LEDS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Summary of all possible settings */
#define LED_NOCHANGE 0 /* LED_IRQSENABLED, LED_INIRQ, LED_SIGNAL, LED_ASSERTION */
#define LED_OFF_OFF_OFF 1 /* LED_STARTED */
#define LED_OFF_OFF_ON 2 /* LED_HEAPALLOCATE */
#define LED_OFF_ON_OFF 3 /* LED_STACKCREATED */
#define LED_ON_OFF_OFF 4 /* LED_PANIC */
/****************************************************************************
* Private Data
****************************************************************************/
@@ -77,6 +111,10 @@
void board_autoled_initialize(void)
{
/* Configure LED GPIOs for output */
s32k1xx_pinconfig(GPIO_LED_R);
s32k1xx_pinconfig(GPIO_LED_G);
s32k1xx_pinconfig(GPIO_LED_B);
}
/****************************************************************************
@@ -85,6 +123,35 @@ void board_autoled_initialize(void)
void board_autoled_on(int led)
{
if (led != LED_NOCHANGE)
{
bool redoff = true;
bool greenoff = true;
bool blueoff = true;
switch (led)
{
default:
case LED_OFF_OFF_OFF:
break;
case LED_OFF_OFF_ON:
blueoff = false;
break;
case LED_OFF_ON_OFF:
greenoff = false;
break;
case LED_ON_OFF_OFF:
redoff = false;
break;
}
s32k1xx_gpiowrite(GPIO_LED_R, redoff);
s32k1xx_gpiowrite(GPIO_LED_G, greenoff);
s32k1xx_gpiowrite(GPIO_LED_B, blueoff);
}
}
/****************************************************************************
@@ -93,6 +160,12 @@ void board_autoled_on(int led)
void board_autoled_off(int led)
{
if (led == LED_ON_OFF_OFF)
{
s32k1xx_gpiowrite(GPIO_LED_R, true);
s32k1xx_gpiowrite(GPIO_LED_G, true);
s32k1xx_gpiowrite(GPIO_LED_B, true);
}
}
#endif /* CONFIG_ARCH_LEDS */
boards/arm/s32k1xx/s32k118evb/src/s32k118_buttons.c
+57 -7
View File
@@ -32,6 +32,11 @@
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/* The S32K118EVB supports two buttons:
*
* SW2 PTD3
* SW3 PTD5
*/
/****************************************************************************
* Included Files
@@ -44,15 +49,13 @@
#include <nuttx/arch.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "s32k1xx_pin.h"
#include "s32k118evb.h"
#ifdef CONFIG_ARCH_BUTTONS
#include <arch/board/board.h>
/****************************************************************************
* Private Data
****************************************************************************/
#ifdef CONFIG_ARCH_BUTTONS
/****************************************************************************
* Public Functions
@@ -72,6 +75,9 @@
void board_button_initialize(void)
{
/* Configure the GPIO pins as interrupting inputs. */
s32k1xx_pinconfig(GPIO_SW2);
s32k1xx_pinconfig(GPIO_SW3);
}
/****************************************************************************
@@ -80,7 +86,19 @@ void board_button_initialize(void)
uint32_t board_buttons(void)
{
return 0;
uint32_t ret = 0;
if (s32k1xx_gpioread(GPIO_SW2))
{
ret |= BUTTON_SW2_BIT;
}
if (s32k1xx_gpioread(GPIO_SW3))
{
ret |= BUTTON_SW3_BIT;
}
return ret;
}
/************************************************************************************
@@ -108,7 +126,39 @@ uint32_t board_buttons(void)
#ifdef CONFIG_ARCH_IRQBUTTONS
int board_button_irq(int id, xcpt_t irqhandler, FAR void *arg)
{
return -ENOSYS;
uint32_t pinset;
int ret;
/* Map the button id to the GPIO bit set. */
if (id == BUTTON_SW2)
{
pinset = GPIO_SW2;
}
else if (id == BUTTON_SW3)
{
pinset = GPIO_SW3;
}
else
{
return -EINVAL;
}
/* The button has already been configured as an interrupting input (by
* board_button_initialize() above).
*
* Attach the new button handler.
*/
ret = s32k1xx_pinirqattach(pinset, irqhandler, NULL);
if (ret >= 0)
{
/* Then make sure that interrupts are enabled on the pin */
s32k1xx_pinirqenable(pinset);
}
return ret;
}
#endif
#endif /* CONFIG_ARCH_BUTTONS */
boards/arm/s32k1xx/s32k118evb/src/s32k118_userleds.c
+33 -18
View File
@@ -44,31 +44,17 @@
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
#include "up_arch.h"
#include "up_internal.h"
#include "s32k1xx_pin.h"
#include "s32k118evb.h"
#include <arch/board/board.h>
#ifndef CONFIG_ARCH_LEDS
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
@@ -79,7 +65,11 @@
void board_userled_initialize(void)
{
/* Configure LED GPIOs for output */
/* Configure LED GPIOs for output */
s32k1xx_pinconfig(GPIO_LED_R);
s32k1xx_pinconfig(GPIO_LED_G);
s32k1xx_pinconfig(GPIO_LED_B);
}
/****************************************************************************
@@ -88,6 +78,26 @@ void board_userled_initialize(void)
void board_userled(int led, bool ledon)
{
uint32_t ledcfg;
if (led == BOARD_LED_R)
{
ledcfg = GPIO_LED_R;
}
else if (led == BOARD_LED_G)
{
ledcfg = GPIO_LED_G;
}
else if (led == BOARD_LED_B)
{
ledcfg = GPIO_LED_B;
}
else
{
return;
}
s32k1xx_gpiowrite(ledcfg, !ledon); /* Low illuminates */
}
/****************************************************************************
@@ -96,6 +106,11 @@ void board_userled(int led, bool ledon)
void board_userled_all(uint8_t ledset)
{
/* Low illuminates */
s32k1xx_gpiowrite(GPIO_LED_R, (ledset & BOARD_LED_R_BIT) == 0);
s32k1xx_gpiowrite(GPIO_LED_G, (ledset & BOARD_LED_G_BIT) == 0);
s32k1xx_gpiowrite(GPIO_LED_B, (ledset & BOARD_LED_B_BIT) == 0);
}
#endif /* !CONFIG_ARCH_LEDS */
boards/arm/s32k1xx/s32k118evb/src/s32k118evb.h
+14 -2
View File
@@ -45,6 +45,7 @@
#include <stdint.h>
#include "hardware/s32k1xx_pinmux.h"
#include "s32k1xx_periphclocks.h"
/****************************************************************************
@@ -54,15 +55,26 @@
/* Configuration ************************************************************/
/* S32K118EVB GPIOs *********************************************************/
/* LEDs. The S32K118EVB has one RGB LED:
*
* RedLED PTD16 (FTM0CH1)
* GreenLED PTD15 (FTM0CH0)
* BlueLED PTE8 (FTM0CH6)
* GreenLED PTD15 (FTM0 CH0)
*/
/* BUTTONS */
#define GPIO_LED_R (PIN_PTD16 | GPIO_LOWDRIVE | GPIO_OUTPUT_ONE)
#define GPIO_LED_G (PIN_PTD15 | GPIO_LOWDRIVE | GPIO_OUTPUT_ONE)
#define GPIO_LED_B (PIN_PTE8 | GPIO_LOWDRIVE | GPIO_OUTPUT_ONE)
/* Buttons. The S32K118EVB supports two buttons:
*
* SW2 PTD3
* SW3 PTD5
*/
#define GPIO_SW2 (PIN_PTD3 | PIN_INT_BOTH)
#define GPIO_SW3 (PIN_PTD5 | PIN_INT_BOTH)
/* SPI chip selects */