arch/ and configs/: Fix more errors related to cache interface changes.

This commit is contained in:
Gregory Nutt
2019-03-20 14:45:44 -06:00
parent 3c27f133fd
commit daa6461ce2
4 changed files with 14 additions and 7 deletions
+3 -1
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@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/armv7/arm_addrenv.c
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Copyright (C) 2014, 2019 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -116,9 +116,11 @@
#include <nuttx/arch.h>
#include <nuttx/pgalloc.h>
#include <nuttx/irq.h>
#include <nuttx/cache.h>
#include "pgalloc.h"
#include "mmu.h"
#include "cp15_cacheops.h"
#include "addrenv.h"
#ifdef CONFIG_ARCH_ADDRENV
+7 -4
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@@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/sama5/sam_ehci.c
*
* Copyright (C) 2013, 2016-2017 Gregory Nutt. All rights reserved.
* Copyright (C) 2013, 2016-2017, 2019 Gregory Nutt. All rights reserved.
* Authors: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@@ -53,6 +53,7 @@
#include <nuttx/wqueue.h>
#include <nuttx/signal.h>
#include <nuttx/semaphore.h>
#include <nuttx/cache.h>
#include <nuttx/usb/usb.h>
#include <nuttx/usb/usbhost.h>
#include <nuttx/usb/ehci.h>
@@ -72,7 +73,9 @@
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Configuration ***************************************************************/
/* Configuration ************************************************************/
/* Pre-requisites */
#if !defined(CONFIG_SCHED_WORKQUEUE)
@@ -133,7 +136,7 @@
#undef CONFIG_SAMA5_UHPHS_RHPORT1
/* Driver-private Definitions **************************************************/
/* Driver-private Definitions ************************************************/
/* This is the set of interrupts handled by this driver */
@@ -2763,7 +2766,7 @@ static int sam_qh_cancel(struct sam_qh_s *qh, uint32_t **bp, void *arg)
*/
**bp = qh->hw.hlp;
cp15_flush_dcache((uintptr_t)*bp, (uintptr_t)*bp + sizeof(uint32_t));
up_flush_dcache((uintptr_t)*bp, (uintptr_t)*bp + sizeof(uint32_t));
/* Re-enable the schedules (if they were enabled before. */
+2 -1
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@@ -180,7 +180,8 @@ int nor_main(int argc, char *argv)
*/
cp15_disable_mmu();
cp15_disable_caches();
up_disable_icache();
up_disable_dcache();
/* Invalidate caches and TLBs */
+2 -1
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@@ -161,7 +161,8 @@ int dram_main(int argc, char *argv)
*/
cp15_disable_mmu();
cp15_disable_caches();
up_disable_icache();
up_disable_dcache();
/* Invalidate caches and TLBs */