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Update README.txt
This commit is contained in:
Gregory Nutt
@@ -438,7 +438,7 @@ o pthreads (sched/pthreads)
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serve as cancellation points. They are, however, simple wrappers around nanosleep
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which is a true cancellation point.
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NOTE 02: system() is actually implemented in apps/ as part of NSH. It cannot be
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a cancellation point either.
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a cancellation point.
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NOTE 03: sigpause() is a user-space function in the C library and cannot serve as
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cancellation points. It is, however, a simple wrapper around sigsuspend()
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which is a true cancellation point.
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,324 @@
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/************************************************************************************
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* arch/arm/include/kinetis/kinetis_pmc.h
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*
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* Copyright (C) 2017 Gregory Nutt. All rights reserved.
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* Authors: Gregory Nutt <gnutt@nuttx.org>
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* David Sidrane <david_s5@nscdg.com>
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*
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
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||||
* 3. Neither the name NuttX nor the names of its contributors may be
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||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
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||||
*
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||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
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||||
*
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************************************************************************************/
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#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_PMC_H
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#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_PMC_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Note: It is envisioned that in the long term as a chip is added. The author of
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* the new chip definitions will either find the exact configuration in an existing
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* chip define and add the new chip to it Or add the PMC feature configuration
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* #defines to the chip ifdef list below. In either case the author should mark
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* it as "Verified to Document Number:" taken from the reference manual.
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*
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* To maintain backward compatibility to the version of NuttX prior to
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* 2/22/2017, the catch all KINETIS_PMC_VERSION_UKN configuration is assigned
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* to all the chips that did not have any conditional compilation based on
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* KINETIS_K64 or KINETIS_K66. This is a "No worse" than the original code solution.
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* N.B. Each original chip "if"definitions have been left intact so that the
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* complete legacy definitions prior to 2/22/2017 may be filled in completely when
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* vetted.
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*/
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/* PMC Register Configuration
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*
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* KINETIS_PMC_HAS_REGSC - SoC has REGSC Register
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* KINETIS_PMC_HAS_REGSC_ACKISO - SoC has REGSC[ACKISO]
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* KINETIS_PMC_HAS_REGSC_VLPRS - SoC has REGSC[VLPRS]
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* KINETIS_PMC_HAS_REGSC_VLPO - SoC has REGSC[VLPO]
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* KINETIS_PMC_HAS_REGSC_REGFPM - SoC has REGSC[REGFPM]
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* KINETIS_PMC_HAS_REGSC_BGEN - SoC has REGSC[BGEN]
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* KINETIS_PMC_HAS_REGSC_TRAMPO - SoC has REGSC[TRAMPO]
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* KINETIS_PMC_HAS_REGSC_REGONS - SoC has REGSC[REGONS]
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*/
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/* Describe the version of the PMC
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*
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* These defines are not related to any NXP reference but are merely
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* a way to label the versions we are using
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*/
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#define KINETIS_PMC_VERSION_UKN -1 /* What was in nuttx prior to 2/22/2017 */
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#define KINETIS_PMC_VERSION_01 1 /* Verified Document Number: K60P144M150SF3RM Rev. 3, November 2014 */
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#define KINETIS_PMC_VERSION_04 4 /* Verified to Document Numbers:
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* K20P64M72SF1RM Rev. 1.1, Dec 2012
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* K64P144M120SF5RM Rev. 2, January 2014
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* K66P144M180SF5RMV2 Rev. 2, May 2015 */
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/* MK20DX/DN---VLH5
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*
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* ------------- ------ --- ------- ------ ------- ------ ----- ----
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* PART NUMBER CPU PIN PACKAGE TOTAL PROGRAM EEPROM SRAM GPIO
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* FREQ CNT FLASH FLASH
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* ------------- ------ --- ------- ------ ------- ------ ----- ----
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* MK20DN32VLH5 50 MHz 64 LQFP 32 KB 32 KB — 8 KB 40
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* MK20DX32VLH5 50 MHz 64 LQFP 64 KB 32 KB 2 KB 8 KB 40
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* MK20DN64VLH5 50 MHz 64 LQFP 64 KB 64 KB — 16 KB 40
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* MK20DX64VLH5 50 MHz 64 LQFP 96 KB 64 KB 2 KB 16 KB 40
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* MK20DN128VLH5 50 MHz 64 LQFP 128 KB 128 KB — 16 KB 40
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* MK20DX128VLH5 50 MHz 64 LQFP 160 KB 128 KB 2 KB 16 KB 40
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*/
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#if defined(CONFIG_ARCH_CHIP_MK20DN32VLH5) || \
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defined(CONFIG_ARCH_CHIP_MK20DX32VLH5) || \
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defined(CONFIG_ARCH_CHIP_MK20DN64VLH5) || \
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defined(CONFIG_ARCH_CHIP_MK20DX64VLH5) || \
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defined(CONFIG_ARCH_CHIP_MK20DN128VLH5) || \
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defined(CONFIG_ARCH_CHIP_MK20DX128VLH5)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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/* MK20DX---VLH7
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*
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* ------------- ------ --- ------- ------ ------- ------ ----- ----
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* PART NUMBER CPU PIN PACKAGE TOTAL PROGRAM EEPROM SRAM GPIO
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* FREQ CNT FLASH FLASH
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* ------------- ------ --- ------- ------ ------- ------ ----- ----
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* MK20DX64VLH7 72 MHz 64 LQFP 96 KB 64 KB 2 KB 16 KB 40
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* MK20DX128VLH7 72 MHz 64 LQFP 160 KB 128 KB 2 KB 32 KB 40
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* MK20DX256VLH7 72 MHz 64 LQFP 288 KB 256 KB 2 KB 64 KB 40
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* ------------- ------ --- ------- ------ ------- ------ ----- ----
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*/
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#elif defined(CONFIG_ARCH_CHIP_MK20DX64VLH7) || defined(CONFIG_ARCH_CHIP_MK20DX128VLH7) || \
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defined(CONFIG_ARCH_CHIP_MK20DX256VLH7)
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/* Verified to Document Number: K20P64M72SF1RM Rev. 1.1, Dec 2012 */
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_04
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/* PMC Register Configuration */
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# define KINETIS_PMC_HAS_REGSC 1 /* SoC has REGSC Register */
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# define KINETIS_PMC_HAS_REGSC_ACKISO 1 /* SoC has REGSC[ACKISO] */
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# undef KINETIS_PMC_HAS_REGSC_VLPRS /* SoC has REGSC[VLPRS] */
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# undef KINETIS_PMC_HAS_REGSC_VLPO /* SoC has REGSC[VLPO] */
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# undef KINETIS_PMC_HAS_REGSC_REGFPM /* SoC has REGSC[REGFPM] */
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# define KINETIS_PMC_HAS_REGSC_BGEN 1 /* SoC has REGSC[BGEN] */
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# undef KINETIS_PMC_HAS_REGSC_TRAMPO /* SoC has REGSC[TRAMPO] */
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# define KINETIS_PMC_HAS_REGSC_REGONS 1 /* SoC has REGSC[REGONS] */
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#elif defined(CONFIG_ARCH_CHIP_MK40X64VFX50) || defined(CONFIG_ARCH_CHIP_MK40X64VLH50) || \
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defined(CONFIG_ARCH_CHIP_MK40X64VLK50) || defined(CONFIG_ARCH_CHIP_MK40X64VMB50)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK40X128VFX50) || defined(CONFIG_ARCH_CHIP_MK40X128VLH50) || \
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defined(CONFIG_ARCH_CHIP_MK40X128VLK50) || defined(CONFIG_ARCH_CHIP_MK40X128VMB50) || \
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defined(CONFIG_ARCH_CHIP_MK40X128VLL50) || defined(CONFIG_ARCH_CHIP_MK40X128VML50) || \
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defined(CONFIG_ARCH_CHIP_MK40X128VFX72) || defined(CONFIG_ARCH_CHIP_MK40X128VLH72) || \
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defined(CONFIG_ARCH_CHIP_MK40X128VLK72) || defined(CONFIG_ARCH_CHIP_MK40X128VMB72) || \
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defined(CONFIG_ARCH_CHIP_MK40X128VLL72) || defined(CONFIG_ARCH_CHIP_MK40X128VML72)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK40X256VLK72) || defined(CONFIG_ARCH_CHIP_MK40X256VMB72) || \
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defined(CONFIG_ARCH_CHIP_MK40X256VLL72) || defined(CONFIG_ARCH_CHIP_MK40X256VML72)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK40X128VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X128VMD100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK40X256VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X256VMD100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK40N512VLK100) || defined(CONFIG_ARCH_CHIP_MK40N512VMB100) || \
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defined(CONFIG_ARCH_CHIP_MK40N512VLL100) || defined(CONFIG_ARCH_CHIP_MK40N512VML100) || \
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defined(CONFIG_ARCH_CHIP_MK40N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK40N512VMD100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60N256VLL100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60X256VLL100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60N512VLL100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60N256VML100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60X256VML100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60N512VML100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60N256VLQ100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60X256VLQ100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60N512VLQ100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60N256VMD100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60X256VMD100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60N512VMD100)
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|
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60FN1M0VLQ12)
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|
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/* Verified to Document Number: K60P144M100SF2V2RM Rev. 2 Jun 2012 */
|
||||
|
||||
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_01
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/* PMC Register Configuration */
|
||||
|
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# define KINETIS_PMC_HAS_REGSC 1 /* SoC has REGSC Register */
|
||||
# define KINETIS_PMC_HAS_REGSC_ACKISO 1 /* SoC has REGSC[ACKISO] */
|
||||
# undef KINETIS_PMC_HAS_REGSC_VLPRS /* SoC has REGSC[VLPRS] */
|
||||
# undef KINETIS_PMC_HAS_REGSC_VLPO /* SoC has REGSC[VLPO] */
|
||||
# undef KINETIS_PMC_HAS_REGSC_REGFPM /* SoC has REGSC[REGFPM] */
|
||||
# undef KINETIS_PMC_HAS_REGSC_BGEN /* SoC has REGSC[BGEN] */
|
||||
# undef KINETIS_PMC_HAS_REGSC_TRAMPO /* SoC has REGSC[TRAMPO] */
|
||||
# define KINETIS_PMC_HAS_REGSC_REGONS 1 /* SoC has REGSC[REGONS] */
|
||||
|
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#elif defined(CONFIG_ARCH_CHIP_MK64FN1M0VLL12) || defined(CONFIG_ARCH_CHIP_MK64FX512VLL12) || \
|
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defined(CONFIG_ARCH_CHIP_MK64FX512VDC12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VDC12) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK64FX512VLQ12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VLQ12) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK64FX512VMD12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VMD12)
|
||||
|
||||
/* Verified to Document Number: K64P144M120SF5RM Rev. 2, January 2014 */
|
||||
|
||||
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_04
|
||||
|
||||
/* PMC Register Configuration */
|
||||
|
||||
# define KINETIS_PMC_HAS_REGSC 1 /* SoC has REGSC Register */
|
||||
# define KINETIS_PMC_HAS_REGSC_ACKISO 1 /* SoC has REGSC[ACKISO] */
|
||||
# undef KINETIS_PMC_HAS_REGSC_VLPRS /* SoC has REGSC[VLPRS] */
|
||||
# undef KINETIS_PMC_HAS_REGSC_VLPO /* SoC has REGSC[VLPO] */
|
||||
# undef KINETIS_PMC_HAS_REGSC_REGFPM /* SoC has REGSC[REGFPM] */
|
||||
# define KINETIS_PMC_HAS_REGSC_BGEN 1 /* SoC has REGSC[BGEN] */
|
||||
# undef KINETIS_PMC_HAS_REGSC_TRAMPO /* SoC has REGSC[TRAMPO] */
|
||||
# define KINETIS_PMC_HAS_REGSC_REGONS 1 /* SoC has REGSC[REGONS] */
|
||||
|
||||
/* MK66F N/X 1M0/2M0 V MD/LQ 18
|
||||
*
|
||||
* --------------- ------- --- ------- ------- ------ ------ ------ -----
|
||||
* PART NUMBER CPU PIN PACKAGE TOTAL PROGRAM EEPROM SRAM GPIO
|
||||
* FREQ CNT FLASH FLASH
|
||||
* --------------- ------- --- ------- ------- ------ ------ ------ -----
|
||||
* MK66FN2M0VMD18 180 MHz 144 MAPBGA 2 MB — — KB 260 KB 100
|
||||
* MK66FX1M0VMD18 180 MHz 144 MAPBGA 1.25 MB 1 MB 4 KB 256 KB 100
|
||||
* MK66FN2M0VLQ18 180 MHz 144 LQFP 2 MB — — KB 260 KB 100
|
||||
* MK66FX1M0VLQ18 180 MHz 144 LQFP 1.25 MB 1 MB 4 KB 256 KB 100
|
||||
*/
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_MK66FN2M0VMD18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VMD18) || \
|
||||
defined(CONFIG_ARCH_CHIP_MK66FN2M0VLQ18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VLQ18)
|
||||
|
||||
/* Verified to Document Number: Document Number: K66P144M180SF5RMV2 Rev. 2, May 2015 */
|
||||
|
||||
# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_04
|
||||
|
||||
/* PMC Register Configuration */
|
||||
|
||||
# define KINETIS_PMC_HAS_REGSC 1 /* SoC has REGSC Register */
|
||||
# define KINETIS_PMC_HAS_REGSC_ACKISO 1 /* SoC has REGSC[ACKISO] */
|
||||
# undef KINETIS_PMC_HAS_REGSC_VLPRS /* SoC has REGSC[VLPRS] */
|
||||
# undef KINETIS_PMC_HAS_REGSC_VLPO /* SoC has REGSC[VLPO] */
|
||||
# undef KINETIS_PMC_HAS_REGSC_REGFPM /* SoC has REGSC[REGFPM] */
|
||||
# define KINETIS_PMC_HAS_REGSC_BGEN 1 /* SoC has REGSC[BGEN] */
|
||||
# undef KINETIS_PMC_HAS_REGSC_TRAMPO /* SoC has REGSC[TRAMPO] */
|
||||
# define KINETIS_PMC_HAS_REGSC_REGONS 1 /* SoC has REGSC[REGONS] */
|
||||
|
||||
#else
|
||||
# error "Unsupported Kinetis chip"
|
||||
#endif
|
||||
|
||||
/* Use the catch all configuration for the PMC based on the implementations in nuttx prior 2/3/2017 */
|
||||
|
||||
#if KINETIS_PMC_VERSION == KINETIS_PMC_VERSION_UKN
|
||||
|
||||
/* PMC Register Configuration */
|
||||
|
||||
# define KINETIS_PMC_HAS_REGSC 1 /* SoC has REGSC Register */
|
||||
# undef KINETIS_PMC_HAS_REGSC_ACKISO /* SoC has REGSC[ACKISO] */
|
||||
# define KINETIS_PMC_HAS_REGSC_VLPRS 1 /* SoC has REGSC[VLPRS] */
|
||||
# undef KINETIS_PMC_HAS_REGSC_VLPO /* SoC has REGSC[VLPO] */
|
||||
# undef KINETIS_PMC_HAS_REGSC_REGFPM /* SoC has REGSC[REGFPM] */
|
||||
# undef KINETIS_PMC_HAS_REGSC_BGEN /* SoC has REGSC[BGEN] */
|
||||
# define KINETIS_PMC_HAS_REGSC_TRAMPO 1 /* SoC has REGSC[TRAMPO] */
|
||||
# define KINETIS_PMC_HAS_REGSC_REGONS 1 /* SoC has REGSC[REGONS] */
|
||||
|
||||
#endif
|
||||
|
||||
#if !defined(KINETIS_PMC_VERSION)
|
||||
# error "No KINETIS_PMC_VERSION defined!"
|
||||
#endif
|
||||
|
||||
#if defined(KINETIS_PMC_HAS_C5_PRDIV)
|
||||
# define KINETIS_PMC_C5_PRDIV_MASK ((1 << (KINETIS_PMC_C5_PRDIV_BITS))-1)
|
||||
#endif
|
||||
|
||||
#if defined(KINETIS_PMC_HAS_C7_OSCSEL)
|
||||
# define KINETIS_PMC_C7_OSCSEL_MASK ((1 << (KINETIS_PMC_C7_OSCSEL_BITS))-1)
|
||||
#endif
|
||||
|
||||
#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_PMC_H */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -4,70 +4,86 @@ README
|
||||
This README discusses issues unique to NuttX configurations for the
|
||||
STM32F103C8T6 Minimum System Development Board for ARM Microcontroller.
|
||||
|
||||
This board is available from several vendors on the net, and may
|
||||
be sold under different names or no name at all. It is based on a
|
||||
STM32F103C8T6 and has a DIP-40 form-factor.
|
||||
Contents
|
||||
========
|
||||
|
||||
There are two versions of very similar boards: One is red and one is
|
||||
blue. See http://www.stm32duino.com/viewtopic.php?f=28&t=117
|
||||
- STM32F103C8T6 Minimum System Development Boards:
|
||||
- LEDs
|
||||
- UARTs
|
||||
- Timer Inputs/Outputs
|
||||
- Using 128KiB of Flash instead of 64KiB
|
||||
- Quadrature Encoder
|
||||
- STM32F103 Minimum - specific Configuration Options
|
||||
- Configurations
|
||||
|
||||
The Red Board:
|
||||
STM32F103C8T6 Minimum System Development Boards:
|
||||
================================================
|
||||
|
||||
Good things about the red board:
|
||||
This STM32F103C8T6 minimum system development board is available from
|
||||
several vendors on the net, and may be sold under different names or
|
||||
no name at all. It is based on a STM32F103C8T6 and has a DIP-40 form-
|
||||
factor.
|
||||
|
||||
- 1.5k pull up resistor on the PA12 pin (USB D+) which you can
|
||||
programatically drag down for automated USB reset.
|
||||
- large power capacitors and LDO power.
|
||||
There are two versions of very similar boards: One is red and one is
|
||||
blue. See http://www.stm32duino.com/viewtopic.php?f=28&t=117
|
||||
|
||||
Problems with the red board:
|
||||
The Red Board:
|
||||
|
||||
- Silk screen is barely readable, the text is chopped off on some of
|
||||
the pins
|
||||
- USB connector only has two anchor points and it is directly soldered
|
||||
on the surface
|
||||
- Small reset button with hardly any resistance
|
||||
Good things about the red board:
|
||||
|
||||
The Blue Board:
|
||||
- 1.5k pull up resistor on the PA12 pin (USB D+) which you can
|
||||
programatically drag down for automated USB reset.
|
||||
- large power capacitors and LDO power.
|
||||
|
||||
Good things about the blue board:
|
||||
Problems with the red board:
|
||||
|
||||
- Four soldered anchor point on the USB connector. What you can't tell
|
||||
from this picture is that there is a notch in the pcb board and the USB
|
||||
connector sits down inside it some. This provides some lateral stability
|
||||
that takes some of the stress off the solder points.
|
||||
- It has nice clear readable silkscreen printing.
|
||||
- It also a larger reset button.
|
||||
- Silk screen is barely readable, the text is chopped off on some of
|
||||
the pins
|
||||
- USB connector only has two anchor points and it is directly soldered
|
||||
on the surface
|
||||
- Small reset button with hardly any resistance
|
||||
|
||||
Problems with the blue board:
|
||||
The Blue Board:
|
||||
|
||||
- Probably won't work as a USB device if it has a 10k pull-up on PA12. You
|
||||
have to check the pull up on PA12 (USB D+). If it has a 10k pull-up
|
||||
resistor, you will need to replace it with a 1.5k one to use the native
|
||||
USB.
|
||||
- Puny voltage regulator probably 100mA.
|
||||
Good things about the blue board:
|
||||
|
||||
A schematic for the blue board is available here:
|
||||
http://www.stm32duino.com/download/file.php?id=276
|
||||
- Four soldered anchor point on the USB connector. What you can't tell
|
||||
from this picture is that there is a notch in the pcb board and the USB
|
||||
connector sits down inside it some. This provides some lateral stability
|
||||
that takes some of the stress off the solder points.
|
||||
- It has nice clear readable silkscreen printing.
|
||||
- It also a larger reset button.
|
||||
|
||||
Both Boards:
|
||||
Problems with the blue board:
|
||||
|
||||
Nice features common to both:
|
||||
- Probably won't work as a USB device if it has a 10k pull-up on PA12. You
|
||||
have to check the pull up on PA12 (USB D+). If it has a 10k pull-up
|
||||
resistor, you will need to replace it with a 1.5k one to use the native
|
||||
USB.
|
||||
- Puny voltage regulator probably 100mA.
|
||||
|
||||
- SWD pins broken out and easily connected (VCC, GND, SWDIO, SWCLK)
|
||||
- USB 5V is broken out with easy access.
|
||||
- User LED on PC13
|
||||
- Power LED
|
||||
- You can probably use more flash (128k) than officially documented for
|
||||
the chip (stm32f103c8t6 64k), I was able to load 115k of flash on mine
|
||||
and it seemed to work.
|
||||
A schematic for the blue board is available here:
|
||||
http://www.stm32duino.com/download/file.php?id=276
|
||||
|
||||
Problems with both boards:
|
||||
Both Boards:
|
||||
|
||||
- No preloaded bootloader * to me this isn't really a problem as the
|
||||
entire 64k of flash is available for use
|
||||
- No user button
|
||||
Nice features common to both:
|
||||
|
||||
This is the board pinout based on its form-factor for the Blue board:
|
||||
- SWD pins broken out and easily connected (VCC, GND, SWDIO, SWCLK)
|
||||
- USB 5V is broken out with easy access.
|
||||
- User LED on PC13
|
||||
- Power LED
|
||||
- You can probably use more flash (128k) than officially documented for
|
||||
the chip (stm32f103c8t6 64k), I was able to load 115k of flash on mine
|
||||
and it seemed to work.
|
||||
|
||||
Problems with both boards:
|
||||
|
||||
- No preloaded bootloader * to me this isn't really a problem as the
|
||||
entire 64k of flash is available for use
|
||||
- No user button
|
||||
|
||||
This is the board pinout based on its form-factor for the Blue board:
|
||||
|
||||
USB
|
||||
___
|
||||
@@ -94,25 +110,15 @@ This is the board pinout based on its form-factor for the Blue board:
|
||||
|3.3V VB|
|
||||
|_____________|
|
||||
|
||||
Contents
|
||||
========
|
||||
|
||||
- LEDs
|
||||
- UARTs
|
||||
- Timer Inputs/Outputs
|
||||
- Using 128KiB of Flash instead of 64KiB
|
||||
- STM32F103 Minimum - specific Configuration Options
|
||||
- Configurations
|
||||
|
||||
LEDs
|
||||
====
|
||||
|
||||
The STM32F103 Minimum board has only one software controllable LED.
|
||||
This LED can be used by the board port when CONFIG_ARCH_LEDS option is
|
||||
enabled.
|
||||
The STM32F103 Minimum board has only one software controllable LED.
|
||||
This LED can be used by the board port when CONFIG_ARCH_LEDS option is
|
||||
enabled.
|
||||
|
||||
If enabled the LED is simply turned on when the board boots
|
||||
succesfully, and is blinking on panic / assertion failed.
|
||||
If enabled the LED is simply turned on when the board boots
|
||||
succesfully, and is blinking on panic / assertion failed.
|
||||
|
||||
UARTs
|
||||
=====
|
||||
@@ -139,7 +145,7 @@ UARTs
|
||||
Default USART/UART Configuration
|
||||
--------------------------------
|
||||
|
||||
USART1 (RX & TX only) is available through pins PA9 (TX) and PA10 (RX).
|
||||
USART1 (RX & TX only) is available through pins PA9 (TX) and PA10 (RX).
|
||||
|
||||
Timer Inputs/Outputs
|
||||
====================
|
||||
@@ -171,69 +177,101 @@ Timer Inputs/Outputs
|
||||
Using 128KiB of Flash instead of 64KiB
|
||||
======================================
|
||||
|
||||
Some people figured out that the STM32F103C8T6 has 128KiB of internal memory
|
||||
instead of 64KiB as documented in the datasheet and reported by its internal
|
||||
register.
|
||||
Some people figured out that the STM32F103C8T6 has 128KiB of internal memory
|
||||
instead of 64KiB as documented in the datasheet and reported by its internal
|
||||
register.
|
||||
|
||||
In order to enable 128KiB you need modify the linker script to reflect this
|
||||
new size. Open the configs/stm32f103-minimum/scripts/ld.script and replace:
|
||||
In order to enable 128KiB you need modify the linker script to reflect this
|
||||
new size. Open the configs/stm32f103-minimum/scripts/ld.script and replace:
|
||||
|
||||
flash (rx) : ORIGIN = 0x08000000, LENGTH = 64K
|
||||
flash (rx) : ORIGIN = 0x08000000, LENGTH = 64K
|
||||
|
||||
with
|
||||
with
|
||||
|
||||
flash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
|
||||
flash (rx) : ORIGIN = 0x08000000, LENGTH = 128K
|
||||
|
||||
Enable many NuttX features (ie. many filesystems and applications) to get a
|
||||
large binary image with more than 64K.
|
||||
Enable many NuttX features (ie. many filesystems and applications) to get a
|
||||
large binary image with more than 64K.
|
||||
|
||||
We will use OpenOCD to write the firmware in the STM32F103C8T6 Flash. Use a
|
||||
up to dated OpenOCD version (ie. openocd-0.9).
|
||||
We will use OpenOCD to write the firmware in the STM32F103C8T6 Flash. Use a
|
||||
up to dated OpenOCD version (ie. openocd-0.9).
|
||||
|
||||
You will need to create a copy of original openocd/scripts/target/stm32f1x.cfg
|
||||
to openocd/scripts/target/stm32f103c8t6.cfg and edit the later file replacing:
|
||||
You will need to create a copy of original openocd/scripts/target/stm32f1x.cfg
|
||||
to openocd/scripts/target/stm32f103c8t6.cfg and edit the later file replacing:
|
||||
|
||||
flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
|
||||
flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
|
||||
|
||||
with
|
||||
with
|
||||
|
||||
flash bank $_FLASHNAME stm32f1x 0x08000000 0x20000 0 0 $_TARGETNAME
|
||||
flash bank $_FLASHNAME stm32f1x 0x08000000 0x20000 0 0 $_TARGETNAME
|
||||
|
||||
We will use OpenOCD with STLink-V2 programmer, but it will work with other
|
||||
programmers (JLink, Versaloon, or some based on FTDI FT232, etc).
|
||||
We will use OpenOCD with STLink-V2 programmer, but it will work with other
|
||||
programmers (JLink, Versaloon, or some based on FTDI FT232, etc).
|
||||
|
||||
Open a terminal and execute:
|
||||
Open a terminal and execute:
|
||||
|
||||
$ sudo openocd -f interface/stlink-v2.cfg -f target/stm32f103c8t6.cfg
|
||||
$ sudo openocd -f interface/stlink-v2.cfg -f target/stm32f103c8t6.cfg
|
||||
|
||||
Now in other terminal execute:
|
||||
Now in other terminal execute:
|
||||
|
||||
$ telnet localhost 4444
|
||||
$ telnet localhost 4444
|
||||
|
||||
Trying 127.0.0.1...
|
||||
Connected to localhost.
|
||||
Escape character is '^]'.
|
||||
Open On-Chip Debugger
|
||||
Trying 127.0.0.1...
|
||||
Connected to localhost.
|
||||
Escape character is '^]'.
|
||||
Open On-Chip Debugger
|
||||
|
||||
> reset halt
|
||||
stm32f1x.cpu: target state: halted
|
||||
target halted due to debug-request, current mode: Thread
|
||||
xPSR: 0x01000000 pc: 0x080003ac msp: 0x20000d78
|
||||
> reset halt
|
||||
stm32f1x.cpu: target state: halted
|
||||
target halted due to debug-request, current mode: Thread
|
||||
xPSR: 0x01000000 pc: 0x080003ac msp: 0x20000d78
|
||||
|
||||
> flash write_image erase nuttx.bin 0x08000000
|
||||
auto erase enabled
|
||||
device id = 0x20036410
|
||||
ignoring flash probed value, using configured bank size
|
||||
flash size = 128kbytes
|
||||
stm32f1x.cpu: target state: halted
|
||||
target halted due to breakpoint, current mode: Thread
|
||||
xPSR: 0x61000000 pc: 0x2000003a msp: 0x20000d78
|
||||
wrote 92160 bytes from file nuttx.bin in 4.942194s (18.211 KiB/s)
|
||||
> flash write_image erase nuttx.bin 0x08000000
|
||||
auto erase enabled
|
||||
device id = 0x20036410
|
||||
ignoring flash probed value, using configured bank size
|
||||
flash size = 128kbytes
|
||||
stm32f1x.cpu: target state: halted
|
||||
target halted due to breakpoint, current mode: Thread
|
||||
xPSR: 0x61000000 pc: 0x2000003a msp: 0x20000d78
|
||||
wrote 92160 bytes from file nuttx.bin in 4.942194s (18.211 KiB/s)
|
||||
|
||||
> reset run
|
||||
> exit
|
||||
> reset run
|
||||
> exit
|
||||
|
||||
Now NuttX should start normally.
|
||||
Now NuttX should start normally.
|
||||
|
||||
Quadrature Encoder:
|
||||
===================
|
||||
|
||||
The nsh configuration has been used to test the Quadrture Encoder
|
||||
(QEncoder, QE) with the following modifications to the configuration
|
||||
file:
|
||||
|
||||
- These setting enable support for the common QEncode upper half driver:
|
||||
|
||||
CONFIG_SENSORS=y
|
||||
CONFIG_QENCODER=y
|
||||
|
||||
- This is a board setting that selected timer 4 for use with the
|
||||
quadrature encode:
|
||||
|
||||
CONFIG_STM32F103MINIMUM_QETIMER=4
|
||||
|
||||
- These settings enable the STM32 Quadrature encoder on timer 4:
|
||||
|
||||
CONFIG_STM32_TIM4_CAP=y
|
||||
CONFIG_STM32_TIM4_QE=y
|
||||
CONFIG_STM32_TIM4_QECLKOUT=2800000
|
||||
CONFIG_STM32_QENCODER_FILTER=y
|
||||
CONFIG_STM32_QENCODER_SAMPLE_EVENT_6=y
|
||||
CONFIG_STM32_QENCODER_SAMPLE_FDTS_4=y
|
||||
|
||||
- These settings enable the test case at apps/examples/qencoder:
|
||||
|
||||
CONFIG_EXAMPLES_QENCODER=y
|
||||
CONFIG_EXAMPLES_QENCODER_DELAY=100
|
||||
CONFIG_EXAMPLES_QENCODER_DEVPATH="/dev/qe0"
|
||||
|
||||
STM32F103 Minimum - specific Configuration Options
|
||||
==================================================
|
||||
@@ -406,21 +444,25 @@ STM32F103 Minimum - specific Configuration Options
|
||||
Configurations
|
||||
==============
|
||||
|
||||
Each STM32F103 Minimum configuration is maintained in a sub-directory and
|
||||
can be selected as follow:
|
||||
Instantiating Configurations
|
||||
----------------------------
|
||||
Each STM32F103 Minimum configuration is maintained in a sub-directory and
|
||||
can be selected as follow:
|
||||
|
||||
cd tools
|
||||
./configure.sh STM32F103 Minimum/<subdir>
|
||||
cd -
|
||||
. ./setenv.sh
|
||||
|
||||
If this is a Windows native build, then configure.bat should be used
|
||||
instead of configure.sh:
|
||||
If this is a Windows native build, then configure.bat should be used
|
||||
instead of configure.sh:
|
||||
|
||||
configure.bat STM32F103-Minimum\<subdir>
|
||||
|
||||
Where <subdir> is one of the following:
|
||||
Where <subdir> is one of the following:
|
||||
|
||||
Configuration Directories
|
||||
-------------------------
|
||||
nsh:
|
||||
---
|
||||
Configures the NuttShell (nsh) located at apps/examples/nsh. This
|
||||
|
||||
Reference in New Issue
Block a user