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STM32 F7: Add RCC header files
This commit is contained in:
Gregory Nutt
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/************************************************************************************
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* arch/arm/src/stm32f7/chip/stm32_rcc.h
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*
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32F7_CHIP_STM32_RCC_H
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#define __ARCH_ARM_SRC_STM32F7_CHIP_STM32_RCC_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include "chip.h"
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#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
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# include "chip/stm32f74xx75xx_rcc.h"
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#else
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# error "Unsupported STM32 F7 part"
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#endif
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#endif /* __ARCH_ARM_SRC_STM32F7_CHIP_STM32_RCC_H */
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,255 @@
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/************************************************************************************
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* arch/arm/src/stm32f7/stm32_rcc.h
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*
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.orgr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32F7_STM32_RRC_H
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#define __ARCH_ARM_SRC_STM32F7_STM32_RRC_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include "up_arch.h"
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#include "chip/stm32_rcc.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/* This symbol references the Cortex-M7 vector table (as positioned by the linker
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* script, ld.script or ld.script.dfu. The standard location for the vector table is
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* at the beginning of FLASH at address 0x0800:0000. If we are using the STMicro DFU
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* bootloader, then the vector table will be offset to a different location in FLASH
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* and we will need to set the NVIC vector location to this alternative location.
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*/
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extern uint32_t _vectors[]; /* See stm32_vectors.S */
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/************************************************************************************
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* Inline Functions
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************************************************************************************/
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/************************************************************************************
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* Name: stm32_mco1config
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*
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* Description:
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* Selects the clock source to output on MCO1 pin (PA8). PA8 should be configured in
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* alternate function mode.
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*
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* Input Parameters:
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* source - One of the definitions for the RCC_CFGR_MCO1 definitions from
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* chip/stm32f7xxxx_rcc.h {RCC_CFGR_MCO1_HSI, RCC_CFGR_MCO1_LSE,
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* RCC_CFGR_MCO1_HSE, RCC_CFGR_MCO1_PLL}
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* div - One of the definitions for the RCC_CFGR_MCO1PRE definitions from
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* chip/stm32f7xxxx_rcc.h {RCC_CFGR_MCO1PRE_NONE, RCC_CFGR_MCO1PRE_DIV2,
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* RCC_CFGR_MCO1PRE_DIV3, RCC_CFGR_MCO1PRE_DIV4, RCC_CFGR_MCO1PRE_DIV5}
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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static inline void stm32_mco1config(uint32_t source, uint32_t div)
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{
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uint32_t regval;
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regval = getreg32(STM32_RCC_CFGR);
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regval &= ~(RCC_CFGR_MCO1_MASK|RCC_CFGR_MCO1PRE_MASK);
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regval |= (source | div);
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putreg32(regval, STM32_RCC_CFGR);
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}
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/************************************************************************************
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* Name: stm32_mco2config
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*
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* Description:
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* Selects the clock source to output on MCO2 pin (PC9). PC9 should be configured in
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* alternate function mode.
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*
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* Input Parameters:
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* source - One of the definitions for the RCC_CFGR_MCO2 definitions from
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* chip/stn32f7xxxx_rcc.h {RCC_CFGR_MCO2_SYSCLK, RCC_CFGR_MCO2_PLLI2S,
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* RCC_CFGR_MCO2_HSE, RCC_CFGR_MCO2_PLL}
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* div - One of the definitions for the RCC_CFGR_MCO2PRE definitions from
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* chip/stn32f7xxxx_rcc.h {RCC_CFGR_MCO2PRE_NONE, RCC_CFGR_MCO2PRE_DIV2,
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* RCC_CFGR_MCO2PRE_DIV3, RCC_CFGR_MCO2PRE_DIV4, RCC_CFGR_MCO2PRE_DIV5}
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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static inline void stm32_mco2config(uint32_t source, uint32_t div)
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{
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uint32_t regval;
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regval = getreg32(STM32_RCC_CFGR);
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regval &= ~(RCC_CFGR_MCO2_MASK|RCC_CFGR_MCO2PRE_MASK);
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regval |= (source | div);
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putreg32(regval, STM32_RCC_CFGR);
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}
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/************************************************************************************
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* Public Function Prototypes
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************************************************************************************/
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/************************************************************************************
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* Name: stm32_clockconfig
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*
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* Description:
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* Called to establish the clock settings based on the values in board.h. This
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* function (by default) will reset most everything, enable the PLL, and enable
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* peripheral clocking for all peripherals enabled in the NuttX configuration
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* file.
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*
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* If CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is defined, then clocking will
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* be enabled by an externally provided, board-specific function called
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* stm32_board_clockconfig().
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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void stm32_clockconfig(void);
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/************************************************************************************
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* Name: stm32_board_clockconfig
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*
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* Description:
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* Any STM32 board may replace the "standard" board clock configuration logic with
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* its own, custom clock configuration logic.
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*
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************************************************************************************/
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#ifdef CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG
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void stm32_board_clockconfig(void);
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#endif
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/************************************************************************************
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* Name: stm32_clockenable
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*
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* Description:
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* Re-enable the clock and restore the clock settings based on settings in board.h.
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* This function is only available to support low-power modes of operation: When
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* re-awakening from deep-sleep modes, it is necessary to re-enable/re-start the
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* PLL
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*
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* This functional performs a subset of the operations performed by
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* stm32_clockconfig(): It does not reset any devices, and it does not reset the
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* currently enabled peripheral clocks.
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*
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* If CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is defined, then clocking will
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* be enabled by an externally provided, board-specific function called
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* stm32_board_clockconfig().
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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#ifdef CONFIG_PM
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void stm32_clockenable(void);
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#endif
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/************************************************************************************
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* Name: stm32_rcc_enablelse
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*
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* Description:
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* Enable the External Low-Speed (LSE) Oscillator and, if the RTC is
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* configured, setup the LSE as the RTC clock source, and enable the RTC.
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*
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* For the STM32L15X family, this will also select the LSE as the clock source of
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* the LCD.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* None
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*
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************************************************************************************/
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void stm32_rcc_enablelse(void);
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/****************************************************************************
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* Name: stm32_rcc_enablelsi
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*
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* Description:
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* Enable the Internal Low-Speed (LSI) RC Oscillator.
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*
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****************************************************************************/
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void stm32_rcc_enablelsi(void);
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/****************************************************************************
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* Name: stm32_rcc_disablelsi
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*
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* Description:
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* Disable the Internal Low-Speed (LSI) RC Oscillator.
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*
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****************************************************************************/
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void stm32_rcc_disablelsi(void);
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_SRC_STM32F7_STM32_RRC_H */
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