mirror of
https://github.com/apache/nuttx.git
synced 2026-05-13 10:38:40 +08:00
A10: Timer interrupt handler
This commit is contained in:
Gregory Nutt
@@ -6216,4 +6216,6 @@
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functions now just call nanosleep(). (2013-12-13).
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* syscall/ and include/sys/syscall.h: Remove sleep and usleep
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system calls. Add nanosleep system call (2013-12-13).
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* arch/arm/src/a1x/a1x_timerisr.c: Timer interrupt handler for the
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A10 (2013-12-13).
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@@ -78,7 +78,7 @@
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#define A1X_IRQ_TIMER0 22 /* Timer port 0 */
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#define A1X_IRQ_TIMER1 23 /* Timer port 1 */
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#define A1X_IRQ_TIMER2 24 /* Timer 2 */
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# define A1X_IRQ_Alarm 24 /* Alarm */
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# define A1X_IRQ_ALARM 24 /* Alarm */
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# define A1X_IRQ_WD 24 /* Watchdog */
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#define A1X_IRQ_TIMER3 25 /* Timer 3 interrupt */
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#define A1X_IRQ_CAN 26 /* CAN Bus controller interrupt */
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@@ -114,12 +114,8 @@ config A1X_KEYPAD
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bool "Keypad"
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default n
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config A1X_TIMER0
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bool "Timer port 0"
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default n
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config A1X_TIMER1
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bool "Timer port 1"
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bool "Timer 1"
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default n
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config A1X_TIMER2
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@@ -67,6 +67,10 @@ CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c
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CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c
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# Use common heap allocation for now (may need to be customized later)
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CMN_CSRCS += up_allocateheap.c
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# Configuration dependent C and assembly language files
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ifeq ($(CONFIG_PAGING),y)
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@@ -93,4 +97,4 @@ CHIP_ASRCS =
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# A1x-specific C source files
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CHIP_CSRCS = a1x_boot.c a1x_irq.c a1x_pio.c
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CHIP_CSRCS = a1x_boot.c a1x_irq.c a1x_pio.c a1x_timerisr.c
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@@ -218,8 +218,8 @@ void a1x_pio_irqinitialize(void)
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int a1x_configpio(pio_pinset_t cfgset)
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{
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unsigned int port = a1x_pioport(cfgset);
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unsigned int pin = a1x_piopin(cfgset);
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unsigned int port = a1x_pio_port(cfgset);
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unsigned int pin = a1x_pio_pin(cfgset);
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unsigned int shift;
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unsigned int value;
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uintptr_t cfgaddr;
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@@ -0,0 +1,156 @@
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/****************************************************************************
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* arch/arm/src/a1x/a1x_timerisr.c
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <time.h>
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#include <assert.h>
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#include <nuttx/arch.h>
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#include <arch/irq.h>
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#include <arch/board/board.h>
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#include "up_arch.h"
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#include "chip/a1x_timer.h"
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/****************************************************************************
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* Definitions
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****************************************************************************/
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/* Timer 0 will run at the rate of OSC24M with no division */
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#define TMR0_CLOCK (24000000)
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/* The desired timer interrupt frequency is provided by the definition
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* CLK_TCK (see include/time.h). CLK_TCK defines the desired number of
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* system clock ticks per second. That value is a user configurable setting
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* that defaults to 100 (100 ticks per second = 10 MS interval).
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*
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* Timer 0 counts down from the interval reload value to zero, generating
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* an interrupt (and reload) when the counts decrements to zero.
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*/
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#define TMR_INTERVAL ((TMR0_CLOCK + (CLK_TCK >> 1)) / CLK_TCK)
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Global Functions
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****************************************************************************/
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/****************************************************************************
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* Function: up_timerisr
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*
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* Description:
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* The timer ISR will perform a variety of services for various portions
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* of the systems.
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*
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****************************************************************************/
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int up_timerisr(int irq, uint32_t *regs)
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{
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/* Only a TIMER0 interrupt is expected here */
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DEBUGASSERT((getreg32(A1X_TMR_IRQ_STA) & TMR_IRQ_TMR0) != 0);
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/* Clear the pending interrupt by writing a '1' to the status register */
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putreg32(TMR_IRQ_TMR0, A1X_TMR_IRQ_STA);
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/* Process timer interrupt */
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sched_process_timer();
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return OK;
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}
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/****************************************************************************
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* Function: up_timerinit
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*
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* Description:
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* This function is called during start-up to initialize
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* the timer interrupt.
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*
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****************************************************************************/
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void up_timerinit(void)
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{
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uint32_t regval;
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/* Set the timer reload interval value */
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putreg32(TMR_INTERVAL, A1X_TMR0_INTV_VALUE);
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/* Configure timer 0:
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*
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* ENABLE - Enable counting
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* RELOAD - Reload timer interval value
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* CLKSRC - OSC24M
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* PRESCALER - No division
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* MODE - Continuous mode
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*/
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regval = (TMR_CTRL_EN | TMR_CTRL_RELOAD | TMR_CTRL_SRC_OSC24M |
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TMR_CTRL_CLK_PRES_DIV1 | TMR_CTRL_MODE_CONTINUOUS);
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putreg32(regval, A1X_TMR0_CTRL);
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/* Make sure that interrupts from the Timer 0 are disabled */
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up_disable_irq(A1X_IRQ_TIMER0);
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/* Attach the timer interrupt vector */
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(void)irq_attach(A1X_IRQ_TIMER0, (xcpt_t)up_timerisr);
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/* Enable interrupts from the TIMER 0 port */
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regval = getreg32(A1X_TMR_IRQ_EN);
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regval |= TMR_IRQ_TMR0;
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putreg32(regval, A1X_TMR_IRQ_EN);
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/* And enable the timer interrupt */
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up_enable_irq(A1X_IRQ_TIMER0);
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}
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@@ -173,25 +173,15 @@
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/* Register bit field definitions ***************************************************/
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/* Timer IRQ Enable */
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/* Timer IRQ Enable and Timer Status */
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#define TMR_IRQ_EN_TMR0 (1 << 0) /* Bit 0: Timer 0 Interrupt Enable */
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#define TMR_IRQ_EN_TMR1 (1 << 1) /* Bit 1: Timer 1 Interrupt Enable */
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#define TMR_IRQ_EN_TMR2 (1 << 2) /* Bit 2: Timer 2 Interrupt Enable */
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#define TMR_IRQ_EN_TMR3 (1 << 3) /* Bit 3: Timer 3 Interrupt Enable */
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#define TMR_IRQ_EN_TMR4 (1 << 4) /* Bit 4: Timer 4 Interrupt Enable */
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#define TMR_IRQ_EN_TMR5 (1 << 5) /* Bit 5: Timer 5 Interrupt Enable */
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#define TMR_IRQ_EN_WDOG (1 << 8) /* Bit 8: Watchdog Interrupt Enable */
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/* Timer Status */
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#define TMR_IRQ_STA_TMR0 (1 << 0) /* Bit 0: Timer 0 Interrupt Pending */
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#define TMR_IRQ_STA_TMR1 (1 << 1) /* Bit 1: Timer 1 Interrupt Pending */
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#define TMR_IRQ_STA_TMR2 (1 << 2) /* Bit 2: Timer 2 Interrupt Pending */
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#define TMR_IRQ_STA_TMR3 (1 << 3) /* Bit 3: Timer 3 Interrupt Pending */
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#define TMR_IRQ_STA_TMR4 (1 << 4) /* Bit 4: Timer 4 Interrupt Pending */
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#define TMR_IRQ_STA_TMR5 (1 << 5) /* Bit 5: Timer 5 Interrupt Pending */
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#define TMR_IRQ_STA_WDOG (1 << 8) /* Bit 8: Watchdog Interrupt Pending */
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#define TMR_IRQ_TMR0 (1 << 0) /* Bit 0: Timer 0 Interrupt */
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#define TMR_IRQ_TMR1 (1 << 1) /* Bit 1: Timer 1 Interrupt */
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#define TMR_IRQ_TMR2 (1 << 2) /* Bit 2: Timer 2 Interrupt */
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#define TMR_IRQ_TMR3 (1 << 3) /* Bit 3: Timer 3 Interrupt */
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#define TMR_IRQ_TMR4 (1 << 4) /* Bit 4: Timer 4 Interrupt */
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#define TMR_IRQ_TMR5 (1 << 5) /* Bit 5: Timer 5 Interrupt */
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#define TMR_IRQ_WDOG (1 << 8) /* Bit 8: Watchdog Interrupt */
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/* Timer 0-2,/4-5 Control */
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@@ -214,7 +204,9 @@
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# define TMR_CTRL_CLK_PRES_DIV32 (5 << TMR_CTRL_CLK_PRES_SHIFT) /* /32 (Not Timer 0) */
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# define TMR_CTRL_CLK_PRES_DIV64 (6 << TMR_CTRL_CLK_PRES_SHIFT) /* /64 (Not Timer 0) */
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# define TMR_CTRL_CLK_PRES_DIV128 (7 << TMR_CTRL_CLK_PRES_SHIFT) /* /128 (Not Timer 0) */
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#define TMR_CTRL_MODE (1 << 7) /* Bit 7: Timer n mode, n={0,1,2,4,5}
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#define TMR_CTRL_MODE (1 << 7) /* Bit 7: Timer n mode, n={0,1,2,4,5} */
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# define TMR_CTRL_MODE_SINGLE (1 << 7) /* 1=single mode */
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# define TMR_CTRL_MODE_CONTINUOUS (0 << 7) /* 0=continuous mode */
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/* Timer 3 Control */
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@@ -345,7 +337,7 @@
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#define ALRAM_DD_HMS_HOUR_SHIFT (16) /* Bits 16-20: Hour (0-23) */
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#define ALRAM_DD_HMS_HOUR_MASK (0x1f << ALRAM_DD_HMS_HOUR_SHIFT)
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# define ALRAM_DD_HMS_HOUR(n) ((uint32_t)(n) << ALRAM_DD_HMS_HOUR_SHIFT)
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#define ALRAM_DD_HMS_DAY_SHIFT (24) /* Bits 24-31: /* Day (0-255) */
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#define ALRAM_DD_HMS_DAY_SHIFT (24) /* Bits 24-31: Day (0-255) */
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#define ALRAM_DD_HMS_DAY_MASK (0xff << ALRAM_DD_HMS_DAY_SHIFT)
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# define ALRAM_DD_HMS_DAY(n) ((uint32_t)(n) << ALRAM_DD_HMS_DAY_SHIFT)
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@@ -143,7 +143,6 @@ CONFIG_A1X_UART0=y
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# CONFIG_A1X_TS is not set
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# CONFIG_A1X_IIS is not set
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# CONFIG_A1X_KEYPAD is not set
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# CONFIG_A1X_TIMER0 is not set
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# CONFIG_A1X_TIMER1 is not set
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# CONFIG_A1X_TIMER2 is not set
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# CONFIG_A1X_TIMER3 is not set
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@@ -192,6 +191,7 @@ CONFIG_A1X_UART0=y
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# CONFIG_A1X_PLE is not set
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# CONFIG_A1X_IRQ_PERFMU is not set
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# CONFIG_A1X_GPU is not set
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# CONFIG_A1X_PIO_IRQ is not set
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# CONFIG_A1X_BOOT_NAND is not set
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# CONFIG_A1X_BOOT_SPINOR is not set
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CONFIG_A1X_BOOT_SDCARD=y
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@@ -48,6 +48,8 @@ CONFIG_RAW_BINARY=y
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# Debug Options
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#
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# CONFIG_DEBUG is not set
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CONFIG_ARCH_HAVE_STACKCHECK=y
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CONFIG_ARCH_HAVE_HEAPCHECK=y
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# CONFIG_DEBUG_SYMBOLS is not set
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#
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@@ -69,11 +71,13 @@ CONFIG_ARCH="arm"
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#
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# ARM Options
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#
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# CONFIG_ARCH_CHIP_A1X is not set
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# CONFIG_ARCH_CHIP_C5471 is not set
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# CONFIG_ARCH_CHIP_CALYPSO is not set
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# CONFIG_ARCH_CHIP_DM320 is not set
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# CONFIG_ARCH_CHIP_IMX is not set
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# CONFIG_ARCH_CHIP_KINETIS is not set
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# CONFIG_ARCH_CHIP_KL is not set
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# CONFIG_ARCH_CHIP_LM is not set
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# CONFIG_ARCH_CHIP_LPC17XX is not set
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# CONFIG_ARCH_CHIP_LPC214X is not set
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@@ -81,15 +85,24 @@ CONFIG_ARCH="arm"
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# CONFIG_ARCH_CHIP_LPC31XX is not set
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# CONFIG_ARCH_CHIP_LPC43XX is not set
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# CONFIG_ARCH_CHIP_NUC1XX is not set
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# CONFIG_ARCH_CHIP_SAM3U is not set
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# CONFIG_ARCH_CHIP_SAMA5 is not set
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# CONFIG_ARCH_CHIP_SAM34 is not set
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CONFIG_ARCH_CHIP_STM32=y
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# CONFIG_ARCH_CHIP_STR71X is not set
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# CONFIG_ARCH_ARM7TDMI is not set
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# CONFIG_ARCH_ARM926EJS is not set
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# CONFIG_ARCH_ARM920T is not set
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# CONFIG_ARCH_CORTEXM0 is not set
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# CONFIG_ARCH_CORTEXM3 is not set
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CONFIG_ARCH_CORTEXM4=y
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# CONFIG_ARCH_CORTEXA5 is not set
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# CONFIG_ARCH_CORTEXA8 is not set
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CONFIG_ARCH_FAMILY="armv7-m"
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CONFIG_ARCH_CHIP="stm32"
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# CONFIG_ARMV7M_USEBASEPRI is not set
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CONFIG_ARCH_HAVE_CMNVECTOR=y
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# CONFIG_ARMV7M_CMNVECTOR is not set
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CONFIG_ARCH_HAVE_FPU=y
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# CONFIG_ARCH_FPU is not set
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CONFIG_ARCH_HAVE_MPU=y
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CONFIG_ARMV7M_MPU=y
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@@ -104,12 +117,31 @@ CONFIG_ARMV7M_MPU_NREGIONS=8
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CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y
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# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set
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# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIL is not set
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# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW is not set
|
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# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set
|
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# CONFIG_SERIAL_TERMIOS is not set
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#
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# STM32 Configuration Options
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#
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# CONFIG_ARCH_CHIP_STM32L151C6 is not set
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# CONFIG_ARCH_CHIP_STM32L151C8 is not set
|
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# CONFIG_ARCH_CHIP_STM32L151CB is not set
|
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# CONFIG_ARCH_CHIP_STM32L151R6 is not set
|
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# CONFIG_ARCH_CHIP_STM32L151R8 is not set
|
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# CONFIG_ARCH_CHIP_STM32L151RB is not set
|
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# CONFIG_ARCH_CHIP_STM32L151V6 is not set
|
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# CONFIG_ARCH_CHIP_STM32L151V8 is not set
|
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# CONFIG_ARCH_CHIP_STM32L151VB is not set
|
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# CONFIG_ARCH_CHIP_STM32L152C6 is not set
|
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# CONFIG_ARCH_CHIP_STM32L152C8 is not set
|
||||
# CONFIG_ARCH_CHIP_STM32L152CB is not set
|
||||
# CONFIG_ARCH_CHIP_STM32L152R6 is not set
|
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# CONFIG_ARCH_CHIP_STM32L152R8 is not set
|
||||
# CONFIG_ARCH_CHIP_STM32L152RB is not set
|
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# CONFIG_ARCH_CHIP_STM32L152V6 is not set
|
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# CONFIG_ARCH_CHIP_STM32L152V8 is not set
|
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# CONFIG_ARCH_CHIP_STM32L152VB is not set
|
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# CONFIG_ARCH_CHIP_STM32F100C8 is not set
|
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# CONFIG_ARCH_CHIP_STM32F100CB is not set
|
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# CONFIG_ARCH_CHIP_STM32F100R8 is not set
|
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@@ -122,6 +154,15 @@ CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y
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# CONFIG_ARCH_CHIP_STM32F100VC is not set
|
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# CONFIG_ARCH_CHIP_STM32F100VD is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F100VE is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F103C4 is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F103C8 is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F103T8 is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F103TB is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F103CB is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F103R8 is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F103RB is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F103V8 is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F103VB is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F103RET6 is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F103VCT6 is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F103VET6 is not set
|
||||
@@ -129,6 +170,7 @@ CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y
|
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# CONFIG_ARCH_CHIP_STM32F105VBT7 is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F107VC is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F207IG is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F207ZE is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F302CB is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F302CC is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F302RB is not set
|
||||
@@ -150,6 +192,25 @@ CONFIG_ARCH_CHIP_STM32F407VG=y
|
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# CONFIG_ARCH_CHIP_STM32F407ZG is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F407IE is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F407IG is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F427V is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F427Z is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F427I is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F429V is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F429Z is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F429I is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F429B is not set
|
||||
# CONFIG_ARCH_CHIP_STM32F429N is not set
|
||||
# CONFIG_STM32_STM32L15XX is not set
|
||||
# CONFIG_STM32_ENERGYLITE is not set
|
||||
# CONFIG_STM32_STM32F10XX is not set
|
||||
# CONFIG_STM32_VALUELINE is not set
|
||||
# CONFIG_STM32_CONNECTIVITYLINE is not set
|
||||
# CONFIG_STM32_PERFORMANCELINE is not set
|
||||
# CONFIG_STM32_HIGHDENSITY is not set
|
||||
# CONFIG_STM32_MEDIUMDENSITY is not set
|
||||
# CONFIG_STM32_LOWDENSITY is not set
|
||||
# CONFIG_STM32_STM32F20XX is not set
|
||||
# CONFIG_STM32_STM32F30XX is not set
|
||||
CONFIG_STM32_STM32F40XX=y
|
||||
# CONFIG_STM32_DFU is not set
|
||||
|
||||
@@ -176,7 +237,6 @@ CONFIG_STM32_STM32F40XX=y
|
||||
# CONFIG_STM32_I2C1 is not set
|
||||
# CONFIG_STM32_I2C2 is not set
|
||||
# CONFIG_STM32_I2C3 is not set
|
||||
# CONFIG_STM32_IWDG is not set
|
||||
# CONFIG_STM32_OTGFS is not set
|
||||
# CONFIG_STM32_OTGHS is not set
|
||||
# CONFIG_STM32_PWR is not set
|
||||
@@ -206,6 +266,7 @@ CONFIG_STM32_USART2=y
|
||||
# CONFIG_STM32_UART4 is not set
|
||||
# CONFIG_STM32_UART5 is not set
|
||||
# CONFIG_STM32_USART6 is not set
|
||||
# CONFIG_STM32_IWDG is not set
|
||||
# CONFIG_STM32_WWDG is not set
|
||||
|
||||
#
|
||||
@@ -216,6 +277,7 @@ CONFIG_STM32_USART2=y
|
||||
# CONFIG_STM32_JTAG_FULL_ENABLE is not set
|
||||
# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
|
||||
CONFIG_STM32_JTAG_SW_ENABLE=y
|
||||
# CONFIG_STM32_DISABLE_IDLE_SLEEP_DURING_DEBUG is not set
|
||||
# CONFIG_STM32_FORCEPOWER is not set
|
||||
# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
|
||||
# CONFIG_STM32_CCMEXCLUDE is not set
|
||||
@@ -225,6 +287,7 @@ CONFIG_STM32_USART=y
|
||||
# U[S]ART Configuration
|
||||
#
|
||||
# CONFIG_USART2_RS485 is not set
|
||||
# CONFIG_SERIAL_DISABLE_REORDERING is not set
|
||||
# CONFIG_STM32_USART_SINGLEWIRE is not set
|
||||
|
||||
#
|
||||
@@ -235,10 +298,6 @@ CONFIG_STM32_USART=y
|
||||
# USB Device Configuration
|
||||
#
|
||||
|
||||
#
|
||||
# External Memory Configuration
|
||||
#
|
||||
|
||||
#
|
||||
# Architecture Options
|
||||
#
|
||||
@@ -260,8 +319,6 @@ CONFIG_ARCH_HAVE_RAMVECTORS=y
|
||||
#
|
||||
CONFIG_BOARD_LOOPSPERMSEC=16717
|
||||
# CONFIG_ARCH_CALIBRATION is not set
|
||||
CONFIG_RAM_START=0x20000000
|
||||
CONFIG_RAM_SIZE=114688
|
||||
CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=0
|
||||
|
||||
@@ -274,10 +331,17 @@ CONFIG_BOOT_RUNFROMFLASH=y
|
||||
# CONFIG_BOOT_RUNFROMSDRAM is not set
|
||||
# CONFIG_BOOT_COPYTORAM is not set
|
||||
|
||||
#
|
||||
# Boot Memory Configuration
|
||||
#
|
||||
CONFIG_RAM_START=0x20000000
|
||||
CONFIG_RAM_SIZE=114688
|
||||
|
||||
#
|
||||
# Board Selection
|
||||
#
|
||||
CONFIG_ARCH_BOARD_STM32F4_DISCOVERY=y
|
||||
# CONFIG_ARCH_BOARD_MIKROE_STM32F4 is not set
|
||||
# CONFIG_ARCH_BOARD_CUSTOM is not set
|
||||
CONFIG_ARCH_BOARD="stm32f4discovery"
|
||||
|
||||
@@ -372,13 +436,17 @@ CONFIG_DEV_NULL=y
|
||||
# CONFIG_LOOP is not set
|
||||
# CONFIG_RAMDISK is not set
|
||||
# CONFIG_CAN is not set
|
||||
# CONFIG_ARCH_HAVE_PWM_PULSECOUNT is not set
|
||||
# CONFIG_PWM is not set
|
||||
# CONFIG_I2C is not set
|
||||
CONFIG_ARCH_HAVE_I2CRESET=y
|
||||
# CONFIG_I2C is not set
|
||||
# CONFIG_SPI is not set
|
||||
# CONFIG_I2S is not set
|
||||
# CONFIG_RTC is not set
|
||||
# CONFIG_WATCHDOG is not set
|
||||
# CONFIG_ANALOG is not set
|
||||
# CONFIG_AUDIO_DEVICES is not set
|
||||
# CONFIG_VIDEO_DEVICES is not set
|
||||
# CONFIG_BCH is not set
|
||||
# CONFIG_INPUT is not set
|
||||
# CONFIG_LCD is not set
|
||||
@@ -393,6 +461,11 @@ CONFIG_SERIAL=y
|
||||
CONFIG_DEV_LOWCONSOLE=y
|
||||
# CONFIG_16550_UART is not set
|
||||
CONFIG_ARCH_HAVE_USART2=y
|
||||
|
||||
#
|
||||
# USART Configuration
|
||||
#
|
||||
CONFIG_USART2_ISUART=y
|
||||
CONFIG_MCU_SERIAL=y
|
||||
CONFIG_USART2_SERIAL_CONSOLE=y
|
||||
# CONFIG_NO_SERIAL_CONSOLE is not set
|
||||
@@ -406,6 +479,10 @@ CONFIG_USART2_BAUD=115200
|
||||
CONFIG_USART2_BITS=8
|
||||
CONFIG_USART2_PARITY=0
|
||||
CONFIG_USART2_2STOP=0
|
||||
# CONFIG_USART2_IFLOWCONTROL is not set
|
||||
# CONFIG_USART2_OFLOWCONTROL is not set
|
||||
# CONFIG_SERIAL_IFLOWCONTROL is not set
|
||||
# CONFIG_SERIAL_OFLOWCONTROL is not set
|
||||
# CONFIG_USBDEV is not set
|
||||
# CONFIG_USBHOST is not set
|
||||
# CONFIG_WIRELESS is not set
|
||||
@@ -422,6 +499,8 @@ CONFIG_USART2_2STOP=0
|
||||
#
|
||||
# Networking Support
|
||||
#
|
||||
# CONFIG_ARCH_HAVE_NET is not set
|
||||
# CONFIG_ARCH_HAVE_PHY is not set
|
||||
# CONFIG_NET is not set
|
||||
|
||||
#
|
||||
@@ -432,7 +511,10 @@ CONFIG_USART2_2STOP=0
|
||||
# File system configuration
|
||||
#
|
||||
CONFIG_DISABLE_MOUNTPOINT=y
|
||||
# CONFIG_FS_READABLE is not set
|
||||
# CONFIG_FS_WRITABLE is not set
|
||||
# CONFIG_FS_RAMMAP is not set
|
||||
# CONFIG_FS_PROCFS is not set
|
||||
|
||||
#
|
||||
# System Logging
|
||||
@@ -455,6 +537,11 @@ CONFIG_MM_KERNEL_HEAPSIZE=8192
|
||||
CONFIG_MM_REGIONS=2
|
||||
# CONFIG_GRAN is not set
|
||||
|
||||
#
|
||||
# Audio Support
|
||||
#
|
||||
# CONFIG_AUDIO is not set
|
||||
|
||||
#
|
||||
# Binary Formats
|
||||
#
|
||||
@@ -478,6 +565,7 @@ CONFIG_NUNGET_CHARS=2
|
||||
# CONFIG_LIBM is not set
|
||||
# CONFIG_NOPRINTF_FIELDWIDTH is not set
|
||||
# CONFIG_LIBC_FLOATINGPOINT is not set
|
||||
CONFIG_LIB_RAND_ORDER=1
|
||||
# CONFIG_EOL_IS_CR is not set
|
||||
# CONFIG_EOL_IS_LF is not set
|
||||
# CONFIG_EOL_IS_BOTH_CRLF is not set
|
||||
@@ -497,6 +585,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
|
||||
#
|
||||
# CONFIG_SCHED_WORKQUEUE is not set
|
||||
# CONFIG_LIB_KBDCODEC is not set
|
||||
# CONFIG_LIB_SLCDCODEC is not set
|
||||
|
||||
#
|
||||
# Basic CXX Support
|
||||
@@ -517,7 +606,7 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
|
||||
#
|
||||
# CONFIG_EXAMPLES_BUTTONS is not set
|
||||
# CONFIG_EXAMPLES_CAN is not set
|
||||
# CONFIG_SYSTEM_COMPOSITE is not set
|
||||
# CONFIG_EXAMPLES_CONFIGDATA is not set
|
||||
# CONFIG_EXAMPLES_DHCPD is not set
|
||||
# CONFIG_EXAMPLES_ELF is not set
|
||||
# CONFIG_EXAMPLES_FTPC is not set
|
||||
@@ -530,8 +619,9 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
|
||||
# CONFIG_EXAMPLES_IGMP is not set
|
||||
# CONFIG_EXAMPLES_LCDRW is not set
|
||||
# CONFIG_EXAMPLES_MM is not set
|
||||
# CONFIG_EXAMPLES_MOUNT is not set
|
||||
# CONFIG_EXAMPLES_MODBUS is not set
|
||||
# CONFIG_EXAMPLES_MOUNT is not set
|
||||
# CONFIG_EXAMPLES_NRF24L01TERM is not set
|
||||
# CONFIG_EXAMPLES_NSH is not set
|
||||
# CONFIG_EXAMPLES_NULL is not set
|
||||
# CONFIG_EXAMPLES_NX is not set
|
||||
@@ -557,6 +647,9 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
|
||||
# CONFIG_EXAMPLES_ROMFS is not set
|
||||
# CONFIG_EXAMPLES_SENDMAIL is not set
|
||||
# CONFIG_EXAMPLES_SERLOOP is not set
|
||||
# CONFIG_EXAMPLES_SLCD is not set
|
||||
# CONFIG_EXAMPLES_SMART is not set
|
||||
# CONFIG_EXAMPLES_TCPECHO is not set
|
||||
# CONFIG_EXAMPLES_TELNETD is not set
|
||||
# CONFIG_EXAMPLES_THTTPD is not set
|
||||
# CONFIG_EXAMPLES_TIFF is not set
|
||||
@@ -564,7 +657,6 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
|
||||
# CONFIG_EXAMPLES_UDP is not set
|
||||
# CONFIG_EXAMPLES_UIP is not set
|
||||
# CONFIG_EXAMPLES_USBSERIAL is not set
|
||||
# CONFIG_SYSTEM_USBMSC is not set
|
||||
# CONFIG_EXAMPLES_USBTERM is not set
|
||||
# CONFIG_EXAMPLES_WATCHDOG is not set
|
||||
|
||||
@@ -614,10 +706,23 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
|
||||
# NxWidgets/NxWM
|
||||
#
|
||||
|
||||
#
|
||||
# Platform-specific Support
|
||||
#
|
||||
# CONFIG_PLATFORM_CONFIGDATA is not set
|
||||
|
||||
#
|
||||
# System NSH Add-Ons
|
||||
#
|
||||
|
||||
#
|
||||
# USB CDC/ACM Device Commands
|
||||
#
|
||||
|
||||
#
|
||||
# USB Composite Device Commands
|
||||
#
|
||||
|
||||
#
|
||||
# Custom Free Memory Command
|
||||
#
|
||||
@@ -632,6 +737,20 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
|
||||
#
|
||||
# CONFIG_SYSTEM_INSTALL is not set
|
||||
|
||||
#
|
||||
# FLASH Erase-all Command
|
||||
#
|
||||
|
||||
#
|
||||
# NxPlayer media player library / command Line
|
||||
#
|
||||
# CONFIG_SYSTEM_NXPLAYER is not set
|
||||
|
||||
#
|
||||
# RAM test
|
||||
#
|
||||
# CONFIG_SYSTEM_RAMTEST is not set
|
||||
|
||||
#
|
||||
# readline()
|
||||
#
|
||||
@@ -660,3 +779,16 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
|
||||
#
|
||||
# USB Monitor
|
||||
#
|
||||
|
||||
#
|
||||
# Stack Monitor
|
||||
#
|
||||
|
||||
#
|
||||
# USB Mass Storage Device Commands
|
||||
#
|
||||
|
||||
#
|
||||
# Zmodem Commands
|
||||
#
|
||||
# CONFIG_SYSTEM_ZMODEM is not set
|
||||
|
||||
@@ -518,7 +518,9 @@ static ssize_t fat_read(FAR struct file *filep, char *buffer, size_t buflen)
|
||||
{
|
||||
bytesread = 0;
|
||||
|
||||
#ifdef CONFIG_FAT_DMAMEMORY /* Warning avoidance */
|
||||
fat_read_restart:
|
||||
#endif
|
||||
|
||||
/* Check if the user has provided a buffer large enough to
|
||||
* hold one or more complete sectors -AND- the read is
|
||||
@@ -756,7 +758,9 @@ static ssize_t fat_write(FAR struct file *filep, const char *buffer,
|
||||
* hold one or more complete sectors.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_FAT_DMAMEMORY /* Warning avoidance */
|
||||
fat_write_restart:
|
||||
#endif
|
||||
|
||||
nsectors = buflen / fs->fs_hwsectorsize;
|
||||
if (nsectors > 0 && sectorindex == 0 && !force_indirect)
|
||||
|
||||
@@ -128,7 +128,9 @@ int nanosleep(FAR const struct timespec *rqtp, FAR struct timespec *rmtp)
|
||||
sigset_t set;
|
||||
struct siginfo value;
|
||||
int errval;
|
||||
#ifdef CONFIG_DEBUG /* Warning avoidance */
|
||||
int ret;
|
||||
#endif
|
||||
|
||||
if (!rqtp || rqtp->tv_nsec < 0 || rqtp->tv_nsec >= 1000000000)
|
||||
{
|
||||
@@ -153,7 +155,11 @@ int nanosleep(FAR const struct timespec *rqtp, FAR struct timespec *rmtp)
|
||||
|
||||
/* nanosleep is a simple application of sigtimedwait. */
|
||||
|
||||
#ifdef CONFIG_DEBUG /* Warning avoidance */
|
||||
ret = sigtimedwait(&set, &value, rqtp);
|
||||
#else
|
||||
(void)sigtimedwait(&set, &value, rqtp);
|
||||
#endif
|
||||
|
||||
/* sigtimedwait() cannot succeed. It should always return error with
|
||||
* either (1) EAGAIN meaning that the timeout occurred, or (2) EINTR
|
||||
|
||||
Reference in New Issue
Block a user