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arch/arm/src/tiva/cc13xx/cc13x2_v1_trim.c and cc13x2_cc26x2_v1_rom.c: Review and modified for coding style. Now pass tools/nxstyle wihout complaint.

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This commit is contained in:
Gregory Nutt
2019-01-25 14:07:54 -06:00
parent f9ac7a22ca
commit d35c7d95f1
3 changed files with 262 additions and 267 deletions
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arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v1_rom.c
+61 -53
View File
@@ -1,10 +1,11 @@
/************************************************************************************ /****************************************************************************
* arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v1_rom.c * arch/arm/src/tiva/cc13xx/cc13x2_cc26x2_v1_rom.c
* *
* Copyright (C) 2019 Gregory Nutt. All rights reserved. * Copyright (C) 2019 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org> * Author: Gregory Nutt <gnutt@nuttx.org>
* *
* This is a port of TI's setup_rom.c file which has a fully compatible BSD license: * This is a port of TI's setup_rom.c file which has a fully compatible BSD
* license:
* *
* Copyright (c) 2015-2017, Texas Instruments Incorporated * Copyright (c) 2015-2017, Texas Instruments Incorporated
* All rights reserved. * All rights reserved.
@@ -36,11 +37,11 @@
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE. * POSSIBILITY OF SUCH DAMAGE.
* *
************************************************************************************/ ****************************************************************************/
/************************************************************************************ /****************************************************************************
* Included Files * Included Files
************************************************************************************/ ****************************************************************************/
#include <stdint.h> #include <stdint.h>
@@ -59,13 +60,13 @@
#include "cc13xx/cc13x2_cc26x2_v1_rom.h" #include "cc13xx/cc13x2_cc26x2_v1_rom.h"
/************************************************************************************ /****************************************************************************
* Public Functions * Public Functions
************************************************************************************/ ****************************************************************************/
/************************************************************************************ /****************************************************************************
* Name: rom_setup_stepvaddrtrimto * Name: rom_setup_stepvaddrtrimto
************************************************************************************/ ****************************************************************************/
void rom_setup_stepvaddrtrimto(uint32_t tocode) void rom_setup_stepvaddrtrimto(uint32_t tocode)
{ {
@@ -74,37 +75,41 @@ void rom_setup_stepvaddrtrimto(uint32_t tocode)
int32_t current_trim; int32_t current_trim;
target_trim = target_trim =
rom_signextend_vddrtrim(tocode & rom_signextend_vddrtrim(tocode & (ADI3_REFSYS_DCDCCTL0_VDDR_TRIM_MASK >>
(ADI3_REFSYS_DCDCCTL0_VDDR_TRIM_MASK >> ADI3_REFSYS_DCDCCTL0_VDDR_TRIM_SHIFT));
ADI3_REFSYS_DCDCCTL0_VDDR_TRIM_SHIFT));
current_trim = current_trim =
rom_signextend_vddrtrim((getreg16(TIVA_ADI3_REFSYS_DCDCCTL0) & rom_signextend_vddrtrim((getreg16(TIVA_ADI3_REFSYS_DCDCCTL0) &
ADI3_REFSYS_DCDCCTL0_VDDR_TRIM_MASK) >> ADI3_REFSYS_DCDCCTL0_VDDR_TRIM_MASK) >>
ADI3_REFSYS_DCDCCTL0_VDDR_TRIM_SHIFT); ADI3_REFSYS_DCDCCTL0_VDDR_TRIM_SHIFT);
if (target_trim != current_trim) if (target_trim != current_trim)
{ {
pmctl_regsetctrl = pmctl_regsetctrl = (getreg32(TIVA_AON_PMCTL_RESETCTL) &
(getreg32(TIVA_AON_PMCTL_RESETCTL) & ~AON_PMCTL_RESETCTL_MCU_WARM_RESET);
~AON_PMCTL_RESETCTL_MCU_WARM_RESET);
if (pmctl_regsetctrl & AON_PMCTL_RESETCTL_VDDR_LOSS_EN) if (pmctl_regsetctrl & AON_PMCTL_RESETCTL_VDDR_LOSS_EN)
{ {
putreg32(pmctl_regsetctrl & ~AON_PMCTL_RESETCTL_VDDR_LOSS_EN, putreg32(pmctl_regsetctrl & ~AON_PMCTL_RESETCTL_VDDR_LOSS_EN,
TIVA_AON_PMCTL_RESETCTL); TIVA_AON_PMCTL_RESETCTL);
(void)getreg32(TIVA_AON_RTC_SYNC); /* Wait for VDDR_LOSS_EN
* setting to propagate */ /* Wait for VDDR_LOSS_EN setting to propagate */
(void)getreg32(TIVA_AON_RTC_SYNC);
} }
while (target_trim != current_trim) while (target_trim != current_trim)
{ {
(void)getreg32(TIVA_AON_RTC_SYNCLF); /* Wait for next edge /* Wait for next edge on SCLK_LF (positive or negative) */
* on SCLK_LF (positive
* or negative) */ (void)getreg32(TIVA_AON_RTC_SYNCLF);
if (target_trim > current_trim) if (target_trim > current_trim)
current_trim++; {
current_trim++;
}
else else
current_trim--; {
current_trim--;
}
putreg8(((getreg8(TIVA_ADI3_REFSYS_DCDCCTL0) & putreg8(((getreg8(TIVA_ADI3_REFSYS_DCDCCTL0) &
~ADI3_REFSYS_DCDCCTL0_VDDR_TRIM_MASK) | ~ADI3_REFSYS_DCDCCTL0_VDDR_TRIM_MASK) |
@@ -114,32 +119,32 @@ void rom_setup_stepvaddrtrimto(uint32_t tocode)
TIVA_ADI3_REFSYS_DCDCCTL0); TIVA_ADI3_REFSYS_DCDCCTL0);
} }
(void)getreg32(TIVA_AON_RTC_SYNCLF); /* Wait for next edge on /* Wait for next edge on SCLK_LF (positive or negative) */
* SCLK_LF (positive or
* negative) */
if (pmctl_regsetctrl & AON_PMCTL_RESETCTL_VDDR_LOSS_EN) (void)getreg32(TIVA_AON_RTC_SYNCLF);
if ((pmctl_regsetctrl & AON_PMCTL_RESETCTL_VDDR_LOSS_EN) != 0)
{ {
(void)getreg32(TIVA_AON_RTC_SYNCLF); /* Wait for next edge /* Wait for next edge on SCLK_LF (positive or negative) */
* on SCLK_LF (positive
* or negative) */
(void)getreg32(TIVA_AON_RTC_SYNCLF); /* Wait for next edge (void)getreg32(TIVA_AON_RTC_SYNCLF);
* on SCLK_LF (positive
* or negative) */ /* Wait for next edge on SCLK_LF (positive or negative) */
(void)getreg32(TIVA_AON_RTC_SYNCLF);
putreg32(pmctl_regsetctrl, TIVA_AON_PMCTL_RESETCTL); putreg32(pmctl_regsetctrl, TIVA_AON_PMCTL_RESETCTL);
(void)getreg32(TIVA_AON_RTC_SYNC); /* And finally wait for
* VDDR_LOSS_EN setting to
* propagate */
/* And finally wait for VDDR_LOSS_EN setting to propagate */
(void)getreg32(TIVA_AON_RTC_SYNC);
} }
} }
} }
/************************************************************************************ /****************************************************************************
* Name: rom_setup_coldreset_from_shutdown_cfg1 * Name: rom_setup_coldreset_from_shutdown_cfg1
************************************************************************************/ ****************************************************************************/
void rom_setup_coldreset_from_shutdown_cfg1(uint32_t ccfg_modeconf) void rom_setup_coldreset_from_shutdown_cfg1(uint32_t ccfg_modeconf)
{ {
@@ -147,15 +152,17 @@ void rom_setup_coldreset_from_shutdown_cfg1(uint32_t ccfg_modeconf)
uint32_t clrbits; uint32_t clrbits;
/* Check for CC1352 boost mode The combination VDDR_EXT_LOAD=0 and /* Check for CC1352 boost mode The combination VDDR_EXT_LOAD=0 and
* VDDS_BOD_LEVEL=1 is defined to select boost mode */ * VDDS_BOD_LEVEL=1 is defined to select boost mode
*/
if (((ccfg_modeconf & CCFG_MODE_CONF_VDDR_EXT_LOAD) == 0) && if ((ccfg_modeconf & CCFG_MODE_CONF_VDDR_EXT_LOAD) == 0 &&
((ccfg_modeconf & CCFG_MODE_CONF_VDDS_BOD_LEVEL) != 0)) (ccfg_modeconf & CCFG_MODE_CONF_VDDS_BOD_LEVEL) != 0)
{ {
/* Set VDDS_BOD trim - using masked write {MASK8:DATA8} - TRIM_VDDS_BOD /* Set VDDS_BOD trim - using masked write {MASK8:DATA8} - TRIM_VDDS_BOD
* is bits[7:3] of ADI3..REFSYSCTL1 - Needs a positive transition on * is bits[7:3] of ADI3..REFSYSCTL1 - Needs a positive transition on
* BOD_BG_TRIM_EN (bit[7] of REFSYSCTL3) to latch new VDDS BOD. Set to 0 * BOD_BG_TRIM_EN (bit[7] of REFSYSCTL3) to latch new VDDS BOD. Set to 0
* first to guarantee a positive transition. */ * first to guarantee a positive transition.
*/
putreg8(ADI3_REFSYS_REFSYSCTL3_BOD_BG_TRIM_EN, putreg8(ADI3_REFSYS_REFSYSCTL3_BOD_BG_TRIM_EN,
TIVA_ADI3_REFSYS_CLR + TIVA_ADI3_REFSYS_REFSYSCTL3_OFFSET); TIVA_ADI3_REFSYS_CLR + TIVA_ADI3_REFSYS_REFSYSCTL3_OFFSET);
@@ -166,25 +173,26 @@ void rom_setup_coldreset_from_shutdown_cfg1(uint32_t ccfg_modeconf)
putreg16((ADI3_REFSYS_REFSYSCTL1_TRIM_VDDS_BOD_MASK << 8) | putreg16((ADI3_REFSYS_REFSYSCTL1_TRIM_VDDS_BOD_MASK << 8) |
(ADI3_REFSYS_REFSYSCTL1_TRIM_VDDS_BOD_POS_31), (ADI3_REFSYS_REFSYSCTL1_TRIM_VDDS_BOD_POS_31),
TIVA_ADI3_REFSYS_MASK8B + (TIVA_ADI3_REFSYS_REFSYSCTL1_OFFSET * 2)); TIVA_ADI3_REFSYS_MASK8B +
(TIVA_ADI3_REFSYS_REFSYSCTL1_OFFSET * 2));
putreg8(ADI3_REFSYS_REFSYSCTL3_BOD_BG_TRIM_EN, putreg8(ADI3_REFSYS_REFSYSCTL3_BOD_BG_TRIM_EN,
TIVA_ADI3_REFSYS_SET + TIVA_ADI3_REFSYS_REFSYSCTL3_OFFSET); TIVA_ADI3_REFSYS_SET + TIVA_ADI3_REFSYS_REFSYSCTL3_OFFSET);
rom_setup_stepvaddrtrimto((getreg32(TIVA_FCFG1_VOLT_TRIM) & rom_setup_stepvaddrtrimto((getreg32(TIVA_FCFG1_VOLT_TRIM) &
FCFG1_VOLT_TRIM_VDDR_TRIM_HH_MASK) >> FCFG1_VOLT_TRIM_VDDR_TRIM_HH_MASK) >>
FCFG1_VOLT_TRIM_VDDR_TRIM_HH_SHIFT); FCFG1_VOLT_TRIM_VDDR_TRIM_HH_SHIFT);
} }
/* 1. Do not allow DCDC to be enabled if in external regulator mode. /* 1. Do not allow DCDC to be enabled if in external regulator mode.
* Preventing this by setting both the RECHARGE and the ACTIVE bits bit in * Preventing this by setting both the RECHARGE and the ACTIVE bits bit
* the CCFG_MODE_CONF copy register (ccfg_modeconf). 2. Adjusted battery * in the CCFG_MODE_CONF copy register (ccfg_modeconf).
* monitor low limit in internal regulator mode. This is done by setting * 2. Adjusted battery monitor low limit in internal regulator mode. This
* AON_BATMON_FLASHPUMPP0_LOWLIM=0 in internal regulator mode. * is done by setting AON_BATMON_FLASHPUMPP0_LOWLIM=0 in internal
* regulator mode.
*/ */
if (getreg32(TIVA_AON_PMCTL_PWRCTL) & if ((getreg32(TIVA_AON_PMCTL_PWRCTL) & AON_PMCTL_PWRCTL_EXT_REG_MODE) != 0)
AON_PMCTL_PWRCTL_EXT_REG_MODE)
{ {
ccfg_modeconf |= (CCFG_MODE_CONF_DCDC_RECHARGE | ccfg_modeconf |= (CCFG_MODE_CONF_DCDC_RECHARGE |
CCFG_MODE_CONF_DCDC_ACTIVE); CCFG_MODE_CONF_DCDC_ACTIVE);
arch/arm/src/tiva/cc13xx/cc13x2_v1_trim.c
+200 -213
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arch/arm/src/tiva/cc13xx/cc13xx_start.c
+1 -1
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@@ -279,7 +279,7 @@ void __start(void)
showprogress('E'); showprogress('E');
#endif #endif
#ifdef CONFIG_TIVA_CC26X2_POWERLIB /* REVISIT */ #ifdef CONFIG_TIVA_CC26X2_POWERLIB /* REVISIT: Used with CC13x2 as well. */
/* Initialize the Power Manager internal state. This must be called prior /* Initialize the Power Manager internal state. This must be called prior
* to any other Power API. * to any other Power API.
*/ */