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Fix setup of PLLSAI in STM32F4xx.

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To correctly setup the PLLSAI register it is required to first mask out
the old PLL divisor and multiplier factors before setting new ones

Signed-off-by: Marten Svanfeldt <marten@intuitiveaerial.com>
This commit is contained in:
Marten Svanfeldt
2015-10-21 10:33:39 +08:00
parent ddf936c913
commit d1c7e5b5fb
1 changed files with 4 additions and 0 deletions
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arch/arm/src/stm32/stm32f40xxx_rcc.c
+4
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@@ -751,12 +751,16 @@ static void stm32_stdclockconfig(void)
/* Configure PLLSAI */
regval = getreg32(STM32_RCC_PLLSAICFGR);
regval &= ~(RCC_PLLSAICFGR_PLLSAIN_MASK
| RCC_PLLSAICFGR_PLLSAIR_MASK
| RCC_PLLSAICFGR_PLLSAIQ_MASK);
regval |= (STM32_RCC_PLLSAICFGR_PLLSAIN
| STM32_RCC_PLLSAICFGR_PLLSAIR
| STM32_RCC_PLLSAICFGR_PLLSAIQ);
putreg32(regval, STM32_RCC_PLLSAICFGR);
regval = getreg32(STM32_RCC_DCKCFGR);
regval &= ~RCC_DCKCFGR_PLLSAIDIVR_MASK;
regval |= STM32_RCC_DCKCFGR_PLLSAIDIVR;
putreg32(regval, STM32_RCC_DCKCFGR);