qemu: simply SMP boot

Signed-off-by: ligd <liguiding1@xiaomi.com>
This commit is contained in:
ligd
2023-12-29 22:31:57 +08:00
committed by Xiang Xiao
parent 86a1cc30a5
commit d1bcc1f504
3 changed files with 18 additions and 146 deletions
+17 -10
View File
@@ -25,10 +25,12 @@
#include <nuttx/config.h>
#include "arm_internal.h"
#include "arm_cpu_psci.h"
#include "qemu_boot.h"
#include "qemu_irq.h"
#include "qemu_memorymap.h"
#include "smp.h"
#include "gic.h"
#ifdef CONFIG_DEVICE_TREE
# include <nuttx/fdt.h>
@@ -58,7 +60,7 @@ void arm_boot(void)
arm_fpuconfig();
#if defined(CONFIG_ARCH_HAVE_PSCI)
#ifdef CONFIG_ARCH_HAVE_PSCI
arm_psci_init("hvc");
#endif
@@ -73,12 +75,17 @@ void arm_boot(void)
arm_earlyserialinit();
#endif
/* Now we can enable all other CPUs. The enabled CPUs will start execution
* at __cpuN_start and, after very low-level CPU initialization has been
* performed, will branch to arm_cpu_boot()
* (see arch/arm/src/armv7-a/smp.h)
*/
qemu_cpu_enable();
}
#if defined(CONFIG_ARCH_HAVE_PSCI) && defined(CONFIG_SMP)
int up_cpu_start(int cpu)
{
#ifdef CONFIG_SCHED_INSTRUMENTATION
/* Notify of the start event */
sched_note_cpu_start(this_task_inirq(), cpu);
#endif
return psci_cpu_on(cpu, (uintptr_t)__start);
}
#endif
-83
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@@ -1,83 +0,0 @@
/****************************************************************************
* arch/arm/src/qemu/qemu_boot.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_QEMU_QEMU_BOOT_H
#define __ARCH_ARM_SRC_QEMU_QEMU_BOOT_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/compiler.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <arch/chip/chip.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Name: qemu_cpu_enable
*
* Description:
* Called from CPU0 to enable all other CPUs. The enabled CPUs will start
* execution at __cpuN_start and, after very low-level CPU initialization
* has been performed, will branch to arm_cpu_boot()
* (see arch/arm/src/armv7-a/smp.h)
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
#ifdef CONFIG_SMP
void qemu_cpu_enable(void);
#else
# define qemu_cpu_enable()
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_QEMU_QEMU_BOOT_H */
+1 -53
View File
@@ -33,32 +33,8 @@
#include "arm_internal.h"
#include "sctlr.h"
#include "smp.h"
#include "scu.h"
#include "gic.h"
#include "mmu.h"
#include "barriers.h"
#include "arm_cpu_psci.h"
#ifdef CONFIG_SMP
/****************************************************************************
* Private Data
****************************************************************************/
static const start_t g_cpu_boot[CONFIG_SMP_NCPUS] =
{
0,
#if CONFIG_SMP_NCPUS > 1
__cpu1_start,
#endif
#if CONFIG_SMP_NCPUS > 2
__cpu2_start,
#endif
#if CONFIG_SMP_NCPUS > 3
__cpu3_start
#endif
};
/* Symbols defined via the linker script */
@@ -68,35 +44,6 @@ extern uint8_t _vector_start[]; /* Beginning of vector block */
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: qemu_cpu_enable
*
* Description:
* Called from CPU0 to enable all other CPUs. The enabled CPUs will start
* execution at __cpuN_start and, after very low-level CPU initialization
* has been performed, will branch to arm_cpu_boot()
* (see arch/arm/src/armv7-a/smp.h)
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
void qemu_cpu_enable(void)
{
int cpu;
for (cpu = 1; cpu < CONFIG_SMP_NCPUS; cpu++)
{
/* Then enable the CPU */
psci_cpu_on(CORE_TO_MPID(cpu, 0), (uintptr_t)g_cpu_boot[cpu]);
}
}
/****************************************************************************
* Name: arm_cpu_boot
*
@@ -118,6 +65,7 @@ void qemu_cpu_enable(void)
*
****************************************************************************/
#ifdef CONFIG_SMP
void arm_cpu_boot(int cpu)
{
/* Enable SMP cache coherency for the CPU */