add hpmicro chip: hpm6750

Signed-off-by: Zhihong Chen <zhihong.chen@hpmicro.com>
This commit is contained in:
Zhihong Chen
2023-02-08 10:49:31 +08:00
committed by Xiang Xiao
parent 4aada75249
commit d082af34f7
40 changed files with 6093 additions and 0 deletions

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@@ -146,6 +146,17 @@ config ARCH_CHIP_QEMU_RV
---help---
QEMU Generic RV32/RV64 processor
config ARCH_CHIP_HPM6750
bool "Hpmicro HPM6750"
select ARCH_RV32
select ARCH_RV_ISA_M
select ARCH_RV_ISA_A
select ARCH_RV_ISA_C
select ONESHOT
select ALARM_ARCH
---help---
Hpmicro HPM6750 processor (D45 RISC-V Core with MAC extensions).
config ARCH_CHIP_RISCV_CUSTOM
bool "Custom RISC-V chip"
select ARCH_CHIP_CUSTOM
@@ -192,6 +203,7 @@ config ARCH_CHIP
default "mpfs" if ARCH_CHIP_MPFS
default "rv32m1" if ARCH_CHIP_RV32M1
default "qemu-rv" if ARCH_CHIP_QEMU_RV
default "hpm6750" if ARCH_CHIP_HPM6750
config ARCH_RISCV_INTXCPT_EXTENSIONS
bool "RISC-V Integer Context Extensions"
@@ -329,4 +341,7 @@ endif
if ARCH_CHIP_QEMU_RV
source "arch/risc-v/src/qemu-rv/Kconfig"
endif
if ARCH_CHIP_HPM6750
source "arch/risc-v/src/hpm6750/Kconfig"
endif
endif

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@@ -0,0 +1,24 @@
/****************************************************************************
* arch/risc-v/include/hpm6750/chip.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_INCLUDE_HPM6750_CHIP_H
#define __ARCH_RISCV_INCLUDE_HPM6750_CHIP_H
#endif /* __ARCH_RISCV_INCLUDE_HPM6750_CHIP_H */

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@@ -0,0 +1,170 @@
/****************************************************************************
* arch/risc-v/include/hpm6750/irq.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_INCLUDE_HPM6750_IRQ_H
#define __ARCH_RISCV_INCLUDE_HPM6750_IRQ_H
/****************************************************************************
* Included Files
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Map RISC-V exception code to NuttX IRQ */
#define HPM6750_IRQ_PERI_START (RISCV_IRQ_ASYNC + 20)
/* Machine Global External Interrupt */
#define HPM6750_IRQ_GPIO0_A (HPM6750_IRQ_PERI_START + 1)
#define HPM6750_IRQ_GPIO0_B (HPM6750_IRQ_PERI_START + 2)
#define HPM6750_IRQ_GPIO0_C (HPM6750_IRQ_PERI_START + 3)
#define HPM6750_IRQ_GPIO0_D (HPM6750_IRQ_PERI_START + 4)
#define HPM6750_IRQ_GPIO0_E (HPM6750_IRQ_PERI_START + 5)
#define HPM6750_IRQ_GPIO0_F (HPM6750_IRQ_PERI_START + 6)
#define HPM6750_IRQ_GPIO0_X (HPM6750_IRQ_PERI_START + 7)
#define HPM6750_IRQ_GPIO0_Y (HPM6750_IRQ_PERI_START + 8)
#define HPM6750_IRQ_GPIO0_Z (HPM6750_IRQ_PERI_START + 9)
#define HPM6750_IRQ_GPIO1_A (HPM6750_IRQ_PERI_START + 10)
#define HPM6750_IRQ_GPIO1_B (HPM6750_IRQ_PERI_START + 11)
#define HPM6750_IRQ_GPIO1_C (HPM6750_IRQ_PERI_START + 12)
#define HPM6750_IRQ_GPIO1_D (HPM6750_IRQ_PERI_START + 13)
#define HPM6750_IRQ_GPIO1_E (HPM6750_IRQ_PERI_START + 14)
#define HPM6750_IRQ_GPIO1_F (HPM6750_IRQ_PERI_START + 15)
#define HPM6750_IRQ_GPIO1_X (HPM6750_IRQ_PERI_START + 16)
#define HPM6750_IRQ_GPIO1_Y (HPM6750_IRQ_PERI_START + 17)
#define HPM6750_IRQ_GPIO1_Z (HPM6750_IRQ_PERI_START + 18)
#define HPM6750_IRQ_ADC0 (HPM6750_IRQ_PERI_START + 19)
#define HPM6750_IRQ_ADC1 (HPM6750_IRQ_PERI_START + 20)
#define HPM6750_IRQ_ADC2 (HPM6750_IRQ_PERI_START + 21)
#define HPM6750_IRQ_ADC3 (HPM6750_IRQ_PERI_START + 22)
#define HPM6750_IRQ_ACMP_0 (HPM6750_IRQ_PERI_START + 23)
#define HPM6750_IRQ_ACMP_1 (HPM6750_IRQ_PERI_START + 24)
#define HPM6750_IRQ_ACMP_2 (HPM6750_IRQ_PERI_START + 25)
#define HPM6750_IRQ_ACMP_3 (HPM6750_IRQ_PERI_START + 26)
#define HPM6750_IRQ_SPI0 (HPM6750_IRQ_PERI_START + 27)
#define HPM6750_IRQ_SPI1 (HPM6750_IRQ_PERI_START + 28)
#define HPM6750_IRQ_SPI2 (HPM6750_IRQ_PERI_START + 29)
#define HPM6750_IRQ_SPI3 (HPM6750_IRQ_PERI_START + 30)
#define HPM6750_IRQ_UART0 (HPM6750_IRQ_PERI_START + 31)
#define HPM6750_IRQ_UART1 (HPM6750_IRQ_PERI_START + 32)
#define HPM6750_IRQ_UART2 (HPM6750_IRQ_PERI_START + 33)
#define HPM6750_IRQ_UART3 (HPM6750_IRQ_PERI_START + 34)
#define HPM6750_IRQ_UART4 (HPM6750_IRQ_PERI_START + 35)
#define HPM6750_IRQ_UART5 (HPM6750_IRQ_PERI_START + 36)
#define HPM6750_IRQ_UART6 (HPM6750_IRQ_PERI_START + 37)
#define HPM6750_IRQ_UART7 (HPM6750_IRQ_PERI_START + 38)
#define HPM6750_IRQ_UART8 (HPM6750_IRQ_PERI_START + 39)
#define HPM6750_IRQ_UART9 (HPM6750_IRQ_PERI_START + 40)
#define HPM6750_IRQ_UART10 (HPM6750_IRQ_PERI_START + 41)
#define HPM6750_IRQ_UART11 (HPM6750_IRQ_PERI_START + 42)
#define HPM6750_IRQ_UART12 (HPM6750_IRQ_PERI_START + 43)
#define HPM6750_IRQ_UART13 (HPM6750_IRQ_PERI_START + 44)
#define HPM6750_IRQ_UART14 (HPM6750_IRQ_PERI_START + 45)
#define HPM6750_IRQ_UART15 (HPM6750_IRQ_PERI_START + 46)
#define HPM6750_IRQ_CAN0 (HPM6750_IRQ_PERI_START + 47)
#define HPM6750_IRQ_CAN1 (HPM6750_IRQ_PERI_START + 48)
#define HPM6750_IRQ_CAN2 (HPM6750_IRQ_PERI_START + 49)
#define HPM6750_IRQ_CAN3 (HPM6750_IRQ_PERI_START + 50)
#define HPM6750_IRQ_PTPC (HPM6750_IRQ_PERI_START + 51)
#define HPM6750_IRQ_WDG0 (HPM6750_IRQ_PERI_START + 52)
#define HPM6750_IRQ_WDG1 (HPM6750_IRQ_PERI_START + 53)
#define HPM6750_IRQ_WDG2 (HPM6750_IRQ_PERI_START + 54)
#define HPM6750_IRQ_WDG3 (HPM6750_IRQ_PERI_START + 55)
#define HPM6750_IRQ_MBX0A (HPM6750_IRQ_PERI_START + 56)
#define HPM6750_IRQ_MBX0B (HPM6750_IRQ_PERI_START + 57)
#define HPM6750_IRQ_MBX1A (HPM6750_IRQ_PERI_START + 58)
#define HPM6750_IRQ_MBX1B (HPM6750_IRQ_PERI_START + 59)
#define HPM6750_IRQ_GPTMR0 (HPM6750_IRQ_PERI_START + 60)
#define HPM6750_IRQ_GPTMR1 (HPM6750_IRQ_PERI_START + 61)
#define HPM6750_IRQ_GPTMR2 (HPM6750_IRQ_PERI_START + 62)
#define HPM6750_IRQ_GPTMR3 (HPM6750_IRQ_PERI_START + 63)
#define HPM6750_IRQ_GPTMR4 (HPM6750_IRQ_PERI_START + 64)
#define HPM6750_IRQ_GPTMR5 (HPM6750_IRQ_PERI_START + 65)
#define HPM6750_IRQ_GPTMR6 (HPM6750_IRQ_PERI_START + 66)
#define HPM6750_IRQ_GPTMR7 (HPM6750_IRQ_PERI_START + 67)
#define HPM6750_IRQ_I2C0 (HPM6750_IRQ_PERI_START + 68)
#define HPM6750_IRQ_I2C1 (HPM6750_IRQ_PERI_START + 69)
#define HPM6750_IRQ_I2C2 (HPM6750_IRQ_PERI_START + 70)
#define HPM6750_IRQ_I2C3 (HPM6750_IRQ_PERI_START + 71)
#define HPM6750_IRQ_PWM0 (HPM6750_IRQ_PERI_START + 72)
#define HPM6750_IRQ_HALL0 (HPM6750_IRQ_PERI_START + 73)
#define HPM6750_IRQ_QEI0 (HPM6750_IRQ_PERI_START + 74)
#define HPM6750_IRQ_PWM1 (HPM6750_IRQ_PERI_START + 75)
#define HPM6750_IRQ_HALL1 (HPM6750_IRQ_PERI_START + 76)
#define HPM6750_IRQ_QEI1 (HPM6750_IRQ_PERI_START + 77)
#define HPM6750_IRQ_PWM2 (HPM6750_IRQ_PERI_START + 78)
#define HPM6750_IRQ_HALL2 (HPM6750_IRQ_PERI_START + 79)
#define HPM6750_IRQ_QEI2 (HPM6750_IRQ_PERI_START + 80)
#define HPM6750_IRQ_PWM3 (HPM6750_IRQ_PERI_START + 81)
#define HPM6750_IRQ_HALL3 (HPM6750_IRQ_PERI_START + 82)
#define HPM6750_IRQ_QEI3 (HPM6750_IRQ_PERI_START + 83)
#define HPM6750_IRQ_SDP (HPM6750_IRQ_PERI_START + 84)
#define HPM6750_IRQ_XPI0 (HPM6750_IRQ_PERI_START + 85)
#define HPM6750_IRQ_XPI1 (HPM6750_IRQ_PERI_START + 86)
#define HPM6750_IRQ_XDMA (HPM6750_IRQ_PERI_START + 87)
#define HPM6750_IRQ_HDMA (HPM6750_IRQ_PERI_START + 88)
#define HPM6750_IRQ_FEMC (HPM6750_IRQ_PERI_START + 89)
#define HPM6750_IRQ_RNG (HPM6750_IRQ_PERI_START + 90)
#define HPM6750_IRQ_I2S0 (HPM6750_IRQ_PERI_START + 91)
#define HPM6750_IRQ_I2S1 (HPM6750_IRQ_PERI_START + 92)
#define HPM6750_IRQ_I2S2 (HPM6750_IRQ_PERI_START + 93)
#define HPM6750_IRQ_I2S3 (HPM6750_IRQ_PERI_START + 94)
#define HPM6750_IRQ_DAO (HPM6750_IRQ_PERI_START + 95)
#define HPM6750_IRQ_PDM (HPM6750_IRQ_PERI_START + 96)
#define HPM6750_IRQ_CAM0 (HPM6750_IRQ_PERI_START + 97)
#define HPM6750_IRQ_CAM1 (HPM6750_IRQ_PERI_START + 98)
#define HPM6750_IRQ_LCDC_D0 (HPM6750_IRQ_PERI_START + 99)
#define HPM6750_IRQ_LCDC_D1 (HPM6750_IRQ_PERI_START + 100)
#define HPM6750_IRQ_PDMA_D0 (HPM6750_IRQ_PERI_START + 101)
#define HPM6750_IRQ_PDMA_D1 (HPM6750_IRQ_PERI_START + 102)
#define HPM6750_IRQ_JPEG (HPM6750_IRQ_PERI_START + 103)
#define HPM6750_IRQ_NTMR0 (HPM6750_IRQ_PERI_START + 104)
#define HPM6750_IRQ_NTMR1 (HPM6750_IRQ_PERI_START + 105)
#define HPM6750_IRQ_USB0 (HPM6750_IRQ_PERI_START + 106)
#define HPM6750_IRQ_USB1 (HPM6750_IRQ_PERI_START + 107)
#define HPM6750_IRQ_ENET0 (HPM6750_IRQ_PERI_START + 108)
#define HPM6750_IRQ_ENET1 (HPM6750_IRQ_PERI_START + 109)
#define HPM6750_IRQ_SDXC0 (HPM6750_IRQ_PERI_START + 110)
#define HPM6750_IRQ_SDXC1 (HPM6750_IRQ_PERI_START + 111)
#define HPM6750_IRQ_PSEC (HPM6750_IRQ_PERI_START + 112)
#define HPM6750_IRQ_PGPIO (HPM6750_IRQ_PERI_START + 113)
#define HPM6750_IRQ_PWDG (HPM6750_IRQ_PERI_START + 114)
#define HPM6750_IRQ_PTMR (HPM6750_IRQ_PERI_START + 115)
#define HPM6750_IRQ_PUART (HPM6750_IRQ_PERI_START + 116)
#define HPM6750_IRQ_VAD (HPM6750_IRQ_PERI_START + 117)
#define HPM6750_IRQ_FUSE (HPM6750_IRQ_PERI_START + 118)
#define HPM6750_IRQ_SECMON (HPM6750_IRQ_PERI_START + 119)
#define HPM6750_IRQ_RTC (HPM6750_IRQ_PERI_START + 120)
#define HPM6750_IRQ_BUTN (HPM6750_IRQ_PERI_START + 121)
#define HPM6750_IRQ_BGPIO (HPM6750_IRQ_PERI_START + 122)
#define HPM6750_IRQ_BVIO (HPM6750_IRQ_PERI_START + 123)
#define HPM6750_IRQ_BROWNOUT (HPM6750_IRQ_PERI_START + 124)
#define HPM6750_IRQ_SYSCTL (HPM6750_IRQ_PERI_START + 125)
#define HPM6750_IRQ_DEBUG_0 (HPM6750_IRQ_PERI_START + 126)
#define HPM6750_IRQ_DEBUG_1 (HPM6750_IRQ_PERI_START + 127)
/* Total number of IRQs */
#define NR_IRQS (HPM6750_IRQ_PERI_START + 127)
#endif /* __ARCH_RISCV_INCLUDE_HPM6750_IRQ_H */

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@@ -0,0 +1,28 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
comment "HPM6750 Configuration Options"
menu "HPM6750 Peripheral Support"
# These "hidden" settings determine whether a peripheral option is available
# for the selected MCU
config HPM6750_HAVE_UART0
bool
default y
select UART0_SERIALDRIVER
select ARCH_HAVE_SERIAL_TERMIOS
# These are the peripheral selections proper
config HPM6750_UART0
bool "UART0"
default y
select ARCH_HAVE_UART0
select ARCH_HAVE_SERIAL_TERMIOS
select HPM6750_UART
endmenu

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@@ -0,0 +1,31 @@
############################################################################
# arch/risc-v/src/hpm6750/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include common/Make.defs
# Specify our HEAD assembly file. This will be linked as
# the first object file, so it will appear at address 0
HEAD_ASRC = hpm6750_head.S
# Specify our C code within this directory to be included
CHIP_CSRCS = hpm6750_clockconfig.c
CHIP_CSRCS += hpm6750_irq.c hpm6750_irq_dispatch.c
CHIP_CSRCS += hpm6750_lowputc.c hpm6750_serial.c
CHIP_CSRCS += hpm6750_start.c hpm6750_timerisr.c

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@@ -0,0 +1,32 @@
/****************************************************************************
* arch/risc-v/src/hpm6750/chip.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_HPM6750_CHIP_H
#define __ARCH_RISCV_SRC_HPM6750_CHIP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include "hpm6750_memorymap.h"
#endif /* __ARCH_RISCV_SRC_HPM6750_CHIP_H */

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@@ -0,0 +1,361 @@
/****************************************************************************
* arch/risc-v/src/hpm6750/hardware/hpm6750_ioc.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_HPM6750_HARDWARE_HPM6750_IOC_H
#define __ARCH_RISCV_SRC_HPM6750_HARDWARE_HPM6750_IOC_H
/* PAD register group index macro definition */
#define IOC_PAD_PA00 (0UL)
#define IOC_PAD_PA01 (1UL)
#define IOC_PAD_PA02 (2UL)
#define IOC_PAD_PA03 (3UL)
#define IOC_PAD_PA04 (4UL)
#define IOC_PAD_PA05 (5UL)
#define IOC_PAD_PA06 (6UL)
#define IOC_PAD_PA07 (7UL)
#define IOC_PAD_PA08 (8UL)
#define IOC_PAD_PA09 (9UL)
#define IOC_PAD_PA10 (10UL)
#define IOC_PAD_PA11 (11UL)
#define IOC_PAD_PA12 (12UL)
#define IOC_PAD_PA13 (13UL)
#define IOC_PAD_PA14 (14UL)
#define IOC_PAD_PA15 (15UL)
#define IOC_PAD_PA16 (16UL)
#define IOC_PAD_PA17 (17UL)
#define IOC_PAD_PA18 (18UL)
#define IOC_PAD_PA19 (19UL)
#define IOC_PAD_PA20 (20UL)
#define IOC_PAD_PA21 (21UL)
#define IOC_PAD_PA22 (22UL)
#define IOC_PAD_PA23 (23UL)
#define IOC_PAD_PA24 (24UL)
#define IOC_PAD_PA25 (25UL)
#define IOC_PAD_PA26 (26UL)
#define IOC_PAD_PA27 (27UL)
#define IOC_PAD_PA28 (28UL)
#define IOC_PAD_PA29 (29UL)
#define IOC_PAD_PA30 (30UL)
#define IOC_PAD_PA31 (31UL)
#define IOC_PAD_PB00 (32UL)
#define IOC_PAD_PB01 (33UL)
#define IOC_PAD_PB02 (34UL)
#define IOC_PAD_PB03 (35UL)
#define IOC_PAD_PB04 (36UL)
#define IOC_PAD_PB05 (37UL)
#define IOC_PAD_PB06 (38UL)
#define IOC_PAD_PB07 (39UL)
#define IOC_PAD_PB08 (40UL)
#define IOC_PAD_PB09 (41UL)
#define IOC_PAD_PB10 (42UL)
#define IOC_PAD_PB11 (43UL)
#define IOC_PAD_PB12 (44UL)
#define IOC_PAD_PB13 (45UL)
#define IOC_PAD_PB14 (46UL)
#define IOC_PAD_PB15 (47UL)
#define IOC_PAD_PB16 (48UL)
#define IOC_PAD_PB17 (49UL)
#define IOC_PAD_PB18 (50UL)
#define IOC_PAD_PB19 (51UL)
#define IOC_PAD_PB20 (52UL)
#define IOC_PAD_PB21 (53UL)
#define IOC_PAD_PB22 (54UL)
#define IOC_PAD_PB23 (55UL)
#define IOC_PAD_PB24 (56UL)
#define IOC_PAD_PB25 (57UL)
#define IOC_PAD_PB26 (58UL)
#define IOC_PAD_PB27 (59UL)
#define IOC_PAD_PB28 (60UL)
#define IOC_PAD_PB29 (61UL)
#define IOC_PAD_PB30 (62UL)
#define IOC_PAD_PB31 (63UL)
#define IOC_PAD_PC00 (64UL)
#define IOC_PAD_PC01 (65UL)
#define IOC_PAD_PC02 (66UL)
#define IOC_PAD_PC03 (67UL)
#define IOC_PAD_PC04 (68UL)
#define IOC_PAD_PC05 (69UL)
#define IOC_PAD_PC06 (70UL)
#define IOC_PAD_PC07 (71UL)
#define IOC_PAD_PC08 (72UL)
#define IOC_PAD_PC09 (73UL)
#define IOC_PAD_PC10 (74UL)
#define IOC_PAD_PC11 (75UL)
#define IOC_PAD_PC12 (76UL)
#define IOC_PAD_PC13 (77UL)
#define IOC_PAD_PC14 (78UL)
#define IOC_PAD_PC15 (79UL)
#define IOC_PAD_PC16 (80UL)
#define IOC_PAD_PC17 (81UL)
#define IOC_PAD_PC18 (82UL)
#define IOC_PAD_PC19 (83UL)
#define IOC_PAD_PC20 (84UL)
#define IOC_PAD_PC21 (85UL)
#define IOC_PAD_PC22 (86UL)
#define IOC_PAD_PC23 (87UL)
#define IOC_PAD_PC24 (88UL)
#define IOC_PAD_PC25 (89UL)
#define IOC_PAD_PC26 (90UL)
#define IOC_PAD_PC27 (91UL)
#define IOC_PAD_PC28 (92UL)
#define IOC_PAD_PC29 (93UL)
#define IOC_PAD_PC30 (94UL)
#define IOC_PAD_PC31 (95UL)
#define IOC_PAD_PD00 (96UL)
#define IOC_PAD_PD01 (97UL)
#define IOC_PAD_PD02 (98UL)
#define IOC_PAD_PD03 (99UL)
#define IOC_PAD_PD04 (100UL)
#define IOC_PAD_PD05 (101UL)
#define IOC_PAD_PD06 (102UL)
#define IOC_PAD_PD07 (103UL)
#define IOC_PAD_PD08 (104UL)
#define IOC_PAD_PD09 (105UL)
#define IOC_PAD_PD10 (106UL)
#define IOC_PAD_PD11 (107UL)
#define IOC_PAD_PD12 (108UL)
#define IOC_PAD_PD13 (109UL)
#define IOC_PAD_PD14 (110UL)
#define IOC_PAD_PD15 (111UL)
#define IOC_PAD_PD16 (112UL)
#define IOC_PAD_PD17 (113UL)
#define IOC_PAD_PD18 (114UL)
#define IOC_PAD_PD19 (115UL)
#define IOC_PAD_PD20 (116UL)
#define IOC_PAD_PD21 (117UL)
#define IOC_PAD_PD22 (118UL)
#define IOC_PAD_PD23 (119UL)
#define IOC_PAD_PD24 (120UL)
#define IOC_PAD_PD25 (121UL)
#define IOC_PAD_PD26 (122UL)
#define IOC_PAD_PD27 (123UL)
#define IOC_PAD_PD28 (124UL)
#define IOC_PAD_PD29 (125UL)
#define IOC_PAD_PD30 (126UL)
#define IOC_PAD_PD31 (127UL)
#define IOC_PAD_PE00 (128UL)
#define IOC_PAD_PE01 (129UL)
#define IOC_PAD_PE02 (130UL)
#define IOC_PAD_PE03 (131UL)
#define IOC_PAD_PE04 (132UL)
#define IOC_PAD_PE05 (133UL)
#define IOC_PAD_PE06 (134UL)
#define IOC_PAD_PE07 (135UL)
#define IOC_PAD_PE08 (136UL)
#define IOC_PAD_PE09 (137UL)
#define IOC_PAD_PE10 (138UL)
#define IOC_PAD_PE11 (139UL)
#define IOC_PAD_PE12 (140UL)
#define IOC_PAD_PE13 (141UL)
#define IOC_PAD_PE14 (142UL)
#define IOC_PAD_PE15 (143UL)
#define IOC_PAD_PE16 (144UL)
#define IOC_PAD_PE17 (145UL)
#define IOC_PAD_PE18 (146UL)
#define IOC_PAD_PE19 (147UL)
#define IOC_PAD_PE20 (148UL)
#define IOC_PAD_PE21 (149UL)
#define IOC_PAD_PE22 (150UL)
#define IOC_PAD_PE23 (151UL)
#define IOC_PAD_PE24 (152UL)
#define IOC_PAD_PE25 (153UL)
#define IOC_PAD_PE26 (154UL)
#define IOC_PAD_PE27 (155UL)
#define IOC_PAD_PE28 (156UL)
#define IOC_PAD_PE29 (157UL)
#define IOC_PAD_PE30 (158UL)
#define IOC_PAD_PE31 (159UL)
#define IOC_PAD_PF00 (160UL)
#define IOC_PAD_PF01 (161UL)
#define IOC_PAD_PF02 (162UL)
#define IOC_PAD_PF03 (163UL)
#define IOC_PAD_PF04 (164UL)
#define IOC_PAD_PF05 (165UL)
#define IOC_PAD_PF06 (166UL)
#define IOC_PAD_PF07 (167UL)
#define IOC_PAD_PF08 (168UL)
#define IOC_PAD_PF09 (169UL)
#define IOC_PAD_PF10 (170UL)
#define IOC_PAD_PX00 (416UL)
#define IOC_PAD_PX01 (417UL)
#define IOC_PAD_PX02 (418UL)
#define IOC_PAD_PX03 (419UL)
#define IOC_PAD_PX04 (420UL)
#define IOC_PAD_PX05 (421UL)
#define IOC_PAD_PX06 (422UL)
#define IOC_PAD_PX07 (423UL)
#define IOC_PAD_PX08 (424UL)
#define IOC_PAD_PX09 (425UL)
#define IOC_PAD_PX10 (426UL)
#define IOC_PAD_PX11 (427UL)
#define IOC_PAD_PY00 (448UL)
#define IOC_PAD_PY01 (449UL)
#define IOC_PAD_PY02 (450UL)
#define IOC_PAD_PY03 (451UL)
#define IOC_PAD_PY04 (452UL)
#define IOC_PAD_PY05 (453UL)
#define IOC_PAD_PY06 (454UL)
#define IOC_PAD_PY07 (455UL)
#define IOC_PAD_PY08 (456UL)
#define IOC_PAD_PY09 (457UL)
#define IOC_PAD_PY10 (458UL)
#define IOC_PAD_PY11 (459UL)
#define IOC_PAD_PZ00 (480UL)
#define IOC_PAD_PZ01 (481UL)
#define IOC_PAD_PZ02 (482UL)
#define IOC_PAD_PZ03 (483UL)
#define IOC_PAD_PZ04 (484UL)
#define IOC_PAD_PZ05 (485UL)
#define IOC_PAD_PZ06 (486UL)
#define IOC_PAD_PZ07 (487UL)
#define IOC_PAD_PZ08 (488UL)
#define IOC_PAD_PZ09 (489UL)
#define IOC_PAD_PZ10 (490UL)
#define IOC_PAD_PZ11 (491UL)
#define IOC_PAD_PY06_FUNC_CTL (HPM6750_IOC_BASE + 2 * IOC_PAD_PY06 * 4)
#define IOC_PAD_PY06_PAD_CTL (HPM6750_IOC_BASE + 2 * (IOC_PAD_PY06 + 1) * 4)
#define IOC_PAD_PY07_FUNC_CTL (HPM6750_IOC_BASE + 2 * IOC_PAD_PY07 * 4)
#define IOC_PAD_PY07_PAD_CTL (HPM6750_IOC_BASE + 2 * (IOC_PAD_PY07 + 1) * 4)
#define PIOC_PAD_PY06_FUNC_CTL (HPM6750_PIOC_BASE + 2 * IOC_PAD_PY06 * 4)
#define PIOC_PAD_PY06_PAD_CTL (HPM6750_PIOC_BASE + 2 * (IOC_PAD_PY06 + 1) * 4)
#define PIOC_PAD_PY07_FUNC_CTL (HPM6750_PIOC_BASE + 2 * IOC_PAD_PY07 * 4)
#define PIOC_PAD_PY07_PAD_CTL (HPM6750_PIOC_BASE + 2 * (IOC_PAD_PY07 + 1) * 4)
/* Bitfield definition for register of struct array PAD: FUNC_CTL */
/* LOOP_BACK (RW)
*
* force input on
* 0: disable
* 1: enable
*/
#define IOC_PAD_FUNC_CTL_LOOP_BACK_MASK (0x10000UL)
#define IOC_PAD_FUNC_CTL_LOOP_BACK_SHIFT (16U)
#define IOC_PAD_FUNC_CTL_LOOP_BACK_SET(x) (((uint32_t)(x) << IOC_PAD_FUNC_CTL_LOOP_BACK_SHIFT) & IOC_PAD_FUNC_CTL_LOOP_BACK_MASK)
#define IOC_PAD_FUNC_CTL_LOOP_BACK_GET(x) (((uint32_t)(x) & IOC_PAD_FUNC_CTL_LOOP_BACK_MASK) >> IOC_PAD_FUNC_CTL_LOOP_BACK_SHIFT)
/* ANALOG (RW)
*
* select analog pin in pad
* 0: disable
* 1: enable
*/
#define IOC_PAD_FUNC_CTL_ANALOG_MASK (0x100U)
#define IOC_PAD_FUNC_CTL_ANALOG_SHIFT (8U)
#define IOC_PAD_FUNC_CTL_ANALOG_SET(x) (((uint32_t)(x) << IOC_PAD_FUNC_CTL_ANALOG_SHIFT) & IOC_PAD_FUNC_CTL_ANALOG_MASK)
#define IOC_PAD_FUNC_CTL_ANALOG_GET(x) (((uint32_t)(x) & IOC_PAD_FUNC_CTL_ANALOG_MASK) >> IOC_PAD_FUNC_CTL_ANALOG_SHIFT)
/* ALT_SELECT (RW)
*
* alt select
* 0: ALT0
* 1: ALT1
* …
* 31:ALT31
*/
#define IOC_PAD_FUNC_CTL_ALT_SELECT_MASK (0x1FU)
#define IOC_PAD_FUNC_CTL_ALT_SELECT_SHIFT (0U)
#define IOC_PAD_FUNC_CTL_ALT_SELECT_SET(x) (((uint32_t)(x) << IOC_PAD_FUNC_CTL_ALT_SELECT_SHIFT) & IOC_PAD_FUNC_CTL_ALT_SELECT_MASK)
#define IOC_PAD_FUNC_CTL_ALT_SELECT_GET(x) (((uint32_t)(x) & IOC_PAD_FUNC_CTL_ALT_SELECT_MASK) >> IOC_PAD_FUNC_CTL_ALT_SELECT_SHIFT)
/* Bitfield definition for register of struct array PAD: PAD_CTL */
/* MS (RW)
*
* pin voltage select, only available in high-speed IO
* 0: 3.3V
* 1: 1.8V
*/
#define IOC_PAD_PAD_CTL_MS_MASK (0x4000U)
#define IOC_PAD_PAD_CTL_MS_SHIFT (14U)
#define IOC_PAD_PAD_CTL_MS_SET(x) (((uint32_t)(x) << IOC_PAD_PAD_CTL_MS_SHIFT) & IOC_PAD_PAD_CTL_MS_MASK)
#define IOC_PAD_PAD_CTL_MS_GET(x) (((uint32_t)(x) & IOC_PAD_PAD_CTL_MS_MASK) >> IOC_PAD_PAD_CTL_MS_SHIFT)
/* OD (RW)
*
* open drain
* 0: open drain disable
* 1: open drain enable
*/
#define IOC_PAD_PAD_CTL_OD_MASK (0x2000U)
#define IOC_PAD_PAD_CTL_OD_SHIFT (13U)
#define IOC_PAD_PAD_CTL_OD_SET(x) (((uint32_t)(x) << IOC_PAD_PAD_CTL_OD_SHIFT) & IOC_PAD_PAD_CTL_OD_MASK)
#define IOC_PAD_PAD_CTL_OD_GET(x) (((uint32_t)(x) & IOC_PAD_PAD_CTL_OD_MASK) >> IOC_PAD_PAD_CTL_OD_SHIFT)
/* SMT (RW)
*
* schmitt trigger enable, only avaiable in high-speed IO
* 0: disable
* 1: enable
*/
#define IOC_PAD_PAD_CTL_SMT_MASK (0x1000U)
#define IOC_PAD_PAD_CTL_SMT_SHIFT (12U)
#define IOC_PAD_PAD_CTL_SMT_SET(x) (((uint32_t)(x) << IOC_PAD_PAD_CTL_SMT_SHIFT) & IOC_PAD_PAD_CTL_SMT_MASK)
#define IOC_PAD_PAD_CTL_SMT_GET(x) (((uint32_t)(x) & IOC_PAD_PAD_CTL_SMT_MASK) >> IOC_PAD_PAD_CTL_SMT_SHIFT)
/* PS (RW)
*
* pull select
* 0: pull down
* 1: pull up
*/
#define IOC_PAD_PAD_CTL_PS_MASK (0x800U)
#define IOC_PAD_PAD_CTL_PS_SHIFT (11U)
#define IOC_PAD_PAD_CTL_PS_SET(x) (((uint32_t)(x) << IOC_PAD_PAD_CTL_PS_SHIFT) & IOC_PAD_PAD_CTL_PS_MASK)
#define IOC_PAD_PAD_CTL_PS_GET(x) (((uint32_t)(x) & IOC_PAD_PAD_CTL_PS_MASK) >> IOC_PAD_PAD_CTL_PS_SHIFT)
/* PE (RW)
*
* pull enable
* 0: pull disable
* 1: pull enable
*/
#define IOC_PAD_PAD_CTL_PE_MASK (0x10U)
#define IOC_PAD_PAD_CTL_PE_SHIFT (4U)
#define IOC_PAD_PAD_CTL_PE_SET(x) (((uint32_t)(x) << IOC_PAD_PAD_CTL_PE_SHIFT) & IOC_PAD_PAD_CTL_PE_MASK)
#define IOC_PAD_PAD_CTL_PE_GET(x) (((uint32_t)(x) & IOC_PAD_PAD_CTL_PE_MASK) >> IOC_PAD_PAD_CTL_PE_SHIFT)
/* DS (RW)
*
* drive strength
* for high-speed IO 3.3V:
* 000: 85.61Ohm
* 001: 61.2 Ohm
* 010: 42.88Ohm
* 011: 35.76Ohm
* 111: 30.67Ohm
* for high-speed IO 1.8V:
* 000: 84.07Ohm
* 001: 60.14Ohm
* 010: 42.15Ohm
* 011: 35.19Ohm
* 111: 30.2 Ohm
* for general IO:
* 00: 4mA
* 01: 8mA
* 11: 12mA
*/
#define IOC_PAD_PAD_CTL_DS_MASK (0x7U)
#define IOC_PAD_PAD_CTL_DS_SHIFT (0U)
#define IOC_PAD_PAD_CTL_DS_SET(x) (((uint32_t)(x) << IOC_PAD_PAD_CTL_DS_SHIFT) & IOC_PAD_PAD_CTL_DS_MASK)
#define IOC_PAD_PAD_CTL_DS_GET(x) (((uint32_t)(x) & IOC_PAD_PAD_CTL_DS_MASK) >> IOC_PAD_PAD_CTL_DS_SHIFT)
#endif /* __ARCH_RISCV_SRC_HPM6750_HARDWARE_HPM6750_IOC_H */

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/****************************************************************************
* arch/risc-v/src/hpm6750/hardware/hpm6750_mchtmr.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_HPM6750_HARDWARE_HPM6750_MCHTMR_H
#define __ARCH_RISCV_SRC_HPM6750_HARDWARE_HPM6750_MCHTMR_H
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define HPM6750_MCHTMR_MTIME (HPM6750_MCHTMR_BASE + 0x0000)
#define HPM6750_MCHTMR_MTIMECMP (HPM6750_MCHTMR_BASE + 0x0008)
#endif /* __ARCH_RISCV_SRC_HPM6750_HARDWARE_HPM6750_MCHTMR_H */

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/****************************************************************************
* arch/risc-v/src/hpm6750/hardware/hpm6750_memorymap.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_HPM6750_HARDWARE_HPM6750_MEMORYMAP_H
#define __ARCH_RISCV_SRC_HPM6750_HARDWARE_HPM6750_MEMORYMAP_H
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Register Base Address ****************************************************/
#define HPM6750_MCHTMR_BASE 0xE6000000
#define HPM6750_PLIC_BASE 0xE4000000
#define HPM6750_UART0_BASE 0xF0040000
#define HPM6750_SYSCTL_BASE 0xF4000000
#define HPM6750_IOC_BASE 0xF4040000
#define HPM6750_PIOC_BASE 0xF40D8000
#define HPM6750_PLLCTL_BASE 0xF4100000
#endif /* __ARCH_RISCV_SRC_HPM6750_HARDWARE_HPM6750_MEMORYMAP_H */

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/****************************************************************************
* arch/risc-v/src/hpm6750/hardware/hpm6750_plic.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_HPM6750_HARDWARE_HPM6750_PLIC_H
#define __ARCH_RISCV_SRC_HPM6750_HARDWARE_HPM6750_PLIC_H
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define HPM6750_PLIC_PRIORITY (HPM6750_PLIC_BASE + 0x000000)
#define HPM6750_PLIC_PENDING0 (HPM6750_PLIC_BASE + 0x001000)
#define HPM6750_PLIC_PENDING1 (HPM6750_PLIC_BASE + 0x001004)
#define HPM6750_PLIC_PENDING2 (HPM6750_PLIC_BASE + 0x001008)
#define HPM6750_PLIC_PENDING3 (HPM6750_PLIC_BASE + 0x00100C)
#define HPM6750_PLIC_INTEN0 (HPM6750_PLIC_BASE + 0x002000)
#define HPM6750_PLIC_INTEN1 (HPM6750_PLIC_BASE + 0x002004)
#define HPM6750_PLIC_INTEN2 (HPM6750_PLIC_BASE + 0x002008)
#define HPM6750_PLIC_INTEN3 (HPM6750_PLIC_BASE + 0x00200C)
#define HPM6750_PLIC_THRESHOLD (HPM6750_PLIC_BASE + 0x200000)
#define HPM6750_PLIC_CLAIM (HPM6750_PLIC_BASE + 0x200004)
#endif /* __ARCH_RISCV_SRC_HPM6750_HARDWARE_HPM6750_PLIC_H */

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/****************************************************************************
* arch/risc-v/src/hpm6750/hardware/hpm6750_sysctl.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_HPM6750_HARDWARE_HPM6750_SYSCTL_H
#define __ARCH_RISCV_SRC_HPM6750_HARDWARE_HPM6750_SYSCTL_H
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define HPM6750_SYSCTL_GROUP0_0 (HPM6750_SYSCTL_BASE + 0x000800)
#define HPM6750_SYSCTL_GROUP0_1 (HPM6750_SYSCTL_BASE + 0x000810)
#define HPM6750_SYSCTL_GROUP0_2 (HPM6750_SYSCTL_BASE + 0x000820)
#define HPM6750_SYSCTL_CLOCK_NODE (HPM6750_SYSCTL_BASE + 0x001800)
#define HPM6750_SYSCTL_GROUPx_0_AHB (1 << 0)
#define HPM6750_SYSCTL_GROUPx_0_AXI (1 << 1)
#define HPM6750_SYSCTL_GROUPx_0_CONN (1 << 2)
#define HPM6750_SYSCTL_GROUPx_0_VIS (1 << 3)
#define HPM6750_SYSCTL_GROUPx_0_FEMC (1 << 4)
#define HPM6750_SYSCTL_GROUPx_0_ROM (1 << 5)
#define HPM6750_SYSCTL_GROUPx_0_LMM0 (1 << 6)
#define HPM6750_SYSCTL_GROUPx_0_LMM1 (1 << 7)
#define HPM6750_SYSCTL_GROUPx_0_MCHTMR0 (1 << 8)
#define HPM6750_SYSCTL_GROUPx_0_MCHTMR1 (1 << 9)
#define HPM6750_SYSCTL_GROUPx_0_XSRAM0 (1 << 10)
#define HPM6750_SYSCTL_GROUPx_0_XSRAM1 (1 << 11)
#define HPM6750_SYSCTL_GROUPx_0_XIP0 (1 << 12)
#define HPM6750_SYSCTL_GROUPx_0_XIP1 (1 << 13)
#define HPM6750_SYSCTL_GROUPx_0_SDP (1 << 14)
#define HPM6750_SYSCTL_GROUPx_0_RNG (1 << 15)
#define HPM6750_SYSCTL_GROUPx_0_KEYM (1 << 16)
#define HPM6750_SYSCTL_GROUPx_0_HMDA (1 << 17)
#define HPM6750_SYSCTL_GROUPx_0_XDMA (1 << 18)
#define HPM6750_SYSCTL_GROUPx_0_GPIO (1 << 19)
#define HPM6750_SYSCTL_GROUPx_0_MBX0 (1 << 20)
#define HPM6750_SYSCTL_GROUPx_0_MBX1 (1 << 21)
#define HPM6750_SYSCTL_GROUPx_0_WDG0 (1 << 22)
#define HPM6750_SYSCTL_GROUPx_0_WDG1 (1 << 23)
#define HPM6750_SYSCTL_GROUPx_0_WDG2 (1 << 24)
#define HPM6750_SYSCTL_GROUPx_0_WDG3 (1 << 25)
#define HPM6750_SYSCTL_GROUPx_0_GPTMR0 (1 << 26)
#define HPM6750_SYSCTL_GROUPx_0_GPTMR1 (1 << 27)
#define HPM6750_SYSCTL_GROUPx_0_GPTMR2 (1 << 28)
#define HPM6750_SYSCTL_GROUPx_0_GPTMR3 (1 << 29)
#define HPM6750_SYSCTL_GROUPx_0_GPTMR4 (1 << 30)
#define HPM6750_SYSCTL_GROUPx_0_GPTMR5 (1 << 31)
#define HPM6750_SYSCTL_GROUPx_1_GPTMR6 (1 << 0)
#define HPM6750_SYSCTL_GROUPx_1_GPTMR7 (1 << 1)
#define HPM6750_SYSCTL_GROUPx_1_UART0 (1 << 2)
#define HPM6750_SYSCTL_GROUPx_1_UART1 (1 << 3)
#define HPM6750_SYSCTL_GROUPx_1_UART2 (1 << 4)
#define HPM6750_SYSCTL_GROUPx_1_UART3 (1 << 5)
#define HPM6750_SYSCTL_GROUPx_1_UART4 (1 << 6)
#define HPM6750_SYSCTL_GROUPx_1_UART5 (1 << 7)
#define HPM6750_SYSCTL_GROUPx_1_UART6 (1 << 8)
#define HPM6750_SYSCTL_GROUPx_1_UART7 (1 << 9)
#define HPM6750_SYSCTL_GROUPx_1_UART8 (1 << 10)
#define HPM6750_SYSCTL_GROUPx_1_UART9 (1 << 11)
#define HPM6750_SYSCTL_GROUPx_1_UART10 (1 << 12)
#define HPM6750_SYSCTL_GROUPx_1_UART11 (1 << 13)
#define HPM6750_SYSCTL_GROUPx_1_UART12 (1 << 14)
#define HPM6750_SYSCTL_GROUPx_1_UART13 (1 << 15)
#define HPM6750_SYSCTL_GROUPx_1_UART14 (1 << 16)
#define HPM6750_SYSCTL_GROUPx_1_UART15 (1 << 17)
#define HPM6750_SYSCTL_GROUPx_1_I2C0 (1 << 18)
#define HPM6750_SYSCTL_GROUPx_1_I2C1 (1 << 19)
#define HPM6750_SYSCTL_GROUPx_1_I2C2 (1 << 20)
#define HPM6750_SYSCTL_GROUPx_1_I2C3 (1 << 21)
#define HPM6750_SYSCTL_GROUPx_1_SPI0 (1 << 22)
#define HPM6750_SYSCTL_GROUPx_1_SPI1 (1 << 23)
#define HPM6750_SYSCTL_GROUPx_1_SPI2 (1 << 24)
#define HPM6750_SYSCTL_GROUPx_1_SPI3 (1 << 25)
#define HPM6750_SYSCTL_GROUPx_1_CAN0 (1 << 26)
#define HPM6750_SYSCTL_GROUPx_1_CAN1 (1 << 27)
#define HPM6750_SYSCTL_GROUPx_1_CAN2 (1 << 28)
#define HPM6750_SYSCTL_GROUPx_1_CAN3 (1 << 29)
#define HPM6750_SYSCTL_GROUPx_1_PTPC (1 << 30)
#define HPM6750_SYSCTL_GROUPx_1_ADC0 (1 << 31)
#define HPM6750_SYSCTL_GROUPx_2_ADC1 (1 << 0)
#define HPM6750_SYSCTL_GROUPx_2_ADC2 (1 << 1)
#define HPM6750_SYSCTL_GROUPx_2_ADC3 (1 << 2)
#define HPM6750_SYSCTL_GROUPx_2_ACMP (1 << 3)
#define HPM6750_SYSCTL_GROUPx_2_I2S0 (1 << 4)
#define HPM6750_SYSCTL_GROUPx_2_I2S1 (1 << 5)
#define HPM6750_SYSCTL_GROUPx_2_I2S2 (1 << 6)
#define HPM6750_SYSCTL_GROUPx_2_I2S3 (1 << 7)
#define HPM6750_SYSCTL_GROUPx_2_PDM (1 << 8)
#define HPM6750_SYSCTL_GROUPx_2_DAO (1 << 9)
#define HPM6750_SYSCTL_GROUPx_2_SYNT (1 << 10)
#define HPM6750_SYSCTL_GROUPx_2_MOT0 (1 << 11)
#define HPM6750_SYSCTL_GROUPx_2_MOT1 (1 << 12)
#define HPM6750_SYSCTL_GROUPx_2_MOT2 (1 << 13)
#define HPM6750_SYSCTL_GROUPx_2_MOT3 (1 << 14)
#define HPM6750_SYSCTL_GROUPx_2_LCDC (1 << 15)
#define HPM6750_SYSCTL_GROUPx_2_CAM0 (1 << 16)
#define HPM6750_SYSCTL_GROUPx_2_CAM1 (1 << 17)
#define HPM6750_SYSCTL_GROUPx_2_JPEG (1 << 18)
#define HPM6750_SYSCTL_GROUPx_2_PDMA (1 << 19)
#define HPM6750_SYSCTL_GROUPx_2_ENET0 (1 << 20)
#define HPM6750_SYSCTL_GROUPx_2_ENET1 (1 << 21)
#define HPM6750_SYSCTL_GROUPx_2_NTMR0 (1 << 22)
#define HPM6750_SYSCTL_GROUPx_2_NTMR1 (1 << 23)
#define HPM6750_SYSCTL_GROUPx_2_SDXC0 (1 << 24)
#define HPM6750_SYSCTL_GROUPx_2_SDXC1 (1 << 25)
#define HPM6750_SYSCTL_GROUPx_2_USB0 (1 << 26)
#define HPM6750_SYSCTL_GROUPx_2_USB1 (1 << 27)
/* LOC_BUSY (RO)
*
* local busy
* 0: a change is pending for current node
* 1: current node is changing status
*/
#define SYSCTL_CLOCK_LOC_BUSY_MASK (0x40000000UL)
#define SYSCTL_CLOCK_LOC_BUSY_SHIFT (30U)
#define SYSCTL_CLOCK_LOC_BUSY_GET(x) (((uint32_t)(x) & SYSCTL_CLOCK_LOC_BUSY_MASK) >> SYSCTL_CLOCK_LOC_BUSY_SHIFT)
/* MUX (RW)
*
* clock source selection
* 0:osc0_clk0
* 1:pll0_clk0
* 2:pll1_clk0
* 3:pll1_clk1
* 4:pll2_clk0
* 5:pll2_clk1
* 6:pll3_clk0
* 7:pll4_clk0
*/
#define SYSCTL_CLOCK_MUX_MASK (0xF00U)
#define SYSCTL_CLOCK_MUX_SHIFT (8U)
#define SYSCTL_CLOCK_MUX_SET(x) (((uint32_t)(x) << SYSCTL_CLOCK_MUX_SHIFT) & SYSCTL_CLOCK_MUX_MASK)
#define SYSCTL_CLOCK_MUX_GET(x) (((uint32_t)(x) & SYSCTL_CLOCK_MUX_MASK) >> SYSCTL_CLOCK_MUX_SHIFT)
/* DIV (RW)
*
* clock divider
* 0: divider by1
* 1: divider by 2
* 2 divider by 3
* . . .
* 255: divider by 256
*/
#define SYSCTL_CLOCK_DIV_MASK (0xFFU)
#define SYSCTL_CLOCK_DIV_SHIFT (0U)
#define SYSCTL_CLOCK_DIV_SET(x) (((uint32_t)(x) << SYSCTL_CLOCK_DIV_SHIFT) & SYSCTL_CLOCK_DIV_MASK)
#define SYSCTL_CLOCK_DIV_GET(x) (((uint32_t)(x) & SYSCTL_CLOCK_DIV_MASK) >> SYSCTL_CLOCK_DIV_SHIFT)
#endif /* __ARCH_RISCV_SRC_HPM6750_HARDWARE_HPM6750_SYSCTL_H */

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/****************************************************************************
* arch/risc-v/src/hpm6750/hpm6750.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_HPM6750_HPM6750_H
#define __ARCH_RISCV_SRC_HPM6750_HPM6750_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <arch/irq.h>
#include "riscv_internal.h"
#include "chip.h"
#endif /* __ARCH_RISCV_SRC_HPM6750_HPM6750_H */

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/****************************************************************************
* arch/risc-v/src/hpm6750/hpm6750_clockconfig.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <arch/board/board.h>
#include "riscv_internal.h"
#include "chip.h"
#include "hpm6750.h"
#include "hpm6750_clockconfig.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define EXT_OSC 24000000
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: hpm6750_get_osc_freq
****************************************************************************/
uint32_t hpm6750_get_osc_freq(void)
{
return EXT_OSC;
}
/****************************************************************************
* Name: hpm6750_sysctl_config_clock
****************************************************************************/
static void hpm6750_sysctl_config_clock(clock_node_t node_index,
clock_source_t source, uint32_t divide_by)
{
uint32_t *clock_ptr = (uint32_t *)HPM6750_SYSCTL_CLOCK_NODE;
uint32_t node = (uint32_t)node_index;
uint32_t tmp;
tmp = clock_ptr[node];
tmp &= ~(SYSCTL_CLOCK_MUX_MASK | SYSCTL_CLOCK_DIV_MASK);
tmp |= SYSCTL_CLOCK_MUX_SET(source);
tmp |= SYSCTL_CLOCK_DIV_SET(divide_by - 1);
clock_ptr[node] = tmp;
while (clock_ptr[node] & SYSCTL_CLOCK_LOC_BUSY_MASK)
;
}
/****************************************************************************
* Name: hpm6750_clockconfig
****************************************************************************/
void hpm6750_clockconfig(void)
{
putreg32(0xffffffffu, HPM6750_SYSCTL_GROUP0_0);
putreg32(0xffffffffu, HPM6750_SYSCTL_GROUP0_1);
putreg32(0xffffffffu, HPM6750_SYSCTL_GROUP0_2);
hpm6750_sysctl_config_clock(clock_node_cpu0, clock_source_pll0_clk0, 1);
hpm6750_sysctl_config_clock(clock_node_mchtmr0, clock_source_osc0_clk0, 1);
hpm6750_sysctl_config_clock(clock_node_uart0, clock_source_osc0_clk0, 1);
}

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/****************************************************************************
* arch/risc-v/src/hpm6750/hpm6750_clockconfig.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_HPM6750_HPM6750_CLOCKCONFIG_H
#define __ARCH_RISCV_SRC_HPM6750_HPM6750_CLOCKCONFIG_H
/****************************************************************************
* Included Files
****************************************************************************/
#include "hpm6750_memorymap.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Types
****************************************************************************/
/**
* @brief Clock nodes
*/
typedef enum
{
clock_node_cpu0 = 0,
clock_node_mchtmr0 = 1,
clock_node_cpu1 = 2,
clock_node_mchtmr1 = 3,
clock_node_axi0 = 4,
clock_node_axi1 = 5,
clock_node_axi2 = 6,
clock_node_ahb0 = 7,
clock_node_femc = 8,
clock_node_xpi0 = 9,
clock_node_xpi1 = 10,
clock_node_gptmr0 = 11,
clock_node_gptmr1 = 12,
clock_node_gptmr2 = 13,
clock_node_gptmr3 = 14,
clock_node_gptmr4 = 15,
clock_node_gptmr5 = 16,
clock_node_gptmr6 = 17,
clock_node_gptmr7 = 18,
clock_node_uart0 = 19,
clock_node_uart1 = 20,
clock_node_uart2 = 21,
clock_node_uart3 = 22,
clock_node_uart4 = 23,
clock_node_uart5 = 24,
clock_node_uart6 = 25,
clock_node_uart7 = 26,
clock_node_uart8 = 27,
clock_node_uart9 = 28,
clock_node_uarta = 29,
clock_node_uartb = 30,
clock_node_uartc = 31,
clock_node_uartd = 32,
clock_node_uarte = 33,
clock_node_uartf = 34,
clock_node_i2c0 = 35,
clock_node_i2c1 = 36,
clock_node_i2c2 = 37,
clock_node_i2c3 = 38,
clock_node_spi0 = 39,
clock_node_spi1 = 40,
clock_node_spi2 = 41,
clock_node_spi3 = 42,
clock_node_can0 = 43,
clock_node_can1 = 44,
clock_node_can2 = 45,
clock_node_can3 = 46,
clock_node_ptpc = 47,
clock_node_ana0 = 48,
clock_node_ana1 = 49,
clock_node_ana2 = 50,
clock_node_aud0 = 51,
clock_node_aud1 = 52,
clock_node_aud2 = 53,
clock_node_dis0 = 54,
clock_node_cam0 = 55,
clock_node_cam1 = 56,
clock_node_eth0 = 57,
clock_node_eth1 = 58,
clock_node_ptp0 = 59,
clock_node_ptp1 = 60,
clock_node_ref0 = 61,
clock_node_ref1 = 62,
clock_node_ntmr0 = 63,
clock_node_ntmr1 = 64,
clock_node_sdxc0 = 65,
clock_node_sdxc1 = 66,
clock_node_adc_i2s_start,
clock_node_adc0 = clock_node_adc_i2s_start,
clock_node_adc1,
clock_node_adc2,
clock_node_adc3,
clock_node_i2s0,
clock_node_i2s1,
clock_node_i2s2,
clock_node_i2s3,
clock_node_end,
} clock_node_t;
/**
* @brief General clock sources
*/
typedef enum
{
clock_source_osc0_clk0 = 0,
clock_source_pll0_clk0 = 1,
clock_source_pll1_clk0 = 2,
clock_source_pll1_clk1 = 3,
clock_source_pll2_clk0 = 4,
clock_source_pll2_clk1 = 5,
clock_source_pll3_clk0 = 6,
clock_source_pll4_clk0 = 7,
clock_source_general_source_end,
} clock_source_t;
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Data
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
EXTERN uint32_t hpm6750_get_osc_freq(void);
EXTERN void hpm6750_clockconfig(void);
#if defined(__cplusplus)
}
#endif
#undef EXTERN
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_RISCV_SRC_HPM6750_HPM6750_CLOCKCONFIG_H */

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/****************************************************************************
* arch/risc-v/src/hpm6750/hpm6750_config.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_HPM6750_HPM6750_CONFIG_H
#define __ARCH_RISCV_SRC_HPM6750_HPM6750_CONFIG_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/chip/chip.h>
#include <arch/board/board.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#undef HAVE_UART_DEVICE
#if defined(CONFIG_HPM6750_UART0) || defined(CONFIG_HPM6750_UART1)
# define HAVE_UART_DEVICE 1
#endif
#if defined(CONFIG_UART0_SERIAL_CONSOLE) && defined(CONFIG_HPM6750_UART0)
# undef CONFIG_UART1_SERIAL_CONSOLE
# define HAVE_SERIAL_CONSOLE 1
#elif defined(CONFIG_UART1_SERIAL_CONSOLE) && defined(CONFIG_HPM6750_UART1)
# undef CONFIG_UART0_SERIAL_CONSOLE
# define HAVE_SERIAL_CONSOLE 1
#else
# undef CONFIG_UART0_SERIAL_CONSOLE
# undef CONFIG_UART1_SERIAL_CONSOLE
# undef HAVE_SERIAL_CONSOLE
#endif
#endif /* __ARCH_RISCV_SRC_HPM6750_HPM6750_CONFIG_H */

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/****************************************************************************
* arch/risc-v/src/hpm6750/hpm6750_head.S
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <arch/irq.h>
#include "chip.h"
#include "hpm6750_memorymap.h"
#include "riscv_internal.h"
/****************************************************************************
* Public Symbols
****************************************************************************/
/* Imported symbols */
.extern __trap_vec
.section .text
.global __start
__start:
/* reset mstatus to 0*/
csrrw x0, mstatus, x0
/* Set stack pointer to the idle thread stack */
la sp, HPM6750_IDLESTACK_TOP
/* Disable all interrupts (i.e. timer, external) in mie */
csrw mie, zero
csrw mip, zero
/* Initialize the Machine Trap Vector */
la t0, __trap_vec
csrw mtvec, t0
/* Jump to __hpm6750_start */
jal x1, __hpm6750_start
/* We shouldn't return from __hpm6750_start */
.global _init
.global _fini
_init:
_fini:
/* These don't have to do anything since we use init_array/fini_array. */
ret

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/****************************************************************************
* arch/risc-v/src/hpm6750/hpm6750_irq.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdio.h>
#include <assert.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/irq.h>
#include "riscv_internal.h"
#include "chip.h"
#include "hpm6750.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_irqinitialize
****************************************************************************/
void up_irqinitialize(void)
{
/* Disable Machine interrupts */
up_irq_save();
/* Disable all global interrupts */
putreg32(0x0, HPM6750_PLIC_INTEN0);
putreg32(0x0, HPM6750_PLIC_INTEN1);
putreg32(0x0, HPM6750_PLIC_INTEN2);
putreg32(0x0, HPM6750_PLIC_INTEN3);
/* Clear pendings in PLIC */
uint32_t val = getreg32(HPM6750_PLIC_CLAIM);
putreg32(val, HPM6750_PLIC_CLAIM);
/* Colorize the interrupt stack for debug purposes */
#if defined(CONFIG_STACK_COLORATION) && CONFIG_ARCH_INTERRUPTSTACK > 15
size_t intstack_size = (CONFIG_ARCH_INTERRUPTSTACK & ~15);
riscv_stack_color(g_intstackalloc, intstack_size);
#endif
/* Set priority for all global interrupts to 1 (lowest) */
for (int id = 1; id <= 127; id++)
{
putreg32(1, HPM6750_PLIC_PRIORITY + (4 * id));
}
/* Set irq threshold to 0 (permits all global interrupts) */
putreg32(0, HPM6750_PLIC_THRESHOLD);
/* Attach the common interrupt handler */
riscv_exception_attach();
#ifndef CONFIG_SUPPRESS_INTERRUPTS
/* And finally, enable interrupts */
up_irq_enable();
#endif
}
/****************************************************************************
* Name: up_disable_irq
*
* Description:
* Disable the IRQ specified by 'irq'
*
****************************************************************************/
void up_disable_irq(int irq)
{
int extirq = 0;
if (irq == RISCV_IRQ_MSOFT)
{
/* Read mstatus & clear machine software interrupt enable in mie */
CLEAR_CSR(mie, MIE_MSIE);
}
else if (irq == RISCV_IRQ_MTIMER)
{
/* Read mstatus & clear machine timer interrupt enable in mie */
CLEAR_CSR(mie, MIE_MTIE);
}
else if (irq >= HPM6750_IRQ_PERI_START)
{
extirq = irq - HPM6750_IRQ_PERI_START;
/* Clear enable bit for the irq */
if (1 <= extirq && extirq <= 127)
{
modifyreg32(HPM6750_PLIC_INTEN0 + (4 * (extirq / 32)),
1 << (extirq % 32), 0);
}
else
{
ASSERT(false);
}
}
}
/****************************************************************************
* Name: up_enable_irq
*
* Description:
* Enable the IRQ specified by 'irq'
*
****************************************************************************/
void up_enable_irq(int irq)
{
int extirq;
if (irq == RISCV_IRQ_MSOFT)
{
/* Read mstatus & set machine software interrupt enable in mie */
SET_CSR(mie, MIE_MSIE);
}
else if (irq == RISCV_IRQ_MTIMER)
{
/* Read mstatus & set machine timer interrupt enable in mie */
SET_CSR(mie, MIE_MTIE);
}
else if (irq >= HPM6750_IRQ_PERI_START)
{
extirq = irq - HPM6750_IRQ_PERI_START;
/* Set enable bit for the irq */
if (1 <= extirq && extirq <= 127)
{
modifyreg32(HPM6750_PLIC_INTEN0 + (4 * (extirq / 32)),
0, 1 << (extirq % 32));
}
else
{
ASSERT(false);
}
}
}
/****************************************************************************
* Name: riscv_ack_irq
*
* Description:
* Acknowledge the IRQ
*
****************************************************************************/
void riscv_ack_irq(int irq)
{
}
/****************************************************************************
* Name: up_irq_enable
*
* Description:
* Return the current interrupt state and enable interrupts
*
****************************************************************************/
irqstate_t up_irq_enable(void)
{
irqstate_t oldstat;
/* Enable MEIE (machine external interrupt enable) */
/* TODO: should move to up_enable_irq() */
SET_CSR(mie, MIE_MEIE);
/* Read mstatus & set machine interrupt enable (MIE) in mstatus */
oldstat = READ_AND_SET_CSR(mstatus, MSTATUS_MIE);
return oldstat;
}

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/****************************************************************************
* arch/risc-v/src/hpm6750/hpm6750_irq_dispatch.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <assert.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "riscv_internal.h"
#include "chip.h"
#include "hpm6750.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define RV_IRQ_MASK 27
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* riscv_dispatch_irq
****************************************************************************/
void *riscv_dispatch_irq(uintptr_t vector, uintptr_t *regs)
{
int irq = (vector >> RV_IRQ_MASK) | (vector & 0xf);
/* Firstly, check if the irq is machine external interrupt */
if (RISCV_IRQ_MEXT == irq)
{
uint32_t val = getreg32(HPM6750_PLIC_CLAIM);
/* Add the value to nuttx irq which is offset to the mext */
irq = val + HPM6750_IRQ_PERI_START;
}
/* Acknowledge the interrupt */
riscv_ack_irq(irq);
/* claim_irq was zero means no interrupt */
if (HPM6750_IRQ_PERI_START != irq)
{
/* Deliver the IRQ */
regs = riscv_doirq(irq, regs);
}
if (HPM6750_IRQ_PERI_START <= irq)
{
/* Then write PLIC_CLAIM to clear pending in PLIC */
putreg32(irq - HPM6750_IRQ_PERI_START, HPM6750_PLIC_CLAIM);
}
return regs;
}

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/****************************************************************************
* arch/risc-v/src/hpm6750/hpm6750_lowputc.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <arch/board/board.h>
#include "riscv_internal.h"
#include "chip.h"
#include "hpm6750.h"
#include "hpm6750_config.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: riscv_lowputc
*
* Description:
* Output one byte on the serial console
*
****************************************************************************/
void riscv_lowputc(char ch)
{
#ifdef HAVE_SERIAL_CONSOLE
/* Wait until the TX data register is empty */
while ((getreg32(HPM6750_UART0_LSR) & UART_LSR_THRE_MASK) == 0)
;
/* Then send the character */
putreg32(UART_THR_THR_SET(ch), HPM6750_UART0_THR);
#endif /* HAVE_CONSOLE */
}
/****************************************************************************
* Name: hpm6750_lowsetup
*
* Description:
* This performs basic initialization of the UART used for the serial
* console. Its purpose is to get the console output available as soon
* as possible.
*
****************************************************************************/
void hpm6750_lowsetup(void)
{
#if defined(HAVE_UART)
/* Enable and configure the selected console device */
#if defined(HAVE_SERIAL_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
#endif /* HAVE_SERIAL_CONSOLE && !CONFIG_SUPPRESS_UART_CONFIG */
#endif /* HAVE_UART */
}

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/****************************************************************************
* arch/risc-v/src/hpm6750/hpm6750_lowputc.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_HPM6750_HPM6750_LOWPUTC_H
#define __ARCH_RISCV_SRC_HPM6750_HPM6750_LOWPUTC_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include "chip.h"
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Name: hpm6750_lowsetup
****************************************************************************/
EXTERN void hpm6750_lowsetup(void);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_RISCV_SRC_HPM6750_HPM6750_LOWPUTC_H */

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/****************************************************************************
* arch/risc-v/src/hpm6750/hpm6750_memorymap.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_HPM6750_HPM6750_MEMORYMAP_H
#define __ARCH_RISCV_SRC_HPM6750_HPM6750_MEMORYMAP_H
/****************************************************************************
* Included Files
****************************************************************************/
#include "riscv_common_memorymap.h"
#include "hardware/hpm6750_memorymap.h"
#include "hardware/hpm6750_uart.h"
#include "hardware/hpm6750_mchtmr.h"
#include "hardware/hpm6750_ioc.h"
#include "hardware/hpm6750_plic.h"
#include "hardware/hpm6750_sysctl.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* Idle thread stack starts from _ebss */
#ifndef __ASSEMBLY__
#define HPM6750_IDLESTACK_BASE (uintptr_t)_ebss
#else
#define HPM6750_IDLESTACK_BASE _ebss
#endif
#define HPM6750_IDLESTACK_TOP (HPM6750_IDLESTACK_BASE + CONFIG_IDLETHREAD_STACKSIZE)
#endif /* __ARCH_RISCV_SRC_HPM6750_HPM6750_MEMORYMAP_H */

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@@ -0,0 +1,96 @@
/****************************************************************************
* arch/risc-v/src/hpm6750/hpm6750_pmic_iomux.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_HPM6750_HPM6750_PMIC_IOMUX_H
#define __ARCH_RISCV_SRC_HPM6750_HPM6750_PMIC_IOMUX_H
/* IOC_PY00_FUNC_CTL function mux definitions */
#define IOC_PY00_FUNC_CTL_PGPIO_Y_00 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
#define IOC_PY00_FUNC_CTL_JTAG_TDO IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
#define IOC_PY00_FUNC_CTL_PTMR_COMP_0 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
#define IOC_PY00_FUNC_CTL_SOC_PY_00 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
/* IOC_PY01_FUNC_CTL function mux definitions */
#define IOC_PY01_FUNC_CTL_PGPIO_Y_01 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
#define IOC_PY01_FUNC_CTL_JTAG_TDI IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
#define IOC_PY01_FUNC_CTL_PTMR_COMP_1 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
#define IOC_PY01_FUNC_CTL_SOC_PY_01 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
/* IOC_PY02_FUNC_CTL function mux definitions */
#define IOC_PY02_FUNC_CTL_PGPIO_Y_02 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
#define IOC_PY02_FUNC_CTL_JTAG_TCK IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
#define IOC_PY02_FUNC_CTL_PTMR_COMP_2 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
#define IOC_PY02_FUNC_CTL_SOC_PY_02 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
/* IOC_PY03_FUNC_CTL function mux definitions */
#define IOC_PY03_FUNC_CTL_PGPIO_Y_03 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
#define IOC_PY03_FUNC_CTL_JTAG_TMS IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
#define IOC_PY03_FUNC_CTL_PTMR_COMP_3 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
#define IOC_PY03_FUNC_CTL_SOC_PY_03 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
/* IOC_PY04_FUNC_CTL function mux definitions */
#define IOC_PY04_FUNC_CTL_PGPIO_Y_04 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
#define IOC_PY04_FUNC_CTL_JTAG_TRST IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
#define IOC_PY04_FUNC_CTL_PTMR_COMP_0 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
#define IOC_PY04_FUNC_CTL_SOC_PY_04 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
/* IOC_PY05_FUNC_CTL function mux definitions */
#define IOC_PY05_FUNC_CTL_PGPIO_Y_05 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
#define IOC_PY05_FUNC_CTL_PWDG_RST IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
#define IOC_PY05_FUNC_CTL_PTMR_CAPT_0 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
#define IOC_PY05_FUNC_CTL_SOC_PY_05 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
/* IOC_PY06_FUNC_CTL function mux definitions */
#define IOC_PY06_FUNC_CTL_PGPIO_Y_06 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
#define IOC_PY06_FUNC_CTL_PUART_TXD IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
#define IOC_PY06_FUNC_CTL_PTMR_COMP_1 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
#define IOC_PY06_FUNC_CTL_SOC_PY_06 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
/* IOC_PY07_FUNC_CTL function mux definitions */
#define IOC_PY07_FUNC_CTL_PGPIO_Y_07 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
#define IOC_PY07_FUNC_CTL_PUART_RXD IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
#define IOC_PY07_FUNC_CTL_PTMR_CAPT_1 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
#define IOC_PY07_FUNC_CTL_SOC_PY_07 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
/* IOC_PY08_FUNC_CTL function mux definitions */
#define IOC_PY08_FUNC_CTL_PGPIO_Y_08 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
#define IOC_PY08_FUNC_CTL_PUART_RTS IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
#define IOC_PY08_FUNC_CTL_PTMR_COMP_2 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
#define IOC_PY08_FUNC_CTL_SOC_PY_08 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
/* IOC_PY09_FUNC_CTL function mux definitions */
#define IOC_PY09_FUNC_CTL_PGPIO_Y_09 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
#define IOC_PY09_FUNC_CTL_PUART_CTS IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
#define IOC_PY09_FUNC_CTL_PTMR_CAPT_2 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
#define IOC_PY09_FUNC_CTL_SOC_PY_09 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
/* IOC_PY10_FUNC_CTL function mux definitions */
#define IOC_PY10_FUNC_CTL_PGPIO_Y_10 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
#define IOC_PY10_FUNC_CTL_VAD_CLK IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
#define IOC_PY10_FUNC_CTL_PTMR_COMP_3 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
#define IOC_PY10_FUNC_CTL_SOC_PY_10 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
/* IOC_PY11_FUNC_CTL function mux definitions */
#define IOC_PY11_FUNC_CTL_PGPIO_Y_11 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
#define IOC_PY11_FUNC_CTL_VAD_DAT IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
#define IOC_PY11_FUNC_CTL_PTMR_CAPT_3 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
#define IOC_PY11_FUNC_CTL_SOC_PY_11 IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
#endif /* __ARCH_RISCV_SRC_HPM6750_HPM6750_PMIC_IOMUX_H */

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@@ -0,0 +1,207 @@
/****************************************************************************
* arch/risc-v/src/hpm6750/hpm6750_serial.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_SRC_HPM6750_HPM6750_SERIAL_H
#define __ARCH_RISCV_SRC_HPM6750_HPM6750_SERIAL_H
/****************************************************************************
* Included Files
****************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#ifndef __ASSEMBLY__
/* @brief Parity */
typedef enum parity
{
parity_none = 0,
parity_odd,
parity_even,
parity_always_1,
parity_always_0,
} parity_setting_t;
/* @brief Stop bits */
typedef enum num_of_stop_bits
{
stop_bits_1 = 0,
stop_bits_1_5,
stop_bits_2,
} num_of_stop_bits_t;
/* @brief Word length */
typedef enum word_length
{
word_length_5_bits = 0,
word_length_6_bits,
word_length_7_bits,
word_length_8_bits,
} word_length_t;
/* @brief UART fifo trigger levels */
typedef enum uart_fifo_trg_lvl
{
uart_rx_fifo_trg_not_empty = 0,
uart_rx_fifo_trg_gt_one_quarter = 1,
uart_rx_fifo_trg_gt_half = 2,
uart_rx_fifo_trg_gt_three_quarters = 3,
uart_tx_fifo_trg_not_full = 0,
uart_tx_fifo_trg_lt_three_quarters = 1,
uart_tx_fifo_trg_lt_half = 2,
uart_tx_fifo_trg_lt_one_quarter = 3,
} uart_fifo_trg_lvl_t;
/* @brief UART signals */
typedef enum uart_signal
{
uart_signal_rts = UART_MCR_RTS_MASK,
} uart_signal_t;
/* @brief UART signal levels */
typedef enum uart_signal_level
{
uart_signal_level_high,
uart_signal_level_low,
} uart_signal_level_t;
/* @brief UART modem status */
typedef enum uart_modem_stat
{
uart_modem_stat_cts = UART_MSR_CTS_MASK,
uart_modem_stat_dcts_changed = UART_MSR_DCTS_MASK,
} uart_modem_stat_t;
/* @brief UART interrupt enable masks */
typedef enum uart_intr_enable
{
uart_intr_rx_data_avail_or_timeout = UART_IER_ERBI_MASK,
uart_intr_tx_slot_avail = UART_IER_ETHEI_MASK,
uart_intr_rx_line_stat = UART_IER_ELSI_MASK,
uart_intr_modem_stat = UART_IER_EMSI_MASK,
#if defined(UART_SOC_HAS_RXLINE_IDLE_DETECTION) && (UART_SOC_HAS_RXLINE_IDLE_DETECTION == 1)
uart_intr_rx_line_idle = UART_IER_ERXIDLE_MASK,
#endif
} uart_intr_enable_t;
/* @brief UART interrupt IDs */
typedef enum uart_intr_id
{
uart_intr_id_modem_stat = 0x0,
uart_intr_id_tx_slot_avail = 0x2,
uart_intr_id_rx_data_avail = 0x4,
uart_intr_id_rx_line_stat = 0x6,
uart_intr_id_rx_timeout = 0xc,
} uart_intr_id_t;
/* @brief UART status */
typedef enum uart_stat
{
uart_stat_data_ready = UART_LSR_DR_MASK,
uart_stat_overrun_error = UART_LSR_OE_MASK,
uart_stat_parity_error = UART_LSR_PE_MASK,
uart_stat_framing_error = UART_LSR_FE_MASK,
uart_stat_line_break = UART_LSR_LBREAK_MASK,
uart_stat_tx_slot_avail = UART_LSR_THRE_MASK,
uart_stat_transmitter_empty = UART_LSR_TEMT_MASK,
uart_stat_rx_fifo_error = UART_LSR_ERRF_MASK,
} uart_stat_t;
/**
* @brief UART modem config
*/
typedef struct uart_modem_config
{
bool auto_flow_ctrl_en; /**< Auto flow control enable flag */
bool loop_back_en; /**< Loop back enable flag */
bool set_rts_high; /**< Set signal RTS level high flag */
} uart_modem_config_t;
#if defined(UART_SOC_HAS_RXLINE_IDLE_DETECTION) && (UART_SOC_HAS_RXLINE_IDLE_DETECTION == 1)
/**
* @brief UART RX Line Idle detection conditions
*/
typedef enum hpm_uart_rxline_idle_cond
{
uart_rxline_idle_cond_rxline_logic_one = 0, /**< Treat as idle if the RX Line high duration exceeds threshold */
uart_rxline_idle_cond_state_machine_idle = 1 /**< Treat as idle if the RX state machine idle state duration exceeds threshold */
} uart_rxline_idle_cond_t;
typedef struct hpm_uart_rxline_idle_detect_config
{
bool detect_enable; /**< RX Line Idle detection flag */
bool detect_irq_enable; /**< Enable RX Line Idle detection interrupt */
uart_rxline_idle_cond_t idle_cond; /**< RX Line Idle detection condition */
uint8_t threshold; /**< UART RX Line Idle detection threshold, in terms of bits */
} uart_rxline_idle_config_t;
#endif
/**
* @brief UART config
*/
typedef struct hpm_uart_config
{
uint32_t src_freq_in_hz; /**< Source clock frequency in Hz */
uint32_t baudrate; /**< Baudrate */
uint8_t num_of_stop_bits; /**< Number of stop bits */
uint8_t word_length; /**< Word length */
uint8_t parity; /**< Parity */
uint8_t tx_fifo_level; /**< TX Fifo level */
uint8_t rx_fifo_level; /**< RX Fifo level */
bool dma_enable; /**< DMA Enable flag */
bool fifo_enable; /**< Fifo Enable flag */
uart_modem_config_t modem_config; /**< Modem config */
#if defined(UART_SOC_HAS_RXLINE_IDLE_DETECTION) && (UART_SOC_HAS_RXLINE_IDLE_DETECTION == 1)
uart_rxline_idle_config_t rxidle_config; /**< RX Idle configuration */
#endif
} uart_config_t;
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_RISCV_SRC_HPM6750_HPM6750_SERIAL_H */

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@@ -0,0 +1,115 @@
/****************************************************************************
* arch/risc-v/src/hpm6750/hpm6750_start.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <nuttx/init.h>
#include <arch/board/board.h>
#include "chip.h"
#include "hpm6750.h"
#include "hpm6750_clockconfig.h"
#include "hpm6750_lowputc.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
/* g_idle_topstack: _sbss is the start of the BSS region as defined by the
* linker script. _ebss lies at the end of the BSS region. The idle task
* stack starts at the end of BSS and is of size CONFIG_IDLETHREAD_STACKSIZE.
* The IDLE thread is the thread that the system boots on and, eventually,
* becomes the IDLE, do nothing task that runs only when there is nothing
* else to run. The heap continues from there until the end of memory.
* g_idle_topstack is a read-only variable the provides this computed
* address.
*/
uintptr_t g_idle_topstack = HPM6750_IDLESTACK_TOP;
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: __hpm6750_start
****************************************************************************/
void __hpm6750_start(void)
{
const uint32_t *src;
uint32_t *dest;
/* Clear .bss. We'll do this inline (vs. calling memset) just to be
* certain that there are no issues with the state of global variables.
*/
for (dest = (uint32_t *)_sbss; dest < (uint32_t *)_ebss; )
{
*dest++ = 0;
}
/* Move the initialized data section from his temporary holding spot in
* FLASH into the correct place in SRAM. The correct place in SRAM is
* give by _sdata and _edata. The temporary location is in FLASH at the
* end of all of the other read-only data (.text, .rodata) at _eronly.
*/
for (src = (const uint32_t *)_eronly,
dest = (uint32_t *)_sdata; dest < (uint32_t *)_edata;
)
{
*dest++ = *src++;
}
/* Setup PLL */
hpm6750_clockconfig();
/* Configure the UART so we can get debug output */
hpm6750_lowsetup();
#ifdef USE_EARLYSERIALINIT
riscv_earlyserialinit();
#endif
/* Do board initialization */
hpm6750_boardinitialize();
/* Call nx_start() */
nx_start();
/* Shouldn't get here */
for (; ; );
}

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@@ -0,0 +1,70 @@
/****************************************************************************
* arch/risc-v/src/hpm6750/hpm6750_timerisr.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <assert.h>
#include <stdint.h>
#include <time.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/clock.h>
#include <nuttx/spinlock.h>
#include <nuttx/timers/arch_alarm.h>
#include <arch/board/board.h>
#include "riscv_internal.h"
#include "riscv_mtimer.h"
#include "chip.h"
#include "hpm6750.h"
#include "hpm6750_clockconfig.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_timer_initialize
*
* Description:
* This function is called during start-up to initialize
* the timer interrupt.
*
****************************************************************************/
void up_timer_initialize(void)
{
struct oneshot_lowerhalf_s *lower = riscv_mtimer_initialize(
HPM6750_MCHTMR_MTIME, HPM6750_MCHTMR_MTIMECMP,
RISCV_IRQ_MTIMER, hpm6750_get_osc_freq());
DEBUGASSERT(lower);
up_alarm_set_lowerhalf(lower);
}

View File

@@ -2630,6 +2630,13 @@ config ARCH_BOARD_S698PM_DKIT
---help---
none
config ARCH_BOARD_HPM6750EVK2
bool "Hpmicro hpm6750evk2"
depends on ARCH_CHIP_HPM6750
---help---
This is the board configuration for the port of NuttX to the Hpmicro hpm6750evk2
board. This board features the RISC-V hpm6750.
config ARCH_BOARD_SIM
bool "User mode simulation"
select ARCH_HAVE_BUTTONS
@@ -2979,6 +2986,7 @@ config ARCH_BOARD
default "xx3803" if ARCH_BOARD_XX3803
default "xx3823" if ARCH_BOARD_XX3823
default "s698pm-dkit" if ARCH_BOARD_S698PM_DKIT
default "hpm6750evk2" if ARCH_BOARD_HPM6750EVK2
comment "Common Board Options"
@@ -3818,6 +3826,9 @@ endif
if ARCH_BOARD_TLSR8278ADK80D
source "boards/arm/tlsr82/tlsr8278adk80d/Kconfig"
endif
if ARCH_BOARD_HPM6750EVK2
source "boards/risc-v/hpm6750/hpm6750evk2/Kconfig"
endif
comment "Board-Common Options"

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@@ -0,0 +1,8 @@
#
# For a description of the syntax of this configuration file,
# see misc/tools/kconfig-language.txt.
#
if ARCH_BOARD_HPM6750EVK2
endif

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@@ -0,0 +1,30 @@
1. Download and install toolchain
$ curl https://github.com/hpmicro/riscv-gnu-toolchain/releases/tag/2022.05.15
2. Download and install openocd
Download hpmicro sdk_env, openocd in the path: sdk_env/tools/openocd
3. Configure and build NuttX
$ mkdir ./nuttxspace
$ cd ./nuttxspace
$ git clone https://github.com/apache/nuttx.git nuttx
$ git clone https://github.com/apache/nuttx-apps.git apps
$ cd nuttx
$ make distclean
$ ./tools/configure.sh hpm6750evk2:nsh
$ make V=1
4. Debug the nuttx with openocd and run
$ picocom -b 115200 /dev/ttyACM0
When using fireDAP, command as follows. Those cfg files in the path: sdk_env/hpm_sdk/boards/openocd.
$ openocd -f probes/cmsis_dap.cfg -f soc/hpm6750-single-core.cfg -f boards/hpm6750evk2.cfg
$ riscv64-unknown-elf-gdb ./nuttx
(gdb) target extended-remote [ip_addr]:3333
(gdb) load
(gdb) c

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@@ -0,0 +1,80 @@
#
# This file is autogenerated: PLEASE DO NOT EDIT IT.
#
# You can use "make menuconfig" to make any modifications to the installed .config file.
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
# modifications.
#
# CONFIG_DISABLE_ENVIRON is not set
# CONFIG_DISABLE_PTHREAD is not set
# CONFIG_FS_PROCFS_EXCLUDE_BLOCKS is not set
# CONFIG_FS_PROCFS_EXCLUDE_ENVIRON is not set
# CONFIG_FS_PROCFS_EXCLUDE_MEMDUMP is not set
# CONFIG_FS_PROCFS_EXCLUDE_MEMINFO is not set
# CONFIG_FS_PROCFS_EXCLUDE_MOUNT is not set
# CONFIG_FS_PROCFS_EXCLUDE_MOUNTS is not set
# CONFIG_FS_PROCFS_EXCLUDE_PROCESS is not set
# CONFIG_FS_PROCFS_EXCLUDE_UPTIME is not set
# CONFIG_FS_PROCFS_EXCLUDE_USAGE is not set
# CONFIG_FS_PROCFS_EXCLUDE_VERSION is not set
# CONFIG_NSH_DISABLEBG is not set
# CONFIG_NSH_DISABLE_CAT is not set
# CONFIG_NSH_DISABLE_CD is not set
# CONFIG_NSH_DISABLE_ECHO is not set
# CONFIG_NSH_DISABLE_ENV is not set
# CONFIG_NSH_DISABLE_EXEC is not set
# CONFIG_NSH_DISABLE_FREE is not set
# CONFIG_NSH_DISABLE_HELP is not set
# CONFIG_NSH_DISABLE_KILL is not set
# CONFIG_NSH_DISABLE_LOSMART is not set
# CONFIG_NSH_DISABLE_LS is not set
# CONFIG_NSH_DISABLE_MOUNT is not set
# CONFIG_NSH_DISABLE_PRINTF is not set
# CONFIG_NSH_DISABLE_PS is not set
# CONFIG_NSH_DISABLE_PWD is not set
# CONFIG_NSH_DISABLE_SLEEP is not set
# CONFIG_NSH_DISABLE_UNAME is not set
# CONFIG_NSH_DISABLE_USLEEP is not set
# CONFIG_STANDARD_SERIAL is not set
CONFIG_ARCH="risc-v"
CONFIG_ARCH_BOARD="hpm6750evk2"
CONFIG_ARCH_BOARD_HPM6750EVK2=y
CONFIG_ARCH_CHIP="hpm6750"
CONFIG_ARCH_CHIP_HPM6750=y
CONFIG_ARCH_INTERRUPTSTACK=8192
CONFIG_ARCH_RISCV=y
CONFIG_ARCH_STACKDUMP=y
CONFIG_BOARD_LOOPSPERMSEC=10000
CONFIG_BUILTIN=y
CONFIG_DEBUG_ERROR=y
CONFIG_DEBUG_FEATURES=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_SYMBOLS=y
CONFIG_DEBUG_WARN=y
CONFIG_DEFAULT_SMALL=y
CONFIG_EXAMPLES_HELLO=y
CONFIG_FS_BINFS=y
CONFIG_FS_PROCFS=y
CONFIG_IDLETHREAD_STACKSIZE=8192
CONFIG_INIT_ENTRYPOINT="nsh_main"
CONFIG_INIT_STACKSIZE=8192
CONFIG_INTELHEX_BINARY=y
CONFIG_LIBC_ENVPATH=y
CONFIG_LIBC_PERROR_STDOUT=y
CONFIG_LIBC_STRERROR=y
CONFIG_NSH_ARCHINIT=y
CONFIG_NSH_BUILTIN_APPS=y
CONFIG_NSH_FILEIOSIZE=64
CONFIG_NSH_STRERROR=y
CONFIG_PATH_INITIAL="/bin"
CONFIG_RAM_SIZE=262144
CONFIG_RAM_START=0x00080000
CONFIG_RR_INTERVAL=200
CONFIG_SCHED_WAITPID=y
CONFIG_START_DAY=7
CONFIG_START_MONTH=2
CONFIG_START_YEAR=2023
CONFIG_SYSTEM_NSH=y
CONFIG_UART0_RXBUFSIZE=128
CONFIG_UART0_SERIAL_CONSOLE=y
CONFIG_UART0_TXBUFSIZE=128

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@@ -0,0 +1,68 @@
/****************************************************************************
* boards/risc-v/hpm6750/hpm6750evk2/include/board.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_HPM6750_HPM6750EVK2_INCLUDE_BOARD_H
#define __BOARDS_RISCV_HPM6750_HPM6750EVK2_INCLUDE_BOARD_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Types
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Data
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: hpm6750_boardinitialize
****************************************************************************/
void hpm6750_boardinitialize(void);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_RISCV_HPM6750_HPM6750EVK2_INCLUDE_BOARD_H */

View File

@@ -0,0 +1,34 @@
############################################################################
# boards/risc-v/hpm6750/hpm6750evk2/scripts/Make.defs
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/.config
include $(TOPDIR)/tools/Config.mk
include $(TOPDIR)/arch/risc-v/src/common/Toolchain.defs
LDSCRIPT = ld.script
ARCHSCRIPT += $(BOARD_DIR)$(DELIM)scripts$(DELIM)$(LDSCRIPT)
CFLAGS := $(ARCHCFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CPICFLAGS = $(ARCHPICFLAGS) $(CFLAGS)
CXXFLAGS := $(ARCHCXXFLAGS) $(ARCHOPTIMIZATION) $(ARCHCPUFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
CXXPICFLAGS = $(ARCHPICFLAGS) $(CXXFLAGS)
CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
AFLAGS += $(CFLAGS) -D__ASSEMBLY__

View File

@@ -0,0 +1,92 @@
/****************************************************************************
* boards/risc-v/hpm6750/hpm6750evk2/scripts/ld.script
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
MEMORY
{
ilm (rx) : ORIGIN = 0x00000000, LENGTH = 256K
dlm (rwx) : ORIGIN = 0x00080000, LENGTH = 256K
}
OUTPUT_ARCH("riscv")
EXTERN(_vectors)
SECTIONS
{
.text : {
_stext = ABSOLUTE(.);
*(.vectors)
*(.text .text.*)
*(.fixup)
*(.gnu.warning)
*(.rodata .rodata.*)
*(.gnu.linkonce.t.*)
*(.glue_7)
*(.glue_7t)
*(.got)
*(.gcc_except_table)
*(.gnu.linkonce.r.*)
_etext = ABSOLUTE(.);
} > ilm
.init_section : ALIGN(4) {
_sinit = ABSOLUTE(.);
KEEP(*(.init_array .init_array.*))
_einit = ABSOLUTE(.);
} > ilm
_eronly = ABSOLUTE(.);
.data : ALIGN(4) {
_sdata = ABSOLUTE(.);
*(.data .data.*)
*(.sdata .sdata.* .sdata2.*)
*(.gnu.linkonce.d.*)
*(.gnu.linkonce.s.*)
CONSTRUCTORS
. = ALIGN(4);
_edata = ABSOLUTE(.);
} > dlm AT > ilm
.bss : ALIGN(4) {
_sbss = ABSOLUTE(.);
*(.bss .bss.*)
*(.sbss .sbss.*)
*(.gnu.linkonce.b.*)
*(.gnu.linkonce.sb.*)
*(COMMON)
. = ALIGN(32);
_ebss = ABSOLUTE(.);
} > dlm
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_info 0 : { *(.debug_info) }
.debug_line 0 : { *(.debug_line) }
.debug_pubnames 0 : { *(.debug_pubnames) }
.debug_aranges 0 : { *(.debug_aranges) }
}

View File

@@ -0,0 +1,29 @@
############################################################################
# boards/risc-v/hpm6750/hpm6750evk2/src/Makefile
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include $(TOPDIR)/Make.defs
CSRCS = hpm6750_bringup.c hpm6750_boot.c
ifeq ($(CONFIG_BOARDCTL),y)
CSRCS += hpm6750_appinit.c
endif
include $(TOPDIR)/boards/Board.mk

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@@ -0,0 +1,74 @@
/****************************************************************************
* boards/risc-v/hpm6750/hpm6750evk2/src/hpm6750_appinit.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <stdio.h>
#include <syslog.h>
#include <errno.h>
#include <nuttx/board.h>
#include "hpm6750evk2.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_app_initialize
*
* Description:
* Perform architecture specific initialization
*
* Input Parameters:
* arg - The boardctl() argument is passed to the board_app_initialize()
* implementation without modification. The argument has no
* meaning to NuttX; the meaning of the argument is a contract
* between the board-specific initialization logic and the
* matching application logic. The value could be such things as a
* mode enumeration value, a set of DIP switch switch settings, a
* pointer to configuration data read from a file or serial FLASH,
* or whatever you would like to do with it. Every implementation
* should accept zero/NULL as a default configuration.
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned on
* any failure to indicate the nature of the failure.
*
****************************************************************************/
int board_app_initialize(uintptr_t arg)
{
#ifdef CONFIG_BOARD_LATE_INITIALIZE
/* Board initialization already performed by board_late_initialize() */
return OK;
#else
/* Perform board-specific initialization */
return hpm6750_bringup();
#endif
}

View File

@@ -0,0 +1,58 @@
/****************************************************************************
* boards/risc-v/hpm6750/hpm6750evk2/src/hpm6750_boot.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <nuttx/board.h>
#include <arch/board/board.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: hpm6750_boardinitialize
*
* Description:
* All FE310 architectures must provide the following entry point.
* This entry point is called early in the initialization -- after all
* memory has been configured and mapped but before any devices have been
* initialized.
*
****************************************************************************/
void hpm6750_boardinitialize(void)
{
;
}

View File

@@ -0,0 +1,67 @@
/****************************************************************************
* boards/risc-v/hpm6750/hpm6750evk2/src/hpm6750_bringup.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdbool.h>
#include <stdio.h>
#include <debug.h>
#include <errno.h>
#include <nuttx/board.h>
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: hpm6750_bringup
****************************************************************************/
int hpm6750_bringup(void)
{
int ret = OK;
#ifdef CONFIG_FS_BINFS
/* Mount the binfs file system */
ret = nx_mount(NULL, "/bin", "binfs", 0, NULL);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: Failed to mount binfs at /bin: %d\n", ret);
}
#endif
#ifdef CONFIG_FS_PROCFS
/* Mount the procfs file system */
ret = nx_mount(NULL, "/proc", "procfs", 0, NULL);
if (ret < 0)
{
serr("ERROR: Failed to mount procfs at %s: %d\n", "/proc", ret);
}
#endif
return ret;
}

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@@ -0,0 +1,32 @@
/****************************************************************************
* boards/risc-v/hpm6750/hpm6750evk2/src/hpm6750evk2.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_HPMICRO_HPM6750EVK2_SRC_HPM6750EVK2_H
#define __BOARDS_RISCV_HPMICRO_HPM6750EVK2_SRC_HPM6750EVK2_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
int hpm6750_bringup(void);
#endif /* __BOARDS_RISCV_HPMICRO_HPM6750EVK2_SRC_HPM6750EVK2_H */