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arch: arm: cm320: fix nxstyle errors

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Fix nxstyle errors to pass CI

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
This commit is contained in:
Alin Jerpelea
2021-03-24 09:19:10 +01:00
committed by Xiang Xiao
parent 17af7179a6
commit cf2aed1810
17 changed files with 413 additions and 287 deletions
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arch/arm/src/dm320/chip.h
+8 -8
View File
@@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/dm320/chip.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,14 +16,14 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_DM320_CHIP_H
#define __ARCH_ARM_SRC_DM320_CHIP_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include "dm320_memorymap.h"
#include "dm320_clkc.h"
@@ -35,12 +35,12 @@
#include "dm320_gio.h"
#include "dm320_usb.h"
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Inline Functions
************************************************************************************/
****************************************************************************/
#endif /* __ARCH_ARM_SRC_DM320_CHIP_H */
arch/arm/src/dm320/dm320_ahb.h
+9 -9
View File
@@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/dm320/dm320_ahb.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,20 +16,20 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_DM320_DM320_AHB_H
#define __ARCH_ARM_SRC_DM320_DM320_AHB_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/* AHB Bus Controller (AHBBUSC) Registers *******************************************/
/* AHB Bus Controller (AHBBUSC) Registers ***********************************/
#define DM320_AHB_SDRAMSA (DM320_AHB_VADDR+0x0f00) /* SDRAM start address */
#define DM320_AHB_SDRAMEA (DM320_AHB_VADDR+0x0f04) /* SDRAM end address */
@@ -37,8 +37,8 @@
#define DM320_AHB_RSV1 (DM320_AHB_VADDR+0x0f0c) /* Reserved */
#define DM320_AHB_USBCTL (DM320_AHB_VADDR+0x0f10) /* USB control register (ES1.1) */
/************************************************************************************
/****************************************************************************
* Inline Functions
************************************************************************************/
****************************************************************************/
#endif /* __ARCH_ARM_SRC_DM320_DM320_AHB_H */
arch/arm/src/dm320/dm320_boot.c
+48 -38
View File
@@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/dm320/dm320_boot.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
@@ -32,9 +32,9 @@
#include <nuttx/board.h>
/************************************************************************************
/****************************************************************************
* Private Types
************************************************************************************/
****************************************************************************/
struct section_mapping_s
{
@@ -44,16 +44,16 @@ struct section_mapping_s
uint32_t nsections; /* Number of mappings in the region */
};
/************************************************************************************
/****************************************************************************
* Public Data
************************************************************************************/
****************************************************************************/
extern uint32_t _vector_start; /* Beginning of vector block */
extern uint32_t _vector_end; /* End+1 of vector block */
/************************************************************************************
/****************************************************************************
* Private Data
************************************************************************************/
****************************************************************************/
static const struct section_mapping_s section_mapping[] =
{
@@ -76,15 +76,16 @@ static const struct section_mapping_s section_mapping[] =
};
#define NMAPPINGS (sizeof(section_mapping) / sizeof(struct section_mapping_s))
/************************************************************************************
/****************************************************************************
* Private Functions
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Name: up_setlevel1entry
************************************************************************************/
****************************************************************************/
static inline void up_setlevel1entry(uint32_t paddr, uint32_t vaddr, uint32_t mmuflags)
static inline void up_setlevel1entry(uint32_t paddr,
uint32_t vaddr, uint32_t mmuflags)
{
uint32_t *pgtable = (uint32_t *)PGTABLE_BASE_VADDR;
uint32_t index = vaddr >> 20;
@@ -94,12 +95,13 @@ static inline void up_setlevel1entry(uint32_t paddr, uint32_t vaddr, uint32_t mm
pgtable[index] = (paddr | mmuflags);
}
/************************************************************************************
/****************************************************************************
* Name: up_setlevel2coarseentry
************************************************************************************/
****************************************************************************/
static inline void up_setlevel2coarseentry(uint32_t ctabvaddr, uint32_t paddr,
uint32_t vaddr, uint32_t mmuflags)
static inline void
up_setlevel2coarseentry(uint32_t ctabvaddr, uint32_t paddr,
uint32_t vaddr, uint32_t mmuflags)
{
uint32_t *ctable = (uint32_t *)ctabvaddr;
uint32_t index;
@@ -116,13 +118,14 @@ static inline void up_setlevel2coarseentry(uint32_t ctabvaddr, uint32_t paddr,
ctable[index] = (paddr | mmuflags);
}
/************************************************************************************
/****************************************************************************
* Name: up_setupmappings
************************************************************************************/
****************************************************************************/
static void up_setupmappings(void)
{
int i, j;
int i;
int j;
for (i = 0; i < NMAPPINGS; i++)
{
@@ -139,9 +142,9 @@ static void up_setupmappings(void)
}
}
/************************************************************************************
/****************************************************************************
* Name: up_vectormapping
************************************************************************************/
****************************************************************************/
static void up_vectormapping(void)
{
@@ -149,27 +152,34 @@ static void up_vectormapping(void)
uint32_t vector_vaddr = DM320_VECTOR_VADDR;
uint32_t end_paddr = vector_paddr + DM320_IRAM_SIZE;
/* We want to keep our interrupt vectors and interrupt-related logic in zero-wait
* state internal RAM (IRAM). The DM320 has 16Kb of IRAM positioned at physical
* address 0x0000:0000; we need to map this to 0xffff:0000.
/* We want to keep our interrupt vectors and interrupt-related logic in
* zero-wait state internal RAM (IRAM). The DM320 has 16Kb of IRAM
* positioned at physical address 0x0000:0000;
* we need to map this to 0xffff:0000.
*/
while (vector_paddr < end_paddr)
{
up_setlevel2coarseentry(PGTABLE_L2_COARSE_VBASE, vector_paddr, vector_vaddr,
up_setlevel2coarseentry(PGTABLE_L2_COARSE_VBASE,
vector_paddr,
vector_vaddr,
MMU_L2_VECTORFLAGS);
vector_paddr += 4096;
vector_vaddr += 4096;
}
/* Now set the level 1 descriptor to refer to the level 2 coarse page table. */
/* Now set the level 1 descriptor to refer to the level 2 coarse page
* table.
*/
up_setlevel1entry(PGTABLE_L2_COARSE_PBASE, DM320_VECTOR_VCOARSE, MMU_L1_VECTORFLAGS);
up_setlevel1entry(PGTABLE_L2_COARSE_PBASE,
DM320_VECTOR_VCOARSE,
MMU_L1_VECTORFLAGS);
}
/************************************************************************************
/****************************************************************************
* Name: up_copyvectorblock
************************************************************************************/
****************************************************************************/
static void up_copyvectorblock(void)
{
@@ -183,20 +193,20 @@ static void up_copyvectorblock(void)
}
}
/************************************************************************************
/****************************************************************************
* Public Functions
************************************************************************************/
****************************************************************************/
void arm_boot(void)
{
/* __start provided the basic MMU mappings for SDRAM. Now provide mappings for all
* IO regions (Including the vector region).
/* __start provided the basic MMU mappings for SDRAM.
* Now provide mappings for all IO regions (Including the vector region).
*/
up_setupmappings();
/* Provide a special mapping for the IRAM interrupt vector positioned in high
* memory.
/* Provide a special mapping for the IRAM interrupt vector positioned in
* high memory.
*/
up_vectormapping();
arch/arm/src/dm320/dm320_busc.h
+9 -9
View File
@@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/dm320/dm320_busc.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,28 +16,28 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_DM320_DM320_BUSC_H
#define __ARCH_ARM_SRC_DM320_DM320_BUSC_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/* Bus Controller Register Map (BUSC) ***********************************************/
/* Bus Controller Register Map (BUSC) ***************************************/
#define DM320_BUSC_ECR (DM320_BUSC_REGISTER_BASE+0x0000) /* Endian Conversion Register */
#define DM320_BUSC_EBYTER (DM320_BUSC_REGISTER_BASE+0x0002) /* Endian Byte Reverse Register */
#define DM320_BUSC_EBITR (DM320_BUSC_REGISTER_BASE+0x0004) /* Endian Bit Reverse Register */
#define DM320_BUSC_REVR (DM320_BUSC_REGISTER_BASE+0x0006) /* Device Revision Register */
/************************************************************************************
/****************************************************************************
* Inline Functions
************************************************************************************/
****************************************************************************/
#endif /* __ARCH_ARM_SRC_DM320_DM320_BUSC_H */
arch/arm/src/dm320/dm320_clkc.h
+9 -9
View File
@@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/dm320/dm320_clkc.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,20 +16,20 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_DM320_DM320_CLKC_H
#define __ARCH_ARM_SRC_DM320_DM320_CLKC_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/* Clock Controller Register Map (CLKC) *********************************************/
/* Clock Controller Register Map (CLKC) *************************************/
#define DM320_CLKC_PLLA (DM320_CLKC_REGISTER_BASE+0x0000) /* PLLA Configuration */
#define DM320_CLKC_PLLB (DM320_CLKC_REGISTER_BASE+0x0002) /* PLLB Configuration */
@@ -59,8 +59,8 @@
#define DM320_CLKC_TEST0 (DM320_CLKC_REGISTER_BASE+0x08FE) /* Test #0 */
#define DM320_CLKC_TEST1 (DM320_CLKC_REGISTER_BASE+0x08FE) /* Test #1 */
/************************************************************************************
/****************************************************************************
* Inline Functions
************************************************************************************/
****************************************************************************/
#endif /* __ARCH_ARM_SRC_DM320_DM320_CLKC_H */
arch/arm/src/dm320/dm320_decodeirq.c
+13 -9
View File
@@ -1,4 +1,4 @@
/********************************************************************************
/****************************************************************************
* arch/arm/src/dm320/dm320_decodeirq.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,11 +16,11 @@
* License for the specific language governing permissions and limitations
* under the License.
*
********************************************************************************/
****************************************************************************/
/********************************************************************************
/****************************************************************************
* Included Files
********************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
@@ -36,9 +36,9 @@
#include "group/group.h"
/********************************************************************************
/****************************************************************************
* Public Functions
********************************************************************************/
****************************************************************************/
uint32_t *arm_decodeirq(uint32_t *regs)
{
@@ -52,7 +52,9 @@ uint32_t *arm_decodeirq(uint32_t *regs)
uint16_t irqentry = getreg16(DM320_INTC_IRQENTRY0);
/* The irqentry value is an offset into a table. Zero means no interrupt. */
/* The irqentry value is an offset into a table.
* Zero means no interrupt.
*/
if (irqentry != 0)
{
@@ -68,8 +70,10 @@ uint32_t *arm_decodeirq(uint32_t *regs)
arm_ack_irq(irq);
/* Current regs non-zero indicates that we are processing an interrupt;
* CURRENT_REGS is also used to manage interrupt level context switches.
/* Current regs non-zero indicates that we are processing an
* interrupt;
* CURRENT_REGS is also used to manage interrupt level context
* switches.
*
* Nested interrupts are not supported.
*/
arch/arm/src/dm320/dm320_emif.h
+8 -8
View File
@@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/dm320/dm320_emif.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,18 +16,18 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_DM320_DM320_EMIF_H
#define __ARCH_ARM_SRC_DM320_DM320_EMIF_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/* External Memory Interface (EMIF) Registers */
@@ -82,9 +82,9 @@
#define DM320_EMIF_DMACTL (DM320_PERIPHERALS_VADDR + 0x0A60) /* DMA Control Register */
#define DM320_EMIF_TEST (DM320_PERIPHERALS_VADDR + 0x0A62) /* Test Register.Do not use */
/************************************************************************************
/****************************************************************************
* Inline Functions
************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
arch/arm/src/dm320/dm320_framebuffer.c
+58 -29
View File
@@ -43,7 +43,7 @@
* Pre-processor Definitions
****************************************************************************/
/* Configuration ********************************************************/
/* Configuration ************************************************************/
/* Video (X,Y) base offset */
@@ -206,7 +206,7 @@
# endif
#endif
/* DM320 ****************************************************************/
/* DM320 ********************************************************************/
/* Video planes. This long messy conditional compilation results in
* consecutive plane numbers assigned for enable planes and the total
@@ -478,28 +478,44 @@ static void dm320_hwinitialize(void);
/* Framebuffer interface methods */
#ifndef CONFIG_DM320_VID0_DISABLE
static int dm320_getvid0videoinfo(FAR struct fb_vtable_s *vtable, FAR struct fb_videoinfo_s *vinfo);
static int dm320_getvid0planeinfo(FAR struct fb_vtable_s *vtable, int planeno, FAR struct fb_planeinfo_s *pinfo);
static int dm320_getvid0videoinfo(FAR struct fb_vtable_s *vtable,
FAR struct fb_videoinfo_s *vinfo);
static int dm320_getvid0planeinfo(FAR struct fb_vtable_s *vtable,
int planeno,
FAR struct fb_planeinfo_s *pinfo);
#endif
#ifndef CONFIG_DM320_VID1_DISABLE
static int dm320_getvid1videoinfo(FAR struct fb_vtable_s *vtable, FAR struct fb_videoinfo_s *vinfo);
static int dm320_getvid1planeinfo(FAR struct fb_vtable_s *vtable, int planeno, FAR struct fb_planeinfo_s *pinfo);
static int dm320_getvid1videoinfo(FAR struct fb_vtable_s *vtable,
FAR struct fb_videoinfo_s *vinfo);
static int dm320_getvid1planeinfo(FAR struct fb_vtable_s *vtable,
int planeno,
FAR struct fb_planeinfo_s *pinfo);
#endif
#ifndef CONFIG_DM320_OSD0_DISABLE
static int dm320_getosd0videoinfo(FAR struct fb_vtable_s *vtable, FAR struct fb_videoinfo_s *vinfo);
static int dm320_getosd0planeinfo(FAR struct fb_vtable_s *vtable, int planeno, FAR struct fb_planeinfo_s *pinfo);
static int dm320_getosd0videoinfo(FAR struct fb_vtable_s *vtable,
FAR struct fb_videoinfo_s *vinfo);
static int dm320_getosd0planeinfo(FAR struct fb_vtable_s *vtable,
int planeno,
FAR struct fb_planeinfo_s *pinfo);
#endif
#ifndef CONFIG_DM320_OSD1_DISABLE
static int dm320_getosd1videoinfo(FAR struct fb_vtable_s *vtable, FAR struct fb_videoinfo_s *vinfo);
static int dm320_getosd1planeinfo(FAR struct fb_vtable_s *vtable, int planeno, FAR struct fb_planeinfo_s *pinfo);
static int dm320_getosd1videoinfo(FAR struct fb_vtable_s *vtable,
FAR struct fb_videoinfo_s *vinfo);
static int dm320_getosd1planeinfo(FAR struct fb_vtable_s *vtable,
int planeno,
FAR struct fb_planeinfo_s *pinfo);
#endif
#if defined(CONFIG_FB_CMAP) && (!defined(CONFIG_DM320_OSD0_DISABLE) && !defined(CONFIG_DM320_OSD1_DISABLE))
static int dm320_getcmap(FAR struct fb_vtable_s *vtable, FAR struct fb_cmap_s *cmap);
static int dm320_putcmap(FAR struct fb_vtable_s *vtable, FAR const struct fb_cmap_s *cmap);
static int dm320_getcmap(FAR struct fb_vtable_s *vtable,
FAR struct fb_cmap_s *cmap);
static int dm320_putcmap(FAR struct fb_vtable_s *vtable,
FAR const struct fb_cmap_s *cmap);
#endif
#ifdef CONFIG_FB_HWCURSOR
static int dm320_getcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_cursorattrib_s *attrib);
static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcursor_s *settings);
static int dm320_getcursor(FAR struct fb_vtable_s *vtable,
FAR struct fb_cursorattrib_s *attrib);
static int dm320_setcursor(FAR struct fb_vtable_s *vtable,
FAR struct fb_setcursor_s *settings);
#endif
/****************************************************************************
@@ -788,7 +804,6 @@ static void dm320_hwinitialize(void)
ginfo("Setup framebuffer addresses:\n");
putreg16(((dm320_osd1upperoffset() << 8) |
dm320_osd0upperoffset()), DM320_OSD_OSDWINADH);
putreg16(dm320_osd0loweroffset(), DM320_OSD_OSDWIN0ADL);
@@ -801,7 +816,8 @@ static void dm320_hwinitialize(void)
/* Set up VID WIN0 */
#if defined(CONFIG_DM320_VID0_DISABLE) || defined(CONFIG_DM320_VID1_DISABLE)
putreg16(((dm320_vid1upperoffset() << 8) | dm320_vid0upperoffset()), DM320_OSD_VIDWINADH);
putreg16(((dm320_vid1upperoffset() << 8) |
dm320_vid0upperoffset()), DM320_OSD_VIDWINADH);
#endif
#ifndef CONFIG_DM320_VID0_DISABLE
@@ -923,10 +939,13 @@ static void dm320_hwinitialize(void)
/* DM320_RECTCURSOR_SETUP:
*
* Bit 0: 0=rectangular cursor inactive 1=on 0
* Bits 113: Vertical line height: {1,2,4,6,8,10,12,14} CONFIG_DM320_CURSORLINEHEIGHT
* 4:6: Horizontal line width: {1,4,8,16,20,24,28} CONFIG_DM320_CURSORLINEWIDTH
* Bits 113: Vertical line height: {1,2,4,6,8,10,12,14}
* CONFIG_DM320_CURSORLINEHEIGHT
* 4:6: Horizontal line width: {1,4,8,16,20,24,28}
* CONFIG_DM320_CURSORLINEWIDTH
* 7: 0=ROM lookup table, 1=RAM lookup table 0
* 8:15: Rectangular cursor color palette address CONFIG_DM320_CURSORCLUT
* 8:15: Rectangular cursor color palette address
* CONFIG_DM320_CURSORCLUT
*/
putreg16(DM320_RECTCURSOR_SETUP, DM320_OSD_RECTCUR);
@@ -985,7 +1004,8 @@ static int dm320_getvid0videoinfo(FAR struct fb_vtable_s *vtable,
****************************************************************************/
#ifndef CONFIG_DM320_VID0_DISABLE
static int dm320_getvid0planeinfo(FAR struct fb_vtable_s *vtable, int planeno,
static int dm320_getvid0planeinfo(FAR struct fb_vtable_s *vtable,
int planeno,
FAR struct fb_planeinfo_s *pinfo)
{
#ifdef CONFIG_DEBUG_FEATURES
@@ -1032,7 +1052,8 @@ static int dm320_getvid1videoinfo(FAR struct fb_vtable_s *vtable,
****************************************************************************/
#ifndef CONFIG_DM320_VID1_DISABLE
static int dm320_getvid1planeinfo(FAR struct fb_vtable_s *vtable, int planeno,
static int dm320_getvid1planeinfo(FAR struct fb_vtable_s *vtable,
int planeno,
FAR struct fb_planeinfo_s *pinfo)
{
#ifdef CONFIG_DEBUG_FEATURES
@@ -1083,7 +1104,8 @@ static int dm320_getosd0videoinfo(FAR struct fb_vtable_s *vtable,
****************************************************************************/
#ifndef CONFIG_DM320_OSD0_DISABLE
static int dm320_getosd0planeinfo(FAR struct fb_vtable_s *vtable, int planeno,
static int dm320_getosd0planeinfo(FAR struct fb_vtable_s *vtable,
int planeno,
FAR struct fb_planeinfo_s *pinfo)
{
#ifdef CONFIG_DEBUG_FEATURES
@@ -1134,7 +1156,8 @@ static int dm320_getosd1videoinfo(FAR struct fb_vtable_s *vtable,
****************************************************************************/
#ifndef CONFIG_DM320_OSD1_DISABLE
static int dm320_getosd1planeinfo(FAR struct fb_vtable_s *vtable, int planeno,
static int dm320_getosd1planeinfo(FAR struct fb_vtable_s *vtable,
int planeno,
FAR struct fb_planeinfo_s *pinfo)
{
#ifdef CONFIG_DEBUG_FEATURES
@@ -1158,7 +1181,8 @@ static int dm320_getosd1planeinfo(FAR struct fb_vtable_s *vtable, int planeno,
****************************************************************************/
#if defined(CONFIG_FB_CMAP) && (!defined(CONFIG_DM320_OSD0_DISABLE) && !defined(CONFIG_DM320_OSD1_DISABLE))
static int dm320_getcmap(FAR struct fb_vtable_s *vtable, FAR struct fb_cmap_s *cmap)
static int dm320_getcmap(FAR struct fb_vtable_s *vtable,
FAR struct fb_cmap_s *cmap)
{
/* I don't think the RAM clut is readable */
@@ -1171,7 +1195,8 @@ static int dm320_getcmap(FAR struct fb_vtable_s *vtable, FAR struct fb_cmap_s *c
****************************************************************************/
#if defined(CONFIG_FB_CMAP) && (!defined(CONFIG_DM320_OSD0_DISABLE) && !defined(CONFIG_DM320_OSD1_DISABLE))
static int dm320_putcmap(FAR struct fb_vtable_s *vtable, FAR struct fb_cmap_s *cmap)
static int dm320_putcmap(FAR struct fb_vtable_s *vtable,
FAR struct fb_cmap_s *cmap)
{
irqstate_t flags;
uint16_t regval;
@@ -1198,7 +1223,7 @@ static int dm320_putcmap(FAR struct fb_vtable_s *vtable, FAR struct fb_cmap_s *c
/* Program the CLUT */
while (getreg16(DM320_OSD_MISCCTL) & 0x8);
putreg16(((uint16_t)y) << 8 | uint16_t(u)), DM320_OSD_CLUTRAMYCB);
putreg16((((uint16_t)y) << 8 | uint16_t(u)), DM320_OSD_CLUTRAMYCB);
putreg16(((uint16_t)v << 8 | i), DM320_OSD_CLUTRAMCR);
}
@@ -1226,7 +1251,8 @@ static int dm320_putcmap(FAR struct fb_vtable_s *vtable, FAR struct fb_cmap_s *c
****************************************************************************/
#ifdef CONFIG_FB_HWCURSOR
static int dm320_getcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_cursorattrib_s *attrib)
static int dm320_getcursor(FAR struct fb_vtable_s *vtable,
FAR struct fb_cursorattrib_s *attrib)
{
irqstate_t flags;
@@ -1268,7 +1294,8 @@ static int dm320_getcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_cursora
****************************************************************************/
#ifdef CONFIG_FB_HWCURSOR
static int dm320_setcursor(FAR struct fb_vtable_s *vtable, FAR struct fb_setcursor_s *settings)
static int dm320_setcursor(FAR struct fb_vtable_s *vtable,
FAR struct fb_setcursor_s *settings)
{
irqstate_t flags;
uint16_t regval;
@@ -1386,7 +1413,8 @@ int up_fbinitialize(int display)
*
* Description:
* Return a a reference to the framebuffer object for the specified video
* plane of the specified plane. Many OSDs support multiple planes of video.
* plane of the specified plane.
* Many OSDs support multiple planes of video.
*
* Input Parameters:
* display - In the case of hardware with multiple displays, this
@@ -1422,6 +1450,7 @@ FAR struct fb_vtable_s *up_fbgetvplane(int display, int vplane)
default:
break;
}
return NULL;
}
arch/arm/src/dm320/dm320_gio.h
+8 -8
View File
@@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/dm320/dm320_gio.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,23 +16,23 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_DM320_DM320_GIO_H
#define __ARCH_ARM_SRC_DM320_DM320_GIO_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
# include <stdint.h>
# include "arm_arch.h"
#endif
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/* General I/O Registers */
@@ -150,9 +150,9 @@
putreg16((getreg16(DM320_GIO_INV0) & ~(1<<(pin))), DM320_GIO_INV0); \
}
/************************************************************************************
/****************************************************************************
* Inline Functions
************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
arch/arm/src/dm320/dm320_intc.h
+8 -8
View File
@@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/dm320/dm320_intc.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,18 +16,18 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_DM320_DM320_INTC_H
#define __ARCH_ARM_SRC_DM320_DM320_INTC_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/* Interrupt Controller Registers */
@@ -75,9 +75,9 @@
#define DM320_INTC_INTPRI18 (DM320_PERIPHERALS_VADDR + 0x0564) /* Interrupt Priority Register #18 */
#define DM320_INTC_INTPRI19 (DM320_PERIPHERALS_VADDR + 0x0566) /* Interrupt Priority Register #19 */
/************************************************************************************
/****************************************************************************
* Inline Functions
************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
arch/arm/src/dm320/dm320_irq.c
+14 -8
View File
@@ -131,7 +131,8 @@ void up_disable_irq(int irq)
* Clear the associated bit to disable the interrupt
*/
putreg16((getreg16(DM320_INTC_EINT0) & ~(1 << irq)), DM320_INTC_EINT0);
putreg16((getreg16(DM320_INTC_EINT0) &
~(1 << irq)), DM320_INTC_EINT0);
}
else if (irq < 32)
{
@@ -139,7 +140,8 @@ void up_disable_irq(int irq)
* Clear the associated bit to disable the interrupt
*/
putreg16((getreg16(DM320_INTC_EINT1) & ~(1 << (irq-16))), DM320_INTC_EINT1);
putreg16((getreg16(DM320_INTC_EINT1) &
~(1 << (irq - 16))), DM320_INTC_EINT1);
}
else
{
@@ -147,7 +149,8 @@ void up_disable_irq(int irq)
* Clear the associated bit to disable the interrupt
*/
putreg16((getreg16(DM320_INTC_EINT2) & ~(1 << (irq-32))), DM320_INTC_EINT2);
putreg16((getreg16(DM320_INTC_EINT2) &
~(1 << (irq - 32))), DM320_INTC_EINT2);
}
}
@@ -171,7 +174,8 @@ void up_enable_irq(int irq)
* Set the associated bit to enable the interrupt
*/
putreg16((getreg16(DM320_INTC_EINT0) | (1 << irq)), DM320_INTC_EINT0);
putreg16((getreg16(DM320_INTC_EINT0) |
(1 << irq)), DM320_INTC_EINT0);
}
else if (irq < 32)
{
@@ -179,7 +183,8 @@ void up_enable_irq(int irq)
* Set the associated bit to enable the interrupt
*/
putreg16((getreg16(DM320_INTC_EINT1) | (1 << (irq-16))), DM320_INTC_EINT1);
putreg16((getreg16(DM320_INTC_EINT1) |
(1 << (irq - 16))), DM320_INTC_EINT1);
}
else
{
@@ -187,7 +192,8 @@ void up_enable_irq(int irq)
* Set the associated bit to enable the interrupt
*/
putreg16((getreg16(DM320_INTC_EINT2) | (1 << (irq-32))), DM320_INTC_EINT2);
putreg16((getreg16(DM320_INTC_EINT2) |
(1 << (irq - 32))), DM320_INTC_EINT2);
}
}
@@ -215,12 +221,12 @@ void arm_ack_irq(int irq)
{
/* Set the associated status bit to clear the interrupt */
putreg16((1 << (irq-16)), DM320_INTC_IRQ1);
putreg16((1 << (irq - 16)), DM320_INTC_IRQ1);
}
else
{
/* Set the associated status bit to clear the interrupt */
putreg16((1 << (irq-32)), DM320_INTC_IRQ2);
putreg16((1 << (irq - 32)), DM320_INTC_IRQ2);
}
}
arch/arm/src/dm320/dm320_memorymap.h
+26 -21
View File
@@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/dm320/dm320_memorymap.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,25 +16,25 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_DM320_DM320_MEMORYMAP_H
#define __ARCH_ARM_SRC_DM320_DM320_MEMORYMAP_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#include <nuttx/config.h>
#include <arch/board/board.h>
#include "arm.h"
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/* Mapped base of all registers *****************************************************/
/* Mapped base of all registers *********************************************/
/* DM320 Physical Memory Map, where:
*
@@ -43,19 +43,20 @@
* -- = Neither
*
* NOTE:
* 1. Most DM320 memory sections can be programmed to lie at different locations in
* the memory map. Therefore, much of the DM320 physical memory map is really
* board-specific and, as such, really belongs in the
* 1. Most DM320 memory sections can be programmed to lie at different
* locations in the memory map. Therefore, much of the DM320 physical
* memory map is really board-specific and, as such, really belongs in the
* boards/arm/dm320/<board-name>/include/board.h file rather than here.
*
* To handle all cases, this file defines a "default" physical memory map, but
* section address for most regions can be overridden if the same setting is
* defined in the board.h file (These defaults correspond to the product Neuros
* OSD memory configuration).
* To handle all cases, this file defines a "default" physical memory map,
* but section address for most regions can be overridden if the same
* setting is defined in the board.h file (These defaults correspond to
* the product Neuros OSD memory configuration).
*
* 2. The DM320 only has a single control line for external peripherals. To support
* more than one peripheral, most hardware will use external memory decode logic,
* so that physical memory regions is in the board-specific files.
* 2. The DM320 only has a single control line for external peripherals. To
* support more than one peripheral, most hardware will use external
* memory decode logic, so that physical memory regions is in the
* board-specific files.
*/
/* Section/Region Name Phys Address Size TLB Entry CW */
@@ -129,6 +130,7 @@
/* Section/Region Name Virt Address End Size CW */
#define DM320_SDRAM_VSECTION 0x00000000 /* 0x1effffff 496Mb CW */
#define DM320_SDRAM_VADDR 0x00000000 /* 0x1effffff 496Mb CW */
/* 0x1f000000 0xdfffffff UNMAPPED */
#define DM320_FLASH_VSECTION 0xc0000000 /* 0xc0ffffff 16Mb -- */
#define DM320_EXT_MEM_VADDR 0xc0000000 /* 0xc0ffffff 16Mb -- */
@@ -150,14 +152,17 @@
#define DM320_DSP_ONCHIP_RAM_VADDR 0xf0040000 /* 0xf005ffff 128Kb -- */
#define DM320_AHB_VADDR 0xf0060000 /* 0xf0060fff 4Kb -- */
#define DM320_COPRO_SUB_VADDR 0xf0080000 /* 0xf009ffff 128Kb -- */
/* 0xf0100000 0xffefffff UNMAPPED */
#define DM320_VECTOR_VCOARSE 0xfff00000 /* 0xffffffff 1Mb -- */
/* 0xfff00000 0xfffeffff UNMAPPED */
#define DM320_VECTOR_VADDR 0xffff0000 /* 0xffff3fff 16Kb -- */
/* 0xffff4000 0xffffffff UNMAPPED */
/* The NuttX entry point starts at an offset from the virtual beginning of DRAM.
* This offset reserves space for the MMU page cache.
/* The NuttX entry point starts at an offset from the virtual beginning
* of DRAM. This offset reserves space for the MMU page cache.
*/
#define NUTTX_START_VADDR (DM320_SDRAM_VADDR+PGTABLE_SIZE)
@@ -238,9 +243,9 @@
#define DM320_VLYNQ_REGISTER_BASE (DM320_AHB_VADDR + 0x0300) /* VLYNQ */
#define DM320_AHBBUSC_REGISTER_BASE (DM320_AHB_VADDR + 0x0F00) /* AHBBUSC */
/************************************************************************************
/****************************************************************************
* Inline Functions
************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
arch/arm/src/dm320/dm320_osd.h
+9 -9
View File
@@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/dm320/dm320_osd.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,20 +16,20 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_DM320_DM320_OSD_H
#define __ARCH_ARM_SRC_DM320_DM320_OSD_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/* On Screen Display Register Map (OSD) *********************************************/
/* On Screen Display Register Map (OSD) *************************************/
#define DM320_OSD_OSDMODE (DM320_OSD_REGISTER_BASE+0x0000) /* OSD Mode Setup */
#define DM320_OSD_VIDWINMD (DM320_OSD_REGISTER_BASE+0x0002) /* Video Window Mode Setup */
@@ -92,8 +92,8 @@
#define DM320_OSD_PPVWIN0ADH (DM320_OSD_REGISTER_BASE+0x007c) /* Ping-Pong Video Window 0 Address (High) */
#define DM320_OSD_PPVWIN0ADL (DM320_OSD_REGISTER_BASE+0x007e) /* Ping-Pong Video Window 0 Address (Low) */
/************************************************************************************
/****************************************************************************
* Inline Functions
************************************************************************************/
****************************************************************************/
#endif /* __ARCH_ARM_SRC_DM320_DM320_OSD_H */
arch/arm/src/dm320/dm320_timer.h
+8 -8
View File
@@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/dm320/dm320_timer.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,18 +16,18 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_DM320_DM320_TIMER_H
#define __ARCH_ARM_SRC_DM320_DM320_TIMER_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/* Timer Registers */
@@ -82,9 +82,9 @@
#define DM320_TMR_COUNT_MASK 0xffff /* Bits 0:15=Current counter value */
/************************************************************************************
/****************************************************************************
* Inline Functions
************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
arch/arm/src/dm320/dm320_uart.h
+10 -9
View File
@@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/dm320/dm320_uart.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,24 +16,24 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_DM320_DM320_UART_H
#define __ARCH_ARM_SRC_DM320_DM320_UART_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
#ifndef __ASSEMBLY__
# include <stdint.h>
#endif
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/* UART definitions *****************************************************************/
/* UART definitions *********************************************************/
/* UART Registers (offsets from the register base) */
@@ -55,6 +55,7 @@
#define UART_DTRR_DTR_MASK 0x00ff /* Data transmit/receive */
/* UART BRSR register bit definitions */
/* The UART module is clocked by either the AHB clock or PLLIN / 16 */
#ifdef CONFIG_DM320_UARTPPLIN
@@ -154,8 +155,8 @@
#define UART_SR_CTSS 0x1000 /* CTS status */
#define UART_SR_DSRS 0x8000 /* DSR status */
/************************************************************************************
/****************************************************************************
* Inline Functions
************************************************************************************/
****************************************************************************/
#endif /* __ARCH_ARM_SRC_DM320_DM320_UART_H */
arch/arm/src/dm320/dm320_usb.h
+22 -22
View File
@@ -1,4 +1,4 @@
/************************************************************************************
/****************************************************************************
* arch/arm/src/dm320/dm320_usb.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
@@ -16,20 +16,20 @@
* License for the specific language governing permissions and limitations
* under the License.
*
************************************************************************************/
****************************************************************************/
#ifndef __ARCH_ARM_SRC_DM320_DM320_USB_H
#define __ARCH_ARM_SRC_DM320_DM320_USB_H
/************************************************************************************
/****************************************************************************
* Included Files
************************************************************************************/
****************************************************************************/
/************************************************************************************
/****************************************************************************
* Pre-processor Definitions
************************************************************************************/
****************************************************************************/
/* USB Controller Registers *********************************************************/
/* USB Controller Registers *************************************************/
#define DM320_USB_FADDR (DM320_USBOTG_VADDR+0x0000) /* Peripheral Address */
#define DM320_USB_POWER (DM320_USBOTG_VADDR+0x0001) /* Power Control */
@@ -90,7 +90,7 @@
#define DM320_USB_DMAADDR4 (DM320_USBOTG_VADDR+0x0238) /* DMA Channel4 Address */
#define DM320_USB_DMACOUNT4 (DM320_USBOTG_VADDR+0x023c) /* DMA Channel4 Byte Count */
/* POWER register bit settings ******************************************************/
/* POWER register bit settings **********************************************/
#define USB_POWER_ENSUS (0x00000001)
#define USB_POWER_SUSPEND (0x00000002)
@@ -101,7 +101,7 @@
#define USB_POWER_VBUSVAL (0x00000040)
#define USB_POWER_ISO (0x00000080)
/* USB interrupt bits **************************************************************/
/* USB interrupt bits *******************************************************/
#define USB_INT_NOINTERRUPT (0x00000000)
#define USB_INT_SUSPEND (0x00000001)
@@ -135,11 +135,11 @@
#define USB_EP2_RX (0x04)
#define USB_EP1_RX (0x02)
/* Endpoint control register index *************************************************/
/* Endpoint control register index ******************************************/
#define USB_EP0_SELECT (0x00)
/* DEVCTL register bit settings ****************************************************/
/* DEVCTL register bit settings *********************************************/
#define USB_DEVCTL_CID (0x80)
#define USB_DEVCTL_FSDEV (0x40)
@@ -150,7 +150,7 @@
#define USB_DEVCTL_HOSTREQ (0x02)
#define USB_DEVCTL_SESSREQ (0x01)
/* PERCSR0 register bit settings ***************************************************/
/* PERCSR0 register bit settings ********************************************/
#define USB_PERCSR0_CLRSETEND (0x80)
#define USB_PERCSR0_CLRRXRDY (0x40)
@@ -161,7 +161,7 @@
#define USB_PERCSR0_TXPKTRDY (0x02)
#define USB_PERCSR0_RXPKTRDY (0x01)
/* TXCSR1 register bit settings ****************************************************/
/* TXCSR1 register bit settings *********************************************/
#define USB_TXCSR1_CLRDATTOG (0x40)
#define USB_TXCSR1_SENTST (0x20)
@@ -171,11 +171,11 @@
#define USB_TXCSR1_FIFOEMP (0x02)
#define USB_TXCSR1_TXPKTRDY (0x01)
/* CSR2 register bit settings ******************************************************/
/* CSR2 register bit settings ***********************************************/
#define USB_CSR2_FLFIFO (0x01)
/* TXCSR2 register bit settings ****************************************************/
/* TXCSR2 register bit settings *********************************************/
#define USB_TXCSR2_AUTOSET (0x80)
#define USB_TXCSR2_ISO (0x40)
@@ -184,7 +184,7 @@
#define USB_TXCSR2_FRDATTOG (0x08)
#define USB_TXCSR2_DMAMODE1 (0x04)
/* PERRXCSR1 register bit settings *************************************************/
/* PERRXCSR1 register bit settings ******************************************/
#define USB_PERRXCSR1_CLRDATTOG (0x80)
#define USB_PERRXCSR1_SENTST (0x40)
@@ -195,14 +195,14 @@
#define USB_PERRXCSR1_FIFOFUL (0x02)
#define USB_PERRXCSR1_RXPKTRDY (0x01)
/* PERRXCSR2 register bit settings *************************************************/
/* PERRXCSR2 register bit settings ******************************************/
#define USB_PERPXCSR2_AUTOCLR (0x80)
#define USB_PERPXCSR2_ISO (0x40)
#define USB_PERPXCSR2_DMAEN (0x20)
#define USB_PERPXCSR2_DMAMODE1 (0x10)
/* TXFIFO2 register bit settings **************************************************/
/* TXFIFO2 register bit settings ********************************************/
#define USB_TXFIF02_SZMASK (0xe0)
#define USB_TXFIFO2_SZ_8 (0x00)
@@ -216,19 +216,19 @@
#define USB_TXFIFO2_SINGLE_BUF (0x00)
#define USB_TXFIFO2_DOUBLE_BUF (0x10)
/* RXFIFO2 register bit settings **************************************************/
/* RXFIFO2 register bit settings ********************************************/
#define USB_RXFIF02_DPB (0x10)
/* USBDMA control register bit settings ********************************************/
/* USBDMA control register bit settings *************************************/
#define USBDMA_CNTL_DMAEN (0x01)
#define USBDMA_CNTL_DIR_IN (0x02)
#define USBDMA_CNTL_DMAMODE1 (0x04)
#define USBDMA_CNTL_INTREN (0x08)
/************************************************************************************
/****************************************************************************
* Inline Functions
************************************************************************************/
****************************************************************************/
#endif /* __ARCH_ARM_SRC_DM320_DM320_USB_H */
arch/arm/src/dm320/dm320_usbdev.c
+146 -75
View File
File diff suppressed because it is too large Load Diff