drivers/: Fixes to spacing and alignement

This commit is contained in:
Gregory Nutt
2015-10-10 10:41:00 -06:00
parent e675ddb813
commit cf14f8d1b5
108 changed files with 1131 additions and 1097 deletions
+2 -1
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@@ -67,7 +67,8 @@
static int adc_open(FAR struct file *filep); static int adc_open(FAR struct file *filep);
static int adc_close(FAR struct file *filep); static int adc_close(FAR struct file *filep);
static ssize_t adc_read(FAR struct file *, FAR char *, size_t); static ssize_t adc_read(FAR struct file *fielp, FAR char *buffer,
size_t buflen);
static int adc_ioctl(FAR struct file *filep, int cmd, unsigned long arg); static int adc_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
/**************************************************************************** /****************************************************************************
+4 -2
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@@ -74,8 +74,10 @@
static int dac_open(FAR struct file *filep); static int dac_open(FAR struct file *filep);
static int dac_close(FAR struct file *filep); static int dac_close(FAR struct file *filep);
static ssize_t dac_read(FAR struct file *, FAR char *, size_t); static ssize_t dac_read(FAR struct file *filep, FAR char *buffer,
static ssize_t dac_write(FAR struct file *filep, FAR const char *buffer, size_t buflen); size_t buflen);
static ssize_t dac_write(FAR struct file *filep, FAR const char *buffer,
size_t buflen);
static int dac_ioctl(FAR struct file *filep, int cmd, unsigned long arg); static int dac_ioctl(FAR struct file *filep, int cmd, unsigned long arg);
/**************************************************************************** /****************************************************************************
+5 -2
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@@ -219,7 +219,10 @@ static const struct audio_ops_s g_audioops =
/* ISR context pointers */ /* ISR context pointers */
static struct vs1053_struct_s* g_isrdata[CONFIG_VS1053_DEVICE_COUNT] = { NULL, }; static struct vs1053_struct_s *g_isrdata[CONFIG_VS1053_DEVICE_COUNT] =
{
NULL,
};
/* Volume control log table. This table is in increments of 2% of /* Volume control log table. This table is in increments of 2% of
* requested volume level and is the register value that should be * requested volume level and is the register value that should be
@@ -1871,7 +1874,7 @@ struct audio_lowerhalf_s *vs1053_initialize(FAR struct spi_dev_s *spi,
* for the DREQ to be active indicating the device is ready * for the DREQ to be active indicating the device is ready
*/ */
retry = 200;; retry = 200;
while (!lower->read_dreq(lower) && retry) while (!lower->read_dreq(lower) && retry)
{ {
up_udelay(10); up_udelay(10);
+4 -1
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@@ -232,7 +232,10 @@ const uint8_t g_sysclk_scaleb1[WM8904_BCLK_MAXDIV+1] =
#ifndef CONFIG_WM8904_CLKDEBUG #ifndef CONFIG_WM8904_CLKDEBUG
static static
#endif #endif
const uint8_t g_fllratio[WM8904_NFLLRATIO] = {1, 2, 4, 8, 16}; const uint8_t g_fllratio[WM8904_NFLLRATIO] =
{
1, 2, 4, 8, 16
};
/**************************************************************************** /****************************************************************************
* Private Functions * Private Functions
+1 -1
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@@ -322,7 +322,7 @@ static int bch_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
#if defined(CONFIG_BCH_ENCRYPTION) #if defined(CONFIG_BCH_ENCRYPTION)
else if (cmd == DIOC_SETKEY) else if (cmd == DIOC_SETKEY)
{ {
memcpy(bch->key, (void*)arg, CONFIG_BCH_ENCRYPTION_KEY_SIZE); memcpy(bch->key, (FAR void *)arg, CONFIG_BCH_ENCRYPTION_KEY_SIZE);
ret = OK; ret = OK;
} }
#endif #endif
+5 -2
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@@ -91,13 +91,16 @@ static void bch_xor(uint32_t *R, uint32_t *A, uint32_t *B)
static int bch_cypher(FAR struct bchlib_s *bch, int encrypt) static int bch_cypher(FAR struct bchlib_s *bch, int encrypt)
{ {
int blocks = bch->sectsize / 16; int blocks = bch->sectsize / 16;
uint32_t *buffer = (uint32_t*)bch->buffer; FAR uint32_t *buffer = (FAR uint32_t *)bch->buffer;
int i; int i;
for (i = 0; i < blocks; i++, buffer += 16 / sizeof(uint32_t) ) for (i = 0; i < blocks; i++, buffer += 16 / sizeof(uint32_t) )
{ {
uint32_t T[4]; uint32_t T[4];
uint32_t X[4] = {bch->sector, 0, 0, i}; uint32_t X[4] =
{
bch->sector, 0, 0, i
};
aes_cypher(X, X, 16, NULL, bch->key, CONFIG_BCH_ENCRYPTION_KEY_SIZE, aes_cypher(X, X, 16, NULL, bch->key, CONFIG_BCH_ENCRYPTION_KEY_SIZE,
AES_MODE_ECB, CYPHER_ENCRYPT); AES_MODE_ECB, CYPHER_ENCRYPT);
+1 -1
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@@ -795,7 +795,7 @@ static int can_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
*/ */
case CANIOC_RTR: case CANIOC_RTR:
ret = can_rtrread(dev, (struct canioc_rtr_s*)((uintptr_t)arg)); ret = can_rtrread(dev, (FAR struct canioc_rtr_s *)((uintptr_t)arg));
break; break;
/* Not a "built-in" ioctl command.. perhaps it is unique to this /* Not a "built-in" ioctl command.. perhaps it is unique to this
+4 -2
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@@ -50,8 +50,10 @@
* Private Function Prototypes * Private Function Prototypes
****************************************************************************/ ****************************************************************************/
static ssize_t devnull_read(FAR struct file *, FAR char *, size_t); static ssize_t devnull_read(FAR struct file *filep, FAR char *buffer,
static ssize_t devnull_write(FAR struct file *, FAR const char *, size_t); size_t buflen);
static ssize_t devnull_write(FAR struct file *filep, FAR const char *buffer,
size_t buflen);
#ifndef CONFIG_DISABLE_POLL #ifndef CONFIG_DISABLE_POLL
static int devnull_poll(FAR struct file *filep, FAR struct pollfd *fds, static int devnull_poll(FAR struct file *filep, FAR struct pollfd *fds,
bool setup); bool setup);
+4 -2
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@@ -50,8 +50,10 @@
* Private Function Prototypes * Private Function Prototypes
****************************************************************************/ ****************************************************************************/
static ssize_t devzero_read(FAR struct file *, FAR char *, size_t); static ssize_t devzero_read(FAR struct file *filep, FAR char *buffer,
static ssize_t devzero_write(FAR struct file *, FAR const char *, size_t); size_t buflen);
static ssize_t devzero_write(FAR struct file *filep, FAR const char *buffer,
size_t buflen);
#ifndef CONFIG_DISABLE_POLL #ifndef CONFIG_DISABLE_POLL
static int devzero_poll(FAR struct file *filep, FAR struct pollfd *fds, static int devzero_poll(FAR struct file *filep, FAR struct pollfd *fds,
bool setup); bool setup);
+4 -4
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@@ -173,10 +173,10 @@
struct ee25xx_geom_s struct ee25xx_geom_s
{ {
uint8_t bytes : 4; /*power of two of 128 bytes (0:128 1:256 2:512 etc) */ uint8_t bytes : 4; /* Power of two of 128 bytes (0:128 1:256 2:512 etc) */
uint8_t pagesize : 4; /*power of two of 8 bytes (0:8 1:16 2:32 3:64 etc)*/ uint8_t pagesize : 4; /* Power of two of 8 bytes (0:8 1:16 2:32 3:64 etc) */
uint8_t addrlen : 4; /*number of bytes in command address field */ uint8_t addrlen : 4; /* Number of bytes in command address field */
uint8_t flags : 4; /*special address management for 25xx040, 1=A8 in inst*/ uint8_t flags : 4; /* Special address management for 25xx040, 1=A8 in inst */
}; };
/* Private data attached to the inode */ /* Private data attached to the inode */
+2 -1
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@@ -143,7 +143,8 @@ static void ajoy_sample(FAR struct ajoy_upperhalf_s *priv);
static int ajoy_open(FAR struct file *filep); static int ajoy_open(FAR struct file *filep);
static int ajoy_close(FAR struct file *filep); static int ajoy_close(FAR struct file *filep);
static ssize_t ajoy_read(FAR struct file *, FAR char *, size_t); static ssize_t ajoy_read(FAR struct file *filep, FAR char *buffer,
size_t buflen);
static int ajoy_ioctl(FAR struct file *filep, int cmd, static int ajoy_ioctl(FAR struct file *filep, int cmd,
unsigned long arg); unsigned long arg);
#ifndef CONFIG_DISABLE_POLL #ifndef CONFIG_DISABLE_POLL
+3 -2
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@@ -143,7 +143,8 @@ static void djoy_sample(FAR struct djoy_upperhalf_s *priv);
static int djoy_open(FAR struct file *filep); static int djoy_open(FAR struct file *filep);
static int djoy_close(FAR struct file *filep); static int djoy_close(FAR struct file *filep);
static ssize_t djoy_read(FAR struct file *, FAR char *, size_t); static ssize_t djoy_read(FAR struct file *filep, FAR char *buffer,
size_t buflen);
static int djoy_ioctl(FAR struct file *filep, int cmd, static int djoy_ioctl(FAR struct file *filep, int cmd,
unsigned long arg); unsigned long arg);
#ifndef CONFIG_DISABLE_POLL #ifndef CONFIG_DISABLE_POLL
@@ -585,7 +586,7 @@ static ssize_t djoy_read(FAR struct file *filep, FAR char *buffer,
lower = priv->du_lower; lower = priv->du_lower;
DEBUGASSERT(lower && lower->dl_sample); DEBUGASSERT(lower && lower->dl_sample);
priv->du_sample = lower->dl_sample(lower); priv->du_sample = lower->dl_sample(lower);
*(djoy_buttonset_t*)buffer = priv->du_sample; *(FAR djoy_buttonset_t *)buffer = priv->du_sample;
ret = sizeof(djoy_buttonset_t); ret = sizeof(djoy_buttonset_t);
djoy_givesem(&priv->du_exclsem); djoy_givesem(&priv->du_exclsem);
+1 -1
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@@ -285,7 +285,7 @@ static uint16_t max11802_sendcmd(FAR struct max11802_dev_s *priv,
result = ((uint16_t)buffer[0] << 8) | (uint16_t)buffer[1]; result = ((uint16_t)buffer[0] << 8) | (uint16_t)buffer[1];
*tags = result & 0xF; *tags = result & 0xF;
result >>= 4; // Get rid of tags result >>= 4; /* Get rid of tags */
ivdbg("cmd:%02x response:%04x\n", cmd, result); ivdbg("cmd:%02x response:%04x\n", cmd, result);
return result; return result;
+2 -1
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@@ -112,7 +112,8 @@ static void stmpe811_worker(FAR void *arg)
stmpe811_tscworker(priv, regval); stmpe811_tscworker(priv, regval);
} }
stmpe811_putreg8(priv, STMPE811_INT_STA, (INT_TOUCH_DET|INT_FIFO_TH|INT_FIFO_OFLOW)); stmpe811_putreg8(priv, STMPE811_INT_STA,
(INT_TOUCH_DET | INT_FIFO_TH | INT_FIFO_OFLOW));
regval &= ~(INT_TOUCH_DET | INT_FIFO_TH | INT_FIFO_OFLOW); regval &= ~(INT_TOUCH_DET | INT_FIFO_TH | INT_FIFO_OFLOW);
} }
#endif #endif
+4 -2
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@@ -101,7 +101,8 @@ int stmpe811_tempinitialize(STMPE811_HANDLE handle)
/* Aquire data enable */ /* Aquire data enable */
stmpe811_putreg8(priv, STMPE811_TEMP_CTRL, (TEMP_CTRL_ACQ|TEMP_CTRL_ENABLE)); stmpe811_putreg8(priv, STMPE811_TEMP_CTRL,
(TEMP_CTRL_ACQ | TEMP_CTRL_ENABLE));
return OK; return OK;
} }
@@ -130,7 +131,8 @@ uint16_t stmpe811_tempread(STMPE811_HANDLE handle)
/* Acquire data enable */ /* Acquire data enable */
stmpe811_putreg8(priv, STMPE811_TEMP_CTRL, (TEMP_CTRL_ACQ|TEMP_CTRL_ENABLE)); stmpe811_putreg8(priv, STMPE811_TEMP_CTRL,
(TEMP_CTRL_ACQ | TEMP_CTRL_ENABLE));
/* Read the temperature */ /* Read the temperature */
+1 -1
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@@ -307,7 +307,7 @@ static inline int stmpe811_waitsample(FAR struct stmpe811_dev_s *priv,
if (ret < 0) if (ret < 0)
{ {
#ifdef CONFIG_DEBUG #ifdef CONFIG_DEBUG
// Sample the errno (debug output could change it) /* Sample the errno (debug output could change it) */
int errval = errno; int errval = errno;
+12 -19
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@@ -62,8 +62,7 @@
* Pre-processor Definitions * Pre-processor Definitions
****************************************************************************/ ****************************************************************************/
/* /* This is the generic lcd driver interface for the ili9341 Single Chip LCD
* This is the generic lcd driver interface for the ili9341 Single Chip LCD
* driver. The driver supports multiple displays, each connected with an own * driver. The driver supports multiple displays, each connected with an own
* ili9341 Single Chip LCD driver. The communication with the LCD single chip * ili9341 Single Chip LCD driver. The communication with the LCD single chip
* driver must be provide by a subdriver accessable trough the ili9341_dev_s * driver must be provide by a subdriver accessable trough the ili9341_dev_s
@@ -157,8 +156,7 @@
/* Memory access control (MADCTL) */ /* Memory access control (MADCTL) */
/* /* Landscape: 00100000 / 00101000 / h28
* Landscape: 00100000 / 00101000 / h28
* *
* MY: 0 * MY: 0
* MX: 0 * MX: 0
@@ -186,8 +184,7 @@
ILI9341_MADCTL_LANDSCAPE_BGR | \ ILI9341_MADCTL_LANDSCAPE_BGR | \
ILI9341_MADCTL_LANDSCAPE_MH) ILI9341_MADCTL_LANDSCAPE_MH)
/* /* Portrait: 00000000 / 00001000 / h08
* Portrait: 00000000 / 00001000 / h08
* *
* MY: 0 * MY: 0
* MX: 0 * MX: 0
@@ -214,8 +211,7 @@
ILI9341_MADCTL_PORTRAIT_ML | \ ILI9341_MADCTL_PORTRAIT_ML | \
ILI9341_MADCTL_PORTRAIT_BGR | \ ILI9341_MADCTL_PORTRAIT_BGR | \
ILI9341_MADCTL_PORTRAIT_MH) ILI9341_MADCTL_PORTRAIT_MH)
/* /* RLandscape: 01100000 / 01101000 / h68
* RLandscape: 01100000 / 01101000 / h68
* *
* MY: 0 * MY: 0
* MX: 1 * MX: 1
@@ -244,8 +240,7 @@
ILI9341_MADCTL_RLANDSCAPE_BGR | \ ILI9341_MADCTL_RLANDSCAPE_BGR | \
ILI9341_MADCTL_RLANDSCAPE_MH) ILI9341_MADCTL_RLANDSCAPE_MH)
/* /* RPortrait: 11000000 / 11001000 / hc8
* RPortrait: 11000000 / 11001000 / hc8
* *
* MY: 1 * MY: 1
* MX: 1 * MX: 1
@@ -292,8 +287,7 @@
#define ILI9341_PIXSET_16BITMCU_PARAM1 (ILI9341_PIXSET_16BITDPI | \ #define ILI9341_PIXSET_16BITMCU_PARAM1 (ILI9341_PIXSET_16BITDPI | \
ILI9341_PIXSET_16BITDBI) ILI9341_PIXSET_16BITDBI)
/* /* 18-bit MCU: 01100110 / h66 (not supported by nuttx until now)
* 18-bit MCU: 01100110 / h66 (not supported by nuttx until now)
* *
* DPI: 6 (RGB18-666 RGB interface) * DPI: 6 (RGB18-666 RGB interface)
* DBI: 6 (RGB18-666 MCU interface) * DBI: 6 (RGB18-666 MCU interface)
@@ -387,8 +381,7 @@
* Private Type Definition * Private Type Definition
****************************************************************************/ ****************************************************************************/
/* /* Each single connected ili9341 LCD driver needs an own driver instance
* Each single connected ili9341 LCD driver needs an own driver instance
* to provide a unique getrun and putrun method. Also store fundamental * to provide a unique getrun and putrun method. Also store fundamental
* parameter in driver internal structure. This minimal overhead should be * parameter in driver internal structure. This minimal overhead should be
* acceptable. * acceptable.
@@ -453,8 +446,8 @@ static int ili9341_putrun(int devno, fb_coord_t row, fb_coord_t col,
static int ili9341_getrun(int devno, fb_coord_t row, fb_coord_t col, static int ili9341_getrun(int devno, fb_coord_t row, fb_coord_t col,
FAR uint8_t * buffer, size_t npixels); FAR uint8_t * buffer, size_t npixels);
#endif #endif
/*
* Definition of the public visible getrun / putrun methods /* Definition of the public visible getrun / putrun methods
* each for a single LCD driver * each for a single LCD driver
*/ */
@@ -659,7 +652,7 @@ static int ili9341_putrun(int devno, fb_coord_t row, fb_coord_t col,
{ {
FAR struct ili9341_dev_s *dev = &g_lcddev[devno]; FAR struct ili9341_dev_s *dev = &g_lcddev[devno];
FAR struct ili9341_lcd_s *lcd = dev->lcd; FAR struct ili9341_lcd_s *lcd = dev->lcd;
FAR const uint16_t *src = (const uint16_t*)buffer; FAR const uint16_t *src = (FAR const uint16_t *)buffer;
DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0); DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
@@ -720,7 +713,7 @@ static int ili9341_getrun(int devno, fb_coord_t row, fb_coord_t col,
{ {
FAR struct ili9341_dev_s *dev = &g_lcddev[devno]; FAR struct ili9341_dev_s *dev = &g_lcddev[devno];
FAR struct ili9341_lcd_s *lcd = dev->lcd; FAR struct ili9341_lcd_s *lcd = dev->lcd;
FAR uint16_t *dest = (uint16_t*)buffer; FAR uint16_t *dest = (FAR uint16_t *)buffer;
DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0); DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
@@ -994,7 +987,7 @@ static int ili9341_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
pinfo->getrun = priv->getrun; pinfo->getrun = priv->getrun;
#endif #endif
pinfo->bpp = priv->bpp; pinfo->bpp = priv->bpp;
pinfo->buffer = (uint8_t*)priv->runbuffer; /* Run scratch buffer */ pinfo->buffer = (FAR uint8_t *)priv->runbuffer; /* Run scratch buffer */
lcdvdbg("planeno: %d bpp: %d\n", planeno, pinfo->bpp); lcdvdbg("planeno: %d bpp: %d\n", planeno, pinfo->bpp);
+4 -7
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@@ -333,15 +333,13 @@ static inline void memlcd_select(FAR struct spi_dev_s *spi)
#else #else
static void memlcd_select(FAR struct spi_dev_s *spi) static void memlcd_select(FAR struct spi_dev_s *spi)
{ {
/* /* Select memlcd (locking the SPI bus in case there are multiple
* Select memlcd (locking the SPI bus in case there are multiple
* devices competing for the SPI bus * devices competing for the SPI bus
*/ */
SPI_LOCK(spi, true); SPI_LOCK(spi, true);
SPI_SELECT(spi, SPIDEV_DISPLAY, true); SPI_SELECT(spi, SPIDEV_DISPLAY, true);
/* /* Now make sure that the SPI bus is configured for the memlcd (it
* Now make sure that the SPI bus is configured for the memlcd (it
* might have gotten configured for a different device while unlocked) * might have gotten configured for a different device while unlocked)
*/ */
SPI_SETMODE(spi, MEMLCD_SPI_MODE); SPI_SETMODE(spi, MEMLCD_SPI_MODE);
@@ -435,9 +433,8 @@ static int memlcd_extcominisr(int irq, FAR void *context)
struct memlcd_dev_s *mlcd = &g_memlcddev; struct memlcd_dev_s *mlcd = &g_memlcddev;
#ifdef CONFIG_MEMLCD_EXTCOMIN_MODE_HW #ifdef CONFIG_MEMLCD_EXTCOMIN_MODE_HW
# error "CONFIG_MEMLCD_EXTCOMIN_MODE_HW unsupported yet!" # error "CONFIG_MEMLCD_EXTCOMIN_MODE_HW unsupported yet!"
/* /* Start a worker thread, do it in bottom half? */
* start a worker thread, do it in bottom half?
*/
#else #else
pol = !pol; pol = !pol;
mlcd->priv->setpolarity(pol); mlcd->priv->setpolarity(pol);
+1 -1
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@@ -660,7 +660,7 @@ static int mio283qt2_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planen
pinfo->putrun = mio283qt2_putrun; /* Put a run into LCD memory */ pinfo->putrun = mio283qt2_putrun; /* Put a run into LCD memory */
pinfo->getrun = mio283qt2_getrun; /* Get a run from LCD memory */ pinfo->getrun = mio283qt2_getrun; /* Get a run from LCD memory */
pinfo->buffer = (uint8_t*)priv->runbuffer; /* Run scratch buffer */ pinfo->buffer = (FAR uint8_t *)priv->runbuffer; /* Run scratch buffer */
pinfo->bpp = MIO283QT2_BPP; /* Bits-per-pixel */ pinfo->bpp = MIO283QT2_BPP; /* Bits-per-pixel */
return OK; return OK;
} }
+9 -12
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@@ -382,16 +382,15 @@ static inline uint16_t mio283qt9a_gramread(FAR struct mio283qt9a_lcd_s *lcd,
static void mio283qt9a_setarea(FAR struct mio283qt9a_lcd_s *lcd, static void mio283qt9a_setarea(FAR struct mio283qt9a_lcd_s *lcd,
uint16_t x0, uint16_t y0, uint16_t x1, uint16_t y1) uint16_t x0, uint16_t y0, uint16_t x1, uint16_t y1)
{ {
//lcddbg("setarea x0=%d, y0=%d, x1=%d, y1=%d\n", x0, y0, x1, y1); mio283qt9a_putreg(lcd, 0x2a, (x0 >> 8)); /* Set column address x0 */
lcd->write(lcd, (x0 & 0xff)); /* Set x0 */
lcd->write(lcd, (x1 >> 8)); /* Set x1 */
lcd->write(lcd, (x1 & 0xff)); /* Set x1 */
mio283qt9a_putreg(lcd, 0x2a, (x0 >> 8)); /* set column address x0 */ mio283qt9a_putreg(lcd, 0x2b, (y0 >> 8)); /* Set page address y0 */
lcd->write(lcd, (x0 & 0xff)); /* set x0 */ lcd->write(lcd, (y0 & 0xff)); /* Set y0 */
lcd->write(lcd, (x1 >> 8)); /* set x1 */ lcd->write(lcd, (y1 >> 8)); /* Set y1 */
lcd->write(lcd, (x1 & 0xff)); /* set x1 */ lcd->write(lcd, (y1 & 0xff)); /* Set y1 */
mio283qt9a_putreg(lcd, 0x2b, (y0 >> 8)); /* set page address y0 */
lcd->write(lcd, (y0 & 0xff)); /* set y0 */
lcd->write(lcd, (y1 >> 8)); /* set y1 */
lcd->write(lcd, (y1 & 0xff)); /* set y1 */
} }
/************************************************************************************** /**************************************************************************************
@@ -450,7 +449,6 @@ static int mio283qt9a_putrun(fb_coord_t row, fb_coord_t col, FAR const uint8_t *
/* Buffer must be provided and aligned to a 16-bit address boundary */ /* Buffer must be provided and aligned to a 16-bit address boundary */
//lcdvdbg("row: %d col: %d npixels: %d\n", row, col, npixels);
DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0); DEBUGASSERT(buffer && ((uintptr_t)buffer & 1) == 0);
/* Select the LCD */ /* Select the LCD */
@@ -521,7 +519,6 @@ static int mio283qt9a_getrun(fb_coord_t row, fb_coord_t col, FAR uint8_t *buffer
for (i = 0; i < npixels; i++) for (i = 0; i < npixels; i++)
{ {
test = mio283qt9a_gramread(lcd, &accum); test = mio283qt9a_gramread(lcd, &accum);
// lcddbg("read 0x%04x\n", test);
*dest++ = test; *dest++ = test;
} }
@@ -574,7 +571,7 @@ static int mio283qt9a_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int plane
pinfo->putrun = mio283qt9a_putrun; /* Put a run into LCD memory */ pinfo->putrun = mio283qt9a_putrun; /* Put a run into LCD memory */
pinfo->getrun = mio283qt9a_getrun; /* Get a run from LCD memory */ pinfo->getrun = mio283qt9a_getrun; /* Get a run from LCD memory */
pinfo->buffer = (uint8_t*)priv->runbuffer; /* Run scratch buffer */ pinfo->buffer = (FAR uint8_t *)priv->runbuffer; /* Run scratch buffer */
pinfo->bpp = MIO283QT9A_BPP; /* Bits-per-pixel */ pinfo->bpp = MIO283QT9A_BPP; /* Bits-per-pixel */
return OK; return OK;
+1 -1
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@@ -437,7 +437,7 @@ static const struct lcd_planeinfo_s g_planeinfo =
{ {
.putrun = nokia_putrun, /* Put a run into LCD memory */ .putrun = nokia_putrun, /* Put a run into LCD memory */
.getrun = nokia_getrun, /* Get a run from LCD memory */ .getrun = nokia_getrun, /* Get a run from LCD memory */
.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */ .buffer = (FAR uint8_t *)g_runbuffer, /* Run scratch buffer */
.bpp = NOKIA_BPP, /* Bits-per-pixel */ .bpp = NOKIA_BPP, /* Bits-per-pixel */
}; };
+1 -1
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@@ -295,7 +295,7 @@ static const struct lcd_planeinfo_s g_planeinfo =
{ {
.putrun = rit_putrun, /* Put a run into LCD memory */ .putrun = rit_putrun, /* Put a run into LCD memory */
.getrun = rit_getrun, /* Get a run from LCD memory */ .getrun = rit_getrun, /* Get a run from LCD memory */
.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */ .buffer = (FAR uint8_t *)g_runbuffer, /* Run scratch buffer */
.bpp = RIT_BPP, /* Bits-per-pixel */ .bpp = RIT_BPP, /* Bits-per-pixel */
}; };
+4 -3
View File
@@ -391,7 +391,8 @@ static void ra8875_waitreg(FAR struct ra8875_lcd_s *lcd, uint8_t regaddr, uint8_
{ {
int i = 20000/100; int i = 20000/100;
while (i-- && ra8875_readreg(lcd, regaddr) & mask) { while (i-- && ra8875_readreg(lcd, regaddr) & mask)
{
up_udelay(100); up_udelay(100);
} }
} }
@@ -856,7 +857,7 @@ static int ra8875_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
pinfo->putrun = ra8875_putrun; /* Put a run into LCD memory */ pinfo->putrun = ra8875_putrun; /* Put a run into LCD memory */
pinfo->getrun = ra8875_getrun; /* Get a run from LCD memory */ pinfo->getrun = ra8875_getrun; /* Get a run from LCD memory */
pinfo->buffer = (uint8_t*)priv->runbuffer; /* Run scratch buffer */ pinfo->buffer = (FAR uint8_t *)priv->runbuffer; /* Run scratch buffer */
pinfo->bpp = RA8875_BPP; /* Bits-per-pixel */ pinfo->bpp = RA8875_BPP; /* Bits-per-pixel */
return OK; return OK;
} }
@@ -990,7 +991,7 @@ static inline int ra8875_hwinitialize(FAR struct ra8875_dev_s *priv)
uint8_t rv; uint8_t rv;
FAR struct ra8875_lcd_s *lcd = priv->lcd; FAR struct ra8875_lcd_s *lcd = priv->lcd;
/*@@TODO: Maybe some of these values needs to be configurable?? */ /* REVISIT: Maybe some of these values needs to be configurable?? */
lcdvdbg("hwinitialize\n"); lcdvdbg("hwinitialize\n");
+1 -1
View File
@@ -180,7 +180,7 @@ static const struct lcd_planeinfo_s g_planeinfo =
{ {
.putrun = skel_putrun, /* Put a run into LCD memory */ .putrun = skel_putrun, /* Put a run into LCD memory */
.getrun = skel_getrun, /* Get a run from LCD memory */ .getrun = skel_getrun, /* Get a run from LCD memory */
.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */ .buffer = (FAR uint8_t *)g_runbuffer, /* Run scratch buffer */
.bpp = SKEL_BPP, /* Bits-per-pixel */ .bpp = SKEL_BPP, /* Bits-per-pixel */
}; };
+1 -1
View File
@@ -874,7 +874,7 @@ static int ssd1289_getplaneinfo(FAR struct lcd_dev_s *dev, unsigned int planeno,
pinfo->putrun = ssd1289_putrun; /* Put a run into LCD memory */ pinfo->putrun = ssd1289_putrun; /* Put a run into LCD memory */
pinfo->getrun = ssd1289_getrun; /* Get a run from LCD memory */ pinfo->getrun = ssd1289_getrun; /* Get a run from LCD memory */
pinfo->buffer = (uint8_t*)priv->runbuffer; /* Run scratch buffer */ pinfo->buffer = (FAR uint8_t *)priv->runbuffer; /* Run scratch buffer */
pinfo->bpp = SSD1289_BPP; /* Bits-per-pixel */ pinfo->bpp = SSD1289_BPP; /* Bits-per-pixel */
return OK; return OK;
} }
+6 -6
View File
@@ -210,7 +210,7 @@ static const struct lcd_planeinfo_s g_planeinfo =
{ {
.putrun = ssd1306_putrun, /* Put a run into LCD memory */ .putrun = ssd1306_putrun, /* Put a run into LCD memory */
.getrun = ssd1306_getrun, /* Get a run from LCD memory */ .getrun = ssd1306_getrun, /* Get a run from LCD memory */
.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */ .buffer = (FAR uint8_t *)g_runbuffer, /* Run scratch buffer */
.bpp = SSD1306_DEV_BPP, /* Bits-per-pixel */ .bpp = SSD1306_DEV_BPP, /* Bits-per-pixel */
}; };
@@ -868,15 +868,15 @@ FAR struct lcd_dev_s *ssd1306_initialize(FAR struct i2c_dev_s *dev, unsigned int
ssd1306_sendbyte(priv, SSD1306_SETCOLL(0)); /* Set lower column address 0x00 */ ssd1306_sendbyte(priv, SSD1306_SETCOLL(0)); /* Set lower column address 0x00 */
ssd1306_sendbyte(priv, SSD1306_SETCOLH(0)); /* Set higher column address 0x10 */ ssd1306_sendbyte(priv, SSD1306_SETCOLH(0)); /* Set higher column address 0x10 */
ssd1306_sendbyte(priv, SSD1306_STARTLINE(0)); /* Set display start line 0x40 */ ssd1306_sendbyte(priv, SSD1306_STARTLINE(0)); /* Set display start line 0x40 */
/* ssd1306_sendbyte(priv, SSD1306_PAGEADDR(0));*//* Set page address (Can ignore)*/ //ssd1306_sendbyte(priv, SSD1306_PAGEADDR(0)); /* Set page address (Can ignore) */
ssd1306_sendbyte(priv, SSD1306_CONTRAST_MODE); /* Contrast control 0x81 */ ssd1306_sendbyte(priv, SSD1306_CONTRAST_MODE); /* Contrast control 0x81 */
ssd1306_sendbyte(priv, SSD1306_CONTRAST(SSD1306_DEV_CONTRAST)); /* Default contrast 0xCF */ ssd1306_sendbyte(priv, SSD1306_CONTRAST(SSD1306_DEV_CONTRAST)); /* Default contrast 0xCF */
ssd1306_sendbyte(priv, SSD1306_REMAPPLEFT); /* Set segment remap left 95 to 0 | 0xa1 */ ssd1306_sendbyte(priv, SSD1306_REMAPPLEFT); /* Set segment remap left 95 to 0 | 0xa1 */
/* ssd1306_sendbyte(priv, SSD1306_EDISPOFF); */ /* Normal display off 0xa4 (Can ignore)*/ //ssd1306_sendbyte(priv, SSD1306_EDISPOFF); /* Normal display off 0xa4 (Can ignore) */
ssd1306_sendbyte(priv, SSD1306_NORMAL); /* Normal (un-reversed) display mode 0xa6 */ ssd1306_sendbyte(priv, SSD1306_NORMAL); /* Normal (un-reversed) display mode 0xa6 */
ssd1306_sendbyte(priv, SSD1306_MRATIO_MODE); /* Multiplex ratio 0xa8 */ ssd1306_sendbyte(priv, SSD1306_MRATIO_MODE); /* Multiplex ratio 0xa8 */
ssd1306_sendbyte(priv, SSD1306_MRATIO(SSD1306_DEV_DUTY)); /* Duty = 1/64 or 1/32 */ ssd1306_sendbyte(priv, SSD1306_MRATIO(SSD1306_DEV_DUTY)); /* Duty = 1/64 or 1/32 */
/* ssd1306_sendbyte(priv, SSD1306_SCANTOCOM0);*/ /* Com scan direction: Scan from COM[n-1] to COM[0] (Can ignore)*/ //ssd1306_sendbyte(priv, SSD1306_SCANTOCOM0); /* Com scan direction: Scan from COM[n-1] to COM[0] (Can ignore) */
ssd1306_sendbyte(priv, SSD1306_DISPOFFS_MODE); /* Set display offset 0xd3 */ ssd1306_sendbyte(priv, SSD1306_DISPOFFS_MODE); /* Set display offset 0xd3 */
ssd1306_sendbyte(priv, SSD1306_DISPOFFS(0)); ssd1306_sendbyte(priv, SSD1306_DISPOFFS(0));
ssd1306_sendbyte(priv, SSD1306_CLKDIV_SET); /* Set clock divider 0xd5 */ ssd1306_sendbyte(priv, SSD1306_CLKDIV_SET); /* Set clock divider 0xd5 */
@@ -894,8 +894,8 @@ FAR struct lcd_dev_s *ssd1306_initialize(FAR struct i2c_dev_s *dev, unsigned int
ssd1306_sendbyte(priv, SSD1306_CHRPUMP_SET); /* Set Charge Pump enable/disable 0x8d ssd1306 */ ssd1306_sendbyte(priv, SSD1306_CHRPUMP_SET); /* Set Charge Pump enable/disable 0x8d ssd1306 */
ssd1306_sendbyte(priv, SSD1306_CHRPUMP_ON); /* 0x14 close 0x10 */ ssd1306_sendbyte(priv, SSD1306_CHRPUMP_ON); /* 0x14 close 0x10 */
/* ssd1306_sendbyte(priv, SSD1306_DCDC_MODE); */ /* DC/DC control mode: on (SSD1306 Not supported) */ //ssd1306_sendbyte(priv, SSD1306_DCDC_MODE); /* DC/DC control mode: on (SSD1306 Not supported) */
/* ssd1306_sendbyte(priv, SSD1306_DCDC_ON); */ //ssd1306_sendbyte(priv, SSD1306_DCDC_ON);
ssd1306_sendbyte(priv, SSD1306_DISPON); /* Display ON 0xaf */ ssd1306_sendbyte(priv, SSD1306_DISPON); /* Display ON 0xaf */
+5 -3
View File
@@ -990,14 +990,16 @@ FAR struct lcd_dev_s *st7565_initialize(FAR struct st7565_lcd_s *lcd,
st7565_reset(priv, true); st7565_reset(priv, true);
/* it seems too long but written in NHDC12864KGZ DISPLAY /* it seems too long but written in NHDC12864KGZ DISPLAY
* INITIALIZATION... */ * INITIALIZATION...
*/
up_mdelay(150); up_mdelay(150);
st7565_reset(priv, false); st7565_reset(priv, false);
/* it seems too long but written in NHDC12864KGZ DISPLAY /* it seems too long but written in NHDC12864KGZ DISPLAY
* INITIALIZATION... */ * INITIALIZATION...
*/
up_mdelay(150); up_mdelay(150);
@@ -1009,7 +1011,7 @@ FAR struct lcd_dev_s *st7565_initialize(FAR struct st7565_lcd_s *lcd,
st7565_cmddata(priv, true); st7565_cmddata(priv, true);
/* reset by command in case of st7565_reset not implemeted */ /* Reset by command in case of st7565_reset not implemeted */
(void)st7565_send_one_data(priv, ST7565_EXIT_SOFTRST); (void)st7565_send_one_data(priv, ST7565_EXIT_SOFTRST);
+1 -1
View File
@@ -324,7 +324,7 @@ static const struct lcd_planeinfo_s g_planeinfo =
{ {
.putrun = st7567_putrun, /* Put a run into LCD memory */ .putrun = st7567_putrun, /* Put a run into LCD memory */
.getrun = st7567_getrun, /* Get a run from LCD memory */ .getrun = st7567_getrun, /* Get a run from LCD memory */
.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */ .buffer = (FAR uint8_t *)g_runbuffer, /* Run scratch buffer */
.bpp = ST7567_BPP, /* Bits-per-pixel */ .bpp = ST7567_BPP, /* Bits-per-pixel */
}; };
+1 -1
View File
@@ -377,7 +377,7 @@ static const struct lcd_planeinfo_s g_planeinfo =
{ {
.putrun = ug2864ambag01_putrun, /* Put a run into LCD memory */ .putrun = ug2864ambag01_putrun, /* Put a run into LCD memory */
.getrun = ug2864ambag01_getrun, /* Get a run from LCD memory */ .getrun = ug2864ambag01_getrun, /* Get a run from LCD memory */
.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */ .buffer = (FAR uint8_t *)g_runbuffer, /* Run scratch buffer */
.bpp = UG2864AMBAG01_BPP, /* Bits-per-pixel */ .bpp = UG2864AMBAG01_BPP, /* Bits-per-pixel */
}; };
+2 -2
View File
@@ -339,7 +339,7 @@ static const struct lcd_planeinfo_s g_planeinfo =
{ {
.putrun = ug_putrun, /* Put a run into LCD memory */ .putrun = ug_putrun, /* Put a run into LCD memory */
.getrun = ug_getrun, /* Get a run from LCD memory */ .getrun = ug_getrun, /* Get a run from LCD memory */
.buffer = (uint8_t*)g_runbuffer, /* Run scratch buffer */ .buffer = (FAR uint8_t *)g_runbuffer, /* Run scratch buffer */
.bpp = UG_BPP, /* Bits-per-pixel */ .bpp = UG_BPP, /* Bits-per-pixel */
}; };
@@ -1109,7 +1109,7 @@ FAR struct lcd_dev_s *ug_initialize(FAR struct spi_dev_s *spi, unsigned int devn
(void)SPI_SEND(spi, 0x80); /* Data 1: Set 1 of 256 contrast steps */ (void)SPI_SEND(spi, 0x80); /* Data 1: Set 1 of 256 contrast steps */
(void)SPI_SEND(spi, SSD1305_MAPCOL131); /* Set segment re-map */ (void)SPI_SEND(spi, SSD1305_MAPCOL131); /* Set segment re-map */
(void)SPI_SEND(spi, SSD1305_DISPNORMAL); /* Set normal display */ (void)SPI_SEND(spi, SSD1305_DISPNORMAL); /* Set normal display */
/*(void)SPI_SEND(spi, SSD1305_DISPINVERTED); Set inverse display */ //(void)SPI_SEND(spi, SSD1305_DISPINVERTED); /* Set inverse display */
(void)SPI_SEND(spi, SSD1305_SETMUX); /* Set multiplex ratio */ (void)SPI_SEND(spi, SSD1305_SETMUX); /* Set multiplex ratio */
(void)SPI_SEND(spi, 0x3f); /* Data 1: MUX ratio -1: 15-63 */ (void)SPI_SEND(spi, 0x3f); /* Data 1: MUX ratio -1: 15-63 */
(void)SPI_SEND(spi, SSD1305_SETOFFSET); /* Set display offset */ (void)SPI_SEND(spi, SSD1305_SETOFFSET); /* Set display offset */
+23 -11
View File
@@ -500,7 +500,9 @@ static int mmcsd_getSCR(FAR struct mmcsd_state_s *priv, uint32_t scr[2])
SDIO_BLOCKSETUP(priv->dev, 8, 1); SDIO_BLOCKSETUP(priv->dev, 8, 1);
SDIO_RECVSETUP(priv->dev, (FAR uint8_t *)scr, 8); SDIO_RECVSETUP(priv->dev, (FAR uint8_t *)scr, 8);
(void)SDIO_WAITENABLE(priv->dev, SDIOWAIT_TRANSFERDONE|SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR); (void)SDIO_WAITENABLE(priv->dev,
SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT |
SDIOWAIT_ERROR);
/* Send CMD55 APP_CMD with argument as card's RCA */ /* Send CMD55 APP_CMD with argument as card's RCA */
@@ -525,7 +527,8 @@ static int mmcsd_getSCR(FAR struct mmcsd_state_s *priv, uint32_t scr[2])
/* Wait for data to be transferred */ /* Wait for data to be transferred */
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR, MMCSD_SCR_DATADELAY); ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR,
MMCSD_SCR_DATADELAY);
if (ret != OK) if (ret != OK)
{ {
fdbg("ERROR: mmcsd_eventwait for READ DATA failed: %d\n", ret); fdbg("ERROR: mmcsd_eventwait for READ DATA failed: %d\n", ret);
@@ -1353,7 +1356,8 @@ static ssize_t mmcsd_readsingle(FAR struct mmcsd_state_s *priv,
/* Configure SDIO controller hardware for the read transfer */ /* Configure SDIO controller hardware for the read transfer */
SDIO_BLOCKSETUP(priv->dev, priv->blocksize, 1); SDIO_BLOCKSETUP(priv->dev, priv->blocksize, 1);
SDIO_WAITENABLE(priv->dev, SDIOWAIT_TRANSFERDONE|SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR); SDIO_WAITENABLE(priv->dev,
SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR);
#ifdef CONFIG_SDIO_DMA #ifdef CONFIG_SDIO_DMA
if (priv->dma) if (priv->dma)
@@ -1388,7 +1392,8 @@ static ssize_t mmcsd_readsingle(FAR struct mmcsd_state_s *priv,
/* Then wait for the data transfer to complete */ /* Then wait for the data transfer to complete */
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR, MMCSD_BLOCK_RDATADELAY); ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR,
MMCSD_BLOCK_RDATADELAY);
if (ret != OK) if (ret != OK)
{ {
fdbg("ERROR: CMD17 transfer failed: %d\n", ret); fdbg("ERROR: CMD17 transfer failed: %d\n", ret);
@@ -1485,7 +1490,8 @@ static ssize_t mmcsd_readmultiple(FAR struct mmcsd_state_s *priv,
/* Configure SDIO controller hardware for the read transfer */ /* Configure SDIO controller hardware for the read transfer */
SDIO_BLOCKSETUP(priv->dev, priv->blocksize, nblocks); SDIO_BLOCKSETUP(priv->dev, priv->blocksize, nblocks);
SDIO_WAITENABLE(priv->dev, SDIOWAIT_TRANSFERDONE|SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR); SDIO_WAITENABLE(priv->dev,
SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR);
#ifdef CONFIG_SDIO_DMA #ifdef CONFIG_SDIO_DMA
if (priv->dma) if (priv->dma)
@@ -1518,7 +1524,8 @@ static ssize_t mmcsd_readmultiple(FAR struct mmcsd_state_s *priv,
/* Wait for the transfer to complete */ /* Wait for the transfer to complete */
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR, nblocks * MMCSD_BLOCK_RDATADELAY); ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR,
nblocks * MMCSD_BLOCK_RDATADELAY);
if (ret != OK) if (ret != OK)
{ {
fdbg("ERROR: CMD18 transfer failed: %d\n", ret); fdbg("ERROR: CMD18 transfer failed: %d\n", ret);
@@ -1698,7 +1705,8 @@ static ssize_t mmcsd_writesingle(FAR struct mmcsd_state_s *priv,
/* Configure SDIO controller hardware for the write transfer */ /* Configure SDIO controller hardware for the write transfer */
SDIO_BLOCKSETUP(priv->dev, priv->blocksize, 1); SDIO_BLOCKSETUP(priv->dev, priv->blocksize, 1);
SDIO_WAITENABLE(priv->dev, SDIOWAIT_TRANSFERDONE|SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR); SDIO_WAITENABLE(priv->dev,
SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR);
#ifdef CONFIG_SDIO_DMA #ifdef CONFIG_SDIO_DMA
if (priv->dma) if (priv->dma)
{ {
@@ -1723,7 +1731,8 @@ static ssize_t mmcsd_writesingle(FAR struct mmcsd_state_s *priv,
/* Wait for the transfer to complete */ /* Wait for the transfer to complete */
ret = mmcsd_eventwait(priv, SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR, MMCSD_BLOCK_WDATADELAY); ret = mmcsd_eventwait(priv,
SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR, MMCSD_BLOCK_WDATADELAY);
if (ret != OK) if (ret != OK)
{ {
fdbg("ERROR: CMD24 transfer failed: %d\n", ret); fdbg("ERROR: CMD24 transfer failed: %d\n", ret);
@@ -1859,7 +1868,8 @@ static ssize_t mmcsd_writemultiple(FAR struct mmcsd_state_s *priv,
/* Configure SDIO controller hardware for the write transfer */ /* Configure SDIO controller hardware for the write transfer */
SDIO_BLOCKSETUP(priv->dev, priv->blocksize, nblocks); SDIO_BLOCKSETUP(priv->dev, priv->blocksize, nblocks);
SDIO_WAITENABLE(priv->dev, SDIOWAIT_TRANSFERDONE|SDIOWAIT_TIMEOUT|SDIOWAIT_ERROR); SDIO_WAITENABLE(priv->dev,
SDIOWAIT_TRANSFERDONE | SDIOWAIT_TIMEOUT | SDIOWAIT_ERROR);
#ifdef CONFIG_SDIO_DMA #ifdef CONFIG_SDIO_DMA
if (priv->dma) if (priv->dma)
{ {
@@ -2749,7 +2759,8 @@ static int mmcsd_cardidentify(FAR struct mmcsd_state_s *priv)
* CMD8 Response: R7 * CMD8 Response: R7
*/ */
ret = mmcsd_sendcmdpoll(priv, SD_CMD8, MMCSD_CMD8CHECKPATTERN|MMCSD_CMD8VOLTAGE_27); ret = mmcsd_sendcmdpoll(priv, SD_CMD8,
MMCSD_CMD8CHECKPATTERN | MMCSD_CMD8VOLTAGE_27);
if (ret == OK) if (ret == OK)
{ {
/* CMD8 was sent successfully... Get the R7 response */ /* CMD8 was sent successfully... Get the R7 response */
@@ -2815,7 +2826,8 @@ static int mmcsd_cardidentify(FAR struct mmcsd_state_s *priv)
{ {
/* Send ACMD41 */ /* Send ACMD41 */
mmcsd_sendcmdpoll(priv, SD_ACMD41, MMCSD_ACMD41_VOLTAGEWINDOW_33_32|sdcapacity); mmcsd_sendcmdpoll(priv, SD_ACMD41,
MMCSD_ACMD41_VOLTAGEWINDOW_33_32 | sdcapacity);
ret = SDIO_RECVR3(priv->dev, SD_ACMD41, &response); ret = SDIO_RECVR3(priv->dev, SD_ACMD41, &response);
if (ret != OK) if (ret != OK)
{ {
+2 -2
View File
@@ -1862,7 +1862,7 @@ static int mmcsd_mediainitialize(FAR struct mmcsd_slot_s *slot)
static void mmcsd_mediachanged(void *arg) static void mmcsd_mediachanged(void *arg)
{ {
struct mmcsd_slot_s *slot = (struct mmcsd_slot_s*)arg; FAR struct mmcsd_slot_s *slot = (FAR struct mmcsd_slot_s *)arg;
FAR struct spi_dev_s *spi; FAR struct spi_dev_s *spi;
uint8_t oldstate; uint8_t oldstate;
int ret; int ret;
@@ -2014,7 +2014,7 @@ int mmcsd_spislotinitialize(int minor, int slotno, FAR struct spi_dev_s *spi)
* removal of cards. * removal of cards.
*/ */
(void)SPI_REGISTERCALLBACK(spi, mmcsd_mediachanged, (void*)slot); (void)SPI_REGISTERCALLBACK(spi, mmcsd_mediachanged, (FAR void *)slot);
return OK; return OK;
} }
+9 -3
View File
@@ -251,12 +251,18 @@ static int at45db_ioctl(FAR struct mtd_dev_s *mtd, int cmd, unsigned long arg);
/* Chip erase sequence */ /* Chip erase sequence */
#define CHIP_ERASE_SIZE 4 #define CHIP_ERASE_SIZE 4
static const uint8_t g_chiperase[CHIP_ERASE_SIZE] = {0xc7, 0x94, 0x80, 0x9a}; static const uint8_t g_chiperase[CHIP_ERASE_SIZE] =
{
0xc7, 0x94, 0x80, 0x9a
};
/* Sequence to program the device to binary page sizes{256, 512, 1024} */ /* Sequence to program the device to binary page sizes{256, 512, 1024} */
#define BINPGSIZE_SIZE 4 #define BINPGSIZE_SIZE 4
static const uint8_t g_binpgsize[BINPGSIZE_SIZE] = {0x3d, 0x2a, 0x80, 0xa6}; static const uint8_t g_binpgsize[BINPGSIZE_SIZE] =
{
0x3d, 0x2a, 0x80, 0xa6
};
/************************************************************************************ /************************************************************************************
* Private Functions * Private Functions
@@ -270,7 +276,7 @@ static void at45db_lock(FAR struct at45db_dev_s *priv)
{ {
/* On SPI buses where there are multiple devices, it will be necessary to lock SPI /* On SPI buses where there are multiple devices, it will be necessary to lock SPI
* to have exclusive access to the buses for a sequence of transfers. The bus * to have exclusive access to the buses for a sequence of transfers. The bus
& should be locked before the chip is selected. * should be locked before the chip is selected.
* *
* This is a blocking call and will not return until we have exclusive access to * This is a blocking call and will not return until we have exclusive access to
* the SPI bus. We will retain that exclusive access until the bus is unlocked. * the SPI bus. We will retain that exclusive access until the bus is unlocked.
+5 -8
View File
@@ -115,8 +115,10 @@ struct mtdconfig_header_s
static int mtdconfig_open(FAR struct file *filep); static int mtdconfig_open(FAR struct file *filep);
static int mtdconfig_close(FAR struct file *filep); static int mtdconfig_close(FAR struct file *filep);
static ssize_t mtdconfig_read(FAR struct file *, FAR char *, size_t); static ssize_t mtdconfig_read(FAR struct file *filep, FAR char *buffer,
static ssize_t mtdconfig_ioctl(FAR struct file *, int, unsigned long); size_t buflen);
static ssize_t mtdconfig_ioctl(FAR struct file *filep, int cmd,
unsigned long arg);
#ifndef CONFIG_DISABLE_POLL #ifndef CONFIG_DISABLE_POLL
static int mtdconfig_poll(FAR struct file *filep, FAR struct pollfd *fds, static int mtdconfig_poll(FAR struct file *filep, FAR struct pollfd *fds,
bool setup); bool setup);
@@ -645,8 +647,6 @@ static off_t mtdconfig_ramconsolidate(FAR struct mtdconfig_struct_s *dev)
/* Now Write the item to the current dst_offset location */ /* Now Write the item to the current dst_offset location */
//printf("REL HDR: ID=%04X,%02X Len=%4d Off=%5d Src off=%4d\n",
// phdr->id, phdr->instance, phdr->len, dst_offset, src_offset);
ret = mtdconfig_writebytes(dev, dst_offset, (uint8_t *) phdr, ret = mtdconfig_writebytes(dev, dst_offset, (uint8_t *) phdr,
sizeof(hdr)); sizeof(hdr));
if (ret < 0) if (ret < 0)
@@ -815,8 +815,6 @@ retry_relocate:
/* Copy this entry to the destination */ /* Copy this entry to the destination */
//printf("REL HDR: ID=%04X,%02X Len=%4d Off=%5d Src off=%4d\n",
// hdr.id, hdr.instance, hdr.len, dst_offset, src_offset);
mtdconfig_writebytes(dev, dst_offset, (uint8_t *) &hdr, sizeof(hdr)); mtdconfig_writebytes(dev, dst_offset, (uint8_t *) &hdr, sizeof(hdr));
src_offset += sizeof(hdr); src_offset += sizeof(hdr);
dst_offset += sizeof(hdr); dst_offset += sizeof(hdr);
@@ -1181,8 +1179,7 @@ retry_find:
hdr.instance = pdata->instance; hdr.instance = pdata->instance;
hdr.len = pdata->len; hdr.len = pdata->len;
hdr.flags = MTD_ERASED_FLAGS; hdr.flags = MTD_ERASED_FLAGS;
//printf("SAV HDR: ID=%04X,%02X Len=%4d Off=%5d\n",
// hdr.id, hdr.instance, hdr.len, offset);
mtdconfig_writebytes(dev, offset, (uint8_t *)&hdr, sizeof(hdr)); mtdconfig_writebytes(dev, offset, (uint8_t *)&hdr, sizeof(hdr));
bytes = mtdconfig_writebytes(dev, offset + sizeof(hdr), pdata->configdata, bytes = mtdconfig_writebytes(dev, offset + sizeof(hdr), pdata->configdata,
pdata->len); pdata->len);
+3 -3
View File
@@ -250,8 +250,8 @@ static int nand_checkblock(FAR struct nand_dev_s *nand, off_t block)
* *
****************************************************************************/ ****************************************************************************/
//#ifdef CONFIG_MTD_NAND_BLOCKCHECK #if defined(CONFIG_MTD_NAND_BLOCKCHECK) && defined(CONFIG_DEBUG_VERBOSE) && \
#if defined(CONFIG_MTD_NAND_BLOCKCHECK) && defined(CONFIG_DEBUG_VERBOSE) && defined(CONFIG_DEBUG_FS) defined(CONFIG_DEBUG_FS)
static int nand_devscan(FAR struct nand_dev_s *nand) static int nand_devscan(FAR struct nand_dev_s *nand)
{ {
FAR struct nand_raw_s *raw; FAR struct nand_raw_s *raw;
@@ -329,7 +329,7 @@ static int nand_devscan(FAR struct nand_dev_s *nand)
return OK; return OK;
} }
#endif /* CONFIG_MTD_NAND_BLOCKCHECK */ #endif /* CONFIG_MTD_NAND_BLOCKCHECK && CONFIG_DEBUG_VERBOSE && CONFIG_DEBUG_FS */
/**************************************************************************** /****************************************************************************
* Name: nand_chipid * Name: nand_chipid
+2 -2
View File
@@ -330,8 +330,8 @@ void nandscheme_writeextra(FAR const struct nand_scheme_s *scheme,
DEBUGASSERT((size + offset) < scheme->nxbytes); DEBUGASSERT((size + offset) < scheme->nxbytes);
uint32_t i; uint32_t i;
for (i = 0; i < size; i++) { for (i = 0; i < size; i++)
{
spare[scheme->xbytepos[i+offset]] = ((uint8_t *) extra)[i]; spare[scheme->xbytepos[i+offset]] = ((uint8_t *) extra)[i];
} }
} }
+9 -9
View File
@@ -328,39 +328,39 @@ int onfi_read(uintptr_t cmdaddr, uintptr_t addraddr, uintptr_t dataaddr,
/* JEDEC manufacturer ID */ /* JEDEC manufacturer ID */
onfi->manufacturer = *(uint8_t *)(parmtab + 64); onfi->manufacturer = *(FAR uint8_t *)(parmtab + 64);
/* Bus width */ /* Bus width */
onfi->buswidth = (*(uint8_t *)(parmtab + 6)) & 0x01; onfi->buswidth = (*(FAR uint8_t *)(parmtab + 6)) & 0x01;
/* Get number of data bytes per page (bytes 80-83 in the param table) */ /* Get number of data bytes per page (bytes 80-83 in the param table) */
onfi->pagesize = *(uint32_t *)(void*)(parmtab + 80); onfi->pagesize = *(FAR uint32_t *)(FAR void *)(parmtab + 80);
/* Get number of spare bytes per page (bytes 84-85 in the param table) */ /* Get number of spare bytes per page (bytes 84-85 in the param table) */
onfi->sparesize = *(uint16_t *)(void*)(parmtab + 84); onfi->sparesize = *(FAR uint16_t *)(FAR voidFAR *)(parmtab + 84);
/* Number of pages per block. */ /* Number of pages per block. */
onfi->pagesperblock = *(uint32_t *)(void*)(parmtab + 92); onfi->pagesperblock = *(FAR uint32_t *)(FAR void *)(parmtab + 92);
/* Number of blocks per logical unit (LUN). */ /* Number of blocks per logical unit (LUN). */
onfi->blocksperlun = *(uint32_t *)(void*)(parmtab + 96); onfi->blocksperlun = *(FAR uint32_t *)(FAR void *)(parmtab + 96);
/* Number of logical units. */ /* Number of logical units. */
onfi->luns = *(uint8_t *)(parmtab + 100); onfi->luns = *(FAR uint8_t *)(parmtab + 100);
/* Number of bits of ECC correction */ /* Number of bits of ECC correction */
onfi->eccsize = *(uint8_t *)(parmtab + 112); onfi->eccsize = *(FAR uint8_t *)(parmtab + 112);
/* Device model */ /* Device model */
onfi->model= *(uint8_t *)(parmtab + 49); onfi->model = *(FAR uint8_t *)(parmtab + 49);
fvdbg("Returning:\n"); fvdbg("Returning:\n");
fvdbg(" manufacturer: 0x%02x\n", onfi->manufacturer); fvdbg(" manufacturer: 0x%02x\n", onfi->manufacturer);
-1
View File
@@ -40,7 +40,6 @@
#include <nuttx/config.h> #include <nuttx/config.h>
#include <sys/types.h> #include <sys/types.h>
//#include <sys/statfs.h>
#include <sys/stat.h> #include <sys/stat.h>
#include <stdint.h> #include <stdint.h>
+20 -18
View File
@@ -443,7 +443,7 @@ static int smart_close(FAR struct inode *inode)
FAR static void *smart_malloc(FAR struct smart_struct_s *dev, FAR static void *smart_malloc(FAR struct smart_struct_s *dev,
size_t bytes, const char *name) size_t bytes, const char *name)
{ {
void* ret = kmm_malloc(bytes); FAR void *ret = kmm_malloc(bytes);
uint8_t x; uint8_t x;
/* Keep track of the total allocation */ /* Keep track of the total allocation */
@@ -675,7 +675,7 @@ int smart_checkfree(FAR struct smart_struct_s *dev, int lineno)
} }
/* Modifiy the freesector count to reflect the actual calculated freecount /* Modifiy the freesector count to reflect the actual calculated freecount
to get us back in line. * to get us back in line.
*/ */
dev->freesectors = freecount; dev->freesectors = freecount;
@@ -761,13 +761,13 @@ static ssize_t smart_reload(struct smart_struct_s *dev, FAR uint8_t *buffer,
static ssize_t smart_read(FAR struct inode *inode, unsigned char *buffer, static ssize_t smart_read(FAR struct inode *inode, unsigned char *buffer,
size_t start_sector, unsigned int nsectors) size_t start_sector, unsigned int nsectors)
{ {
struct smart_struct_s *dev; FAR struct smart_struct_s *dev;
fvdbg("SMART: sector: %d nsectors: %d\n", start_sector, nsectors); fvdbg("SMART: sector: %d nsectors: %d\n", start_sector, nsectors);
DEBUGASSERT(inode && inode->i_private); DEBUGASSERT(inode && inode->i_private);
#ifdef CONFIG_SMARTFS_MULTI_ROOT_DIRS #ifdef CONFIG_SMARTFS_MULTI_ROOT_DIRS
dev = ((struct smart_multiroot_device_s*) inode->i_private)->dev; dev = ((FAR struct smart_multiroot_device_s *)inode->i_private)->dev;
#else #else
dev = (struct smart_struct_s *)inode->i_private; dev = (struct smart_struct_s *)inode->i_private;
#endif #endif
@@ -1543,7 +1543,7 @@ static void smart_update_cache(FAR struct smart_struct_s *dev, uint16_t
dev->sCache[x].physical = physical; dev->sCache[x].physical = physical;
/* If we are freeing a sector, then remove the logical entry from /* If we are freeing a sector, then remove the logical entry from
the cache. * the cache.
*/ */
if (physical == 0xFFFF) if (physical == 0xFFFF)
@@ -1739,7 +1739,8 @@ static int smart_set_wear_level(FAR struct smart_struct_s *dev, uint16_t block,
} }
/* Test if this was the min level. If it was, then /* Test if this was the min level. If it was, then
we need to rescan for min. */ * we need to rescan for min.
*/
if (oldlevel == dev->minwearlevel) if (oldlevel == dev->minwearlevel)
{ {
@@ -1988,7 +1989,8 @@ static int smart_scan(FAR struct smart_struct_s *dev)
dev->rwbuffer[SMART_FMT_POS4] != SMART_FMT_SIG4) dev->rwbuffer[SMART_FMT_POS4] != SMART_FMT_SIG4)
{ {
/* Invalid signature on a sector claiming to be sector 0! /* Invalid signature on a sector claiming to be sector 0!
* What should we do? Release it?*/ * What should we do? Release it?
*/
continue; continue;
} }
@@ -2023,8 +2025,8 @@ static int smart_scan(FAR struct smart_struct_s *dev)
* the SMART device structure and the root directory number. * the SMART device structure and the root directory number.
*/ */
rootdirdev = (struct smart_multiroot_device_s*) smart_malloc(dev, rootdirdev = (struct smart_multiroot_device_s *)
sizeof(*rootdirdev), "Root Dir"); smart_malloc(dev, sizeof(*rootdirdev), "Root Dir");
if (rootdirdev == NULL) if (rootdirdev == NULL)
{ {
fdbg("Memory alloc failed\n"); fdbg("Memory alloc failed\n");
@@ -2927,7 +2929,7 @@ static inline int smart_llformat(FAR struct smart_struct_s *dev, unsigned long a
for (x = 0; x < dev->neraseblocks; x++) for (x = 0; x < dev->neraseblocks; x++)
{ {
/* Test for a geometry with 65536 sectors. We allow this, though /* Test for a geometry with 65536 sectors. We allow this, though
we never use the last two sectors in this mode. * we never use the last two sectors in this mode.
*/ */
if (x == dev->neraseblocks && dev->totalsectors == 65534) if (x == dev->neraseblocks && dev->totalsectors == 65534)
@@ -3304,7 +3306,7 @@ static int smart_relocate_block(FAR struct smart_struct_s *dev, uint16_t block)
if (x == dev->neraseblocks && dev->totalsectors == 65534) if (x == dev->neraseblocks && dev->totalsectors == 65534)
{ {
/* We can't use the last two sectors on a 65536 sector device, /* We can't use the last two sectors on a 65536 sector device,
so "pre-release" them so they never get allocated. * so "pre-release" them so they never get allocated.
*/ */
prerelease = 2; prerelease = 2;
@@ -3758,7 +3760,7 @@ static int smart_write_wearstatus(struct smart_struct_s *dev)
} }
/* Test if we need to write either total block erase count or /* Test if we need to write either total block erase count or
uneven wearcount (or both) * uneven wearcount (or both)
*/ */
if (write_buffer) if (write_buffer)
@@ -4223,9 +4225,9 @@ static int smart_writesector(FAR struct smart_struct_s *dev,
#endif /* CONFIG_MTD_SMART_ENABLE_CRC */ #endif /* CONFIG_MTD_SMART_ENABLE_CRC */
/* If we are not using CRC and on a device that supports re-writing /* If we are not using CRC and on a device that supports re-writing
bits from 1 to 0 without neededing a block erase, such as NOR * bits from 1 to 0 without neededing a block erase, such as NOR
FLASH, then we can simply update the data in place and don't need * FLASH, then we can simply update the data in place and don't need
to relocate the sector. Test if we need to relocate or not. * to relocate the sector. Test if we need to relocate or not.
*/ */
if (needsrelocate) if (needsrelocate)
@@ -4610,7 +4612,7 @@ static int smart_readsector(FAR struct smart_struct_s *dev,
/* Read the sector data into the buffer */ /* Read the sector data into the buffer */
readaddr = (uint32_t) physsector * dev->mtdBlksPerSector * dev->geo.blocksize + readaddr = (uint32_t) physsector * dev->mtdBlksPerSector * dev->geo.blocksize +
req->offset + sizeof(struct smart_sect_header_s);; req->offset + sizeof(struct smart_sect_header_s);
ret = MTD_READ(dev->mtd, readaddr, req->count, (FAR uint8_t *) ret = MTD_READ(dev->mtd, readaddr, req->count, (FAR uint8_t *)
req->buffer); req->buffer);
@@ -5292,8 +5294,8 @@ int smart_initialize(int minor, FAR struct mtd_dev_s *mtd, FAR const char *partn
* the SMART device structure and the root directory number. * the SMART device structure and the root directory number.
*/ */
rootdirdev = (FAR struct smart_multiroot_device_s*) smart_malloc(dev, rootdirdev = (FAR struct smart_multiroot_device_s *)
sizeof(*rootdirdev), "Root Dir"); smart_malloc(dev, sizeof(*rootdirdev), "Root Dir");
if (rootdirdev == NULL) if (rootdirdev == NULL)
{ {
fdbg("register_blockdriver failed: %d\n", -ret); fdbg("register_blockdriver failed: %d\n", -ret);
+4 -2
View File
@@ -755,7 +755,8 @@ static void sst25_wordwrite(struct sst25_dev_s *priv, FAR const uint8_t *buffer,
/* Wait for the preceding write to complete. */ /* Wait for the preceding write to complete. */
status = sst25_waitwritecomplete(priv); status = sst25_waitwritecomplete(priv);
DEBUGASSERT((status & (SST25_SR_WEL|SST25_SR_BP_MASK|SST25_SR_AAI)) == (SST25_SR_WEL|SST25_SR_AAI)); DEBUGASSERT((status & (SST25_SR_WEL | SST25_SR_BP_MASK | SST25_SR_AAI)) ==
(SST25_SR_WEL | SST25_SR_AAI));
UNUSED(status); UNUSED(status);
/* Decrement the word count and advance the write position */ /* Decrement the word count and advance the write position */
@@ -793,7 +794,8 @@ static void sst25_wordwrite(struct sst25_dev_s *priv, FAR const uint8_t *buffer,
/* Wait for the preceding write to complete. */ /* Wait for the preceding write to complete. */
status = sst25_waitwritecomplete(priv); status = sst25_waitwritecomplete(priv);
DEBUGASSERT((status & (SST25_SR_WEL|SST25_SR_BP_MASK|SST25_SR_AAI)) == (SST25_SR_WEL|SST25_SR_AAI)); DEBUGASSERT((status & (SST25_SR_WEL | SST25_SR_BP_MASK | SST25_SR_AAI)) ==
(SST25_SR_WEL | SST25_SR_AAI));
UNUSED(status); UNUSED(status);
/* Decrement the word count and advance the write position */ /* Decrement the word count and advance the write position */
+4 -4
View File
@@ -397,9 +397,9 @@ static int cs89x0_txpoll(struct net_driver_s *dev)
* *
****************************************************************************/ ****************************************************************************/
static void cs89x0_receive(struct cs89x0_driver_s *cs89x0, uint16_t isq) static void cs89x0_receive(FAR struct cs89x0_driver_s *cs89x0, uint16_t isq)
{ {
uint16_t *dest; FAR uint16_t *dest;
uint16_t rxlength; uint16_t rxlength;
int nbytes; int nbytes;
@@ -451,7 +451,7 @@ static void cs89x0_receive(struct cs89x0_driver_s *cs89x0, uint16_t isq)
* amount of data in cs89x0->cs_dev.d_len * amount of data in cs89x0->cs_dev.d_len
*/ */
dest = (uint16_t*)cs89x0->cs_dev.d_buf; dest = (FAR uint16_t *)cs89x0->cs_dev.d_buf;
for (nbytes = 0; nbytes < rxlength; nbytes += sizeof(uint16_t)) for (nbytes = 0; nbytes < rxlength; nbytes += sizeof(uint16_t))
{ {
*dest++ = cs89x0_getreg(PPR_RXFRAMELOCATION); *dest++ = cs89x0_getreg(PPR_RXFRAMELOCATION);
@@ -1041,7 +1041,7 @@ int cs89x0_initialize(FAR const cs89x0_driver_s *cs89x0, int devno)
cs89x0->cs_dev.d_addmac = cs89x0_addmac; /* Add multicast MAC address */ cs89x0->cs_dev.d_addmac = cs89x0_addmac; /* Add multicast MAC address */
cs89x0->cs_dev.d_rmmac = cs89x0_rmmac; /* Remove multicast MAC address */ cs89x0->cs_dev.d_rmmac = cs89x0_rmmac; /* Remove multicast MAC address */
#endif #endif
cs89x0->cs_dev.d_private = (void*)cs89x0; /* Used to recover private state from dev */ cs89x0->cs_dev.d_private = (FAR void *)cs89x0; /* Used to recover private state from dev */
/* Create a watchdog for timing polling for and timing of transmisstions */ /* Create a watchdog for timing polling for and timing of transmisstions */
+18 -12
View File
@@ -458,7 +458,7 @@ static void putreg(int reg, uint8_t value)
* *
****************************************************************************/ ****************************************************************************/
static void read8(uint8_t *ptr, int len) static void read8(FAR uint8_t *ptr, int len)
{ {
nvdbg("Read %d bytes (8-bit mode)\n", len); nvdbg("Read %d bytes (8-bit mode)\n", len);
for (; len > 0; len--) for (; len > 0; len--)
@@ -467,9 +467,10 @@ static void read8(uint8_t *ptr, int len)
} }
} }
static void read16(uint8_t *ptr, int len) static void read16(FAR uint8_t *ptr, int len)
{ {
register uint16_t *ptr16 = (uint16_t*)ptr; FAR uint16_t *ptr16 = (FAR uint16_t *)ptr;
nvdbg("Read %d bytes (16-bit mode)\n", len); nvdbg("Read %d bytes (16-bit mode)\n", len);
for (; len > 0; len -= sizeof(uint16_t)) for (; len > 0; len -= sizeof(uint16_t))
{ {
@@ -477,9 +478,10 @@ static void read16(uint8_t *ptr, int len)
} }
} }
static void read32(uint8_t *ptr, int len) static void read32(FARuint8_t *ptr, int len)
{ {
register uint32_t *ptr32 = (uint32_t*)ptr; FAR uint32_t *ptr32 = (FAR uint32_t *)ptr;
nvdbg("Read %d bytes (32-bit mode)\n", len); nvdbg("Read %d bytes (32-bit mode)\n", len);
for (; len > 0; len -= sizeof(uint32_t)) for (; len > 0; len -= sizeof(uint32_t))
{ {
@@ -548,9 +550,10 @@ static void discard32(int len)
* *
****************************************************************************/ ****************************************************************************/
static void write8(const uint8_t *ptr, int len) static void write8(FAR const uint8_t *ptr, int len)
{ {
nvdbg("Write %d bytes (8-bit mode)\n", len); nvdbg("Write %d bytes (8-bit mode)\n", len);
for (; len > 0; len--) for (; len > 0; len--)
{ {
DM9X_DATA = (*ptr++ & 0xff); DM9X_DATA = (*ptr++ & 0xff);
@@ -559,7 +562,8 @@ static void write8(const uint8_t *ptr, int len)
static void write16(const uint8_t *ptr, int len) static void write16(const uint8_t *ptr, int len)
{ {
register uint16_t *ptr16 = (uint16_t*)ptr; FAR uint16_t *ptr16 = (FAR uint16_t *)ptr;
nvdbg("Write %d bytes (16-bit mode)\n", len); nvdbg("Write %d bytes (16-bit mode)\n", len);
for (; len > 0; len -= sizeof(uint16_t)) for (; len > 0; len -= sizeof(uint16_t))
@@ -568,10 +572,12 @@ static void write16(const uint8_t *ptr, int len)
} }
} }
static void write32(const uint8_t *ptr, int len) static void write32(FAR const uint8_t *ptr, int len)
{ {
register uint32_t *ptr32 = (uint32_t*)ptr; FAR uint32_t *ptr32 = (FAR uint32_t *)ptr;
nvdbg("Write %d bytes (32-bit mode)\n", len); nvdbg("Write %d bytes (32-bit mode)\n", len);
for (; len > 0; len -= sizeof(uint32_t)) for (; len > 0; len -= sizeof(uint32_t))
{ {
DM9X_DATA = *ptr32++; DM9X_DATA = *ptr32++;
@@ -914,7 +920,7 @@ static int dm9x_txpoll(struct net_driver_s *dev)
* *
****************************************************************************/ ****************************************************************************/
static void dm9x_receive(struct dm9x_driver_s *dm9x) static void dm9x_receive(FAR struct dm9x_driver_s *dm9x)
{ {
union rx_desc_u rx; union rx_desc_u rx;
bool bchecksumready; bool bchecksumready;
@@ -946,7 +952,7 @@ static void dm9x_receive(struct dm9x_driver_s *dm9x)
/* Read packet status & length */ /* Read packet status & length */
dm9x->dm_read((uint8_t*)&rx, 4); dm9x->dm_read((FAR uint8_t *)&rx, 4);
/* Check if any errors were reported by the hardware */ /* Check if any errors were reported by the hardware */
@@ -1874,7 +1880,7 @@ int dm9x_initialize(void)
g_dm9x[0].dm_dev.d_addmac = dm9x_addmac; /* Add multicast MAC address */ g_dm9x[0].dm_dev.d_addmac = dm9x_addmac; /* Add multicast MAC address */
g_dm9x[0].dm_dev.d_rmmac = dm9x_rmmac; /* Remove multicast MAC address */ g_dm9x[0].dm_dev.d_rmmac = dm9x_rmmac; /* Remove multicast MAC address */
#endif #endif
g_dm9x[0].dm_dev.d_private = (void*)g_dm9x; /* Used to recover private state from dev */ g_dm9x[0].dm_dev.d_private = (FAR void *)g_dm9x; /* Used to recover private state from dev */
/* Create a watchdog for timing polling for and timing of transmisstions */ /* Create a watchdog for timing polling for and timing of transmisstions */
+42 -9
View File
@@ -142,7 +142,10 @@ struct e1000_dev_head
* Private Data * Private Data
****************************************************************************/ ****************************************************************************/
static struct e1000_dev_head e1000_list = {0}; static struct e1000_dev_head e1000_list =
{
0
};
/**************************************************************************** /****************************************************************************
* Private Function Prototypes * Private Function Prototypes
@@ -1054,12 +1057,42 @@ static irqreturn_t e1000_interrupt_handler(int irq, void *dev_id)
static pci_id_t e1000_id_table[] = static pci_id_t e1000_id_table[] =
{ {
{.sep = {INTEL_VENDERID, E1000_82573L}}, {
{.sep = {INTEL_VENDERID, E1000_82540EM}}, .sep =
{.sep = {INTEL_VENDERID, E1000_82574L}}, {
{.sep = {INTEL_VENDERID, E1000_82567LM}}, INTEL_VENDERID, E1000_82573L
{.sep = {INTEL_VENDERID, E1000_82541PI}}, }
{.sep = {0,0}} },
{
.sep =
{
INTEL_VENDERID, E1000_82540EM
}
},
{
.sep =
{
INTEL_VENDERID, E1000_82574L
}
},
{
.sep =
{
INTEL_VENDERID, E1000_82567LM
}
},
{
.sep =
{
INTEL_VENDERID, E1000_82541PI
}
},
{
.sep =
{
0, 0
}
}
}; };
static int e1000_probe(uint16_t addr, pci_id_t id) static int e1000_probe(uint16_t addr, pci_id_t id)
@@ -1149,14 +1182,14 @@ static int e1000_probe(uint16_t addr, pci_id_t id)
/* alloc memory for tx ring */ /* alloc memory for tx ring */
dev->tx_ring.desc = (struct tx_desc*)kmem; dev->tx_ring.desc = (FAR struct tx_desc *)kmem;
kmem += CONFIG_E1000_N_TX_DESC * sizeof(struct tx_desc); kmem += CONFIG_E1000_N_TX_DESC * sizeof(struct tx_desc);
dev->tx_ring.buf = kmem; dev->tx_ring.buf = kmem;
kmem += CONFIG_E1000_N_TX_DESC * CONFIG_E1000_BUFF_SIZE; kmem += CONFIG_E1000_N_TX_DESC * CONFIG_E1000_BUFF_SIZE;
/* alloc memory for rx rings */ /* alloc memory for rx rings */
dev->rx_ring.desc = (struct rx_desc*)kmem; dev->rx_ring.desc = (FAR struct rx_desc *)kmem;
kmem += CONFIG_E1000_N_RX_DESC * sizeof(struct rx_desc); kmem += CONFIG_E1000_N_RX_DESC * sizeof(struct rx_desc);
dev->rx_ring.buf = kmem; dev->rx_ring.buf = kmem;
+9 -9
View File
@@ -478,7 +478,7 @@ static uint8_t enc_rdgreg2(FAR struct enc_driver_s *priv, uint8_t cmd)
/* Select ENC28J60 chip */ /* Select ENC28J60 chip */
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);; SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
/* Send the read command and collect the data. The sequence requires /* Send the read command and collect the data. The sequence requires
* 16-clocks: 8 to clock out the cmd + 8 to clock in the data. * 16-clocks: 8 to clock out the cmd + 8 to clock in the data.
@@ -521,7 +521,7 @@ static void enc_wrgreg2(FAR struct enc_driver_s *priv, uint8_t cmd,
/* Select ENC28J60 chip */ /* Select ENC28J60 chip */
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);; SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
/* Send the write command and data. The sequence requires 16-clocks: /* Send the write command and data. The sequence requires 16-clocks:
* 8 to clock out the cmd + 8 to clock out the data. * 8 to clock out the cmd + 8 to clock out the data.
@@ -565,7 +565,7 @@ static inline void enc_src(FAR struct enc_driver_s *priv)
/* Select ENC28J60 chip */ /* Select ENC28J60 chip */
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);; SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
/* Send the system reset command. */ /* Send the system reset command. */
@@ -662,7 +662,7 @@ static uint8_t enc_rdbreg(FAR struct enc_driver_s *priv, uint8_t ctrlreg)
/* Re-select ENC28J60 chip */ /* Re-select ENC28J60 chip */
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);; SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
/* Send the RCR command and collect the data. How we collect the data /* Send the RCR command and collect the data. How we collect the data
* depends on if this is a PHY/CAN or not. The normal sequence requires * depends on if this is a PHY/CAN or not. The normal sequence requires
@@ -719,7 +719,7 @@ static void enc_wrbreg(FAR struct enc_driver_s *priv, uint8_t ctrlreg,
/* Re-select ENC28J60 chip */ /* Re-select ENC28J60 chip */
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);; SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
/* Send the WCR command and data. The sequence requires 16-clocks: /* Send the WCR command and data. The sequence requires 16-clocks:
* 8 to clock out the cmd + 8 to clock out the data. * 8 to clock out the cmd + 8 to clock out the data.
@@ -823,8 +823,8 @@ static void enc_rxdump(FAR struct enc_driver_s *priv)
static void enc_txdump(FAR struct enc_driver_s *priv) static void enc_txdump(FAR struct enc_driver_s *priv)
{ {
lowsyslog(LOG_DEBUG, "Tx Registers:\n"); lowsyslog(LOG_DEBUG, "Tx Registers:\n");
lowsyslog(LOG_DEBUG, " EIE: %02x EIR: %02x ESTAT: %02x\n", lowsyslog(LOG_DEBUG, " EIE: %02x EIR: %02x\n",
enc_rdgreg(priv, ENC_EIE), enc_rdgreg(priv, ENC_EIR),); enc_rdgreg(priv, ENC_EIE), enc_rdgreg(priv, ENC_EIR));
lowsyslog(LOG_DEBUG, " ESTAT: %02x ECON1: %02x\n", lowsyslog(LOG_DEBUG, " ESTAT: %02x ECON1: %02x\n",
enc_rdgreg(priv, ENC_ESTAT), enc_rdgreg(priv, ENC_ECON1)); enc_rdgreg(priv, ENC_ESTAT), enc_rdgreg(priv, ENC_ECON1));
lowsyslog(LOG_DEBUG, " ETXST: %02x %02x\n", lowsyslog(LOG_DEBUG, " ETXST: %02x %02x\n",
@@ -873,7 +873,7 @@ static void enc_rdbuffer(FAR struct enc_driver_s *priv, FAR uint8_t *buffer,
/* Select ENC28J60 chip */ /* Select ENC28J60 chip */
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);; SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
/* Send the read buffer memory command (ignoring the response) */ /* Send the read buffer memory command (ignoring the response) */
@@ -918,7 +918,7 @@ static inline void enc_wrbuffer(FAR struct enc_driver_s *priv,
* "The WBM command is started by lowering the CS pin. ..." * "The WBM command is started by lowering the CS pin. ..."
*/ */
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);; SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
/* Send the write buffer memory command (ignoring the response) /* Send the write buffer memory command (ignoring the response)
* *
+34 -34
View File
@@ -344,8 +344,8 @@ static int enc_txpoll(struct net_driver_s *dev);
/* Common RX logic */ /* Common RX logic */
static struct enc_descr_s *enc_rxgetdescr(FAR struct enc_driver_s *priv); static struct enc_descr_s *enc_rxgetdescr(FAR struct enc_driver_s *priv);
static void enc_rxldpkt(FAR struct enc_driver_s *priv, struct enc_descr_s *descr); static void enc_rxldpkt(FAR struct enc_driver_s *priv, FAR struct enc_descr_s *descr);
static void enc_rxrmpkt(FAR struct enc_driver_s *priv, struct enc_descr_s *descr); static void enc_rxrmpkt(FAR struct enc_driver_s *priv, FAR struct enc_descr_s *descr);
static void enc_rxdispatch(FAR struct enc_driver_s *priv); static void enc_rxdispatch(FAR struct enc_driver_s *priv);
/* Interrupt handling */ /* Interrupt handling */
@@ -499,7 +499,7 @@ static void enc_cmd(FAR struct enc_driver_s *priv, uint8_t cmd, uint16_t arg)
/* Select ENCX24J600 chip */ /* Select ENCX24J600 chip */
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);; SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
(void)SPI_SEND(priv->spi, cmd); /* Clock out the command */ (void)SPI_SEND(priv->spi, cmd); /* Clock out the command */
(void)SPI_SEND(priv->spi, arg & 0xff); /* Clock out the low byte */ (void)SPI_SEND(priv->spi, arg & 0xff); /* Clock out the low byte */
@@ -533,7 +533,7 @@ static inline void enc_setethrst(FAR struct enc_driver_s *priv)
/* Select ENC28J60 chip */ /* Select ENC28J60 chip */
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);; SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
/* Send the system reset command. */ /* Send the system reset command. */
@@ -651,7 +651,7 @@ static void enc_wrreg(FAR struct enc_driver_s *priv, uint16_t ctrlreg,
DEBUGASSERT(priv && priv->spi); DEBUGASSERT(priv && priv->spi);
DEBUGASSERT((ctrlreg & 0xe0) == 0); /* banked regeitsers only */ DEBUGASSERT((ctrlreg & 0xe0) == 0); /* banked regeitsers only */
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);; SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
enc_setbank(priv, GETBANK(ctrlreg)); enc_setbank(priv, GETBANK(ctrlreg));
@@ -729,7 +729,7 @@ static void enc_bfs(FAR struct enc_driver_s *priv, uint16_t ctrlreg,
/* Select ENCX24J600 chip */ /* Select ENCX24J600 chip */
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);; SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
/* Set the bank */ /* Set the bank */
@@ -774,7 +774,7 @@ static void enc_bfc(FAR struct enc_driver_s *priv, uint16_t ctrlreg,
/* Select ENCX24J600 chip */ /* Select ENCX24J600 chip */
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);; SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
/* Set the bank */ /* Set the bank */
@@ -842,8 +842,8 @@ static void enc_rxdump(FAR struct enc_driver_s *priv)
static void enc_txdump(FAR struct enc_driver_s *priv) static void enc_txdump(FAR struct enc_driver_s *priv)
{ {
lowsyslog(LOG_DEBUG, "Tx Registers:\n"); lowsyslog(LOG_DEBUG, "Tx Registers:\n");
lowsyslog(LOG_DEBUG, " EIE: %02x EIR: %02x ESTAT: %02x\n", lowsyslog(LOG_DEBUG, " EIE: %02x EIR: %02x\n",
enc_rdgreg(priv, ENC_EIE), enc_rdgreg(priv, ENC_EIR),); enc_rdgreg(priv, ENC_EIE), enc_rdgreg(priv, ENC_EIR));
lowsyslog(LOG_DEBUG, " ESTAT: %02x ECON1: %02x\n", lowsyslog(LOG_DEBUG, " ESTAT: %02x ECON1: %02x\n",
enc_rdgreg(priv, ENC_ESTAT), enc_rdgreg(priv, ENC_ECON1)); enc_rdgreg(priv, ENC_ESTAT), enc_rdgreg(priv, ENC_ECON1));
lowsyslog(LOG_DEBUG, " ETXST: %02x %02x\n", lowsyslog(LOG_DEBUG, " ETXST: %02x %02x\n",
@@ -932,7 +932,7 @@ static inline void enc_wrbuffer(FAR struct enc_driver_s *priv,
{ {
DEBUGASSERT(priv && priv->spi); DEBUGASSERT(priv && priv->spi);
SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);; SPI_SELECT(priv->spi, SPIDEV_ETHERNET, true);
SPI_SEND(priv->spi, ENC_WGPDATA); SPI_SEND(priv->spi, ENC_WGPDATA);
SPI_SNDBLOCK(priv->spi, buffer, buflen); SPI_SNDBLOCK(priv->spi, buffer, buflen);
@@ -1071,11 +1071,11 @@ static void enc_wrphy(FAR struct enc_driver_s *priv, uint8_t phyaddr,
static int enc_transmit(FAR struct enc_driver_s *priv) static int enc_transmit(FAR struct enc_driver_s *priv)
{ {
struct enc_descr_s *descr; FAR struct enc_descr_s *descr;
/* dequeue next packet to transmit */ /* dequeue next packet to transmit */
descr = (struct enc_descr_s*)sq_remfirst(&priv->txqueue); descr = (FAR struct enc_descr_s *)sq_remfirst(&priv->txqueue);
DEBUGASSERT(descr != NULL); DEBUGASSERT(descr != NULL);
@@ -1110,7 +1110,7 @@ static int enc_transmit(FAR struct enc_driver_s *priv)
/* free the descriptor */ /* free the descriptor */
sq_addlast((sq_entry_t*)descr, &priv->txfreedescr); sq_addlast((FAR sq_entry_t *)descr, &priv->txfreedescr);
return OK; return OK;
} }
@@ -1137,7 +1137,7 @@ static int enc_transmit(FAR struct enc_driver_s *priv)
static int enc_txenqueue(FAR struct enc_driver_s *priv) static int enc_txenqueue(FAR struct enc_driver_s *priv)
{ {
int ret = OK; int ret = OK;
struct enc_descr_s *descr; FAR struct enc_descr_s *descr;
DEBUGASSERT(priv->dev.d_len > 0); DEBUGASSERT(priv->dev.d_len > 0);
@@ -1147,7 +1147,7 @@ static int enc_txenqueue(FAR struct enc_driver_s *priv)
priv->stats.txrequests++; priv->stats.txrequests++;
#endif #endif
descr = (struct enc_descr_s*)sq_remfirst(&priv->txfreedescr); descr = (FAR struct enc_descr_s *)sq_remfirst(&priv->txfreedescr);
if (descr != NULL) if (descr != NULL)
{ {
@@ -1167,7 +1167,7 @@ static int enc_txenqueue(FAR struct enc_driver_s *priv)
/* enqueue packet */ /* enqueue packet */
sq_addlast((sq_entry_t*)descr, &priv->txqueue); sq_addlast((FAR sq_entry_t *)descr, &priv->txqueue);
/* if currently no transmission is active, trigger the transmission */ /* if currently no transmission is active, trigger the transmission */
@@ -1367,7 +1367,7 @@ static void enc_txif(FAR struct enc_driver_s *priv)
****************************************************************************/ ****************************************************************************/
static void enc_rxldpkt(FAR struct enc_driver_s *priv, static void enc_rxldpkt(FAR struct enc_driver_s *priv,
struct enc_descr_s *descr) FAR struct enc_descr_s *descr)
{ {
DEBUGASSERT(priv != NULL && descr != NULL); DEBUGASSERT(priv != NULL && descr != NULL);
@@ -1414,10 +1414,10 @@ static struct enc_descr_s *enc_rxgetdescr(FAR struct enc_driver_s *priv)
/* Packets are held in the enc's SRAM until the space is needed */ /* Packets are held in the enc's SRAM until the space is needed */
enc_rxrmpkt(priv, (struct enc_descr_s*)sq_peek(&priv->rxqueue)); enc_rxrmpkt(priv, (FAR struct enc_descr_s *)sq_peek(&priv->rxqueue));
} }
return (struct enc_descr_s*)sq_remfirst(&priv->rxfreedescr); return (FAR struct enc_descr_s *)sq_remfirst(&priv->rxfreedescr);
} }
/**************************************************************************** /****************************************************************************
@@ -1439,7 +1439,7 @@ static struct enc_descr_s *enc_rxgetdescr(FAR struct enc_driver_s *priv)
* *
****************************************************************************/ ****************************************************************************/
static void enc_rxrmpkt(FAR struct enc_driver_s *priv, struct enc_descr_s *descr) static void enc_rxrmpkt(FAR struct enc_driver_s *priv, FAR struct enc_descr_s *descr)
{ {
uint16_t addr; uint16_t addr;
@@ -1452,7 +1452,7 @@ static void enc_rxrmpkt(FAR struct enc_driver_s *priv, struct enc_descr_s *descr
if (descr != NULL) if (descr != NULL)
{ {
if (descr == (struct enc_descr_s*)sq_peek(&priv->rxqueue)) if (descr == (FAR struct enc_descr_s *)sq_peek(&priv->rxqueue))
{ {
/* Wrap address properly around */ /* Wrap address properly around */
addr = (descr->addr - PKTMEM_RX_START + descr->len - 2 + PKTMEM_RX_SIZE) addr = (descr->addr - PKTMEM_RX_START + descr->len - 2 + PKTMEM_RX_SIZE)
@@ -1472,10 +1472,10 @@ static void enc_rxrmpkt(FAR struct enc_driver_s *priv, struct enc_descr_s *descr
{ {
/* Remove packet from RX queue */ /* Remove packet from RX queue */
sq_rem((sq_entry_t*)descr, &priv->rxqueue); sq_rem((FAR sq_entry_t *)descr, &priv->rxqueue);
} }
sq_addlast((sq_entry_t*)descr, &priv->rxfreedescr); sq_addlast((FAR sq_entry_t *)descr, &priv->rxfreedescr);
} }
} }
@@ -1498,14 +1498,14 @@ static void enc_rxrmpkt(FAR struct enc_driver_s *priv, struct enc_descr_s *descr
static void enc_rxdispatch(FAR struct enc_driver_s *priv) static void enc_rxdispatch(FAR struct enc_driver_s *priv)
{ {
struct enc_descr_s *descr; FAR struct enc_descr_s *descr;
struct enc_descr_s *next; struct enc_descr_s *next;
int ret = ERROR; int ret = ERROR;
/* Process the RX queue */ /* Process the RX queue */
descr = (struct enc_descr_s*)sq_peek(&priv->rxqueue); descr = (FAR struct enc_descr_s *)sq_peek(&priv->rxqueue);
while (descr != NULL) while (descr != NULL)
{ {
@@ -1513,7 +1513,7 @@ static void enc_rxdispatch(FAR struct enc_driver_s *priv)
* flink to NULL * flink to NULL
*/ */
next = (struct enc_descr_s*)sq_next(descr); next = (FAR struct enc_descr_s *)sq_next(descr);
/* Load the packet from the enc's SRAM */ /* Load the packet from the enc's SRAM */
@@ -1674,7 +1674,7 @@ static void enc_rxdispatch(FAR struct enc_driver_s *priv)
static void enc_pktif(FAR struct enc_driver_s *priv) static void enc_pktif(FAR struct enc_driver_s *priv)
{ {
struct enc_descr_s *descr; FAR struct enc_descr_s *descr;
uint8_t rsv[8]; uint8_t rsv[8];
uint16_t pktlen; uint16_t pktlen;
uint32_t rxstat; uint32_t rxstat;
@@ -1736,7 +1736,7 @@ static void enc_pktif(FAR struct enc_driver_s *priv)
descr->addr = curpkt + 8; descr->addr = curpkt + 8;
descr->len = pktlen; descr->len = pktlen;
sq_addlast((sq_entry_t*)descr, &priv->rxqueue); sq_addlast((FAR sq_entry_t *)descr, &priv->rxqueue);
/* Check if the packet was received OK */ /* Check if the packet was received OK */
@@ -1810,7 +1810,7 @@ static void enc_pktif(FAR struct enc_driver_s *priv)
static void enc_rxabtif(FAR struct enc_driver_s *priv) static void enc_rxabtif(FAR struct enc_driver_s *priv)
{ {
struct enc_descr_s *descr; FAR struct enc_descr_s *descr;
#if 0 #if 0
/* Free the last received packet from the RX queue */ /* Free the last received packet from the RX queue */
@@ -1821,18 +1821,18 @@ static void enc_rxabtif(FAR struct enc_driver_s *priv)
nlldbg("ERXTAIL: %04x\n", enc_rdreg(priv, ENC_ERXTAIL)); nlldbg("ERXTAIL: %04x\n", enc_rdreg(priv, ENC_ERXTAIL));
nlldbg("ERXHAED: %04x\n", enc_rdreg(priv, ENC_ERXHEAD)); nlldbg("ERXHAED: %04x\n", enc_rdreg(priv, ENC_ERXHEAD));
descr = (struct enc_descr_s*)sq_peek(&priv->rxqueue); descr = (FAR struct enc_descr_s *)sq_peek(&priv->rxqueue);
while (descr != NULL) while (descr != NULL)
{ {
nlldbg("addr: %04x len: %d\n", descr->addr, descr->len); nlldbg("addr: %04x len: %d\n", descr->addr, descr->len);
descr = (struct enc_descr_s*)sq_next(descr); descr = (FAR struct enc_descr_s *)sq_next(descr);
} }
DEBUGASSERT(false); DEBUGASSERT(false);
#endif #endif
descr = (struct enc_descr_s*)sq_peek(&priv->rxqueue); descr = (FAR struct enc_descr_s *)sq_peek(&priv->rxqueue);
if (descr != NULL) if (descr != NULL)
{ {
@@ -2739,14 +2739,14 @@ static void enc_resetbuffers(FAR struct enc_driver_s *priv)
for (i = 0; i < ENC_NTXDESCR; i++) for (i = 0; i < ENC_NTXDESCR; i++)
{ {
priv->txdescralloc[i].addr = PKTMEM_START + PKTMEM_ALIGNED_BUFSIZE * i; priv->txdescralloc[i].addr = PKTMEM_START + PKTMEM_ALIGNED_BUFSIZE * i;
sq_addlast((sq_entry_t*)&priv->txdescralloc[i], &priv->txfreedescr); sq_addlast((FAR sq_entry_t *)&priv->txdescralloc[i], &priv->txfreedescr);
} }
/* Receive descriptors addresses are set on reception */ /* Receive descriptors addresses are set on reception */
for (i = 0; i < CONFIG_ENCX24J600_NRXDESCR; i++) for (i = 0; i < CONFIG_ENCX24J600_NRXDESCR; i++)
{ {
sq_addlast((sq_entry_t*)&priv->rxdescralloc[i], &priv->rxfreedescr); sq_addlast((FAR sq_entry_t *)&priv->rxdescralloc[i], &priv->rxfreedescr);
} }
} }
+8 -8
View File
@@ -316,7 +316,8 @@ static int ftmac100_transmit(FAR struct ftmac100_driver_s *priv)
priv->tx_pending++; priv->tx_pending++;
/* Enable Tx polling */ /* Enable Tx polling */
// FIXME: enable interrupts /* FIXME: enable interrupts */
putreg32(1, &iobase->txpd); putreg32(1, &iobase->txpd);
/* Setup the TX timeout watchdog (perhaps restarting the timer) */ /* Setup the TX timeout watchdog (perhaps restarting the timer) */
@@ -482,10 +483,10 @@ static void ftmac100_init(FAR struct ftmac100_driver_s *priv)
rxdes[i].rxdes0 = FTMAC100_RXDES0_RXDMA_OWN; rxdes[i].rxdes0 = FTMAC100_RXDES0_RXDMA_OWN;
rxdes[i].rxdes1 |= FTMAC100_RXDES1_RXBUF_SIZE(RX_BUF_SIZE); rxdes[i].rxdes1 |= FTMAC100_RXDES1_RXBUF_SIZE(RX_BUF_SIZE);
rxdes[i].rxdes2 = (unsigned int)(kmem + i * RX_BUF_SIZE); rxdes[i].rxdes2 = (unsigned int)(kmem + i * RX_BUF_SIZE);
rxdes[i].rxdes3 = (unsigned int)(rxdes + i + 1); // next ring rxdes[i].rxdes3 = (unsigned int)(rxdes + i + 1); /* Next ring */
} }
rxdes[CONFIG_FTMAC100_RX_DESC - 1].rxdes3 = (unsigned int)rxdes; // next ring rxdes[CONFIG_FTMAC100_RX_DESC - 1].rxdes3 = (unsigned int)rxdes; /* Next ring */
for (i = 0; i < CONFIG_FTMAC100_TX_DESC; i++) for (i = 0; i < CONFIG_FTMAC100_TX_DESC; i++)
{ {
@@ -495,11 +496,11 @@ static void ftmac100_init(FAR struct ftmac100_driver_s *priv)
txdes[i].txdes1 = 0; txdes[i].txdes1 = 0;
txdes[i].txdes2 = 0; txdes[i].txdes2 = 0;
txdes[i].txdes3 = 0; txdes[i].txdes3 = 0;
// txdes[i].txdes3 = (unsigned int)(txdes + i + 1); // next ring // txdes[i].txdes3 = (unsigned int)(txdes + i + 1); /* Next ring */
} }
txdes[CONFIG_FTMAC100_TX_DESC - 1].txdes1 = FTMAC100_TXDES1_EDOTR; txdes[CONFIG_FTMAC100_TX_DESC - 1].txdes1 = FTMAC100_TXDES1_EDOTR;
// txdes[CONFIG_FTMAC100_TX_DESC - 1].txdes3 = (unsigned int)txdes; // next ring //txdes[CONFIG_FTMAC100_TX_DESC - 1].txdes3 = (unsigned int)txdes; /* Next ring */
/* transmit ring */ /* transmit ring */
@@ -1536,8 +1537,7 @@ static int ftmac100_addmac(struct net_driver_s *dev, FAR const uint8_t *mac)
hash_value = crc32part(mac, 6, ~0L); hash_value = crc32part(mac, 6, ~0L);
/* /* The HASH Table is a register array of 2 32-bit registers.
* The HASH Table is a register array of 2 32-bit registers.
* It is treated like an array of 64 bits. We want to set * It is treated like an array of 64 bits. We want to set
* bit BitArray[hash_value]. So we figure out what register * bit BitArray[hash_value]. So we figure out what register
* the bit is in, read it, OR in the new bit, then write * the bit is in, read it, OR in the new bit, then write
@@ -1728,7 +1728,7 @@ int ftmac100_initialize(int intf)
priv->ft_dev.d_addmac = ftmac100_addmac; /* Add multicast MAC address */ priv->ft_dev.d_addmac = ftmac100_addmac; /* Add multicast MAC address */
priv->ft_dev.d_rmmac = ftmac100_rmmac; /* Remove multicast MAC address */ priv->ft_dev.d_rmmac = ftmac100_rmmac; /* Remove multicast MAC address */
#endif #endif
priv->ft_dev.d_private = (void*)g_ftmac100; /* Used to recover private state from dev */ priv->ft_dev.d_private = (FAR void *)g_ftmac100; /* Used to recover private state from dev */
/* Create a watchdog for timing polling for and timing of transmisstions */ /* Create a watchdog for timing polling for and timing of transmisstions */
+1 -1
View File
@@ -540,7 +540,7 @@ int localhost_initialize(void)
#ifdef CONFIG_NET_MULTIBUFFER #ifdef CONFIG_NET_MULTIBUFFER
priv->lo_dev.d_buf = g_iobuffer; /* Attach the IO buffer */ priv->lo_dev.d_buf = g_iobuffer; /* Attach the IO buffer */
#endif #endif
priv->lo_dev.d_private = (void*)priv; /* Used to recover private state from dev */ priv->lo_dev.d_private = (FAR void *)priv; /* Used to recover private state from dev */
/* Create a watchdog for timing polling for and timing of transmissions */ /* Create a watchdog for timing polling for and timing of transmissions */
+1 -1
View File
@@ -1204,7 +1204,7 @@ int skel_initialize(int intf)
priv->sk_dev.d_addmac = skel_addmac; /* Add multicast MAC address */ priv->sk_dev.d_addmac = skel_addmac; /* Add multicast MAC address */
priv->sk_dev.d_rmmac = skel_rmmac; /* Remove multicast MAC address */ priv->sk_dev.d_rmmac = skel_rmmac; /* Remove multicast MAC address */
#endif #endif
priv->sk_dev.d_private = (void*)g_skel; /* Used to recover private state from dev */ priv->sk_dev.d_private = (FAR void *)g_skel; /* Used to recover private state from dev */
/* Create a watchdog for timing polling for and timing of transmisstions */ /* Create a watchdog for timing polling for and timing of transmisstions */
+1 -6
View File
@@ -296,7 +296,6 @@ static void tun_pollnotify(FAR struct tun_device_s *priv, pollevent_t eventset)
if (eventset != 0) if (eventset != 0)
{ {
fds->revents |= eventset; fds->revents |= eventset;
//fvdbg("Report events: %02x\n", fds->revents);
sem_post(fds->sem); sem_post(fds->sem);
} }
} }
@@ -789,8 +788,6 @@ static int tun_txavail(struct net_driver_s *dev)
#if defined(CONFIG_NET_IGMP) || defined(CONFIG_NET_ICMPv6) #if defined(CONFIG_NET_IGMP) || defined(CONFIG_NET_ICMPv6)
static int tun_addmac(struct net_driver_s *dev, FAR const uint8_t *mac) static int tun_addmac(struct net_driver_s *dev, FAR const uint8_t *mac)
{ {
//FAR struct tun_device_s *priv = (FAR struct tun_device_s *)dev->d_private;
/* Add the MAC address to the hardware multicast routing table */ /* Add the MAC address to the hardware multicast routing table */
return OK; return OK;
@@ -818,8 +815,6 @@ static int tun_addmac(struct net_driver_s *dev, FAR const uint8_t *mac)
#ifdef CONFIG_NET_IGMP #ifdef CONFIG_NET_IGMP
static int tun_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac) static int tun_rmmac(struct net_driver_s *dev, FAR const uint8_t *mac)
{ {
//FAR struct tun_device_s *priv = (FAR struct tun_device_s *)dev->d_private;
/* Add the MAC address to the hardware multicast routing table */ /* Add the MAC address to the hardware multicast routing table */
return OK; return OK;
@@ -878,7 +873,7 @@ static int tun_dev_init(FAR struct tun_device_s *priv, FAR struct file *filep,
priv->dev.d_addmac = tun_addmac; /* Add multicast MAC address */ priv->dev.d_addmac = tun_addmac; /* Add multicast MAC address */
priv->dev.d_rmmac = tun_rmmac; /* Remove multicast MAC address */ priv->dev.d_rmmac = tun_rmmac; /* Remove multicast MAC address */
#endif #endif
priv->dev.d_private = (void*)priv; /* Used to recover private state from dev */ priv->dev.d_private = (FAR void *)priv; /* Used to recover private state from dev */
/* Initialize the wait semaphore */ /* Initialize the wait semaphore */
+20 -33
View File
@@ -103,12 +103,11 @@ struct vnet_driver_s
{ {
bool sk_bifup; /* true:ifup false:ifdown */ bool sk_bifup; /* true:ifup false:ifdown */
WDOG_ID sk_txpoll; /* TX poll timer */ WDOG_ID sk_txpoll; /* TX poll timer */
//WDOG_ID sk_txtimeout; /* TX timeout timer */
/* This holds the information visible to uIP/NuttX */
struct rgmp_vnet *vnet; struct rgmp_vnet *vnet;
struct net_driver_s sk_dev; /* Interface understood by uIP */
/* This holds the information visible to the NuttX */
struct net_driver_s sk_dev; /* Interface understood by the network */
}; };
/**************************************************************************** /****************************************************************************
@@ -185,10 +184,6 @@ static int vnet_transmit(FAR struct vnet_driver_s *vnet)
err = vnet_xmit(vnet->vnet, (char *)vnet->sk_dev.d_buf, vnet->sk_dev.d_len); err = vnet_xmit(vnet->vnet, (char *)vnet->sk_dev.d_buf, vnet->sk_dev.d_len);
if (err) if (err)
{ {
/* Setup the TX timeout watchdog (perhaps restarting the timer) */
//(void)wd_start(vnet->sk_txtimeout, VNET_TXTIMEOUT, vnet_txtimeout, 1, (uint32_t)vnet);
/* When vnet_xmit fail, it means TX buffer is full. Watchdog /* When vnet_xmit fail, it means TX buffer is full. Watchdog
* is of no use here because no TX done INT will happen. So * is of no use here because no TX done INT will happen. So
* we reset the TX buffer directly. * we reset the TX buffer directly.
@@ -213,8 +208,9 @@ static int vnet_transmit(FAR struct vnet_driver_s *vnet)
* Function: vnet_txpoll * Function: vnet_txpoll
* *
* Description: * Description:
* The transmitter is available, check if uIP has any outgoing packets ready * The transmitter is available, check if the network has any outgoing
* to send. This is a callback from devif_poll(). devif_poll() may be called: * packets ready to send. This is a callback from devif_poll().
* devif_poll() may be called:
* *
* 1. When the preceding TX packet send is complete, * 1. When the preceding TX packet send is complete,
* 2. When the preceding TX packet send timesout and the interface is reset * 2. When the preceding TX packet send timesout and the interface is reset
@@ -309,9 +305,9 @@ void rtos_vnet_recv(struct rgmp_vnet *rgmp_vnet, char *data, int len)
do do
{ {
/* Check for errors and update statistics */ /* Check if the packet is a valid size for the network buffer
* configuration.
/* Check if the packet is a valid size for the uIP buffer configuration */ */
if (len > CONFIG_NET_ETH_MTU || len < 14) if (len > CONFIG_NET_ETH_MTU || len < 14)
{ {
@@ -418,8 +414,9 @@ void rtos_vnet_recv(struct rgmp_vnet *rgmp_vnet, char *data, int len)
{ {
arp_arpin(&vnet->sk_dev); arp_arpin(&vnet->sk_dev);
/* If the above function invocation resulted in data that should be /* If the above function invocation resulted in data that should
* sent out on the network, the field d_len will set to a value > 0. * be sent out on the network, the field d_len will set to a
* value > 0.
*/ */
if (vnet->sk_dev.d_len > 0) if (vnet->sk_dev.d_len > 0)
@@ -451,15 +448,7 @@ void rtos_vnet_recv(struct rgmp_vnet *rgmp_vnet, char *data, int len)
static void vnet_txdone(FAR struct vnet_driver_s *vnet) static void vnet_txdone(FAR struct vnet_driver_s *vnet)
{ {
/* Check for errors and update statistics */ /* Poll the network for new XMIT data */
/* If no further xmits are pending, then cancel the TX timeout and
* disable further Tx interrupts.
*/
//wd_cancel(vnet->sk_txtimeout);
/* Then poll uIP for new XMIT data */
(void)devif_poll(&vnet->sk_dev, vnet_txpoll); (void)devif_poll(&vnet->sk_dev, vnet_txpoll);
} }
@@ -491,7 +480,7 @@ static void vnet_txtimeout(int argc, uint32_t arg, ...)
/* Then reset the hardware */ /* Then reset the hardware */
/* Then poll uIP for new XMIT data */ /* Then poll the network for new XMIT data */
(void)devif_poll(&vnet->sk_dev, vnet_txpoll); (void)devif_poll(&vnet->sk_dev, vnet_txpoll);
} }
@@ -530,9 +519,9 @@ static void vnet_polltimer(int argc, uint32_t arg, ...)
return; return;
} }
/* If so, update TCP timing states and poll uIP for new XMIT data. Hmmm.. /* If so, update TCP timing states and poll the network for new XMIT data.
* might be bug here. Does this mean if there is a transmit in progress, * Hmmm.. might be bug here. Does this mean if there is a transmit in
* we will missing TCP time state updates? * progress, we will missing TCP time state updates?
*/ */
(void)devif_timer(&vnet->sk_dev, vnet_txpoll, VNET_POLLHSEC); (void)devif_timer(&vnet->sk_dev, vnet_txpoll, VNET_POLLHSEC);
@@ -605,7 +594,6 @@ static int vnet_ifdown(struct net_driver_s *dev)
/* Cancel the TX poll timer and TX timeout timers */ /* Cancel the TX poll timer and TX timeout timers */
wd_cancel(vnet->sk_txpoll); wd_cancel(vnet->sk_txpoll);
//wd_cancel(vnet->sk_txtimeout);
/* Put the EMAC is its reset, non-operational state. This should be /* Put the EMAC is its reset, non-operational state. This should be
* a known configuration that will guarantee the vnet_ifup() always * a known configuration that will guarantee the vnet_ifup() always
@@ -663,7 +651,7 @@ static int vnet_txavail(struct net_driver_s *dev)
goto out; goto out;
} }
/* If so, then poll uIP for new XMIT data */ /* If so, then poll the network for new XMIT data */
(void)devif_poll(&vnet->sk_dev, vnet_txpoll); (void)devif_poll(&vnet->sk_dev, vnet_txpoll);
} }
@@ -774,12 +762,11 @@ int vnet_init(struct rgmp_vnet *vnet)
priv->sk_dev.d_addmac = vnet_addmac; /* Add multicast MAC address */ priv->sk_dev.d_addmac = vnet_addmac; /* Add multicast MAC address */
priv->sk_dev.d_rmmac = vnet_rmmac; /* Remove multicast MAC address */ priv->sk_dev.d_rmmac = vnet_rmmac; /* Remove multicast MAC address */
#endif #endif
priv->sk_dev.d_private = (void*)priv; /* Used to recover private state from dev */ priv->sk_dev.d_private = (FAR void *)priv; /* Used to recover private state from dev */
/* Create a watchdog for timing polling for and timing of transmisstions */ /* Create a watchdog for timing polling for and timing of transmisstions */
priv->sk_txpoll = wd_create(); /* Create periodic poll timer */ priv->sk_txpoll = wd_create(); /* Create periodic poll timer */
//priv->sk_txtimeout = wd_create(); /* Create TX timeout timer */
priv->vnet = vnet; priv->vnet = vnet;
vnet->priv = priv; vnet->priv = priv;

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