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arch/risc-v/espressif/esp32p4: Support ESP32-P4 on NuttX

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This commit adds support for the Espressif's RISC-V-based ESP32-P4
chip along with its ESP32-P4-Function-EV-Board board.

Signed-off-by: Tiago Medicci Serrano <tiago.medicci@espressif.com>
This commit is contained in:
Tiago Medicci Serrano
2025-06-10 15:49:12 -03:00
committed by CeDeROM
parent 43f65ce751
commit cda4af9f00
98 changed files with 9668 additions and 46 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/risc-v/Kconfig
+36 -3
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@@ -124,7 +124,6 @@ config ARCH_CHIP_ESP32C3
select LIBC_ARCH_STRLEN
select LIBC_ARCH_STRNLEN
select ESPRESSIF_SOC_RTC_MEM_SUPPORTED
select ARCH_CHIP_ESPRESSIF
select ARCH_HAVE_DEBUG
select ARCH_HAVE_RAMFUNCS
select ONESHOT_COUNT if ONESHOT
@@ -159,7 +158,6 @@ config ARCH_CHIP_ESP32C6
select LIBC_ARCH_STRLEN
select LIBC_ARCH_STRNLEN
select ESPRESSIF_SOC_RTC_MEM_SUPPORTED
select ARCH_CHIP_ESPRESSIF
select ARCH_HAVE_RAMFUNCS
select ONESHOT_COUNT if ONESHOT
select ONESHOT_FAST_DIVISION if ONESHOT
@@ -192,7 +190,6 @@ config ARCH_CHIP_ESP32H2
select LIBC_ARCH_STRLEN
select LIBC_ARCH_STRNLEN
select ESPRESSIF_SOC_RTC_MEM_SUPPORTED
select ARCH_CHIP_ESPRESSIF
select ARCH_HAVE_RAMFUNCS
select ONESHOT_COUNT if ONESHOT
select ONESHOT_FAST_DIVISION if ONESHOT
@@ -200,6 +197,38 @@ config ARCH_CHIP_ESP32H2
---help---
Espressif ESP32-H2 (RV32IMC).
config ARCH_CHIP_ESP32P4
bool "ESP32-P4"
select ARCH_RV32
select ARCH_RV_ISA_M
select ARCH_RV_ISA_A
select ARCH_RV_ISA_C
select ARCH_VECNOTIRQ
select ARCH_HAVE_BOOTLOADER if !ESPRESSIF_SIMPLE_BOOT
select ARCH_HAVE_I2CRESET
select ARCH_HAVE_MPU
select ARCH_HAVE_RESET
select ARCH_HAVE_RNG
select ARCH_HAVE_TICKLESS
select ARCH_HAVE_MULTICPU
select LIBC_ARCH_MEMCPY
select LIBC_ARCH_MEMCHR
select LIBC_ARCH_MEMCMP
select LIBC_ARCH_MEMMOVE
select LIBC_ARCH_MEMSET
select LIBC_ARCH_STRCHR
select LIBC_ARCH_STRCMP
select LIBC_ARCH_STRCPY
select LIBC_ARCH_STRLCPY
select LIBC_ARCH_STRNCPY
select LIBC_ARCH_STRLEN
select LIBC_ARCH_STRNLEN
select ARCH_HAVE_RAMFUNCS
select ONESHOT_COUNT if ONESHOT
select ARCH_MINIMAL_VECTORTABLE
---help---
Espressif ESP32-P4 (RV32IMC).
config ARCH_CHIP_C906
bool "THEAD C906"
select ARCH_RV64
@@ -606,6 +635,7 @@ config ARCH_CHIP
default "esp32c3" if ARCH_CHIP_ESP32C3
default "esp32c6" if ARCH_CHIP_ESP32C6
default "esp32h2" if ARCH_CHIP_ESP32H2
default "esp32p4" if ARCH_CHIP_ESP32P4
default "c906" if ARCH_CHIP_C906
default "mpfs" if ARCH_CHIP_MPFS
default "rv32m1" if ARCH_CHIP_RV32M1
@@ -846,6 +876,9 @@ endif
if ARCH_CHIP_ESP32H2
source "arch/risc-v/src/esp32h2/Kconfig"
endif
if ARCH_CHIP_ESP32P4
source "arch/risc-v/src/esp32p4/Kconfig"
endif
if ARCH_CHIP_C906
source "arch/risc-v/src/c906/Kconfig"
endif
arch/risc-v/include/esp32p4/.gitignore
+2
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@@ -0,0 +1,2 @@
/gpio_sig_map.h
/irq.h
arch/risc-v/include/esp32p4/chip.h
+34
View File
@@ -0,0 +1,34 @@
/****************************************************************************
* arch/risc-v/include/esp32p4/chip.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_RISCV_INCLUDE_ESP32P4_CHIP_H
#define __ARCH_RISCV_INCLUDE_ESP32P4_CHIP_H
/****************************************************************************
* Included Files
****************************************************************************/
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#endif /* __ARCH_RISCV_INCLUDE_ESP32P4_CHIP_H */
arch/risc-v/src/common/espressif/Kconfig
+282 -32
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File diff suppressed because it is too large Load Diff
arch/risc-v/src/common/espressif/esp_adc.c
+16 -1
View File
@@ -67,6 +67,12 @@
_count; \
})
#ifdef CONFIG_ARCH_CHIP_ESP32P4
# define PIN_FUNCTION FUNCTION_1
#else
# define PIN_FUNCTION FUNCTION_2
#endif
/****************************************************************************
* Private Types
****************************************************************************/
@@ -571,7 +577,7 @@ static int esp_adc_oneshot_config_channel(struct adc_dev_s *dev,
/* Configure GPIO for ADC */
gpio = ADC_GET_IO_NUM(priv->unit, channel);
ret = esp_configgpio(gpio, FUNCTION_2);
ret = esp_configgpio(gpio, PIN_FUNCTION);
if (ret < 0)
{
aerr("ERROR: Failed to configure GPIO %d\n", gpio);
@@ -745,6 +751,15 @@ struct adc_dev_s *esp_adc_initialize(int adc_num,
#endif
}
case 2:
{
#ifdef CONFIG_ESPRESSIF_ADC_2
dev = &g_adcdev2;
priv = &g_adcpriv2;
#endif
break;
}
default:
{
aerr("ERROR: Unsupported ADC number: %d\n", adc_num);
arch/risc-v/src/common/espressif/esp_serial.c
+4
View File
@@ -847,7 +847,11 @@ static bool esp_txempty(uart_dev_t *dev)
{
struct esp_uart_s *priv = dev->priv;
#if defined(CONFIG_ARCH_CHIP_ESP32P4)
return priv->hal->dev->int_raw.txfifo_empty_int_raw != 0;
#else
return priv->hal->dev->int_raw.txfifo_empty != 0;
#endif
}
/****************************************************************************
arch/risc-v/src/common/espressif/esp_start.c
+7
View File
@@ -58,6 +58,10 @@
#include "rom/cache.h"
#include "soc/soc.h"
#include "soc/soc_caps.h"
#ifdef CONFIG_ARCH_CHIP_ESP32P4
# include "soc/hp_peri_pms_reg.h"
# include "soc/lp_peri_pms_reg.h"
#endif
#include "soc/rtc.h"
#include "bootloader_init.h"
@@ -172,6 +176,7 @@ extern int ets_printf(const char *fmt, ...) printf_like(1, 2);
#endif
extern void cache_set_idrom_mmu_size(uint32_t irom_size, uint32_t drom_size);
extern void ets_delay_us(uint32_t us);
/****************************************************************************
* Private Function Prototypes
@@ -577,6 +582,8 @@ void __esp_start(void)
riscv_earlyserialinit();
#endif
esp_chip_revision_check();
showprogress("A");
/* Setup the syscall table needed by the ROM code */
arch/risc-v/src/common/espressif/esp_timerisr.c
+5 -1
View File
@@ -51,7 +51,11 @@
# define SYSTIMER_TRIGGER_TYPE ESP_IRQ_TRIGGER_EDGE
#endif /* SOC_SYSTIMER_INT_LEVEL */
#define CHIP_SYSTIMER_SOURCE SYSTIMER_TARGET0_EDGE_INTR_SOURCE
#if defined(CONFIG_ARCH_CHIP_ESP32P4)
# define CHIP_SYSTIMER_SOURCE SYSTIMER_TARGET0_INTR_SOURCE
#else
# define CHIP_SYSTIMER_SOURCE SYSTIMER_TARGET0_EDGE_INTR_SOURCE
#endif
/****************************************************************************
* Private Data
arch/risc-v/src/common/espressif/esp_twai.c
+3 -1
View File
@@ -96,8 +96,10 @@
# endif
#endif
#ifdef CONFIG_ARCH_CHIP_ESP32C3
#if defined(CONFIG_ARCH_CHIP_ESP32C3)
# define INT_ENA_REG(hw) hw->interrupt_enable_reg.val
#elif defined(CONFIG_ARCH_CHIP_ESP32P4)
# define INT_ENA_REG(hw) hw->interrupt_ena.val
#else
# define INT_ENA_REG(hw) hw->interrupt_enable.val
#endif /* CONFIG_ARCH_CHIP_ESP32C3 */
arch/risc-v/src/common/espressif/esp_vectors.S
+126 -4
View File
@@ -30,28 +30,69 @@
#include "chip.h"
#include "sdkconfig.h"
#include "soc/soc.h"
/****************************************************************************
* Public Symbols
****************************************************************************/
.global _vector_table
#ifdef CONFIG_SOC_INT_CLIC_SUPPORTED
.global _mtvt_table
#endif
/****************************************************************************
* Section: .exception_vectors.text
****************************************************************************/
.section .exception_vectors.text
/* Prevent the compiler from generating 2-byte instruction in the vector tables */
.option push
.option norvc
/****************************************************************************
* Name: _vector_table
****************************************************************************/
.balign 0x100
#ifdef CONFIG_SOC_INT_CLIC_SUPPORTED
/* Non-hardware vectored interrupt entry. MTVEC CSR points here.
*
* On targets that use CLIC as their interrupt controller, when an exception occurs, the CPU
* jumps to the address stored in MTVEC[31:6] << 6. The CPU will also jump to this location
* if an interrupt is configured as non-vectored (CLIC_INT_ATTR.shv = 0).
*
* Because of the left-shift `<< 6`, this entry must be aligned on 64.
*/
.balign 0x40
.type _vector_table, @function
_vector_table:
j exception_common
nop
#else /* CONFIG_SOC_INT_PLIC_SUPPORTED */
/* This is the vector table. MTVEC points here.
*
* Use 4-byte instructions here. 1 instruction = 1 entry of the table.
* The CPU jumps to MTVEC (i.e. the first entry) in case of an exception,
* and (MTVEC & 0xfffffffc) + (mcause & 0x7fffffff) * 4, in case of an
* interrupt.
*
* Note: for our CPU, we need to place this on a 256-byte boundary, as CPU
* only uses the 24 MSBs of the MTVEC, i.e. (MTVEC & 0xffffff00).
*/
.balign 0x100
.type _vector_table, @function
_vector_table:
.option push
.option norvc
j _panic_handler /* 0: Exception entry */
j exception_common /* 1: Free interrupt number */
@@ -86,6 +127,8 @@ _vector_table:
j exception_common /* 30: Free interrupt number */
j exception_common /* 31: Free interrupt number */
#endif
/****************************************************************************
* Name: exception_common
*
@@ -98,4 +141,83 @@ _vector_table:
.global _panic_handler
_panic_handler:
j exception_common /* Dispatch the system call */
j exception_common /* Dispatch the system call */#endif
/****************************************************************************
* Name: _mtvt_table
****************************************************************************/
#ifdef CONFIG_SOC_INT_CLIC_SUPPORTED
/* Vectored interrupt table. MTVT CSR points here.
*
* If an interrupt occurs and is configured as (hardware) vectored, the CPU
* will jump to MTVT[31:0] + 4 * interrupt_id
*
* In the case of the ESP32P4, the interrupt matrix, between the CPU
* interrupt lines and the peripherals, offers 32 lines. As such, the
* interrupt_id between 0 and 31.
*
* Since the interrupts are initialized as vectored on CPU start, we can
* manage the special interrupts ETS_T1_WDT_INUM, ETS_CACHEERR_INUM and
* ETS_MEMPROT_ERR_INUM here.
*/
.balign 0x40
.type _mtvt_table, @function
_mtvt_table:
.word exception_common /* 0: System interrupt number. Exceptions are non-vectored, won't load this. */
.word exception_common /* 1: System interrupt number */
.word exception_common /* 2: System interrupt number */
.word exception_common /* 3: System interrupt number */
.word exception_common /* 4: System interrupt number */
.word exception_common /* 5: System interrupt number */
.word exception_common /* 6: System interrupt number */
.word exception_common /* 7: System interrupt number */
.word exception_common /* 8: System interrupt number */
.word exception_common /* 9: System interrupt number */
.word exception_common /* 10: System interrupt number */
.word exception_common /* 11: System interrupt number */
.word exception_common /* 12: System interrupt number */
.word exception_common /* 13: System interrupt number */
.word exception_common /* 14: System interrupt number */
.word exception_common /* 15: System interrupt number */
.word exception_common /* 16: Free interrupt number */
.word exception_common /* 17: Free interrupt number */
.word exception_common /* 18: Free interrupt number */
.word exception_common /* 19: Free interrupt number */
.word exception_common /* 20: Free interrupt number */
.word exception_common /* 21: Free interrupt number */
.word exception_common /* 22: Free interrupt number */
.word exception_common /* 23: Free interrupt number */
.word exception_common /* 24: Free interrupt number */
.word exception_common /* 25: Free interrupt number */
.word exception_common /* 26: Free interrupt number */
.word exception_common /* 27: Free interrupt number */
.word exception_common /* 28: Free interrupt number */
.word exception_common /* 29: Free interrupt number */
.word exception_common /* 30: Free interrupt number */
.word exception_common /* 31: Free interrupt number */
.word exception_common /* 32: Free interrupt number */
.word exception_common /* 33: Free interrupt number */
.word exception_common /* 34: Free interrupt number */
.word exception_common /* 35: Free interrupt number */
.word exception_common /* 36: Free interrupt number */
.word exception_common /* 37: Free interrupt number */
.word exception_common /* 38: Free interrupt number */
.word exception_common /* 39: Free interrupt number */
.word exception_common /* 40: ETS_INT_WDT_INUM (+16) panic-interrupt (soc-level panic) */
.word exception_common /* 41: ETS_CACHEERR_INUM (+16) panic-interrupt (soc-level panic) */
.word exception_common /* 42: ETS_MEMPROT_ERR_INUM (+16) handler (soc-level panic) */
.word exception_common /* 43: ETS_ASSIST_DEBUG_INUM (+16) handler (soc-level panic) */
.word exception_common /* 44: ETS_IPC_ISR_INUM (+16) handler*/
.word exception_common /* 45: Free interrupt number */
.word exception_common /* 46: Free interrupt number */
.word exception_common /* 47: Free interrupt number */
.size _mtvt_table, .-_mtvt_table
#endif
/* Re-enable the compressed instruction set it is was enabled before */
.option pop
arch/risc-v/src/common/espressif/esp_wdt.c
+3 -1
View File
@@ -110,7 +110,9 @@
#define XT_WDT_CLK_CAL_CYCLES (500)
#if defined(CONFIG_ARCH_CHIP_ESP32C6) || defined(CONFIG_ARCH_CHIP_ESP32H2)
#if defined(CONFIG_ARCH_CHIP_ESP32C6) || \
defined(CONFIG_ARCH_CHIP_ESP32H2) || \
defined(CONFIG_ARCH_CHIP_ESP32P4)
# define RTC_CORE_INTR_SOURCE ETS_LP_WDT_INTR_SOURCE
# define ESP_IRQ_RTC_CORE ESP_SOURCE2IRQ(ETS_LP_WDT_INTR_SOURCE)
#endif
arch/risc-v/src/common/riscv_exception_common.S
+9
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@@ -87,6 +87,10 @@
# define EXCEPTION_SECTION .text
#endif
/* Valid exceptions causes range is from 0 to 63 */
#define CAUSE_EXCEPTION 63
/****************************************************************************
* Public Symbols
****************************************************************************/
@@ -161,6 +165,11 @@ exception_common:
blt s2, x0, handle_irq /* If cause < 0 it is interrupt */
/* Adjust exception cause range from 0 to 63 */
li s3, CAUSE_EXCEPTION
and s2, s2, s3
/* Is it a system call ? */
li s3, RISCV_IRQ_ECALLU /* Is it a system call ? */
arch/risc-v/src/esp32c3/Make.defs
+2
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@@ -23,6 +23,8 @@
include common/Make.defs
include common/espressif/Make.defs
CHIP_CSRCS += esp_chip_rev.c
# Wireless interfaces.
ifeq ($(CONFIG_ESPRESSIF_WIFI),y)
arch/risc-v/src/esp32c3/esp_chip_rev.c
+50
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@@ -0,0 +1,50 @@
/****************************************************************************
* arch/risc-v/src/esp32c3/esp_chip_rev.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: esp_chip_revision_check
*
* Description:
* Checks if the current chip revision is greater than the minimum
* revision supported by NuttX. If the chip revision is not supported, an
* error or warning message is printed, and the system may halt unless
* the configuration allows ignoring the chip revision check.
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
void esp_chip_revision_check(void)
{
}
arch/risc-v/src/esp32c6/Make.defs
+2
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@@ -23,6 +23,8 @@
include common/Make.defs
include common/espressif/Make.defs
CHIP_CSRCS += esp_chip_rev.c
# Wireless interfaces.
ifeq ($(CONFIG_ESPRESSIF_WIFI),y)
arch/risc-v/src/esp32c6/esp_chip_rev.c
+50
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@@ -0,0 +1,50 @@
/****************************************************************************
* arch/risc-v/src/esp32c6/esp_chip_rev.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: esp_chip_revision_check
*
* Description:
* Checks if the current chip revision is greater than the minimum
* revision supported by NuttX. If the chip revision is not supported, an
* error or warning message is printed, and the system may halt unless
* the configuration allows ignoring the chip revision check.
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
void esp_chip_revision_check(void)
{
}
arch/risc-v/src/esp32h2/Make.defs
+2
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@@ -23,4 +23,6 @@
include common/Make.defs
include common/espressif/Make.defs
CHIP_CSRCS += esp_chip_rev.c
CFLAGS += ${DEFINE_PREFIX}_RETARGETABLE_LOCKING
arch/risc-v/src/esp32h2/esp_chip_rev.c
+50
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@@ -0,0 +1,50 @@
/****************************************************************************
* arch/risc-v/src/esp32h2/esp_chip_rev.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: esp_chip_revision_check
*
* Description:
* Checks if the current chip revision is greater than the minimum
* revision supported by NuttX. If the chip revision is not supported, an
* error or warning message is printed, and the system may halt unless
* the configuration allows ignoring the chip revision check.
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
void esp_chip_revision_check(void)
{
}
arch/risc-v/src/esp32p4/.gitignore
+4
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@@ -0,0 +1,4 @@
/bootloader
/esp-nuttx-bootloader
/*.zip
/esp-hal-3rdparty
arch/risc-v/src/esp32p4/Kconfig
+95
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@@ -0,0 +1,95 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
if ARCH_CHIP_ESP32P4
source "arch/risc-v/src/common/espressif/Kconfig"
config ESP32P4_SELECTS_REV_LESS_V3
bool "Select ESP32-P4 revisions <3.0 (No >=3.x Support)"
default n
---help---
Select this option to support ESP32-P4 revisions 0.x and 1.x.
Revisions higher than 3.0 (included) and revisions less than 3.0
have huge hardware difference.
Revisions higher than 3.0 (included) is not compatible with 0.x and 1.x.
choice ESP32P4_REV_MIN
prompt "Minimum Supported ESP32-P4 Revision"
default ESP32P4_REV_MIN_1
---help---
Required minimum chip revision. ESP-IDF will check for it and
reject to boot if the chip revision fails the check.
This ensures the chip used will have some modifications (features, or bugfixes).
The complied binary will only support chips above this revision,
this will also help to reduce binary size.
config ESP32P4_REV_MIN_0
depends on ESP32P4_SELECTS_REV_LESS_V3
bool "Rev v0.0"
config ESP32P4_REV_MIN_1
depends on ESP32P4_SELECTS_REV_LESS_V3
bool "Rev v0.1"
config ESP32P4_REV_MIN_100
depends on ESP32P4_SELECTS_REV_LESS_V3
bool "Rev v1.0"
config ESP32P4_REV_MIN_300
bool "Rev v3.0"
depends on !ESP32P4_SELECTS_REV_LESS_V3
endchoice
config ESP32P4_REV_MIN_FULL
int
default 0 if ESP32P4_REV_MIN_0
default 1 if ESP32P4_REV_MIN_1
default 100 if ESP32P4_REV_MIN_100
default 300 if ESP32P4_REV_MIN_300
config ESP_REV_MIN_FULL
int
default ESP32P4_REV_MIN_FULL
config ESP32P4_REV_MAX_FULL
int
default 399 if !ESP32P4_SELECTS_REV_LESS_V3
default 199 if ESP32P4_SELECTS_REV_LESS_V3
# keep in sync the "Maximum Supported Revision" description with this value
config ESP_REV_MAX_FULL
int
default ESP32P4_REV_MAX_FULL
config ESP_EFUSE_BLOCK_REV_MIN_FULL
int "Minimum Supported ESP32-P4 eFuse Block Revision"
default 0
---help---
Required minimum eFuse Block revision. ESP-IDF will check it at the 2nd bootloader stage
whether the current image can work correctly for this eFuse Block revision.
So that to avoid running an incompatible image on a SoC that contains breaking change in the eFuse Block.
If you want to update this value to run the image that not compatible with the current eFuse Block revision,
please contact to Espressif's business team for details:
https://www.espressif.com.cn/en/contact-us/sales-questions
config ESP_EFUSE_BLOCK_REV_MAX_FULL
int
default 199
comment "Maximum Supported ESP32-P4 eFuse Block Revision (eFuse Block Rev v0.99)"
# The revision in the comment must correspond to the default value of ESP_EFUSE_BLOCK_REV_MAX_FULL
endif # ARCH_CHIP_ESP32P4
config P4_REV3_MSPI_CRASH_AFTER_POWER_UP_WORKAROUND
bool
default y if ESP32P4_REV_MIN_300
config P4_REV3_MSPI_WORKAROUND_SIZE
hex
default 0x100 if ESP32P4_REV_MIN_300
default 0
arch/risc-v/src/esp32p4/Make.defs
+28
View File
@@ -0,0 +1,28 @@
############################################################################
# arch/risc-v/src/esp32p4/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
include common/Make.defs
include common/espressif/Make.defs
CHIP_CSRCS += esp_chip_rev.c
CFLAGS += ${DEFINE_PREFIX}_RETARGETABLE_LOCKING
arch/risc-v/src/esp32p4/esp_chip_rev.c
+85
View File
@@ -0,0 +1,85 @@
/****************************************************************************
* arch/risc-v/src/esp32p4/esp_chip_rev.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include "hal/efuse_hal.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define ESP32P4_MIN_FULLY_SUPPORTED_VERSION 300
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* ROM Function Prototypes
****************************************************************************/
extern int ets_printf(const char *fmt, ...) printf_like(1, 2);
/****************************************************************************
* Name: esp_chip_revision_check
*
* Description:
* Checks if the current chip revision is greater than the minimum
* revision supported by NuttX. If the chip revision is not supported, an
* error or warning message is printed, and the system may halt unless
* the configuration allows ignoring the chip revision check.
*
* Input Parameters:
* None
*
* Returned Value:
* None
*
****************************************************************************/
void esp_chip_revision_check(void)
{
uint32_t chip_rev = efuse_hal_chip_revision();
if (chip_rev < ESP32P4_MIN_FULLY_SUPPORTED_VERSION)
{
#ifndef ESP32P4_IGNORE_CHIP_REVISION_CHECK
ets_printf("ERROR: NuttX supports ESP32-P4 chip revision > v%d.%01d"
" (chip revision is v%" PRIu32 ".%" PRIu32 ")\n",
ESP32P4_MIN_FULLY_SUPPORTED_VERSION / 100,
ESP32P4_MIN_FULLY_SUPPORTED_VERSION % 100,
chip_rev / 100, chip_rev % 100);
PANIC();
#endif
ets_printf("WARNING: NuttX supports ESP32-P4 chip revision > v%d.%01d"
" (chip revision is v%" PRIu32 ".%" PRIu32 ").\n"
"Ignoring this error and continuing because "
"`ESP32P4_IGNORE_CHIP_REVISION_CHECK` is set...\n"
"THIS MAY NOT WORK! DON'T USE THIS CHIP IN PRODUCTION!\n",
ESP32P4_MIN_FULLY_SUPPORTED_VERSION / 100,
ESP32P4_MIN_FULLY_SUPPORTED_VERSION % 100,
chip_rev / 100, chip_rev % 100);
}
}
arch/risc-v/src/esp32p4/hal_esp32p4.mk
+369
View File
@@ -0,0 +1,369 @@
############################################################################
# arch/risc-v/src/esp32c6/esp32p4.mk
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
############################################################################
# Include header paths
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)include$(DELIM)mbedtls
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)esp_libc$(DELIM)platform_include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)private_include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)private_include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)private_include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)interface
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_app_format$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_blockdev$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_common$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_cam$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_cam$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_clock$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_clock$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_emac$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_emac$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpio$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpio$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpspi$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpspi$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2c$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2c$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2s$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2s$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_lcd$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_lcd$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ledc$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ledc$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mcpwm$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mcpwm$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_parlio$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_parlio$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_pcnt$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_pcnt$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_pmu$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_pmu$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_rmt$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_rmt$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_rtc_timer$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_rtc_timer$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_security$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_security$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_timg$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_timg$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_touch_sens$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_touch_sens$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_twai$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_twai$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_uart$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_uart$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_usb$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_usb$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_wdt$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_wdt$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)dma$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)etm$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include$(DELIM)esp_private
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include$(DELIM)soc
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)include$(DELIM)soc$(DELIM)$(CHIP_SERIES)
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)ldo$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi$(DELIM)mspi_intr$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi$(DELIM)mspi_timing_tuning$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi$(DELIM)mspi_timing_tuning$(DELIM)port$(DELIM)$(CHIP_SERIES)
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi$(DELIM)mspi_timing_tuning$(DELIM)tuning_scheme_impl$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)private_include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)power_supply$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_libc$(DELIM)priv_include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_pm$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)include$(DELIM)$(CHIP_SERIES)
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_security$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)ld
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)include$(DELIM)private
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)public_compat
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_timer$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)platform_port$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)heap$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)tf-psa-crypto$(DELIM)core
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)tf-psa-crypto$(DELIM)drivers$(DELIM)builtin$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)mbedtls$(DELIM)tf-psa-crypto$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)port$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)port$(DELIM)include$(DELIM)aes
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)mbedtls$(DELIM)port$(DELIM)psa_driver$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)include
ifeq ($(CONFIG_ESP32P4_SELECTS_REV_LESS_V3),y)
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)register$(DELIM)hw_ver1
else
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)register$(DELIM)hw_ver3
endif
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)include$(DELIM)esp_flash_chips
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)src
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_gpio$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_rmt$(DELIM)include
INCLUDES += $(INCDIR_PREFIX)$(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_rmt$(DELIM)src
# Linker scripts
ifeq ($(CONFIG_ESP32P4_REV_MIN_300),y)
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.eco5.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.eco5.libc.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.eco5.libgcc.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.eco5.newlib.ld
else
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libc.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libgcc.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.newlib.ld
endif
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.api.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.version.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.libc-suboptimal_for_misaligned_mem.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).rom.systimer.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)ld$(DELIM)$(CHIP_SERIES).peripherals.ld
ARCHSCRIPT += $(ARCH_SRCDIR)$(DELIM)chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)ld$(DELIM)rom.api.ld
# Source files
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_efuse.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_init.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)esp_image_format.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)flash_encrypt.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_fields.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_rtc_calib.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_table.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)$(CHIP_SERIES)$(DELIM)esp_efuse_utility.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)efuse_controller$(DELIM)keys$(DELIM)with_key_purposes$(DELIM)esp_efuse_api_key.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_api.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_utility.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)$(CHIP_SERIES)$(DELIM)curve_fitting_coefficients.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)adc_cali_curve_fitting.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_adc$(DELIM)adc_cali.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)$(CHIP_SERIES)$(DELIM)adc_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)$(CHIP_SERIES)$(DELIM)temperature_sensor_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)adc_hal_common.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ana_conv$(DELIM)adc_oneshot_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_clock$(DELIM)$(CHIP_SERIES)$(DELIM)clk_tree_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)$(CHIP_SERIES)$(DELIM)gdma_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)gdma_hal_ahb_v2.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)gdma_hal_axi.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)gdma_hal_crc_gen.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_dma$(DELIM)gdma_hal_top.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpio$(DELIM)$(CHIP_SERIES)$(DELIM)dedic_gpio_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpio$(DELIM)$(CHIP_SERIES)$(DELIM)sdm_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpio$(DELIM)gpio_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpio$(DELIM)sdm_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpspi$(DELIM)$(CHIP_SERIES)$(DELIM)spi_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpspi$(DELIM)spi_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpspi$(DELIM)spi_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpspi$(DELIM)spi_slave_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_gpspi$(DELIM)spi_slave_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2c$(DELIM)$(CHIP_SERIES)$(DELIM)i2c_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2c$(DELIM)i2c_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2s$(DELIM)$(CHIP_SERIES)$(DELIM)i2s_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_i2s$(DELIM)i2s_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ledc$(DELIM)$(CHIP_SERIES)$(DELIM)ledc_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ledc$(DELIM)ledc_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_ledc$(DELIM)ledc_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mcpwm$(DELIM)$(CHIP_SERIES)$(DELIM)mcpwm_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mcpwm$(DELIM)mcpwm_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)spi_flash_encrypt_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)spi_flash_hal_gpspi.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)spi_flash_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_mspi$(DELIM)spi_flash_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_pcnt$(DELIM)$(CHIP_SERIES)$(DELIM)pcnt_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_pcnt$(DELIM)pcnt_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_pmu$(DELIM)brownout_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_rmt$(DELIM)$(CHIP_SERIES)$(DELIM)rmt_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_rmt$(DELIM)rmt_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_security$(DELIM)hmac_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_security$(DELIM)sha_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_timg$(DELIM)$(CHIP_SERIES)$(DELIM)timer_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_timg$(DELIM)timer_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_twai$(DELIM)$(CHIP_SERIES)$(DELIM)twai_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_twai$(DELIM)twai_hal_v1.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_uart$(DELIM)$(CHIP_SERIES)$(DELIM)uart_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_uart$(DELIM)uart_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_uart$(DELIM)uart_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hal_wdt$(DELIM)wdt_hal_iram.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)adc_share_hw_ctrl.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)clk_ctrl_os.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)cpu.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)esp_clk.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)esp_gpio_reserve.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)esp_memory_utils.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)hw_random.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)intr_alloc.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mac_addr.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)mspi$(DELIM)mspi_timing_tuning$(DELIM)mspi_timing_tuning.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)periph_ctrl.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)cpu_region_protect.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)esp_clk_tree.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)esp_cpu_intr.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)peripheral_domain_pd.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)pmu_init.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)pmu_param.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_clk_init.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_clk.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)rtc_time.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)sar_periph_ctrl.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)systimer.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)port$(DELIM)esp_clk_tree_common.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)power_supply$(DELIM)brownout.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)regi2c_ctrl.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)rtc_module.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_modes.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_hw_support$(DELIM)sleep_uart.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)esp_cache_msync.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)esp_cache_utils.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)esp_mmu_map.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_mm$(DELIM)port$(DELIM)$(CHIP_SERIES)$(DELIM)ext_mem_layout.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_clic.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_crc.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_efuse.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_gpio.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_print.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_regi2c_$(CHIP_SERIES).c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_serial_output.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_spiflash.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_sys.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_rom$(DELIM)patches$(DELIM)esp_rom_systimer.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_security$(DELIM)src$(DELIM)esp_crypto_lock.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_security$(DELIM)src$(DELIM)esp_crypto_periph_clk.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_security$(DELIM)src$(DELIM)esp_hmac.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)esp_err.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)esp_system.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)clk.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)reset_reason.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)port$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)system_internal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)startup_funcs.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)startup.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)system_time.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)$(CHIP_SERIES)$(DELIM)efuse_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)cache_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)efuse_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)hal_utils.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)hal$(DELIM)mmu_hal.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)log_level.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level$(DELIM)linked_list$(DELIM)log_linked_list.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log_level$(DELIM)tag_log_level$(DELIM)tag_log_level.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)log.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)noos$(DELIM)log_lock.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)noos$(DELIM)log_timestamp.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)os$(DELIM)log_write.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)log$(DELIM)src$(DELIM)os$(DELIM)util.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)instruction_decode.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)interrupt_clic.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)interrupt.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)riscv$(DELIM)rv_utils.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)gpio_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)interrupts.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)$(CHIP_SERIES)$(DELIM)power_supply_periph.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)soc$(DELIM)lldesc.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)cache_utils.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)esp_flash_api.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)esp_flash_spi_init.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)flash_brownout_hook.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)flash_mmap.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)flash_ops.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)memspi_host_driver.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_drivers.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_gd.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_generic.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_chip_winbond.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_hpm_enable.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_os_func_app.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)spi_flash$(DELIM)spi_flash_os_func_noos.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)src$(DELIM)esp_dma_utils.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)src$(DELIM)gdma_link.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_dma$(DELIM)src$(DELIM)gdma.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_gpio$(DELIM)src$(DELIM)gpio.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_gpio$(DELIM)src$(DELIM)rtc_io.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_rmt$(DELIM)src$(DELIM)rmt_common.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_rmt$(DELIM)src$(DELIM)rmt_encoder_bytes.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_rmt$(DELIM)src$(DELIM)rmt_encoder_copy.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_rmt$(DELIM)src$(DELIM)rmt_encoder_simple.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_rmt$(DELIM)src$(DELIM)rmt_encoder.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_rmt$(DELIM)src$(DELIM)rmt_rx.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)upper_hal_rmt$(DELIM)src$(DELIM)rmt_tx.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)components$(DELIM)newlib$(DELIM)newlib$(DELIM)libc$(DELIM)misc$(DELIM)init.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)heap_caps.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)platform$(DELIM)os.c
# Bootloader files
ifeq ($(CONFIG_ESPRESSIF_SIMPLE_BOOT),y)
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)bootloader_flash_config_${CHIP_SERIES}.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)bootloader_flash.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)bootloader_flash$(DELIM)src$(DELIM)flash_qio_mode.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)${CHIP_SERIES}$(DELIM)bootloader_${CHIP_SERIES}.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)${CHIP_SERIES}$(DELIM)bootloader_soc.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_clock_init.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_clock_loader.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_common_loader.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_common.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_console_loader.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_console.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_mem.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_random_${CHIP_SERIES}.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_random.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)bootloader_support$(DELIM)src$(DELIM)bootloader_sha.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)efuse$(DELIM)src$(DELIM)esp_efuse_fields.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)nuttx$(DELIM)src$(DELIM)bootloader_banner_wrap.c
LDFLAGS += --wrap=bootloader_print_banner
endif
ifeq ($(CONFIG_ESPRESSIF_IDF_ENV_FPGA),y)
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)fpga_overrides_clk.c
CHIP_CSRCS += chip$(DELIM)$(ESP_HAL_3RDPARTY_REPO)$(DELIM)components$(DELIM)esp_system$(DELIM)fpga_overrides_rng.c
LDFLAGS += -u esp_common_include_fpga_overrides_clk
LDFLAGS += -u esp_common_include_fpga_overrides_rng
endif
boards/Kconfig
+15
View File
@@ -628,6 +628,14 @@ config ARCH_BOARD_ESP32H2_DEVKIT
---help---
The ESP32-H2 DevKit features the ESP32-H2 CPU with a RISC-V core.
config ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD
bool "Espressif ESP32-P4 Function EV Board"
depends on ARCH_CHIP_ESP32P4
select ARCH_HAVE_BUTTONS
select ARCH_HAVE_IRQBUTTONS
---help---
The ESP32-P4 Function EV Board features the ESP32-P4 CPU with two RISC-V cores.
config ARCH_BOARD_ET_STM32_STAMP
bool "Futurlec: ET-STM32 Stamp"
depends on ARCH_CHIP_STM32F103RE
@@ -3602,6 +3610,7 @@ config ARCH_BOARD
default "esp32c6-devkitm" if ARCH_BOARD_ESP32C6_DEVKITM
default "esp32c6-xiao" if ARCH_BOARD_ESP32C6_XIAO
default "esp32h2-devkit" if ARCH_BOARD_ESP32H2_DEVKIT
default "esp32p4-function-ev-board" if ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD
default "et-stm32-stamp" if ARCH_BOARD_ET_STM32_STAMP
default "tlsr8278adk80d" if ARCH_BOARD_TLSR8278ADK80D
default "ez80f910200kitg" if ARCH_BOARD_EZ80F910200KITG
@@ -4907,6 +4916,9 @@ endif
if ARCH_BOARD_ESP32H2_DEVKIT
source "boards/risc-v/esp32h2/esp32h2-devkit/Kconfig"
endif
if ARCH_BOARD_ESP32P4_FUNCTION_EV_BOARD
source "boards/risc-v/esp32p4/esp32p4-function-ev-board/Kconfig"
endif
if ARCH_BOARD_SIM
source "boards/sim/sim/sim/Kconfig"
endif
@@ -5061,6 +5073,9 @@ endif
if ARCH_CHIP_ESP32H2
source "boards/risc-v/esp32h2/common/Kconfig"
endif
if ARCH_CHIP_ESP32P4
source "boards/risc-v/esp32p4/common/Kconfig"
endif
if ARCH_CHIP_SAMV7
source "boards/arm/samv7/common/Kconfig"
endif
boards/risc-v/esp32p4/common/.gitignore
+2
View File
@@ -0,0 +1,2 @@
etctmp
etctmp.c
boards/risc-v/esp32p4/common/Kconfig
+50
View File
@@ -0,0 +1,50 @@
#
# For a description of the syntax of this configuration file,
# see the file kconfig-language.txt in the NuttX tools repository.
#
config ESPRESSIF_MERGE_BINS
bool "Merge raw binary files into a single file"
default n
---help---
Merge the raw binary files into a single file for flashing to the
device.
This is only useful when the path to binary files (e.g. bootloader)
is provided via the ESPTOOL_BINDIR variable.
choice ESPRESSIF_SPIFLASH_FS
prompt "Mount SPI Flash MTD on bring-up"
default ESPRESSIF_SPIFLASH_SMARTFS
depends on ESPRESSIF_MTD
optional
---help---
Mount the SPI Flash MTD with the selected File System format on board
bring-up.
If not selected, the MTD will be registered as a device node on /dev.
config ESPRESSIF_SPIFLASH_SMARTFS
bool "SmartFS"
select FS_SMARTFS
select MTD_SMART
config ESPRESSIF_SPIFLASH_NXFFS
bool "NXFFS"
select FS_NXFFS
config ESPRESSIF_SPIFLASH_SPIFFS
bool "SPIFFS"
select FS_SPIFFS
config ESPRESSIF_SPIFLASH_LITTLEFS
bool "LittleFS"
select FS_LITTLEFS
config ESPRESSIF_SPIFLASH_MTD_CONFIG
bool "Non-volatile storage"
endchoice # ESPRESSIF_SPIFLASH_FS
config ESPRESSIF_SPIFLASH_FS_MOUNT_PT
string "File-system Mount Point"
depends on ESPRESSIF_SPIFLASH_SMARTFS || ESPRESSIF_SPIFLASH_NXFFS || ESPRESSIF_SPIFLASH_SPIFFS || ESPRESSIF_SPIFLASH_LITTLEFS
default "/data"
boards/risc-v/esp32p4/common/Makefile
+35
View File
@@ -0,0 +1,35 @@
#############################################################################
# boards/risc-v/esp32p4/common/Makefile
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
#############################################################################
include $(TOPDIR)/Make.defs
include board/Make.defs
include src/Make.defs
DEPPATH += --dep-path board
DEPPATH += --dep-path src
include $(TOPDIR)/boards/Board.mk
ARCHSRCDIR = $(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src
BOARDDIR = $(ARCHSRCDIR)$(DELIM)board
CFLAGS += ${INCDIR_PREFIX}$(BOARDDIR)$(DELIM)include
boards/risc-v/esp32p4/common/include/esp_board_adc.h
+79
View File
@@ -0,0 +1,79 @@
/****************************************************************************
* boards/risc-v/esp32p4/common/include/esp_board_adc.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_ESP32C6_COMMON_INCLUDE_ESP32C6_BOARD_ADC_H
#define __BOARDS_RISCV_ESP32C6_COMMON_INCLUDE_ESP32C6_BOARD_ADC_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: board_adc_init
*
* Description:
* This function configures and initializes the ADC driver for the board.
* It allocates memory for the ADC device structure, sets up the ADC
* hardware, and registers the ADC device with the system.
*
* Input Parameters:
* None.
*
* Returned Value:
* Returns zero (OK) on successful initialization and registration of the
* ADC device; a negated errno value is returned to indicate the nature
* of any failure.
*
****************************************************************************/
#ifdef CONFIG_ESPRESSIF_ADC
int board_adc_init(void);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_RISCV_ESP32C6_COMMON_INCLUDE_ESP32C6_BOARD_ADC_H */
boards/risc-v/esp32p4/common/include/esp_board_bmp180.h
+75
View File
@@ -0,0 +1,75 @@
/****************************************************************************
* boards/risc-v/esp32p4/common/include/esp_board_bmp180.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_BMP180_H
#define __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_BMP180_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: board_bmp180_initialize
*
* Description:
* Initialize and register the BMP180 Pressure Sensor driver.
*
* Input Parameters:
* devno - The device number, used to build the device path as /dev/pressN
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
****************************************************************************/
#ifdef CONFIG_SENSORS_BMP180
int board_bmp180_initialize(int devno);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_BMP180_H */
boards/risc-v/esp32p4/common/include/esp_board_i2c.h
+76
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@@ -0,0 +1,76 @@
/****************************************************************************
* boards/risc-v/esp32p4/common/include/esp_board_i2c.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_I2C_H
#define __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_I2C_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: board_i2c_init
*
* Description:
* Configure the I2C driver.
*
* Input Parameters:
* None.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#ifdef CONFIG_I2C_DRIVER
int board_i2c_init(void);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_I2C_H */
boards/risc-v/esp32p4/common/include/esp_board_i2s.h
+76
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@@ -0,0 +1,76 @@
/****************************************************************************
* boards/risc-v/esp32p4/common/include/esp_board_i2s.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_I2S_H
#define __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_I2S_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: board_i2s_init
*
* Description:
* Configure the I2S driver.
*
* Input Parameters:
* None.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#ifdef CONFIG_ESPRESSIF_I2S
int board_i2s_init(void);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_I2S_H */
boards/risc-v/esp32p4/common/include/esp_board_ledc.h
+76
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@@ -0,0 +1,76 @@
/****************************************************************************
* boards/risc-v/esp32p4/common/include/esp_board_ledc.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_LEDC_H
#define __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_LEDC_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: board_ledc_setup
*
* Description:
* Initialize LEDC PWM and register the PWM device.
*
* Input Parameters:
* None.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#ifdef CONFIG_ESPRESSIF_LEDC
int board_ledc_setup(void);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_LEDC_H */
boards/risc-v/esp32p4/common/include/esp_board_mcpwm.h
+90
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@@ -0,0 +1,90 @@
/****************************************************************************
* boards/risc-v/esp32p4/common/include/esp_board_mcpwm.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_MCPWM_H
#define __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_MCPWM_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Public Data
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: board_motor_initialize
*
* Description:
* Initialize MCPWM peripheral for motor control and register the motor
* driver.
*
* Input Parameters:
* None.
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
****************************************************************************/
#ifdef CONFIG_ESP_MCPWM_MOTOR
int board_motor_initialize(void);
#endif
/****************************************************************************
* Name: board_capture_initialize
*
* Description:
* Initialize and register the capture driver using the MCPWM peripheral.
*
* Input Parameters:
* None.
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
****************************************************************************/
#ifdef CONFIG_ESP_MCPWM_CAPTURE
int board_capture_initialize(void);
#endif
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif /* __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_MCPWM_H */
boards/risc-v/esp32p4/common/include/esp_board_pcnt.h
+81
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@@ -0,0 +1,81 @@
/****************************************************************************
* boards/risc-v/esp32p4/common/include/esp_board_pcnt.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISC_V_ESP32P4_COMMON_INCLUDE_ESP_BOARD_PCNT_H
#define __BOARDS_RISC_V_ESP32P4_COMMON_INCLUDE_ESP_BOARD_PCNT_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Public Data
****************************************************************************/
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Inline Functions
****************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: board_pcnt_initialize
*
* Description:
* Initialize the pulse counter/quadrature encoder driver
*
* Input Parameters:
* None
*
* Returned Value:
* OK on success; errno on failure.
*
****************************************************************************/
int board_pcnt_initialize(void);
#undef EXTERN
#ifdef __cplusplus
}
#endif
#endif /* __BOARDS_RISC_V_ESP32P4_COMMON_INCLUDE_ESP_BOARD_PCNT_H */
boards/risc-v/esp32p4/common/include/esp_board_rmt.h
+97
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@@ -0,0 +1,97 @@
/****************************************************************************
* boards/risc-v/esp32p4/common/include/esp_board_rmt.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISC_V_ESP32P4_COMMON_INCLUDE_ESP_BOARD_RMT_H
#define __BOARDS_RISC_V_ESP32P4_COMMON_INCLUDE_ESP_BOARD_RMT_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Data
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#ifdef CONFIG_ESP_RMT
/****************************************************************************
* Name: board_rmt_rxinitialize
*
* Description:
* Initialize the RMT peripheral and register an RX device.
*
* Input Parameters:
* pin - The pin used for the RX channel
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
****************************************************************************/
int board_rmt_rxinitialize(int pin);
/****************************************************************************
* Name: board_rmt_txinitialize
*
* Description:
* Initialize the RMT peripheral and register an TX device.
*
* Input Parameters:
* pin - The pin used for the TX channel
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
****************************************************************************/
int board_rmt_txinitialize(int pin);
#endif /* CONFIG_ESP_RMT */
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_RISC_V_ESP32P4_COMMON_INCLUDE_ESP_BOARD_RMT_H */
boards/risc-v/esp32p4/common/include/esp_board_spidev.h
+80
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@@ -0,0 +1,80 @@
/****************************************************************************
* boards/risc-v/esp32p4/common/include/esp_board_spidev.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISC_V_ESP32P4_COMMON_INCLUDE_ESP_BOARD_SPIDEV_H
#define __BOARDS_RISC_V_ESP32P4_COMMON_INCLUDE_ESP_BOARD_SPIDEV_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Data
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: board_spidev_initialize
*
* Description:
* Initialize SPI driver and register the /dev/spi device.
*
* Input Parameters:
* bus - The SPI bus number, used to build the device path as /dev/spiN
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#if defined(CONFIG_ESPRESSIF_SPI2) || defined(CONFIG_ESPRESSIF_SPI_BITBANG)
int board_spidev_initialize(int bus);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_RISC_V_ESP32P4_COMMON_INCLUDE_ESP_BOARD_SPIDEV_H */
boards/risc-v/esp32p4/common/include/esp_board_spiflash.h
+76
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@@ -0,0 +1,76 @@
/****************************************************************************
* boards/risc-v/esp32p4/common/include/esp_board_spiflash.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_SPIFLASH_H
#define __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_SPIFLASH_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: board_spiflash_init
*
* Description:
* Initialize the SPIFLASH and register the MTD device.
*
* Input Parameters:
* None.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#ifdef CONFIG_ESPRESSIF_SPIFLASH
int board_spiflash_init(void);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_SPIFLASH_H */
boards/risc-v/esp32p4/common/include/esp_board_spislavedev.h
+76
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@@ -0,0 +1,76 @@
/****************************************************************************
* boards/risc-v/esp32p4/common/include/esp_board_spislavedev.h
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_SPISLAVEDEV_H
#define __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_SPISLAVEDEV_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifndef __ASSEMBLY__
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: board_spislavedev_initialize
*
* Description:
* Initialize SPI Slave driver and register the /dev/spislv device.
*
* Input Parameters:
* bus - The SPI bus number, used to build the device path as /dev/spislvN
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
#ifdef CONFIG_SPI_SLAVE
int board_spislavedev_initialize(int bus);
#endif
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __BOARDS_RISCV_ESP32P4_COMMON_INCLUDE_ESP_BOARD_SPISLAVEDEV_H */
boards/risc-v/esp32p4/common/scripts/.gitignore
+1
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@@ -0,0 +1 @@
/*.ld.tmp
boards/risc-v/esp32p4/common/scripts/common.ld
+41
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@@ -0,0 +1,41 @@
/****************************************************************************
* boards/risc-v/esp32p4/common/scripts/common.ld
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#include <nuttx/config.h>
/* From esp-hal-3rdparty */
#include "sdkconfig.h"
#include "ld.common"
#if CONFIG_ESPRESSIF_SOC_RTC_MEM_SUPPORTED
# define ESP_BOOTLOADER_RESERVE_RTC 0
/* rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files).
* For rtc_timer_data_in_rtc_mem section.
*/
# define RTC_TIMER_RESERVE_RTC (24)
# ifdef CONFIG_ARCH_CHIP_ESP32P4
# define RESERVE_RTC_MEM (RTC_TIMER_RESERVE_RTC)
# else
# define RESERVE_RTC_MEM (ESP_BOOTLOADER_RESERVE_RTC + RTC_TIMER_RESERVE_RTC)
# endif /* CONFIG_ARCH_CHIP_ESP32P4 */
#endif /* CONFIG_ESPRESSIF_SOC_RTC_MEM_SUPPORTED */
boards/risc-v/esp32p4/common/scripts/esp32p4_aliases.ld
+27
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@@ -0,0 +1,27 @@
/****************************************************************************
* boards/risc-v/esp32p4/common/scripts/esp32p4_aliases.ld
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
_interrupt_handler = exception_common;
cache_invalidate_all = Cache_Invalidate_All;
cache_resume_l2_cache = Cache_Resume_L2_Cache;
cache_set_idrom_mmu_size = Cache_Set_IDROM_MMU_Size;
cache_suspend_l2_cache = Cache_Suspend_L2_Cache;
boards/risc-v/esp32p4/common/scripts/esp32p4_flat_memory.ld
+182
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@@ -0,0 +1,182 @@
/****************************************************************************
* boards/risc-v/esp32p4/common/scripts/esp32p4_flat_memory.ld
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* ESP32-P4 Linker Script Memory Layout
*
* This file describes the memory layout (memory blocks) as virtual
* memory addresses.
*
* esp32p4_<legacy/mcuboot>_sections.ld contains output sections to link compiler
* output into these memory blocks.
*
****************************************************************************/
#include "common.ld"
#if !CONFIG_ESP32P4_SELECTS_REV_LESS_V3
#define SRAM_START 0x4FF00000 + CONFIG_CACHE_L2_CACHE_SIZE
#define SRAM_END 0x4FFAEFC0 /* 2nd stage bootloader iram_loader_seg start address */
#define SRAM_SIZE SRAM_END - SRAM_START
#else
#define SRAM_LOW_START 0x4FF00000
#define SRAM_LOW_END 0x4FF2CBD0 /* 2nd stage bootloader iram_loader_seg start address */
#define SRAM_LOW_SIZE SRAM_LOW_END - SRAM_LOW_START
/* If the cache size is less than 512KB, then there is a region of RAM
* above the ROM-reserved region and below the start of the cache.
*/
#define SRAM_HIGH_START 0x4FF40000
#define SRAM_HIGH_SIZE 0x80000 - CONFIG_CACHE_L2_CACHE_SIZE
#define SRAM_HIGH_END SRAM_HIGH_START + SRAM_HIGH_SIZE
#endif
#if CONFIG_P4_REV3_MSPI_CRASH_AFTER_POWER_UP_WORKAROUND
#define MSPI_WORKAROUND_SIZE CONFIG_P4_REV3_MSPI_WORKAROUND_SIZE
#else
#define MSPI_WORKAROUND_SIZE 0x0
#endif
#define IDROM_SEG_SIZE (CONFIG_MMU_PAGE_SIZE << 10)
#define LP_ROM_DRAM_START 0x5010fa80 // Value taken from ROM elf, includes LP ROM stack
#define LP_RAM_END 0x50110000
#define LP_ROM_DRAM_SIZE (LP_RAM_END - LP_ROM_DRAM_START)
MEMORY
{
/**
* All these values assume the flash cache is on, and have the blocks this uses subtracted from the length
* of the various regions. The 'data access port' dram/drom regions map to the same iram/irom regions but
* are connected to the data port of the CPU and eg allow byte-wise access.
*/
/* TCM */
tcm_idram_seg (RX) : org = 0x30100000, len = 0x2000
/* Flash mapped instruction data */
irom_seg (RX) : org = 0x40000000, len = IDROM_SEG_SIZE
/**
* (0x20 offset above is a convenience for the app binary image generation.
* Flash cache has 64KB pages. The .bin file which is flashed to the chip
* has a 0x18 byte file header, and each segment has a 0x08 byte segment
* header. Setting this offset makes it simple to meet the flash cache MMU's
* constraint that (paddr % 64KB == vaddr % 64KB).)
*/
/**
* Shared data RAM, excluding memory reserved for ROM bss/data/stack.
* Enabling Bluetooth & Trace Memory features in menuconfig will decrease the amount of RAM available.
*/
#if CONFIG_ESP32P4_SELECTS_REV_LESS_V3
sram_low (RWX) : org = SRAM_LOW_START, len = SRAM_LOW_SIZE
sram_high (RW) : org = SRAM_HIGH_START, len = SRAM_HIGH_SIZE
#else
sram_seg (RWX) : org = SRAM_START, len = SRAM_SIZE
#endif
#if CONFIG_SPIRAM_RODATA
/* PSRAM mapped constant data */
drom_seg (R) : org = 0x48000000, len = IDROM_SEG_SIZE
#else
/* Flash mapped constant data */
drom_seg (R) : org = 0x40000000, len = IDROM_SEG_SIZE
#endif // CONFIG_SPIRAM_RODATA
/* (See irom_seg for meaning of 0x20 offset in the above.) */
/* Used to store the deep sleep workaround code of P4 rev3.0. The reset vector will be set here before the chip enters sleep. */
rev3_mspi_workaround_seg(RWX) : org = 0x50108000, len = MSPI_WORKAROUND_SIZE
/**
* lp ram memory (RWX). Persists over deep sleep. // TODO: IDF-5667
*/
#if CONFIG_ULP_COPROC_ENABLED
lp_ram_seg(RW) : org = 0x50108000 + RESERVE_RTC_MEM + CONFIG_ULP_COPROC_RESERVE_MEM,
len = 0x8000 - CONFIG_ULP_COPROC_RESERVE_MEM - RESERVE_RTC_MEM - LP_ROM_DRAM_SIZE
#else
lp_ram_seg(RW) : org = 0x50108000 + RESERVE_RTC_MEM, len = 0x8000 - RESERVE_RTC_MEM
#endif // CONFIG_ULP_COPROC_ENABLED
/* We reduced the size of lp_ram_seg by RESERVE_RTC_MEM value.
It reserves the amount of LP memory that we use for this memory segment.
This segment is intended for keeping:
- (lower addr) rtc timer data (s_rtc_timer_retain_mem, see esp_clk.c files).
- (higher addr) bootloader rtc data (s_bootloader_retain_mem, when a Kconfig option is on).
The aim of this is to keep data that will not be moved around and have a fixed address.
This segment is placed at the beginning of LP RAM, as the end of LP RAM is occupied by LP ROM stack/data
*/
lp_reserved_seg(RW) : org = 0x50108000, len = RESERVE_RTC_MEM
/* PSRAM seg */
extern_ram_seg(RWX) : org = 0x48000000, len = IDROM_SEG_SIZE
}
_data_seg_org = ORIGIN(rtc_data_seg);
/**
* The lines below define location alias for .rtc.data section
* P4 has no distinguished LP(RTC) fast and slow memory sections, instead, there is a unified LP_RAM section
* Thus, the following region segments are not configurable like on other targets
*/
REGION_ALIAS("rtc_iram_seg", lp_ram_seg );
REGION_ALIAS("rtc_data_seg", rtc_iram_seg );
REGION_ALIAS("rtc_slow_seg", rtc_iram_seg );
REGION_ALIAS("rtc_data_location", rtc_iram_seg );
REGION_ALIAS("rtc_reserved_seg", lp_reserved_seg );
#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
REGION_ALIAS("text_seg_low", irom_seg);
#else
REGION_ALIAS("text_seg_low", sram_low);
REGION_ALIAS("text_seg_high", sram_high);
#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
REGION_ALIAS("rodata_seg_low", drom_seg);
#else
REGION_ALIAS("rodata_seg_low", sram_low);
REGION_ALIAS("rodata_seg_high", sram_high);
#endif // CONFIG_APP_BUILD_USE_FLASH_SECTIONS
#if CONFIG_SPIRAM_XIP_FROM_PSRAM
REGION_ALIAS("ext_ram_seg", drom_seg);
#else
REGION_ALIAS("ext_ram_seg", extern_ram_seg);
#endif //#if CONFIG_SPIRAM_XIP_FROM_PSRAM
/**
* If rodata default segment is placed in `drom_seg`, then flash's first rodata section must
* also be first in the segment.
*/
#if CONFIG_APP_BUILD_USE_FLASH_SECTIONS
ASSERT(_flash_rodata_dummy_start == ORIGIN(rodata_seg_low),
".flash_rodata_dummy section must be placed at the beginning of the rodata segment.")
#endif
#if CONFIG_ESP_SYSTEM_USE_EH_FRAME
ASSERT ((__eh_frame_end > __eh_frame), "Error: eh_frame size is null!");
ASSERT ((__eh_frame_hdr_end > __eh_frame_hdr), "Error: eh_frame_hdr size is null!");
#endif
boards/risc-v/esp32p4/common/scripts/esp32p4_sections.ld
+755
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boards/risc-v/esp32p4/common/scripts/esp32p4_sections.rev3.ld
+758
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boards/risc-v/esp32p4/common/src/Make.defs
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#############################################################################
# boards/risc-v/esp32p4/common/src/Make.defs
#
# SPDX-License-Identifier: Apache-2.0
#
# Licensed to the Apache Software Foundation (ASF) under one or more
# contributor license agreements. See the NOTICE file distributed with
# this work for additional information regarding copyright ownership. The
# ASF licenses this file to you under the Apache License, Version 2.0 (the
# "License"); you may not use this file except in compliance with the
# License. You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
# License for the specific language governing permissions and limitations
# under the License.
#
#############################################################################
ifeq ($(CONFIG_ARCH_BOARD_COMMON),y)
ifeq ($(CONFIG_ESPRESSIF_ADC),y)
CSRCS += esp_board_adc.c
endif
ifeq ($(CONFIG_ESPRESSIF_LEDC),y)
CSRCS += esp_board_ledc.c
endif
ifeq ($(CONFIG_ESP_RMT),y)
CSRCS += esp_board_rmt.c
endif
ifeq ($(CONFIG_ESPRESSIF_SPI),y)
CSRCS += esp_board_spi.c
endif
ifeq ($(CONFIG_SPI_DRIVER),y)
CSRCS += esp_board_spidev.c
endif
ifeq ($(CONFIG_ESPRESSIF_SPI),y)
ifeq ($(CONFIG_SPI_SLAVE_DRIVER),y)
CSRCS += esp_board_spislavedev.c
endif
endif
ifeq ($(CONFIG_I2C_DRIVER),y)
CSRCS += esp_board_i2c.c
endif
ifeq ($(CONFIG_ESPRESSIF_I2S),y)
CSRCS += esp_board_i2s.c
endif
ifeq ($(CONFIG_ESPRESSIF_SPIFLASH),y)
CSRCS += esp_board_spiflash.c
endif
ifeq ($(CONFIG_ESPRESSIF_TWAI),y)
CSRCS += esp_board_twai.c
endif
ifeq ($(CONFIG_SENSORS_BMP180),y)
CSRCS += esp_board_bmp180.c
endif
ifeq ($(CONFIG_ESP_MCPWM),y)
CSRCS += esp_board_mcpwm.c
endif
ifeq ($(CONFIG_ESP_PCNT),y)
CSRCS += esp_board_pcnt.c
endif
DEPPATH += --dep-path src
VPATH += :src
CFLAGS += ${INCDIR_PREFIX}$(TOPDIR)$(DELIM)arch$(DELIM)$(CONFIG_ARCH)$(DELIM)src$(DELIM)board$(DELIM)src
endif
boards/risc-v/esp32p4/common/src/esp_board_adc.c
+234
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/****************************************************************************
* boards/risc-v/esp32p4/common/src/esp_board_adc.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <syslog.h>
#include <nuttx/analog/adc.h>
#include "espressif/esp_adc.h"
#include "esp_board_adc.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* The number of channels for each ADC */
#define ADC0_MAX_CHANNELS 8
#define ADC1_MAX_CHANNELS 6
/****************************************************************************
* Private Data
****************************************************************************/
/* Select channels to be used for each ADC.
*
* GPIOs are fixed for each channel and configured in the lower-half driver.
*
* ADC 1
* Channel: 0 1 2 3 4 5 6 7
* GPIO: 16 17 18 19 20 21 22 23
*
* ADC 2
* Channel: 0 1 2 3 4 5
* GPIO: 49 50 51 52 53 54
* On the chanlist arrays below, channels are added +1. Do not change.
*/
#ifdef CONFIG_ESPRESSIF_ADC_1
static const uint8_t g_chanlist_adc1[ADC0_MAX_CHANNELS] =
{
#ifdef CONFIG_ESPRESSIF_ADC_1_CH0
1,
#endif
#ifdef CONFIG_ESPRESSIF_ADC_1_CH1
2,
#endif
#ifdef CONFIG_ESPRESSIF_ADC_1_CH2
3,
#endif
#ifdef CONFIG_ESPRESSIF_ADC_1_CH3
4,
#endif
#ifdef CONFIG_ESPRESSIF_ADC_1_CH4
5,
#endif
#ifdef CONFIG_ESPRESSIF_ADC_1_CH5
6,
#endif
#ifdef CONFIG_ESPRESSIF_ADC_1_CH6
7,
#endif
#ifdef CONFIG_ESPRESSIF_ADC_1_CH7
8,
#endif
};
#endif
#ifdef CONFIG_ESPRESSIF_ADC_2
static const uint8_t g_chanlist_adc2[ADC1_MAX_CHANNELS] =
{
#ifdef CONFIG_ESPRESSIF_ADC_1_CH0
1,
#endif
#ifdef CONFIG_ESPRESSIF_ADC_1_CH1
2,
#endif
#ifdef CONFIG_ESPRESSIF_ADC_1_CH2
3,
#endif
#ifdef CONFIG_ESPRESSIF_ADC_1_CH3
4,
#endif
#ifdef CONFIG_ESPRESSIF_ADC_1_CH4
5,
#endif
#ifdef CONFIG_ESPRESSIF_ADC_1_CH5
6,
#endif
};
#endif
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: board_adc_register
*
* Description:
* This function registers the ADC driver for the specified ADC channel.
* It initializes the ADC hardware, creates the device name, and registers
* the ADC device with the system.
*
* Input Parameters:
* adc_num - The ADC channel number to register.
*
* Returned Value:
* Returns zero (OK) on successful registration; a negated errno value is
* returned to indicate the nature of any failure.
*
****************************************************************************/
static int board_adc_register(int adc_num)
{
int ret;
char devname[12];
struct adc_dev_s *adcdev;
adcdev = kmm_malloc(sizeof(struct adc_dev_s));
if (adcdev == NULL)
{
syslog(LOG_ERR, "ERROR: Failed to allocate adc_dev_s instance\n");
return -ENOMEM;
}
memset(adcdev, 0, sizeof(struct adc_dev_s));
switch (adc_num)
{
case 1:
#ifdef CONFIG_ESPRESSIF_ADC_1
adcdev = esp_adc_initialize(adc_num, g_chanlist_adc1);
break;
#endif
case 2:
#ifdef CONFIG_ESPRESSIF_ADC_2
adcdev = esp_adc_initialize(adc_num, g_chanlist_adc2);
break;
#endif
default:
syslog(LOG_ERR, "ERROR: Unsupported ADC number: %d\n", adc_num);
return ERROR;
}
if (adcdev == NULL)
{
syslog(LOG_ERR, "ERROR: Failed to initialize ADC %d\n", adc_num);
return -ENODEV;
}
/* Register the ADC driver at "/dev/adcx" */
snprintf(devname, sizeof(devname), "/dev/adc%d", adc_num - 1);
ret = adc_register(devname, adcdev);
if (ret < 0)
{
kmm_free(adcdev);
syslog(LOG_ERR, "ERROR: adc_register %s failed: %d\n", devname, ret);
return ret;
}
return ret;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_adc_init
*
* Description:
* This function configures and initializes the ADC driver for the board.
* It allocates memory for the ADC device structure, sets up the ADC
* hardware, and registers the ADC device with the system.
*
* Input Parameters:
* None.
*
* Returned Value:
* Returns zero (OK) on successful initialization and registration of the
* ADC device; a negated errno value is returned to indicate the nature
* of any failure.
*
****************************************************************************/
int board_adc_init(void)
{
int ret;
#ifdef CONFIG_ESPRESSIF_ADC_1
ret = board_adc_register(1);
if (ret != OK)
{
return ret;
}
#endif
#ifdef CONFIG_ESPRESSIF_ADC_2
ret = board_adc_register(2);
if (ret != OK)
{
return ret;
}
#endif
return ret;
}
boards/risc-v/esp32p4/common/src/esp_board_bmp180.c
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/****************************************************************************
* boards/risc-v/esp32p4/common/src/esp_board_bmp180.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdio.h>
#include <debug.h>
#include <nuttx/arch.h>
#include <nuttx/sensors/bmp180.h>
#include <nuttx/i2c/i2c_master.h>
#ifndef CONFIG_ESPRESSIF_I2C_BITBANG
#include "espressif/esp_i2c.h"
#else
#include "espressif/esp_i2c_bitbang.h"
#endif
#include "esp_board_bmp180.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_bmp180_initialize
*
* Description:
* Initialize and register the BMP180 Pressure Sensor driver.
*
* Input Parameters:
* devno - The device number, used to build the device path as /dev/pressN
*
* Returned Value:
* Zero (OK) on success; a negated errno value on failure.
*
****************************************************************************/
int board_bmp180_initialize(int devno)
{
struct i2c_master_s *i2c;
char devpath[12];
int ret;
sninfo("Initializing BMP180!\n");
/* Initialize BMP180 */
#ifndef CONFIG_ESPRESSIF_I2C_BITBANG
i2c = esp_i2cbus_initialize(ESPRESSIF_I2C0);
#else
i2c = esp_i2cbus_bitbang_initialize();
#endif
if (i2c)
{
/* Then try to register the barometer sensor in I2C0 */
snprintf(devpath, sizeof(devpath), "/dev/press%d", devno);
ret = bmp180_register(devpath, i2c);
if (ret < 0)
{
snerr("ERROR: Error registering BMP180 in I2C0\n");
}
}
else
{
ret = -ENODEV;
}
return ret;
}
boards/risc-v/esp32p4/common/src/esp_board_i2c.c
+168
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/****************************************************************************
* boards/risc-v/esp32p4/common/src/esp_board_i2c.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <errno.h>
#include <sys/types.h>
#include <nuttx/i2c/i2c_master.h>
#ifdef CONFIG_ESPRESSIF_I2C_BITBANG
#include "espressif/esp_i2c_bitbang.h"
#endif
#ifdef CONFIG_ESPRESSIF_I2C_PERIPH_MASTER_MODE
#include "espressif/esp_i2c.h"
#endif
#ifdef CONFIG_ESPRESSIF_I2C_PERIPH_SLAVE_MODE
#include "espressif/esp_i2c_slave.h"
#endif
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#ifdef CONFIG_ESPRESSIF_I2C_PERIPH_SLAVE_MODE
#define I2C0_SLAVE_ADDR 0x28
#define I2C0_SLAVE_NBITS 7
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
#ifdef CONFIG_ESPRESSIF_I2C_BITBANG
static int i2c_bitbang_driver_init(int bus)
{
struct i2c_master_s *i2c;
int ret;
i2c = esp_i2cbus_bitbang_initialize();
if (i2c == NULL)
{
i2cerr("Failed to get I2C%d interface\n", bus);
return -ENODEV;
}
ret = i2c_register(i2c, bus);
if (ret < 0)
{
i2cerr("Failed to register I2C%d driver: %d\n", bus, ret);
}
return ret;
}
#endif
#ifdef CONFIG_ESPRESSIF_I2C_PERIPH_MASTER_MODE
static int i2c_driver_init(int bus)
{
struct i2c_master_s *i2c;
int ret;
i2c = esp_i2cbus_initialize(bus);
if (i2c == NULL)
{
i2cerr("Failed to get I2C%d interface\n", bus);
return -ENODEV;
}
ret = i2c_register(i2c, bus);
if (ret < 0)
{
i2cerr("Failed to register I2C%d driver: %d\n", bus, ret);
esp_i2cbus_uninitialize(i2c);
}
return ret;
}
#endif
#ifdef CONFIG_ESPRESSIF_I2C_PERIPH_SLAVE_MODE
static int i2c_slave_driver_init(int bus, int addr)
{
struct i2c_slave_s *i2c;
int ret;
i2c = esp_i2cbus_slave_initialize(bus, addr);
if (i2c == NULL)
{
i2cerr("Failed to get I2C%d interface\n", bus);
return -ENODEV;
}
ret = i2c_slave_register(i2c, bus, addr, I2C0_SLAVE_NBITS);
if (ret < 0)
{
i2cerr("Failed to register I2C%d driver: %d\n", bus, ret);
esp_i2cbus_slave_uninitialize(i2c);
}
return ret;
}
#endif
/****************************************************************************
* Name: board_i2c_init
*
* Description:
* Configure the I2C driver.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
int board_i2c_init(void)
{
int ret = OK;
#ifdef CONFIG_ESPRESSIF_I2C_PERIPH_MASTER_MODE
#ifdef CONFIG_ESPRESSIF_I2C0
ret = i2c_driver_init(ESPRESSIF_I2C0);
if (ret != OK)
{
return ret;
}
#endif
#ifdef CONFIG_ESPRESSIF_I2C1
ret = i2c_driver_init(ESPRESSIF_I2C1);
#endif
#endif
#ifdef CONFIG_ESPRESSIF_I2C_BITBANG
ret = i2c_bitbang_driver_init(ESPRESSIF_I2C_BITBANG);
#endif
#ifdef CONFIG_ESPRESSIF_I2C_PERIPH_SLAVE_MODE
ret = i2c_slave_driver_init(ESPRESSIF_I2C0_SLAVE, I2C0_SLAVE_ADDR);
#endif
return ret;
}
boards/risc-v/esp32p4/common/src/esp_board_i2s.c
+200
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/****************************************************************************
* boards/risc-v/esp32p4/common/src/esp_board_i2s.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <debug.h>
#include <errno.h>
#include <sys/types.h>
#include <stdio.h>
#include <nuttx/audio/audio.h>
#include <nuttx/audio/audio_i2s.h>
#include <nuttx/audio/i2s.h>
#include <nuttx/audio/pcm.h>
#include <arch/board/board.h>
#include "espressif/esp_i2s.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_i2sdev_initialize
*
* Description:
* This function is called by platform-specific, setup logic to configure
* and register the generic I2S audio driver. This function will register
* the driver as /dev/audio/pcm[x] where x is determined by the I2S port
* number.
*
* Input Parameters:
* port - The I2S port used for the device
* enable_tx - Register device as TX if true
* enable_rx - Register device as RX if true
*
* Returned Value:
* Zero is returned on success. Otherwise, a negated errno value is
* returned to indicate the nature of the failure.
*
****************************************************************************/
int board_i2sdev_initialize(int port, bool enable_tx, bool enable_rx)
{
struct audio_lowerhalf_s *audio_i2s;
struct i2s_dev_s *i2s;
char devname[8];
int ret;
audinfo("Initializing I2S\n");
i2s = esp_i2sbus_initialize(port);
#ifdef CONFIG_AUDIO_I2SCHAR
ret = i2schar_register(i2s, port);
if (ret < 0)
{
aerr("ERROR: i2schar_register failed: %d\n", ret);
return ret;
}
#endif
if (enable_tx)
{
/* Initialize audio output */
audio_i2s = audio_i2s_initialize(i2s, true);
if (audio_i2s == NULL)
{
auderr("ERROR: Failed to initialize I2S audio output\n");
return -ENODEV;
}
snprintf(devname, sizeof(devname), "pcm%d", port);
/* If nxlooper is selected, the playback buffer is not rendered as
* a WAV file. Therefore, PCM decode will fail while processing such
* output buffer. In such a case, we bypass the PCM decode.
*/
#ifdef CONFIG_SYSTEM_NXLOOPER
ret = audio_register(devname, audio_i2s);
#else
struct audio_lowerhalf_s *pcm;
pcm = pcm_decode_initialize(audio_i2s);
if (pcm == NULL)
{
auderr("ERROR: Failed create the PCM decoder\n");
return -ENODEV;
}
ret = audio_register(devname, pcm);
#endif /* CONFIG_SYSTEM_NXLOOPER */
if (ret < 0)
{
auderr("ERROR: Failed to register /dev/%s device: %d\n",
devname, ret);
return ret;
}
}
if (enable_rx)
{
/* Initialize audio input */
audio_i2s = audio_i2s_initialize(i2s, false);
if (audio_i2s == NULL)
{
auderr("ERROR: Failed to initialize I2S audio input\n");
return -ENODEV;
}
snprintf(devname, sizeof(devname), "pcm_in%d", port);
ret = audio_register(devname, audio_i2s);
if (ret < 0)
{
auderr("ERROR: Failed to register /dev/%s device: %d\n",
devname, ret);
return ret;
}
}
return ret;
}
/****************************************************************************
* Name: board_i2s_init
*
* Description:
* Configure the I2S driver.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
int board_i2s_init(void)
{
int ret = OK;
#if defined(CONFIG_ESPRESSIF_I2S0)
bool i2s_enable_tx;
bool i2s_enable_rx;
#endif
#ifdef CONFIG_ESPRESSIF_I2S
#ifdef CONFIG_ESPRESSIF_I2S0_TX
i2s_enable_tx = true;
#else
i2s_enable_tx = false;
#endif /* CONFIG_ESPRESSIF_I2S0_TX */
#ifdef CONFIG_ESPRESSIF_I2S0_RX
i2s_enable_rx = true;
#else
i2s_enable_rx = false;
#endif /* CONFIG_ESPRESSIF_I2S0_RX */
/* Configure I2S generic audio on I2S0 */
ret = board_i2sdev_initialize(ESPRESSIF_I2S0,
i2s_enable_tx,
i2s_enable_rx);
if (ret < 0)
{
syslog(LOG_ERR, "Failed to initialize I2S0 driver: %d\n", ret);
}
#endif /* CONFIG_ESPRESSIF_I2S */
return ret;
}
boards/risc-v/esp32p4/common/src/esp_board_ledc.c
+148
View File
@@ -0,0 +1,148 @@
/****************************************************************************
* boards/risc-v/esp32p4/common/src/esp_board_ledc.c
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/board.h>
#include <nuttx/timers/pwm.h>
#include <arch/board/board.h>
#include "espressif/esp_ledc.h"
#include "esp_board_ledc.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#define LEDC_TIMER0 0
#define LEDC_TIMER1 1
#define LEDC_TIMER2 2
#define LEDC_TIMER3 3
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: board_ledc_setup
*
* Description:
* Initialize LEDC PWM and register the PWM device.
*
* Input Parameters:
* None.
*
* Returned Value:
* Zero (OK) is returned on success; A negated errno value is returned
* to indicate the nature of any failure.
*
****************************************************************************/
int board_ledc_setup(void)
{
int ret = OK;
struct pwm_lowerhalf_s *pwm;
#ifdef CONFIG_ESPRESSIF_LEDC_TIMER0
pwm = esp_ledc_init(LEDC_TIMER0);
if (!pwm)
{
syslog(LOG_ERR, "ERROR: Failed to get the LEDC PWM 0 lower half\n");
return -ENODEV;
}
/* Register the PWM driver at "/dev/pwm0" */
ret = pwm_register("/dev/pwm0", pwm);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: pwm_register failed: %d\n", ret);
return ret;
}
#endif
#ifdef CONFIG_ESPRESSIF_LEDC_TIMER1
pwm = esp_ledc_init(LEDC_TIMER1);
if (!pwm)
{
syslog(LOG_ERR, "ERROR: Failed to get the LEDC PWM 1 lower half\n");
return -ENODEV;
}
/* Register the PWM driver at "/dev/pwm1" */
ret = pwm_register("/dev/pwm1", pwm);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: pwm_register failed: %d\n", ret);
return ret;
}
#endif
#ifdef CONFIG_ESPRESSIF_LEDC_TIMER2
pwm = esp_ledc_init(LEDC_TIMER2);
if (!pwm)
{
syslog(LOG_ERR, "ERROR: Failed to get the LEDC PWM 2 lower half\n");
return -ENODEV;
}
/* Register the PWM driver at "/dev/pwm2" */
ret = pwm_register("/dev/pwm2", pwm);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: pwm_register failed: %d\n", ret);
return ret;
}
#endif
#ifdef CONFIG_ESPRESSIF_LEDC_TIMER3
pwm = esp_ledc_init(LEDC_TIMER3);
if (!pwm)
{
syslog(LOG_ERR, "ERROR: Failed to get the LEDC PWM 3 lower half\n");
return -ENODEV;
}
/* Register the PWM driver at "/dev/pwm3" */
ret = pwm_register("/dev/pwm3", pwm);
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: pwm_register failed: %d\n", ret);
return ret;
}
#endif
return ret;
}

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