mirror of
https://github.com/apache/nuttx.git
synced 2026-05-20 20:44:39 +08:00
Merged in david_s5/nuttx/upstream_kinetis (pull request #212)
Kinetis Ethernet fix, add FTM3 Approved-by: Gregory Nutt
This commit is contained in:
David Sidrane
Gregory Nutt
@@ -470,6 +470,13 @@ config KINETIS_FTM2
|
||||
---help---
|
||||
Support FlexTimer 2
|
||||
|
||||
config KINETIS_FTM3
|
||||
bool "FTM3"
|
||||
default n
|
||||
depends on ARCH_FAMILY_K64 || ARCH_FAMILY_K66
|
||||
---help---
|
||||
Support FlexTimer 3
|
||||
|
||||
config KINETIS_LPTIMER
|
||||
bool "Low power timer (LPTIMER)"
|
||||
default n
|
||||
@@ -558,7 +565,7 @@ config KINETIS_PIT
|
||||
endmenu
|
||||
|
||||
menu "Kinetis FTM PWM Configuration"
|
||||
depends on KINETIS_FTM0 || KINETIS_FTM1 || KINETIS_FTM2
|
||||
depends on KINETIS_FTM0 || KINETIS_FTM1 || KINETIS_FTM2 || KINETIS_FTM3
|
||||
|
||||
config KINETIS_FTM0_PWM
|
||||
bool "FTM0 PWM"
|
||||
@@ -623,6 +630,27 @@ config KINETIS_FTM2_CHANNEL
|
||||
If FTM2 is enabled for PWM usage, you also need specifies the timer output
|
||||
channel {0,..,1}
|
||||
|
||||
config KINETIS_FTM3_PWM
|
||||
bool "FTM3 PWM"
|
||||
default n
|
||||
depends on KINETIS_FTM3
|
||||
---help---
|
||||
Reserve timer 3 for use by PWM
|
||||
|
||||
Timer devices may be used for different purposes. One special purpose is
|
||||
to generate modulated outputs for such things as motor control. If KINETIS_FTM3
|
||||
is defined then THIS following may also be defined to indicate that
|
||||
the timer is intended to be used for pulsed output modulation.
|
||||
|
||||
config KINETIS_FTM3_CHANNEL
|
||||
int "FTM3 PWM Output Channel"
|
||||
default 0
|
||||
range 0 7
|
||||
depends on KINETIS_FTM3_PWM
|
||||
---help---
|
||||
If FTM3 is enabled for PWM usage, you also need specifies the timer output
|
||||
channel {0,..,7}
|
||||
|
||||
endmenu # Kinetis FTM PWM Configuration
|
||||
|
||||
menu "Kinetis GPIO Interrupt Configuration"
|
||||
@@ -713,6 +741,21 @@ config KINETIS_ENET_NORXER
|
||||
If selected, then the MII/RMII RXER output will be configured as a
|
||||
GPIO and pulled low.
|
||||
|
||||
choice
|
||||
prompt "RMII Clock Source"
|
||||
default KINETIS_EMAC_RMIICLKEXTAL
|
||||
depends on !KINETIS_ENETUSEMII && (ARCH_FAMILY_K64 || ARCH_FAMILY_K66)
|
||||
---help---
|
||||
The RMII clock can be selected between EXTAL or ENET_1588_CLKIN
|
||||
|
||||
config KINETIS_EMAC_RMIICLKEXTAL
|
||||
bool "Use EXTAL for RMII Clock"
|
||||
|
||||
config KINETIS_EMAC_RMIICLK1588CLKIN
|
||||
bool "Use ENET_1588_CLKIN for RMII Clock"
|
||||
|
||||
endchoice # RMII Clock Source
|
||||
|
||||
choice
|
||||
prompt "Work queue"
|
||||
default KINETIS_EMAC_LPWORK if SCHED_LPWORK
|
||||
|
||||
@@ -1,8 +1,9 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/chip/kinetis_sim.h
|
||||
*
|
||||
* Copyright (C) 2011, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
* Copyright (C) 2011, 2016, 2017 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
* David Sidrane <david_s5@nscdg.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
@@ -136,8 +137,17 @@
|
||||
/* Bit 17: Reserved */
|
||||
#define SIM_SOPT2_USBSRC (1 << 18) /* Bit 18: USB clock source select */
|
||||
/* Bit 19: Reserved */
|
||||
#ifdef KINETIS_K60
|
||||
# define SIM_SOPT2_TIMESRC (1 << 20) /* Bit 20: IEEE 1588 timestamp clock source select (K60) */
|
||||
#if defined(KINETIS_K60) || defined(KINETIS_K64) || defined(KINETIS_K66)
|
||||
# define SIM_SOPT2_RMIISRC_SHIFT (19) /* Bit 19: RMII clock source select */
|
||||
# define SIM_SOPT2_RMIISRC_EXTAL (0 << SIM_SOPT2_RMIISRC_SHIFT) /* EXTAL clock */
|
||||
# define SIM_SOPT2_RMIISRC_EXTBYP (1 << SIM_SOPT2_RMIISRC_SHIFT) /* External bypass clock (ENET_1588_CLKIN) */
|
||||
# define SIM_SOPT2_TIMESRC_SHIFT (20) /* Bit 20-21: IEEE 1588 timestamp clock source select (K60) */
|
||||
# define SIM_SOPT2_TIMESRC_MASK (3 << SIM_SOPT2_TIMESRC_SHIFT)
|
||||
# define SIM_SOPT2_TIMESRC_CORE (0 << SIM_SOPT2_TIMESRC_SHIFT) /* Core/system clock */
|
||||
# define SIM_SOPT2_TIMESRC_PLLSEL (1 << SIM_SOPT2_TIMESRC_SHIFT) /* MCGFLLCLK,MCGPLLCLK,IRC48M,USB1 PFD
|
||||
clock as selected by SOPT2[PLLFLLSEL] */
|
||||
# define SIM_SOPT2_TIMESRC_OSCERCLK (2 << SIM_SOPT2_TIMESRC_SHIFT) /* OSCERCLK clock */
|
||||
# define SIM_SOPT2_TIMESRC_EXTBYP (0 << SIM_SOPT2_TIMESRC_SHIFT) /* External bypass clock (ENET_1588_CLKIN) */
|
||||
#endif
|
||||
/* Bits 12-23: Reserved */
|
||||
#define SIM_SOPT2_I2SSRC_SHIFT (24) /* Bits 24-25: I2S master clock source select */
|
||||
@@ -164,6 +174,10 @@
|
||||
/* Bits 5-7: Reserved */
|
||||
#define SIM_SOPT4_FTM2FLT0 (1 << 8) /* Bit 8: FTM2 Fault 0 Select */
|
||||
/* Bits 9-17: Reserved */
|
||||
#if defined(CONFIG_KINETIS_FTM3)
|
||||
/* Bits 9-11,13-17: Reserved */
|
||||
# define SIM_SOPT4_FTM3FLT0 (1 << 12) /* Bit 12: FTM3 Fault 0 Select */
|
||||
#endif
|
||||
#define SIM_SOPT4_FTM1CH0SRC_SHIFT (18) /* Bits 18-19: FTM1 channel 0 input capture source select */
|
||||
#define SIM_SOPT4_FTM1CH0SRC_MASK (3 << SIM_SOPT4_FTM1CH0SRC_SHIFT)
|
||||
# define SIM_SOPT4_FTM1CH0SRC_CH0 (0 << SIM_SOPT4_FTM1CH0SRC_SHIFT) /* FTM1_CH0 signal */
|
||||
@@ -179,6 +193,11 @@
|
||||
#define SIM_SOPT4_FTM1CLKSEL (1 << 25) /* Bit 25: FTM1 External Clock Pin Select */
|
||||
#define SIM_SOPT4_FTM2CLKSEL (1 << 26) /* Bit 26: FlexTimer 2 External Clock Pin Select */
|
||||
/* Bits 27-31: Reserved */
|
||||
#if defined(CONFIG_KINETIS_FTM3)
|
||||
# define SIM_SOPT4_FTM3CLKSEL (1 << 27) /* Bit 27: FlexTimer 3 External Clock Pin Select */
|
||||
# define SIM_SOPT4_FTM3TRG0SRC (1 << 30) /* Bit 30: FlexTimer 3 Hardware Trigger 0 Source Select */
|
||||
# define SIM_SOPT4_FTM3TRG1SRC (1 << 31) /* Bit 31: FlexTimer 3 Hardware Trigger 1 Source Select */
|
||||
#endif
|
||||
|
||||
/* System Options Register 5 */
|
||||
|
||||
@@ -231,6 +250,9 @@
|
||||
# define SIM_SOPT7_ADC0TRGSEL_FTM0 (8 << SIM_SOPT7_ADC0TRGSEL_SHIFT) /* FTM0 trigger */
|
||||
# define SIM_SOPT7_ADC0TRGSEL_FTM1 (9 << SIM_SOPT7_ADC0TRGSEL_SHIFT) /* FTM1 trigger */
|
||||
# define SIM_SOPT7_ADC0TRGSEL_FTM2 (10 << SIM_SOPT7_ADC0TRGSEL_SHIFT) /* FTM2 trigger */
|
||||
#if defined(CONFIG_KINETIS_FTM3)
|
||||
# define SIM_SOPT7_ADC0TRGSEL_FTM3 (11 << SIM_SOPT7_ADC0TRGSEL_SHIFT) /* FTM3 trigger */
|
||||
#endif
|
||||
# define SIM_SOPT7_ADC0TRGSEL_ALARM (12 << SIM_SOPT7_ADC0TRGSEL_SHIFT) /* RTC alarm */
|
||||
# define SIM_SOPT7_ADC0TRGSEL_SECS (13 << SIM_SOPT7_ADC0TRGSEL_SHIFT) /* RTC seconds */
|
||||
# define SIM_SOPT7_ADC0TRGSEL_LPTMR (14 << SIM_SOPT7_ADC0TRGSEL_SHIFT) /* Low-power timer trigger */
|
||||
@@ -251,6 +273,9 @@
|
||||
# define SIM_SOPT7_ADC1TRGSEL_FTM1 (9 << SIM_SOPT7_ADC1TRGSEL_SHIFT) /* FTM1 trigger */
|
||||
# define SIM_SOPT7_ADC1TRGSEL_FTM2 (10 << SIM_SOPT7_ADC1TRGSEL_SHIFT) /* FTM2 trigger */
|
||||
# define SIM_SOPT7_ADC1TRGSEL_ALARM (12 << SIM_SOPT7_ADC1TRGSEL_SHIFT) /* RTC alarm */
|
||||
#if defined(CONFIG_KINETIS_FTM3)
|
||||
# define SIM_SOPT7_ADC1TRGSEL_FTM3 (11 << SIM_SOPT7_ADC1TRGSEL_SHIFT) /* FTM3 trigger */
|
||||
#endif
|
||||
# define SIM_SOPT7_ADC1TRGSEL_SECS (13 << SIM_SOPT7_ADC1TRGSEL_SHIFT) /* RTC seconds */
|
||||
# define SIM_SOPT7_ADC1TRGSEL_LPTMR (14 << SIM_SOPT7_ADC1TRGSEL_SHIFT) /* Low-power timer trigger */
|
||||
#define SIM_SOPT7_ADC1PRETRGSEL (1 << 12) /* Bit 12: ADC1 pre-trigger select */
|
||||
@@ -313,6 +338,9 @@
|
||||
/* Bits 18-23: Reserved */
|
||||
#define SIM_SCGC3_FTM2 (1 << 24) /* Bit 24: FTM2 Clock Gate Control */
|
||||
/* Bits 25-26: Reserved */
|
||||
#if defined(CONFIG_KINETIS_FTM3)
|
||||
# define SIM_SCGC3_FTM3 (1 << 25) /* Bit 25: FTM3 Clock Gate Control */
|
||||
#endif
|
||||
#define SIM_SCGC3_ADC1 (1 << 27) /* Bit 27: ADC1 Clock Gate Control */
|
||||
/* Bits 28-29: Reserved */
|
||||
#if defined(KINETIS_NSLCD) && KINETIS_NSLCD > 0
|
||||
|
||||
@@ -1,8 +1,9 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_enet.c
|
||||
*
|
||||
* Copyright (C) 2011-2012, 2014-2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
* Copyright (C) 2011-2012, 2014-2017 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
* David Sidrane <david_s5@nscdg.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
@@ -200,6 +201,17 @@
|
||||
|
||||
#define KINETIS_BUF_SIZE ((CONFIG_NET_ETH_MTU & 0xfffffff0) + 0x10)
|
||||
|
||||
/* If this SoC has the RMII Clock Source selection configure it */
|
||||
|
||||
#if defined(CONFIG_KINETIS_EMAC_RMIICLKEXTAL)
|
||||
# define SIM_SOPT2_RMIISRC SIM_SOPT2_RMIISRC_EXTAL
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_KINETIS_EMAC_RMIICLK1588CLKIN)
|
||||
# define SIM_SOPT2_RMIISRC SIM_SOPT2_RMIISRC_EXTBYP
|
||||
#endif
|
||||
|
||||
|
||||
/****************************************************************************
|
||||
* Private Types
|
||||
****************************************************************************/
|
||||
@@ -1989,6 +2001,21 @@ int kinetis_netinitialize(int intf)
|
||||
DEBUGASSERT(intf < CONFIG_KINETIS_ENETNETHIFS);
|
||||
priv = &g_enet[intf];
|
||||
|
||||
#if defined(SIM_SOPT2_RMIISRC)
|
||||
/* If this Soc has RMII clock select then select the RMII clock source.
|
||||
* First if the source is ENET_1588_CLKIN - configure the pin to apply the
|
||||
* clock to the block. Then select it as the source.
|
||||
*/
|
||||
|
||||
# if SIM_SOPT2_RMIISRC == SIM_SOPT2_RMIISRC_EXTBYP
|
||||
kinetis_pinconfig(PIN_ENET_1588_CLKIN);
|
||||
# endif
|
||||
|
||||
regval = getreg32(KINETIS_SIM_SOPT2);
|
||||
regval |= SIM_SOPT2_RMIISRC;
|
||||
putreg32(regval, KINETIS_SIM_SOPT2);
|
||||
#endif
|
||||
|
||||
/* Enable the ENET clock */
|
||||
|
||||
regval = getreg32(KINETIS_SIM_SCGC2);
|
||||
|
||||
@@ -1,10 +1,11 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_pwm.c
|
||||
*
|
||||
* Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
* Alan Carvalho de Assis <acassis@gmail.com>
|
||||
* Ken Fazzone <kfazz01@gmail.com>
|
||||
* Copyright (C) 2013, 2016, 2017 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
* Alan Carvalho de Assis <acassis@gmail.com>
|
||||
* Ken Fazzone <kfazz01@gmail.com>
|
||||
* David Sidrane <david_s5@nscdg.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
@@ -68,7 +69,7 @@
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_KINETIS_FTM0_PWM) || defined(CONFIG_KINETIS_FTM1_PWM) || \
|
||||
defined(CONFIG_KINETIS_FTM2_PWM)
|
||||
defined(CONFIG_KINETIS_FTM2_PWM) || defined(CONFIG_KINETIS_FTM3_PWM)
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
@@ -183,6 +184,18 @@ static struct kinetis_pwmtimer_s g_pwm2dev =
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_KINETIS_FTM3_PWM
|
||||
static struct kinetis_pwmtimer_s g_pwm3dev =
|
||||
{
|
||||
.ops = &g_pwmops,
|
||||
.tpmid = 3,
|
||||
.channel = CONFIG_KINETIS_FTM3_CHANNEL,
|
||||
.base = KINETIS_FTM3_BASE,
|
||||
.pincfg = PWM_FTM3_PINCFG,
|
||||
.pclk = BOARD_CORECLK_FREQ,
|
||||
};
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
@@ -549,6 +562,9 @@ static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
|
||||
|
||||
regval = getreg32(KINETIS_SIM_SCGC3);
|
||||
regval |= SIM_SCGC3_FTM2;
|
||||
#if defined(CONFIG_KINETIS_FTM3_PWM)
|
||||
regval |= SIM_SCGC3_FTM3;
|
||||
#endif
|
||||
putreg32(regval, KINETIS_SIM_SCGC3);
|
||||
|
||||
pwminfo("FTM%d pincfg: %08x\n", priv->tpmid, priv->pincfg);
|
||||
@@ -778,6 +794,13 @@ FAR struct pwm_lowerhalf_s *kinetis_pwminitialize(int timer)
|
||||
break;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_KINETIS_FTM3_PWM
|
||||
case 3:
|
||||
lower = &g_pwm3dev;
|
||||
|
||||
break;
|
||||
#endif
|
||||
|
||||
default:
|
||||
pwmerr("ERROR: No such timer configured\n");
|
||||
return NULL;
|
||||
@@ -786,4 +809,4 @@ FAR struct pwm_lowerhalf_s *kinetis_pwminitialize(int timer)
|
||||
return (FAR struct pwm_lowerhalf_s *)lower;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_KINETIS_FTMn_PWM, n = 0,...,2 */
|
||||
#endif /* CONFIG_KINETIS_FTMn_PWM, n = 0,...,3 */
|
||||
|
||||
@@ -1,10 +1,11 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/src/kinetis/kinetis_pwm.h
|
||||
*
|
||||
* Copyright (C) 2013, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
* Alan Carvalho de Assis <acassis@gmail.com>
|
||||
* Ken Fazzone <kfazz01@gmail.com>
|
||||
* Copyright (C) 2013, 2016, 2017 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
* Alan Carvalho de Assis <acassis@gmail.com>
|
||||
* Ken Fazzone <kfazz01@gmail.com>
|
||||
* David Sidrane <david_s5@nscdg.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
@@ -66,11 +67,14 @@
|
||||
#ifndef CONFIG_KINETIS_FTM2
|
||||
# undef CONFIG_KINETIS_FTM2_PWM
|
||||
#endif
|
||||
#ifndef CONFIG_KINETIS_FTM3
|
||||
# undef CONFIG_KINETIS_FTM3_PWM
|
||||
#endif
|
||||
|
||||
/* Check if PWM support for any channel is enabled. */
|
||||
|
||||
#if defined(CONFIG_KINETIS_FTM0_PWM) || defined(CONFIG_KINETIS_FTM1_PWM) || \
|
||||
defined(CONFIG_KINETIS_FTM2_PWM)
|
||||
defined(CONFIG_KINETIS_FTM2_PWM) || defined(CONFIG_KINETIS_FTM3_PWM)
|
||||
|
||||
#include <arch/board/board.h>
|
||||
#include "chip/kinetis_pinmux.h"
|
||||
@@ -148,6 +152,30 @@
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_KINETIS_FTM3_PWM
|
||||
# if !defined(CONFIG_KINETIS_FTM3_CHANNEL)
|
||||
# error "CONFIG_KINETIS_FTM3_CHANNEL must be provided"
|
||||
# elif CONFIG_KINETIS_FTM3_CHANNEL == 0
|
||||
# define PWM_FTM3_PINCFG GPIO_FTM3_CH0OUT
|
||||
# elif CONFIG_KINETIS_FTM3_CHANNEL == 1
|
||||
# define PWM_FTM3_PINCFG GPIO_FTM3_CH1OUT
|
||||
# elif CONFIG_KINETIS_FTM3_CHANNEL == 2
|
||||
# define PWM_FTM3_PINCFG GPIO_FTM3_CH2OUT
|
||||
# elif CONFIG_KINETIS_FTM3_CHANNEL == 3
|
||||
# define PWM_FTM3_PINCFG GPIO_FTM3_CH3OUT
|
||||
# elif CONFIG_KINETIS_FTM3_CHANNEL == 4
|
||||
# define PWM_FTM3_PINCFG GPIO_FTM3_CH4OUT
|
||||
# elif CONFIG_KINETIS_FTM3_CHANNEL == 5
|
||||
# define PWM_FTM3_PINCFG GPIO_FTM3_CH5OUT
|
||||
# elif CONFIG_KINETIS_FTM3_CHANNEL == 6
|
||||
# define PWM_FTM3_PINCFG GPIO_FTM3_CH6OUT
|
||||
# elif CONFIG_KINETIS_FTM3_CHANNEL == 7
|
||||
# define PWM_FTM3_PINCFG GPIO_FTM3_CH7OUT
|
||||
# else
|
||||
# error "Unsupported value of CONFIG_KINETIS_FTM3_CHANNEL"
|
||||
# endif
|
||||
#endif
|
||||
|
||||
/************************************************************************************
|
||||
* Public Types
|
||||
************************************************************************************/
|
||||
|
||||
@@ -255,6 +255,7 @@ CONFIG_KINETIS_ENETNTXBUFFERS=2
|
||||
# CONFIG_KINETIS_ENETUSEMII is not set
|
||||
CONFIG_KINETIS_ENET_MDIOPULLUP=y
|
||||
# CONFIG_KINETIS_ENET_NORXER is not set
|
||||
CONFIG_KINETIS_EMAC_RMIICLKEXTAL=y
|
||||
CONFIG_KINETIS_EMAC_HPWORK=y
|
||||
|
||||
#
|
||||
|
||||
@@ -154,6 +154,16 @@
|
||||
#define GPIO_FTM0_CH4OUT PIN_FTM0_CH4_1
|
||||
#define GPIO_FTM0_CH5OUT PIN_FTM0_CH5_1
|
||||
|
||||
/* PWM Configuration */
|
||||
/* FTM3 Channels */
|
||||
/* Channels can be modified using kinetis_k66pinmux.h */
|
||||
|
||||
#define GPIO_FTM3_CH0OUT PIN_FTM3_CH0_1
|
||||
#define GPIO_FTM3_CH1OUT PIN_FTM3_CH1_1
|
||||
#define GPIO_FTM3_CH2OUT PIN_FTM3_CH2_1
|
||||
#define GPIO_FTM3_CH3OUT PIN_FTM3_CH3_1
|
||||
#define GPIO_FTM3_CH4OUT PIN_FTM3_CH4_1
|
||||
|
||||
/* LED definitions ******************************************************************/
|
||||
/* The Freedom K66F has a single RGB LED driven by the K66F as follows:
|
||||
*
|
||||
|
||||
@@ -264,6 +264,8 @@ CONFIG_KINETIS_ENETNTXBUFFERS=2
|
||||
# CONFIG_KINETIS_ENETUSEMII is not set
|
||||
CONFIG_KINETIS_ENET_MDIOPULLUP=y
|
||||
# CONFIG_KINETIS_ENET_NORXER is not set
|
||||
# CONFIG_KINETIS_EMAC_RMIICLKEXTAL is not set
|
||||
CONFIG_KINETIS_EMAC_RMIICLK1588CLKIN=y
|
||||
# CONFIG_KINETIS_EMAC_HPWORK is not set
|
||||
CONFIG_KINETIS_EMAC_LPWORK=y
|
||||
|
||||
|
||||
@@ -230,6 +230,7 @@ CONFIG_KINETIS_SDHC=y
|
||||
CONFIG_KINETIS_FTM0=y
|
||||
# CONFIG_KINETIS_FTM1 is not set
|
||||
# CONFIG_KINETIS_FTM2 is not set
|
||||
CONFIG_KINETIS_FTM3=y
|
||||
# CONFIG_KINETIS_LPTIMER is not set
|
||||
CONFIG_KINETIS_RTC=y
|
||||
# CONFIG_KINETIS_EWM is not set
|
||||
@@ -249,6 +250,8 @@ CONFIG_KINETIS_RTC=y
|
||||
#
|
||||
CONFIG_KINETIS_FTM0_PWM=y
|
||||
CONFIG_KINETIS_FTM0_CHANNEL=2
|
||||
CONFIG_KINETIS_FTM3_PWM=y
|
||||
CONFIG_KINETIS_FTM3_CHANNEL=1
|
||||
|
||||
#
|
||||
# Kinetis GPIO Interrupt Configuration
|
||||
@@ -765,14 +768,30 @@ CONFIG_BUILTIN=y
|
||||
#
|
||||
# Standard C Library Options
|
||||
#
|
||||
|
||||
#
|
||||
# Standard C I/O
|
||||
#
|
||||
# CONFIG_STDIO_DISABLE_BUFFERING is not set
|
||||
CONFIG_STDIO_BUFFER_SIZE=64
|
||||
CONFIG_STDIO_LINEBUFFER=y
|
||||
CONFIG_NUNGET_CHARS=2
|
||||
CONFIG_LIB_HOMEDIR="/"
|
||||
# CONFIG_LIBC_DLLFCN is not set
|
||||
# CONFIG_LIBC_MODLIB is not set
|
||||
# CONFIG_NOPRINTF_FIELDWIDTH is not set
|
||||
# CONFIG_LIBC_FLOATINGPOINT is not set
|
||||
CONFIG_LIBC_LONG_LONG=y
|
||||
# CONFIG_LIBC_SCANSET is not set
|
||||
# CONFIG_EOL_IS_CR is not set
|
||||
# CONFIG_EOL_IS_LF is not set
|
||||
# CONFIG_EOL_IS_BOTH_CRLF is not set
|
||||
CONFIG_EOL_IS_EITHER_CRLF=y
|
||||
# CONFIG_MEMCPY_VIK is not set
|
||||
# CONFIG_LIBM is not set
|
||||
|
||||
#
|
||||
# Architecture-Specific Support
|
||||
#
|
||||
CONFIG_ARCH_LOWPUTC=y
|
||||
# CONFIG_ARCH_ROMGETC is not set
|
||||
# CONFIG_LIBC_ARCH_MEMCPY is not set
|
||||
# CONFIG_LIBC_ARCH_MEMCMP is not set
|
||||
# CONFIG_LIBC_ARCH_MEMMOVE is not set
|
||||
@@ -786,39 +805,63 @@ CONFIG_LIB_HOMEDIR="/"
|
||||
# CONFIG_LIBC_ARCH_BZERO is not set
|
||||
# CONFIG_LIBC_ARCH_ELF is not set
|
||||
# CONFIG_ARMV7M_MEMCPY is not set
|
||||
# CONFIG_NOPRINTF_FIELDWIDTH is not set
|
||||
# CONFIG_LIBC_FLOATINGPOINT is not set
|
||||
CONFIG_LIBC_LONG_LONG=y
|
||||
# CONFIG_LIBC_SCANSET is not set
|
||||
# CONFIG_LIBC_IOCTL_VARIADIC is not set
|
||||
# CONFIG_LIBC_WCHAR is not set
|
||||
# CONFIG_LIBC_LOCALE is not set
|
||||
|
||||
#
|
||||
# stdlib Options
|
||||
#
|
||||
CONFIG_LIB_RAND_ORDER=1
|
||||
# CONFIG_EOL_IS_CR is not set
|
||||
# CONFIG_EOL_IS_LF is not set
|
||||
# CONFIG_EOL_IS_BOTH_CRLF is not set
|
||||
CONFIG_EOL_IS_EITHER_CRLF=y
|
||||
CONFIG_LIB_HOMEDIR="/"
|
||||
CONFIG_LIBC_TMPDIR="/tmp"
|
||||
CONFIG_LIBC_MAX_TMPFILE=32
|
||||
|
||||
#
|
||||
# Program Execution Options
|
||||
#
|
||||
# CONFIG_LIBC_EXECFUNCS is not set
|
||||
CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
|
||||
CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
|
||||
|
||||
#
|
||||
# errno Decode Support
|
||||
#
|
||||
CONFIG_LIBC_STRERROR=y
|
||||
# CONFIG_LIBC_STRERROR_SHORT is not set
|
||||
# CONFIG_LIBC_PERROR_STDOUT is not set
|
||||
CONFIG_LIBC_TMPDIR="/tmp"
|
||||
CONFIG_LIBC_MAX_TMPFILE=32
|
||||
CONFIG_ARCH_LOWPUTC=y
|
||||
|
||||
#
|
||||
# memcpy/memset Options
|
||||
#
|
||||
# CONFIG_MEMSET_OPTSPEED is not set
|
||||
# CONFIG_LIBC_DLLFCN is not set
|
||||
# CONFIG_LIBC_MODLIB is not set
|
||||
# CONFIG_LIBC_WCHAR is not set
|
||||
# CONFIG_LIBC_LOCALE is not set
|
||||
|
||||
#
|
||||
# Time/Time Zone Support
|
||||
#
|
||||
# CONFIG_LIBC_LOCALTIME is not set
|
||||
# CONFIG_TIME_EXTENDED is not set
|
||||
CONFIG_LIB_SENDFILE_BUFSIZE=512
|
||||
# CONFIG_ARCH_ROMGETC is not set
|
||||
# CONFIG_MEMCPY_VIK is not set
|
||||
# CONFIG_MEMSET_OPTSPEED is not set
|
||||
CONFIG_ARCH_HAVE_TLS=y
|
||||
|
||||
#
|
||||
# Thread Local Storage (TLS)
|
||||
#
|
||||
# CONFIG_TLS is not set
|
||||
|
||||
#
|
||||
# Network-Related Options
|
||||
#
|
||||
# CONFIG_LIBC_IPv4_ADDRCONV is not set
|
||||
# CONFIG_LIBC_IPv6_ADDRCONV is not set
|
||||
# CONFIG_LIBC_NETDB is not set
|
||||
|
||||
#
|
||||
# NETDB Support
|
||||
#
|
||||
# CONFIG_NETDB_HOSTFILE is not set
|
||||
# CONFIG_LIBC_IOCTL_VARIADIC is not set
|
||||
CONFIG_LIB_SENDFILE_BUFSIZE=512
|
||||
|
||||
#
|
||||
# Non-standard Library Support
|
||||
@@ -911,6 +954,7 @@ CONFIG_EXAMPLES_PWM_DUTYPCT=50
|
||||
# CONFIG_EXAMPLES_SMART is not set
|
||||
# CONFIG_EXAMPLES_SMART_TEST is not set
|
||||
# CONFIG_EXAMPLES_SMP is not set
|
||||
# CONFIG_EXAMPLES_STAT is not set
|
||||
# CONFIG_EXAMPLES_TCPECHO is not set
|
||||
# CONFIG_EXAMPLES_TELNETD is not set
|
||||
# CONFIG_EXAMPLES_TIFF is not set
|
||||
|
||||
Reference in New Issue
Block a user