Mirrors_Framework/nuttx
1
0
Fork 0
mirror of https://github.com/apache/nuttx.git synced 2026-06-06 00:14:22 +08:00
Code Issues Actions 1 Packages Projects Releases Wiki Activity

STM32 F7 Ethernet: Add logic to align all DMA memory to the D-Cache line size

Browse Source
This commit is contained in:
Gregory Nutt
2015-07-19 16:35:25 -06:00
parent 8b9cafe70a
commit ccd3ec0f52
3 changed files with 236 additions and 146 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/src/stm32f7/stm32_ethernet.c
+233 -143
View File
File diff suppressed because it is too large Load Diff
arch/arm/src/stm32f7/stm32_serial.c
+2 -2
View File
@@ -394,9 +394,9 @@ static const struct uart_ops_s g_uart_dma_ops =
/* DMA buffers. DMA buffers must:
*
* 1. Be a multiple of the I-Cache line size. This requirement is assured
* 1. Be a multiple of the D-Cache line size. This requirement is assured
* by the definition of RXDMA buffer size above.
* 2. Be aligned a I-Cache line boundaries, and
* 2. Be aligned a D-Cache line boundaries, and
* 3. Be positioned in DMA-able memory (*NOT* DTCM memory). This must
* be managed by logic in the linker script file.
*