mirror of
https://github.com/apache/nuttx.git
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Add support for the TI PGA11x amplifier/multiplexer
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4977 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
@@ -3050,7 +3050,7 @@
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* include/termios.h and lib/termios/*: Redesigned yet again (this is getting
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painful. NuttX now supports the BOTHER baud setting just as Linux does. termios
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Bxxx definitions are again encoded; cf[set|get][o|i]speed now deal with only the
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encoded values. If the encoed baud is set to BOTHER, then the values in the (non-
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encoded values. If the encode baud is set to BOTHER, then the values in the (non-
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standard) c_ispeed and c_ospeed baud values may be accessed directly.
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* arch/arm/src/stm32/stm32_serial.c: Add minimal termios support for the STM32
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(BOTHER style baud settings only). Contributed by Mike Smith.
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@@ -3068,4 +3068,8 @@
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* configs/stm32f4discovery/src and configs/stm32f4discovery/pm: Add a power
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management configuration for the STM32F4Discovery and supporting logic. This
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check-in also includes some fixes for the F4 RTC alarm logic.
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* drivers/input/pga11x.c and include/nuttx/input/pga11x.h: Add support for the
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TI PGA112/3/6/7 amplifier/multiplexer parts.
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* configs/mirtoo/README.txt, nsh/defconfig, and nxffs/defconfig: Add support
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for the PGA117 on the Mirtoo module.
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+46
-21
@@ -776,6 +776,7 @@ selected as follow:
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Where <subdir> is one of the following:
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ostest:
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=======
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This configuration directory, performs a simple OS test using
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apps/examples/ostest. This configuration use UART1 which is
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available on FUNC 4 and 5 on connector X3:
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@@ -799,6 +800,7 @@ Where <subdir> is one of the following:
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the XC32 toolchain.
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nsh:
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====
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This configuration directory holds configuration files tht can
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be used to support the NuttShell (NSH). This configuration use
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UART1 which is available on FUNC 4 and 5 on connector X3:
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@@ -806,6 +808,8 @@ Where <subdir> is one of the following:
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CONFIG_PIC32MX_UART1=y : UART1 for serial console
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CONFIG_UART1_SERIAL_CONSOLE=n
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UART2
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-----
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If you are not using MPLAB to debug, you may switch to UART2
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by following the instructions above for the ostest configuration.
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@@ -819,7 +823,17 @@ Where <subdir> is one of the following:
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path to the toolchain in setenv.sh. See notes above with regard to
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the XC32 toolchain.
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PGA117 Support:
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--------------
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The Mirtoo's PGA117 amplifier/multipexer is not used by this configuration
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but can be enabled by setting:
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CONFIG_INPUT=y : Enable support for INPUT devices
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CONFIG_SPI_OWNBUS=y : If the PGA117 is the only device on the bus
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CONFIG_INPUT_PGA11X=y : Enable support for the PGA117
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nxffs:
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======
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This is a configuration very similar to the nsh configuration. This
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configure also provides the NuttShell (NSH). And this configuration use
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UART1 which is available on FUNC 4 and 5 on connector X3 (as described
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@@ -867,29 +881,40 @@ Where <subdir> is one of the following:
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CONFIG_NSH_DISABLE_TEST=y
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CONFIG_NSH_DISABLE_WGET=y
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When the system boots, you should have the NXFFS file system mounted
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at /mnt/sst25.
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When the system boots, you should have the NXFFS file system mounted
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at /mnt/sst25.
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NOTES: (1) It takes many seconds to boot the sytem using the NXFFS
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file system because the entire FLASH must be verified on power up
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(and longer the first time that NXFFS comes up and has to format the
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entire FLASH). (2) FAT does not have these delays and this configuration
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can be modified to use the (larger) FAT file system as described below.
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But you will, or course, lose the wear-leveling feature if FAT is used.
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NOTES: (1) It takes many seconds to boot the sytem using the NXFFS
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file system because the entire FLASH must be verified on power up
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(and longer the first time that NXFFS comes up and has to format the
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entire FLASH). (2) FAT does not have these delays and this configuration
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can be modified to use the (larger) FAT file system as described below.
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But you will, or course, lose the wear-leveling feature if FAT is used.
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fat:
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There is no FAT configuration, but the nxffx configuration can be used
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to support the FAT FS if the following changes are made to the NuttX
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configuration file:
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fat:
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----
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There is no FAT configuration, but the nxffx configuration can be used
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to support the FAT FS if the following changes are made to the NuttX
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configuration file:
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CONFIG_FS_NXFFS=n
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CONFIG_FS_FAT=y
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CONFIG_NSH_DISABLE_MKFATFS=n
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CONFIG_FS_NXFFS=n
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CONFIG_FS_FAT=y
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CONFIG_NSH_DISABLE_MKFATFS=n
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In this configuration, the FAT file system will not be automatically
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monounted. When NuttX boots to the NSH prompt, you will find the
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SST5 block driver at /dev/mtdblock0. This can be formatted with a
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FAT file system and mounted with these commands:
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In this configuration, the FAT file system will not be automatically
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monounted. When NuttX boots to the NSH prompt, you will find the
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SST5 block driver at /dev/mtdblock0. This can be formatted with a
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FAT file system and mounted with these commands:
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nsh> mkfatfs /dev/mtdblock0
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nsh> mount -t vfat /dev/mtdblock0 /mnt/sst25
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PGA117 Support:
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---------------
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The Mirtoo's PGA117 amplifier/multipexer is not used by this configuration
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but can be enabled by setting:
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CONFIG_INPUT=y : Enable support for INPUT devices
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CONFIG_SPI_OWNBUS=n : The PGA117 is *not* the only device on the bus
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CONFIG_INPUT_PGA11X=y : Enable support for the PGA117
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nsh> mkfatfs /dev/mtdblock0
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nsh> mount -t vfat /dev/mtdblock0 /mnt/sst25
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@@ -746,6 +746,43 @@ CONFIG_USBMSC_PRODUCTSTR="USBdev Storage"
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CONFIG_USBMSC_VERSIONNO=0x0399
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CONFIG_USBMSC_REMOVABLE=y
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#
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# PGA117 support
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#
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# Prerequisites:
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# CONFIG_INPUT=y is needed to enable support for INPUT devices
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#
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# CONFIG_INPUT_PGA11X
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# Enables support for the PGA11X driver (Needs CONFIG_INPUT)
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# CONFIG_PGA11X_SPIFREQUENCY
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# SPI frequency. Default 1MHz
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# CONFIG_PGA11X_DAISYCHAIN
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# Use two PGA116/7's in Daisy Chain commands.
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# CONFIG_PGA11X_SPIMODE
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# SPI Mode. The specification says that the device operates in Mode 0 or
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# Mode 3. But sometimes you need to tinker with this to get things to
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# work correctly. Default: Mode 0
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# CONFIG_PGA11X_MULTIPLE
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# Can be defined to support multiple PGA11X devices on board. Each
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# device will require a customized SPI interface to distinguish them
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# When SPI_SELECT is called with devid=SPIDEV_MUX.
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#
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# Other settings that effect the driver:
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# CONFIG_SPI_OWNBUS -- If the PGA117 is the only device on the SPI
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# bus, then this should be set to 'y'
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# CONFIG_DEBUG_SPI -- With CONFIG_DEBUG and CONFIG_DEBUG_VERBOSE,
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# this will enable debug output from the PGA117 driver.
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#
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CONFIG_INPUT=n
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CONFIG_SPI_OWNBUS=y
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CONFIG_DEBUG_SPI=n
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CONFIG_INPUT_PGA11X=n
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#CONFIG_PGA11X_SPIFREQUENCY
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CONFIG_PGA11X_DAISYCHAIN=n
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CONFIG_PGA11X_SPIMODE=1
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CONFIG_PGA11X_MULTIPLE=n
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#
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# Settings for examples/uip
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#
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@@ -746,6 +746,46 @@ CONFIG_USBMSC_PRODUCTSTR="USBdev Storage"
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CONFIG_USBMSC_VERSIONNO=0x0399
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CONFIG_USBMSC_REMOVABLE=y
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#
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# PGA117 support
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#
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# Prerequisites:
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# CONFIG_INPUT=y is needed to enable support for INPUT devices
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#
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# CONFIG_INPUT_PGA11X
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# Enables support for the PGA11X driver (Needs CONFIG_INPUT)
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# CONFIG_PGA11X_SPIFREQUENCY
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# SPI frequency. Default 1MHz
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# CONFIG_PGA11X_DAISYCHAIN
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# Use two PGA116/7's in Daisy Chain commands.
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# CONFIG_PGA11X_SPIMODE
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# SPI Mode. The specification says that the device operates in Mode 0 or
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# Mode 3. But sometimes you need to tinker with this to get things to
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# work correctly. Default: Mode 0
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# CONFIG_PGA11X_MULTIPLE
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# Can be defined to support multiple PGA11X devices on board. Each
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# device will require a customized SPI interface to distinguish them
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# When SPI_SELECT is called with devid=SPIDEV_MUX.
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#
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# Other settings that effect the driver:
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# CONFIG_SPI_OWNBUS -- If the PGA117 is enabled, this must be set to 'n'
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# because the PGA117 is *not* the only device on the SPI bus; the SPI
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# bus is shared with the serial FLASH. If PGA117 is not enabled, then
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# 'y' is the correct value because the serial FLASH is the only device
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# on the SPI bus.
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# CONFIG_DEBUG_SPI -- With CONFIG_DEBUG and CONFIG_DEBUG_VERBOSE,
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# this will enable debug output from the PGA117 driver.
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#
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CONFIG_INPUT=n
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CONFIG_SPI_OWNBUS=y
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CONFIG_DEBUG_SPI=n
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CONFIG_INPUT_PGA11X=n
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#CONFIG_PGA11X_SPIFREQUENCY
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CONFIG_PGA11X_DAISYCHAIN=n
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CONFIG_PGA11X_SPIMODE=1
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CONFIG_PGA11X_MULTIPLE=n
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#
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# Settings for examples/uip
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#
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@@ -63,6 +63,10 @@ ifneq ($(CONFIG_INPUT_STMPE811_TEMP_DISABLE),y)
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endif
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endif
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ifeq ($(CONFIG_INPUT_PGA11X),y)
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CSRCS += pga11x.c
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endif
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# Include input device driver build support
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DEPPATH += --dep-path input
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@@ -183,7 +183,7 @@ static void ads7843e_select(FAR struct spi_dev_s *spi)
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* devices competing for the SPI bus
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*/
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SPI_LOCK(spi, true);
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(void)SPI_LOCK(spi, true);
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SPI_SELECT(spi, SPIDEV_TOUCHSCREEN, true);
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/* Now make sure that the SPI bus is configured for the ADS7843 (it
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@@ -229,7 +229,7 @@ static void ads7843e_deselect(FAR struct spi_dev_s *spi)
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/* De-select ADS7843 chip and relinquish the SPI bus. */
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SPI_SELECT(spi, SPIDEV_TOUCHSCREEN, false);
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SPI_LOCK(spi, false);
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(void)SPI_LOCK(spi, false);
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}
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#endif
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File diff suppressed because it is too large
Load Diff
@@ -276,7 +276,7 @@ static void at45db_lock(struct at45db_dev_s *priv)
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* the SPI buss. We will retain that exclusive access until the bus is unlocked.
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*/
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SPI_LOCK(priv->spi, true);
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(void)SPI_LOCK(priv->spi, true);
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/* After locking the SPI bus, the we also need call the setfrequency, setbits, and
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* setmode methods to make sure that the SPI is properly configured for the device.
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@@ -295,7 +295,7 @@ static void at45db_lock(struct at45db_dev_s *priv)
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static inline void at45db_unlock(struct at45db_dev_s *priv)
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{
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SPI_LOCK(priv->spi, false);
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(void)SPI_LOCK(priv->spi, false);
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}
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/************************************************************************************
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+2
-2
@@ -232,7 +232,7 @@ static void m25p_lock(FAR struct spi_dev_s *dev)
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* the SPI buss. We will retain that exclusive access until the bus is unlocked.
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*/
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SPI_LOCK(dev, true);
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(void)SPI_LOCK(dev, true);
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/* After locking the SPI bus, the we also need call the setfrequency, setbits, and
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* setmode methods to make sure that the SPI is properly configured for the device.
|
||||
@@ -251,7 +251,7 @@ static void m25p_lock(FAR struct spi_dev_s *dev)
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static inline void m25p_unlock(FAR struct spi_dev_s *dev)
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{
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SPI_LOCK(dev, false);
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(void)SPI_LOCK(dev, false);
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}
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|
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/************************************************************************************
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|
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@@ -275,7 +275,7 @@ static void ramtron_lock(FAR struct spi_dev_s *dev)
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* the SPI buss. We will retain that exclusive access until the bus is unlocked.
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*/
|
||||
|
||||
SPI_LOCK(dev, true);
|
||||
(void)SPI_LOCK(dev, true);
|
||||
|
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/* After locking the SPI bus, the we also need call the setfrequency, setbits, and
|
||||
* setmode methods to make sure that the SPI is properly configured for the device.
|
||||
@@ -295,7 +295,7 @@ static void ramtron_lock(FAR struct spi_dev_s *dev)
|
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|
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static inline void ramtron_unlock(FAR struct spi_dev_s *dev)
|
||||
{
|
||||
SPI_LOCK(dev, false);
|
||||
(void)SPI_LOCK(dev, false);
|
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}
|
||||
|
||||
/************************************************************************************
|
||||
|
||||
+2
-2
@@ -273,7 +273,7 @@ static void sst25_lock(FAR struct spi_dev_s *dev)
|
||||
* the SPI buss. We will retain that exclusive access until the bus is unlocked.
|
||||
*/
|
||||
|
||||
SPI_LOCK(dev, true);
|
||||
(void)SPI_LOCK(dev, true);
|
||||
|
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/* After locking the SPI bus, the we also need call the setfrequency, setbits, and
|
||||
* setmode methods to make sure that the SPI is properly configured for the device.
|
||||
@@ -292,7 +292,7 @@ static void sst25_lock(FAR struct spi_dev_s *dev)
|
||||
|
||||
static inline void sst25_unlock(FAR struct spi_dev_s *dev)
|
||||
{
|
||||
SPI_LOCK(dev, false);
|
||||
(void)SPI_LOCK(dev, false);
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
|
||||
@@ -308,7 +308,7 @@ struct cc1101_dev_s {
|
||||
|
||||
void cc1101_access_begin(struct cc1101_dev_s * dev)
|
||||
{
|
||||
SPI_LOCK(dev->spi, true);
|
||||
(void)SPI_LOCK(dev->spi, true);
|
||||
SPI_SELECT(dev->spi, SPIDEV_WIRELESS, true);
|
||||
SPI_SETMODE(dev->spi, SPIDEV_MODE0); /* CPOL=0, CPHA=0 */
|
||||
SPI_SETBITS(dev->spi, 8);
|
||||
@@ -318,11 +318,10 @@ void cc1101_access_begin(struct cc1101_dev_s * dev)
|
||||
void cc1101_access_end(struct cc1101_dev_s * dev)
|
||||
{
|
||||
SPI_SELECT(dev->spi, SPIDEV_WIRELESS, false);
|
||||
SPI_LOCK(dev->spi, false);
|
||||
(void)SPI_LOCK(dev->spi, false);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/** CC1101 Access with Range Check
|
||||
*
|
||||
* \param dev CC1101 Private Structure
|
||||
|
||||
@@ -0,0 +1,292 @@
|
||||
/****************************************************************************
|
||||
* include/nuttx/input/pga11x.h
|
||||
*
|
||||
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* References:
|
||||
* "PGA112, PGA113, PGA116, PGA117: Zerø-Drift PROGRAMMABLE GAIN AMPLIFIER
|
||||
* with MUX", SBOS424B, March 2008, Revised September 2008, Texas
|
||||
* Instruments Incorporated"
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __INCLUDE_NUTTX_INPUT_PGA11X_H
|
||||
#define __INCLUDE_NUTTX_INPUT_PGA11X_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <nuttx/spi.h>
|
||||
|
||||
#if defined(CONFIG_INPUT) && defined(CONFIG_INPUT_PGA11X)
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-Processor Definitions
|
||||
****************************************************************************/
|
||||
/* Configuration ************************************************************/
|
||||
/* Prerequisites: CONFIG_INPUT=y
|
||||
*
|
||||
* CONFIG_INPUT_PGA11X
|
||||
* Enables support for the PGA11X driver (Needs CONFIG_INPUT)
|
||||
* CONFIG_PGA11X_SPIFREQUENCY
|
||||
* SPI frequency. Default 1MHz
|
||||
* CONFIG_PGA11X_DAISYCHAIN
|
||||
* Use two PGA116/7's in Daisy Chain commands.
|
||||
* CONFIG_PGA11X_SPIMODE
|
||||
* SPI Mode. The specification says that the device operates in Mode 0 or
|
||||
* Mode 3. But sometimes you need to tinker with this to get things to
|
||||
* work correctly. Default: Mode 0
|
||||
* CONFIG_PGA11X_MULTIPLE
|
||||
* Can be defined to support multiple PGA11X devices on board. Each
|
||||
* device will require a customized SPI interface to distinguish them
|
||||
* When SPI_SELECT is called with devid=SPIDEV_MUX.
|
||||
*
|
||||
* Other settings that effect the driver: CONFIG_SPI_OWNBUS, CONFIG_DEBUG_SPI.
|
||||
*/
|
||||
|
||||
#ifndef CONFIG_PGA11X_SPIFREQUENCY
|
||||
# define CONFIG_PGA11X_SPIFREQUENCY 1000000
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_PGA11X_SPIMODE
|
||||
# define CONFIG_PGA11X_SPIMODE SPIDEV_MODE0
|
||||
#endif
|
||||
|
||||
/* PGA11x Commands **********************************************************/
|
||||
/* Write command Gain Selection Bits (PGA112/PGA113)
|
||||
*
|
||||
* the PGA112 and PGA116 provide binary gain selections (1, 2, 4, 8, 16, 32,
|
||||
* 64, 128); the PGA113 and PGA117 provide scope gain selections (1, 2, 5, 10,
|
||||
* 20, 50, 100, 200).
|
||||
*/
|
||||
|
||||
#define PGA11X_GAIN_1 (0) /* Gain=1: Scope Gain=1 */
|
||||
#define PGA11X_GAIN_2 (1) /* Gain=2: Scope Gain=2 */
|
||||
#define PGA11X_GAIN_4 (2) /* Gain=4: Scope Gain=5 */
|
||||
#define PGA11X_GAIN_5 (2) /* Gain=4: Scope Gain=5 */
|
||||
#define PGA11X_GAIN_8 (3) /* Gain=8: Scope Gain=10 */
|
||||
#define PGA11X_GAIN_10 (3) /* Gain=8: Scope Gain=10 */
|
||||
#define PGA11X_GAIN_16 (4) /* Gain=16: Scope Gain=20 */
|
||||
#define PGA11X_GAIN_20 (4) /* Gain=16: Scope Gain=20 */
|
||||
#define PGA11X_GAIN_32 (5) /* Gain=32: Scope Gain=50 */
|
||||
#define PGA11X_GAIN_50 (5) /* Gain=32: Scope Gain=50 */
|
||||
#define PGA11X_GAIN_64 (6) /* Gain=64: Scope Gain=100 */
|
||||
#define PGA11X_GAIN_100 (6) /* Gain=64: Scope Gain=100 */
|
||||
#define PGA11X_GAIN_128 (7) /* Gain=128: Scope Gain=200 */
|
||||
#define PGA11X_GAIN_200 (7) /* Gain=128: Scope Gain=200 */
|
||||
|
||||
/* Write command Mux Channel Selection Bits
|
||||
*
|
||||
* The PGA112/PGA113 have a two-channel input MUX; the PGA116/PGA117 have a
|
||||
* 10-channel input MUX.
|
||||
*/
|
||||
|
||||
#define PGA11X_CHAN_VCAL (0) /* VCAL/CH0 */
|
||||
#define PGA11X_CHAN_CH0 (0) /* VCAL/CH0 */
|
||||
#define PGA11X_CHAN_CH1 (1) /* CH1 */
|
||||
#define PGA11X_CHAN_CH2 (2) /* CH2 (PGA116/PGA117 only) */
|
||||
#define PGA11X_CHAN_CH3 (3) /* CH3 (PGA116/PGA117 only) */
|
||||
#define PGA11X_CHAN_CH4 (4) /* CH4 (PGA116/PGA117 only) */
|
||||
#define PGA11X_CHAN_CH5 (5) /* CH5 (PGA116/PGA117 only) */
|
||||
#define PGA11X_CHAN_CH6 (6) /* CH6 (PGA116/PGA117 only) */
|
||||
#define PGA11X_CHAN_CH7 (7) /* CH7 (PGA116/PGA117 only) */
|
||||
#define PGA11X_CHAN_CH8 (8) /* CH8 (PGA116/PGA117 only) */
|
||||
#define PGA11X_CHAN_CH9 (9) /* CH9 (PGA116/PGA117 only) */
|
||||
#define PGA11X_CHAN_CAL1 (12) /* CAL1: connects to GND */
|
||||
#define PGA11X_CHAN_CAL2 (13) /* CAL2: connects to 0.9VCAL */
|
||||
#define PGA11X_CHAN_CAL3 (14) /* CAL3: connects to 0.1VCAL */
|
||||
#define PGA11X_CHAN_CAL4 (15) /* CAL4: connects to VREF */
|
||||
|
||||
/* These macros may be used to decode the value returned by pga11x_read() */
|
||||
|
||||
|
||||
#define PGA11X_GAIN_SHIFT (4) /* B*/
|
||||
#define PGA11X_GAIN_MASK (15 << PGA11X_GAIN_SHIFT)
|
||||
|
||||
/* Write command Mux Channel Selection Bits
|
||||
*
|
||||
* The PGA112/PGA113 have a two-channel input MUX; the PGA116/PGA117 have a
|
||||
* 10-channel input MUX.
|
||||
*/
|
||||
|
||||
#ifndef CONFIG_PGA11X_DAISYCHAIN
|
||||
/* Bits 0-3: Channel Selection Bits
|
||||
* Bits 4-7: Gain Selection Bits
|
||||
*/
|
||||
|
||||
# define PGA11X_CHAN(value) ((uint16_t)value & 0x000f)
|
||||
# define PGA11X_GAIN(value) (((uint16_t)value >> 4) & 0x000f)
|
||||
|
||||
#else
|
||||
/* Bits 0-3: U1 Channel Selection Bits
|
||||
* Bits 4-7: U1 Gain Selection Bits
|
||||
* Bits 16-19: U2 Channel Selection Bits
|
||||
* Bits 20-23: U2 Gain Selection Bits
|
||||
*/
|
||||
|
||||
# define PGA11X_U1_CHAN(value) ((uint32_t)value & 0x0000000f)
|
||||
# define PGA11X_U1_GAIN(value) (((uint32_t)value >> 4) & 0x0000000f)
|
||||
# define PGA11X_U2_CHAN(value) (((uint32_t)value >> 16) & 0x0000000f)
|
||||
# define PGA11X_U2_GAIN(value) (((uint32_t)value >> 20) & 0x0000000f)
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************/
|
||||
|
||||
/* Handle used to reference the particular PGA11X instance */
|
||||
|
||||
typedef FAR void *PGA11X_HANDLE;
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef __cplusplus
|
||||
#define EXTERN extern "C"
|
||||
extern "C" {
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: pga11x_initialize
|
||||
*
|
||||
* Description:
|
||||
* Initialize the PGA117 amplifier/multiplexer.
|
||||
*
|
||||
* Input Parameters:
|
||||
* spi - An SPI "bottom half" device driver instance
|
||||
*
|
||||
* Returned Value:
|
||||
* On success, a non-NULL opaque handle is returned; a NULL is returned
|
||||
* on any failure. This handle may be used with the other PGA117 interface
|
||||
* functions to control the multiplexer
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
EXTERN PGA11X_HANDLE pga11x_initialize(FAR struct spi_dev_s *spi);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: pga11x_select
|
||||
*
|
||||
* Description:
|
||||
* Select an input channel and gain.
|
||||
*
|
||||
* Input Parameters:
|
||||
* spi - An SPI "bottom half" device driver instance
|
||||
* channel - See the PGA11X_CHAN_* definitions above
|
||||
* gain - See the PGA11X_GAIN_* definitions above
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero on sucess; a negated errno value on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
EXTERN int pga11x_select(PGA11X_HANDLE handle, uint8_t channel, uint8_t gain);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: pga11x_read
|
||||
*
|
||||
* Description:
|
||||
* Read from the PGA117 amplifier/multiplexer.
|
||||
*
|
||||
* Input Parameters:
|
||||
* spi - An SPI "bottom half" device driver instance
|
||||
*
|
||||
* Returned Value:
|
||||
* 16-bit value read from the device (32-bits in daisy chain mode)
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_PGA11X_DAISYCHAIN
|
||||
EXTERN uint32_t pga11x_read(PGA11X_HANDLE handle);
|
||||
#else
|
||||
EXTERN uint16_t pga11x_read(PGA11X_HANDLE handle);
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: pga11x_noop
|
||||
*
|
||||
* Description:
|
||||
* Perform PGA11x no-operation.
|
||||
*
|
||||
* Input Parameters:
|
||||
* spi - An SPI "bottom half" device driver instance
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero on sucess; a negated errno value on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
EXTERN int pga11x_noop(PGA11X_HANDLE handle);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: pga11x_shutdown
|
||||
*
|
||||
* Description:
|
||||
* Put the PGA11x in shutdown down mode.
|
||||
*
|
||||
* Input Parameters:
|
||||
* spi - An SPI "bottom half" device driver instance
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero on sucess; a negated errno value on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
EXTERN int pga11x_shutdown(PGA11X_HANDLE handle);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: pga11x_enable
|
||||
*
|
||||
* Description:
|
||||
* Take the PGA11x out of shutdown down mode.
|
||||
*
|
||||
* Input Parameters:
|
||||
* spi - An SPI "bottom half" device driver instance
|
||||
*
|
||||
* Returned Value:
|
||||
* Zero on sucess; a negated errno value on failure.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
EXTERN int pga11x_enable(PGA11X_HANDLE handle);
|
||||
|
||||
#undef EXTERN
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_INPUT && CONFIG_INPUT_PGA11X */
|
||||
#endif /* __INCLUDE_NUTTX_INPUT_PGA11X_H */
|
||||
Reference in New Issue
Block a user