mirror of
https://github.com/apache/nuttx.git
synced 2026-05-20 20:44:39 +08:00
arch/risc-v/bl602: add gpioirq and i2c(master) driver
This commit is contained in:
liang
Brennan Ashton
@@ -39,6 +39,9 @@ config BL602_TIMER1
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config BL602_PWM0
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bool "PWM0"
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config BL602_I2C0
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bool "I2C0"
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config BL602_SPIFLASH
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bool "SPI Flash"
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default n
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@@ -48,6 +48,10 @@ CHIP_CSRCS += bl602_idle.c bl602_irq.c bl602_irq_dispatch.c
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CHIP_CSRCS += bl602_serial.c bl602_lowputc.c bl602_tim.c
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CHIP_CSRCS += bl602_start.c bl602_timerisr.c
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ifeq ($(CONFIG_I2C),y)
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CHIP_CSRCS += bl602_i2c.c
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endif
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ifeq ($(CONFIG_TIMER),y)
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CHIP_CSRCS += bl602_tim_lowerhalf.c
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endif
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@@ -25,7 +25,6 @@
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#include <nuttx/config.h>
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#include <stdint.h>
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#include "riscv_arch.h"
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#include "hardware/bl602_glb.h"
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@@ -33,7 +32,7 @@
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* Pre-Processor Declarations
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****************************************************************************/
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#define nop() asm volatile ("nop")
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#define nop() asm volatile("nop")
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/****************************************************************************
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* Public Functions
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@@ -71,3 +70,28 @@ void bl602_swrst_ahb_slave1(uint32_t slave1)
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nop();
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modifyreg32(BL602_SWRST_CFG1, slave1, 0);
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}
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/****************************************************************************
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* Name: bl602_glb_get_bclk_div
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*
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* Description:
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* get bus clock div.
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*
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* Input Parameters:
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* void
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*
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* Returned Value:
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* bus clock div
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*
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****************************************************************************/
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uint8_t bl602_glb_get_bclk_div(void)
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{
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uint32_t tmp_val;
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tmp_val = getreg32(BL602_CLK_CFG0);
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tmp_val =
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(CLK_CFG0_REG_BCLK_DIV_MASK & tmp_val) >> CLK_CFG0_REG_BCLK_DIV_SHIFT;
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return (uint8_t)tmp_val;
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}
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@@ -64,6 +64,22 @@ extern "C"
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void bl602_swrst_ahb_slave1(uint32_t slave1);
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/****************************************************************************
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* Name: bl602_glb_get_bclk_div
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*
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* Description:
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* get bus clock div.
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*
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* Input Parameters:
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* void
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*
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* Returned Value:
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* bus clock div
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*
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****************************************************************************/
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uint8_t bl602_glb_get_bclk_div(void);
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#undef EXTERN
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#if defined(__cplusplus)
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}
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@@ -219,5 +219,5 @@ void bl602_gpiowrite(gpio_pinset_t pinset, bool value)
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bool bl602_gpioread(gpio_pinset_t pinset)
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{
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uint8_t pin = (pinset & GPIO_PIN_MASK) >> GPIO_PIN_SHIFT;
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return (getreg32(BL602_GPIO_CFGCTL30) & (1 << pin)) == 1;
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return ((getreg32(BL602_GPIO_CFGCTL30) & (1 << pin)) ? 1 : 0);
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}
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@@ -28,8 +28,8 @@
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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# include <stdbool.h>
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#include <stdint.h>
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#include <stdbool.h>
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#endif
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#include <nuttx/irq.h>
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@@ -81,11 +81,11 @@
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* ..UU .... .... ....
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*/
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#define GPIO_PUPD_SHIFT (12) /* Bits 16-17: Pull-up/down */
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#define GPIO_PUPD_MASK (3 << GPIO_PUPD_SHIFT)
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# define GPIO_FLOAT (0 << GPIO_PUPD_SHIFT) /* No pull-up, pull-down */
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# define GPIO_PULLUP (1 << GPIO_PUPD_SHIFT) /* Pull-up */
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# define GPIO_PULLDOWN (2 << GPIO_PUPD_SHIFT) /* Pull-down */
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#define GPIO_PUPD_SHIFT (12) /* Bits 16-17: Pull-up/down */
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#define GPIO_PUPD_MASK (3 << GPIO_PUPD_SHIFT)
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#define GPIO_FLOAT (0 << GPIO_PUPD_SHIFT) /* No pull-up, pull-down */
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#define GPIO_PULLUP (1 << GPIO_PUPD_SHIFT) /* Pull-up */
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#define GPIO_PULLDOWN (2 << GPIO_PUPD_SHIFT) /* Pull-down */
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/* Drive:
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*
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@@ -95,12 +95,12 @@
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* .... DD.. .... ....
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*/
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#define GPIO_DRV_SHIFT (10) /* Bits 10-11: Drive */
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#define GPIO_DRV_MASK (3 << GPIO_DRV_SHIFT)
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# define GPIO_DRV_0 (0 << GPIO_DRV_SHIFT)
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# define GPIO_DRV_1 (1 << GPIO_DRV_SHIFT)
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# define GPIO_DRV_2 (2 << GPIO_DRV_SHIFT)
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# define GPIO_DRV_3 (3 << GPIO_DRV_SHIFT)
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#define GPIO_DRV_SHIFT (10) /* Bits 10-11: Drive */
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#define GPIO_DRV_MASK (3 << GPIO_DRV_SHIFT)
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#define GPIO_DRV_0 (0 << GPIO_DRV_SHIFT)
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#define GPIO_DRV_1 (1 << GPIO_DRV_SHIFT)
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#define GPIO_DRV_2 (2 << GPIO_DRV_SHIFT)
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#define GPIO_DRV_3 (3 << GPIO_DRV_SHIFT)
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/* Input Schmitt trigger:
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*
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@@ -110,10 +110,10 @@
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* .... ..S. .... ....
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*/
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#define GPIO_SMT_SHIFT (9) /* Bits 9: SMT Enable */
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#define GPIO_SMT_MASK (3 << GPIO_SMT_SHIFT)
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# define GPIO_SMT_DIS (0 << GPIO_SMT_SHIFT)
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# define GPIO_SMT_EN (1 << GPIO_SMT_SHIFT)
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#define GPIO_SMT_SHIFT (9) /* Bits 9: SMT Enable */
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#define GPIO_SMT_MASK (3 << GPIO_SMT_SHIFT)
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#define GPIO_SMT_DIS (0 << GPIO_SMT_SHIFT)
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#define GPIO_SMT_EN (1 << GPIO_SMT_SHIFT)
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/* GPIO type selection:
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*
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@@ -123,18 +123,18 @@
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* .... ...F FFF. ....
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*/
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#define GPIO_FUNC_SHIFT (5) /* Bits 5-8: GPIO Type */
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#define GPIO_FUNC_MASK (15 << GPIO_FUNC_SHIFT)
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# define GPIO_FUNC_SDIO (1 << GPIO_FUNC_SHIFT) /* SDIO */
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# define GPIO_FUNC_FLASH (2 << GPIO_FUNC_SHIFT) /* Flash */
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# define GPIO_FUNC_SPI (4 << GPIO_FUNC_SHIFT) /* SPI */
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# define GPIO_FUNC_I2C (6 << GPIO_FUNC_SHIFT) /* I2C */
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# define GPIO_FUNC_UART (7 << GPIO_FUNC_SHIFT) /* UART */
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# define GPIO_FUNC_PWM (8 << GPIO_FUNC_SHIFT) /* PWM */
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# define GPIO_FUNC_EXT_PA (9 << GPIO_FUNC_SHIFT) /* Analog */
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# define GPIO_FUNC_ANA (10 << GPIO_FUNC_SHIFT) /* Analog */
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# define GPIO_FUNC_SWGPIO (11 << GPIO_FUNC_SHIFT) /* Software GPIO */
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# define GPIO_FUNC_JTAG (14 << GPIO_FUNC_SHIFT) /* JTAG */
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#define GPIO_FUNC_SHIFT (5) /* Bits 5-8: GPIO Type */
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#define GPIO_FUNC_MASK (15 << GPIO_FUNC_SHIFT)
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#define GPIO_FUNC_SDIO (1 << GPIO_FUNC_SHIFT) /* SDIO */
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#define GPIO_FUNC_FLASH (2 << GPIO_FUNC_SHIFT) /* Flash */
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#define GPIO_FUNC_SPI (4 << GPIO_FUNC_SHIFT) /* SPI */
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#define GPIO_FUNC_I2C (6 << GPIO_FUNC_SHIFT) /* I2C */
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#define GPIO_FUNC_UART (7 << GPIO_FUNC_SHIFT) /* UART */
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#define GPIO_FUNC_PWM (8 << GPIO_FUNC_SHIFT) /* PWM */
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#define GPIO_FUNC_EXT_PA (9 << GPIO_FUNC_SHIFT) /* Analog */
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#define GPIO_FUNC_ANA (10 << GPIO_FUNC_SHIFT) /* Analog */
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#define GPIO_FUNC_SWGPIO (11 << GPIO_FUNC_SHIFT) /* Software GPIO */
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#define GPIO_FUNC_JTAG (14 << GPIO_FUNC_SHIFT) /* JTAG */
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/* This identifies the bit in the port:
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*
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@@ -146,35 +146,49 @@
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#define GPIO_PIN_SHIFT (0) /* Bits 0-4: GPIO number: 0-28 */
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#define GPIO_PIN_MASK (0x1f << GPIO_PIN_SHIFT)
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# define GPIO_PIN0 (0 << GPIO_PIN_SHIFT)
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# define GPIO_PIN1 (1 << GPIO_PIN_SHIFT)
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# define GPIO_PIN2 (2 << GPIO_PIN_SHIFT)
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# define GPIO_PIN3 (3 << GPIO_PIN_SHIFT)
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# define GPIO_PIN4 (4 << GPIO_PIN_SHIFT)
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# define GPIO_PIN5 (5 << GPIO_PIN_SHIFT)
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# define GPIO_PIN6 (6 << GPIO_PIN_SHIFT)
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# define GPIO_PIN7 (7 << GPIO_PIN_SHIFT)
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# define GPIO_PIN8 (8 << GPIO_PIN_SHIFT)
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# define GPIO_PIN9 (9 << GPIO_PIN_SHIFT)
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# define GPIO_PIN10 (10 << GPIO_PIN_SHIFT)
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# define GPIO_PIN11 (11 << GPIO_PIN_SHIFT)
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# define GPIO_PIN12 (12 << GPIO_PIN_SHIFT)
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# define GPIO_PIN13 (13 << GPIO_PIN_SHIFT)
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# define GPIO_PIN14 (14 << GPIO_PIN_SHIFT)
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# define GPIO_PIN15 (15 << GPIO_PIN_SHIFT)
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# define GPIO_PIN16 (16 << GPIO_PIN_SHIFT)
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# define GPIO_PIN17 (17 << GPIO_PIN_SHIFT)
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# define GPIO_PIN18 (18 << GPIO_PIN_SHIFT)
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# define GPIO_PIN19 (19 << GPIO_PIN_SHIFT)
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# define GPIO_PIN20 (20 << GPIO_PIN_SHIFT)
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# define GPIO_PIN21 (21 << GPIO_PIN_SHIFT)
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# define GPIO_PIN22 (22 << GPIO_PIN_SHIFT)
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# define GPIO_PIN23 (23 << GPIO_PIN_SHIFT)
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# define GPIO_PIN24 (24 << GPIO_PIN_SHIFT)
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# define GPIO_PIN25 (25 << GPIO_PIN_SHIFT)
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# define GPIO_PIN26 (26 << GPIO_PIN_SHIFT)
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# define GPIO_PIN27 (27 << GPIO_PIN_SHIFT)
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# define GPIO_PIN28 (28 << GPIO_PIN_SHIFT)
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#define GPIO_PIN0 (0 << GPIO_PIN_SHIFT)
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#define GPIO_PIN1 (1 << GPIO_PIN_SHIFT)
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#define GPIO_PIN2 (2 << GPIO_PIN_SHIFT)
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#define GPIO_PIN3 (3 << GPIO_PIN_SHIFT)
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#define GPIO_PIN4 (4 << GPIO_PIN_SHIFT)
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#define GPIO_PIN5 (5 << GPIO_PIN_SHIFT)
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#define GPIO_PIN6 (6 << GPIO_PIN_SHIFT)
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#define GPIO_PIN7 (7 << GPIO_PIN_SHIFT)
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#define GPIO_PIN8 (8 << GPIO_PIN_SHIFT)
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#define GPIO_PIN9 (9 << GPIO_PIN_SHIFT)
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#define GPIO_PIN10 (10 << GPIO_PIN_SHIFT)
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#define GPIO_PIN11 (11 << GPIO_PIN_SHIFT)
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#define GPIO_PIN12 (12 << GPIO_PIN_SHIFT)
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#define GPIO_PIN13 (13 << GPIO_PIN_SHIFT)
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#define GPIO_PIN14 (14 << GPIO_PIN_SHIFT)
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#define GPIO_PIN15 (15 << GPIO_PIN_SHIFT)
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#define GPIO_PIN16 (16 << GPIO_PIN_SHIFT)
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#define GPIO_PIN17 (17 << GPIO_PIN_SHIFT)
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#define GPIO_PIN18 (18 << GPIO_PIN_SHIFT)
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#define GPIO_PIN19 (19 << GPIO_PIN_SHIFT)
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#define GPIO_PIN20 (20 << GPIO_PIN_SHIFT)
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#define GPIO_PIN21 (21 << GPIO_PIN_SHIFT)
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#define GPIO_PIN22 (22 << GPIO_PIN_SHIFT)
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#define GPIO_PIN23 (23 << GPIO_PIN_SHIFT)
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#define GPIO_PIN24 (24 << GPIO_PIN_SHIFT)
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#define GPIO_PIN25 (25 << GPIO_PIN_SHIFT)
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#define GPIO_PIN26 (26 << GPIO_PIN_SHIFT)
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#define GPIO_PIN27 (27 << GPIO_PIN_SHIFT)
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#define GPIO_PIN28 (28 << GPIO_PIN_SHIFT)
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/* GLB GPIO interrupt trigger mode type definition */
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#define GLB_GPIO_INT_TRIG_NEG_PULSE \
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0 /* GPIO negedge pulse trigger interrupt */
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#define GLB_GPIO_INT_TRIG_POS_PULSE \
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1 /* GPIO posedge pulse trigger interrupt */
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#define GLB_GPIO_INT_TRIG_NEG_LEVEL \
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2 /* GPIO negedge level trigger interrupt (32k 3T) */
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#define GLB_GPIO_INT_TRIG_POS_LEVEL \
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3 /* GPIO posedge level trigger interrupt (32k 3T) */
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/****************************************************************************
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* Public Types
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@@ -286,8 +300,22 @@ bool bl602_gpioread(gpio_pinset_t pinset);
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*
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****************************************************************************/
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int bl602_gpiosetevent(gpio_pinset_t pinset, bool risingedge,
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bool fallingedge, bool event, xcpt_t func, void *arg);
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int bl602_gpiosetevent(gpio_pinset_t pinset,
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bool risingedge,
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bool fallingedge,
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bool event,
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xcpt_t func,
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void * arg);
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/****************************************************************************
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* Name: bl602_gpio_initialize
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*
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* Description:
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* Initialize GPIO drivers for use with /apps/examples/gpio
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*
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****************************************************************************/
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int bl602_gpio_initialize(void);
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/****************************************************************************
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* Function: bl602_dumpgpio
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@@ -300,7 +328,7 @@ int bl602_gpiosetevent(gpio_pinset_t pinset, bool risingedge,
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#ifdef CONFIG_DEBUG_GPIO_INFO
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int bl602_dumpgpio(gpio_pinset_t pinset, const char *msg);
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#else
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# define bl602_dumpgpio(p,m)
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#define bl602_dumpgpio(p, m)
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#endif
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#undef EXTERN
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File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,92 @@
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/****************************************************************************
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* arch/risc-v/src/bl602/bl602_i2c.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
|
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_RISCV_SRC_BL602_BL602_I2C_H
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#define __ARCH_RISCV_SRC_BL602_BL602_I2C_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <nuttx/i2c/i2c_master.h>
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/****************************************************************************
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* Public Data
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****************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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/****************************************************************************
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* Name: bl602_i2cbus_initialize
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*
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* Description:
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* Initialize the selected I2C port. And return a unique instance of struct
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* struct i2c_master_s. This function may be called to obtain multiple
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* instances of the interface, each of which may be set up with a
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* different frequency and slave address.
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*
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* Input Parameters:
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* Port number (for hardware that has multiple I2C interfaces)
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*
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* Returned Value:
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* Valid I2C device structure reference on success; a NULL on failure
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*
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****************************************************************************/
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struct i2c_master_s *bl602_i2cbus_initialize(int port);
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/****************************************************************************
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* Name: bl602_i2cbus_uninitialize
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*
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* Description:
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* De-initialize the selected I2C port, and power down the device.
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*
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* Input Parameters:
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* Device structure as returned by the bl602_i2cbus_initialize()
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*
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* Returned Value:
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* OK on success, ERROR when internal reference count mismatch or dev
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* points to invalid hardware device.
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*
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****************************************************************************/
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int bl602_i2cbus_uninitialize(FAR struct i2c_master_s *dev);
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_RISCV_SRC_BL602_BL602_HBN_H */
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@@ -48,28 +48,36 @@
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/* Register definitions *****************************************************/
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#define BL602_I2C_CONFIG (BL602_I2C_BASE + BL602_I2C_CONFIG_OFFSET)
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#define BL602_I2C_INT_STS (BL602_I2C_BASE + BL602_I2C_INT_STS_OFFSET)
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#define BL602_I2C_SUB_ADDR (BL602_I2C_BASE + BL602_I2C_SUB_ADDR_OFFSET)
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#define BL602_I2C_BUS_BUSY (BL602_I2C_BASE + BL602_I2C_BUS_BUSY_OFFSET)
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#define BL602_I2C_PRD_START (BL602_I2C_BASE + BL602_I2C_PRD_START_OFFSET)
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#define BL602_I2C_PRD_STOP (BL602_I2C_BASE + BL602_I2C_PRD_STOP_OFFSET)
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#define BL602_I2C_PRD_DATA (BL602_I2C_BASE + BL602_I2C_PRD_DATA_OFFSET)
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#define BL602_I2C_FIFO_CONFIG_0 (BL602_I2C_BASE + BL602_I2C_FIFO_CONFIG_0_OFFSET)
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#define BL602_I2C_FIFO_CONFIG_1 (BL602_I2C_BASE + BL602_I2C_FIFO_CONFIG_1_OFFSET)
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#define BL602_I2C_FIFO_WDATA (BL602_I2C_BASE + BL602_I2C_FIFO_WDATA_OFFSET)
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#define BL602_I2C_FIFO_RDATA (BL602_I2C_BASE + BL602_I2C_FIFO_RDATA_OFFSET)
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#define BL602_I2C_CONFIG (BL602_I2C_BASE + BL602_I2C_CONFIG_OFFSET)
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#define BL602_I2C_INT_STS (BL602_I2C_BASE + BL602_I2C_INT_STS_OFFSET)
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#define BL602_I2C_SUB_ADDR (BL602_I2C_BASE + BL602_I2C_SUB_ADDR_OFFSET)
|
||||
#define BL602_I2C_BUS_BUSY (BL602_I2C_BASE + BL602_I2C_BUS_BUSY_OFFSET)
|
||||
#define BL602_I2C_PRD_START (BL602_I2C_BASE + BL602_I2C_PRD_START_OFFSET)
|
||||
#define BL602_I2C_PRD_STOP (BL602_I2C_BASE + BL602_I2C_PRD_STOP_OFFSET)
|
||||
#define BL602_I2C_PRD_DATA (BL602_I2C_BASE + BL602_I2C_PRD_DATA_OFFSET)
|
||||
#define BL602_I2C_FIFO_CONFIG_0 \
|
||||
(BL602_I2C_BASE + BL602_I2C_FIFO_CONFIG_0_OFFSET)
|
||||
#define BL602_I2C_FIFO_CONFIG_1 \
|
||||
(BL602_I2C_BASE + BL602_I2C_FIFO_CONFIG_1_OFFSET)
|
||||
#define BL602_I2C_FIFO_WDATA \
|
||||
(BL602_I2C_BASE + BL602_I2C_FIFO_WDATA_OFFSET)
|
||||
#define BL602_I2C_FIFO_RDATA \
|
||||
(BL602_I2C_BASE + BL602_I2C_FIFO_RDATA_OFFSET)
|
||||
|
||||
/* Register bit definitions *************************************************/
|
||||
|
||||
#define I2C_CONFIG_CR_I2C_DEG_CNT_SHIFT (28)
|
||||
#define I2C_CONFIG_CR_I2C_DEG_CNT_MASK (0x0f << I2C_CONFIG_CR_I2C_DEG_CNT_SHIFT)
|
||||
#define I2C_CONFIG_CR_I2C_DEG_CNT_MASK \
|
||||
(0x0f << I2C_CONFIG_CR_I2C_DEG_CNT_SHIFT)
|
||||
#define I2C_CONFIG_CR_I2C_PKT_LEN_SHIFT (16)
|
||||
#define I2C_CONFIG_CR_I2C_PKT_LEN_MASK (0xff << I2C_CONFIG_CR_I2C_PKT_LEN_SHIFT)
|
||||
#define I2C_CONFIG_CR_I2C_PKT_LEN_MASK \
|
||||
(0xff << I2C_CONFIG_CR_I2C_PKT_LEN_SHIFT)
|
||||
#define I2C_CONFIG_CR_I2C_SLV_ADDR_SHIFT (8)
|
||||
#define I2C_CONFIG_CR_I2C_SLV_ADDR_MASK (0x7f << I2C_CONFIG_CR_I2C_SLV_ADDR_SHIFT)
|
||||
#define I2C_CONFIG_CR_I2C_SLV_ADDR_MASK \
|
||||
(0x7f << I2C_CONFIG_CR_I2C_SLV_ADDR_SHIFT)
|
||||
#define I2C_CONFIG_CR_I2C_SUB_ADDR_BC_SHIFT (5)
|
||||
#define I2C_CONFIG_CR_I2C_SUB_ADDR_BC_MASK (0x03 << I2C_CONFIG_CR_I2C_SUB_ADDR_BC_SHIFT)
|
||||
#define I2C_CONFIG_CR_I2C_SUB_ADDR_BC_MASK \
|
||||
(0x03 << I2C_CONFIG_CR_I2C_SUB_ADDR_BC_SHIFT)
|
||||
#define I2C_CONFIG_CR_I2C_SUB_ADDR_EN (1 << 4)
|
||||
#define I2C_CONFIG_CR_I2C_SCL_SYNC_EN (1 << 3)
|
||||
#define I2C_CONFIG_CR_I2C_DEG_EN (1 << 2)
|
||||
@@ -102,38 +110,50 @@
|
||||
#define I2C_INT_STS_END_INT (1 << 0)
|
||||
|
||||
#define I2C_SUB_ADDR_CR_SUB_ADDR_B3_SHIFT (24)
|
||||
#define I2C_SUB_ADDR_CR_SUB_ADDR_B3_MASK (0xff << I2C_SUB_ADDR_CR_SUB_ADDR_B3_SHIFT)
|
||||
#define I2C_SUB_ADDR_CR_SUB_ADDR_B3_MASK \
|
||||
(0xff << I2C_SUB_ADDR_CR_SUB_ADDR_B3_SHIFT)
|
||||
#define I2C_SUB_ADDR_CR_SUB_ADDR_B2_SHIFT (16)
|
||||
#define I2C_SUB_ADDR_CR_SUB_ADDR_B2_MASK (0xff << I2C_SUB_ADDR_CR_SUB_ADDR_B2_SHIFT)
|
||||
#define I2C_SUB_ADDR_CR_SUB_ADDR_B2_MASK \
|
||||
(0xff << I2C_SUB_ADDR_CR_SUB_ADDR_B2_SHIFT)
|
||||
#define I2C_SUB_ADDR_CR_SUB_ADDR_B1_SHIFT (8)
|
||||
#define I2C_SUB_ADDR_CR_SUB_ADDR_B1_MASK (0xff << I2C_SUB_ADDR_CR_SUB_ADDR_B1_SHIFT)
|
||||
#define I2C_SUB_ADDR_CR_SUB_ADDR_B1_MASK \
|
||||
(0xff << I2C_SUB_ADDR_CR_SUB_ADDR_B1_SHIFT)
|
||||
#define I2C_SUB_ADDR_CR_SUB_ADDR_B0_MASK (0xff)
|
||||
|
||||
#define I2C_BUS_BUSY_CR_BUS_BUSY_CLR (1 << 1)
|
||||
#define I2C_BUS_BUSY_STS_BUS_BUSY (1 << 0)
|
||||
|
||||
#define I2C_PRD_START_CR_PRD_S_PH_3_SHIFT (24)
|
||||
#define I2C_PRD_START_CR_PRD_S_PH_3_MASK (0xff << I2C_PRD_START_CR_PRD_S_PH_3_SHIFT)
|
||||
#define I2C_PRD_START_CR_PRD_S_PH_3_MASK \
|
||||
(0xff << I2C_PRD_START_CR_PRD_S_PH_3_SHIFT)
|
||||
#define I2C_PRD_START_CR_PRD_S_PH_2_SHIFT (16)
|
||||
#define I2C_PRD_START_CR_PRD_S_PH_2_MASK (0xff << I2C_PRD_START_CR_PRD_S_PH_2_SHIFT)
|
||||
#define I2C_PRD_START_CR_PRD_S_PH_2_MASK \
|
||||
(0xff << I2C_PRD_START_CR_PRD_S_PH_2_SHIFT)
|
||||
#define I2C_PRD_START_CR_PRD_S_PH_1_SHIFT (8)
|
||||
#define I2C_PRD_START_CR_PRD_S_PH_1_MASK (0xff << I2C_PRD_START_CR_PRD_S_PH_1_SHIFT)
|
||||
#define I2C_PRD_START_CR_PRD_S_PH_1_MASK \
|
||||
(0xff << I2C_PRD_START_CR_PRD_S_PH_1_SHIFT)
|
||||
#define I2C_PRD_START_CR_PRD_S_PH_0_MASK (0xff)
|
||||
|
||||
#define I2C_PRD_STOP_CR_PRD_P_PH_3_SHIFT (24)
|
||||
#define I2C_PRD_STOP_CR_PRD_P_PH_3_MASK (0xff << I2C_PRD_STOP_CR_PRD_P_PH_3_SHIFT)
|
||||
#define I2C_PRD_STOP_CR_PRD_P_PH_3_MASK \
|
||||
(0xff << I2C_PRD_STOP_CR_PRD_P_PH_3_SHIFT)
|
||||
#define I2C_PRD_STOP_CR_PRD_P_PH_2_SHIFT (16)
|
||||
#define I2C_PRD_STOP_CR_PRD_P_PH_2_MASK (0xff << I2C_PRD_STOP_CR_PRD_P_PH_2_SHIFT)
|
||||
#define I2C_PRD_STOP_CR_PRD_P_PH_2_MASK \
|
||||
(0xff << I2C_PRD_STOP_CR_PRD_P_PH_2_SHIFT)
|
||||
#define I2C_PRD_STOP_CR_PRD_P_PH_1_SHIFT (8)
|
||||
#define I2C_PRD_STOP_CR_PRD_P_PH_1_MASK (0xff << I2C_PRD_STOP_CR_PRD_P_PH_1_SHIFT)
|
||||
#define I2C_PRD_STOP_CR_PRD_P_PH_1_MASK \
|
||||
(0xff << I2C_PRD_STOP_CR_PRD_P_PH_1_SHIFT)
|
||||
#define I2C_PRD_STOP_CR_PRD_P_PH_0_MASK (0xff)
|
||||
|
||||
#define I2C_PRD_DATA_CR_PRD_D_PH_3_SHIFT (24)
|
||||
#define I2C_PRD_DATA_CR_PRD_D_PH_3_MASK (0xff << I2C_PRD_DATA_CR_PRD_D_PH_3_SHIFT)
|
||||
#define I2C_PRD_DATA_CR_PRD_D_PH_3_MASK \
|
||||
(0xff << I2C_PRD_DATA_CR_PRD_D_PH_3_SHIFT)
|
||||
#define I2C_PRD_DATA_CR_PRD_D_PH_2_SHIFT (16)
|
||||
#define I2C_PRD_DATA_CR_PRD_D_PH_2_MASK (0xff << I2C_PRD_DATA_CR_PRD_D_PH_2_SHIFT)
|
||||
#define I2C_PRD_DATA_CR_PRD_D_PH_2_MASK \
|
||||
(0xff << I2C_PRD_DATA_CR_PRD_D_PH_2_SHIFT)
|
||||
#define I2C_PRD_DATA_CR_PRD_D_PH_1_SHIFT (8)
|
||||
#define I2C_PRD_DATA_CR_PRD_D_PH_1_MASK (0xff << I2C_PRD_DATA_CR_PRD_D_PH_1_SHIFT)
|
||||
#define I2C_PRD_DATA_CR_PRD_D_PH_1_MASK \
|
||||
(0xff << I2C_PRD_DATA_CR_PRD_D_PH_1_SHIFT)
|
||||
#define I2C_PRD_DATA_CR_PRD_D_PH_0_MASK (0xff)
|
||||
|
||||
#define I2C_FIFO_CONFIG_0_RX_FIFO_UNDERFLOW (1 << 7)
|
||||
@@ -148,7 +168,22 @@
|
||||
#define I2C_FIFO_CONFIG_1_RX_FIFO_TH (1 << 24)
|
||||
#define I2C_FIFO_CONFIG_1_TX_FIFO_TH (1 << 16)
|
||||
#define I2C_FIFO_CONFIG_1_RX_FIFO_CNT_SHIFT (8)
|
||||
#define I2C_FIFO_CONFIG_1_RX_FIFO_CNT_MASK (0x03 << I2C_FIFO_CONFIG_1_RX_FIFO_CNT_SHIFT)
|
||||
#define I2C_FIFO_CONFIG_1_RX_FIFO_CNT_MASK \
|
||||
(0x03 << I2C_FIFO_CONFIG_1_RX_FIFO_CNT_SHIFT)
|
||||
#define I2C_FIFO_CONFIG_1_TX_FIFO_CNT_MASK (0x03)
|
||||
|
||||
/****************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************/
|
||||
|
||||
/* I2C interrupt type definition */
|
||||
|
||||
#define I2C_TRANS_END_INT 0 /* I2C transfer end interrupt */
|
||||
#define I2C_TX_FIFO_READY_INT 1 /* I2C TX fifo ready interrupt */
|
||||
#define I2C_RX_FIFO_READY_INT 2 /* I2C RX fifo ready interrupt */
|
||||
#define I2C_NACK_RECV_INT 3 /* I2C nack received interrupt */
|
||||
#define I2C_ARB_LOST_INT 4 /* I2C arbitration lost interrupt */
|
||||
#define I2C_FIFO_ERR_INT 5 /* I2C TX/RX FIFO error interrupt */
|
||||
#define I2C_INT_ALL 6 /* I2C interrupt all type */
|
||||
|
||||
#endif /* __ARCH_RISCV_SRC_BL602_HARDWARE_BL602_I2C_H */
|
||||
|
||||
@@ -0,0 +1,77 @@
|
||||
#
|
||||
# This file is autogenerated: PLEASE DO NOT EDIT IT.
|
||||
#
|
||||
# You can use "make menuconfig" to make any modifications to the installed .config file.
|
||||
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
|
||||
# modifications.
|
||||
#
|
||||
# CONFIG_NSH_DISABLEBG is not set
|
||||
# CONFIG_NSH_DISABLE_LOSMART is not set
|
||||
# CONFIG_NSH_DISABLE_UNAME is not set
|
||||
CONFIG_ARCH="risc-v"
|
||||
CONFIG_ARCH_BOARD="bl602evb"
|
||||
CONFIG_ARCH_BOARD_BL602EVB=y
|
||||
CONFIG_ARCH_CHIP="bl602"
|
||||
CONFIG_ARCH_CHIP_BL602=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=8192
|
||||
CONFIG_ARCH_RISCV=y
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
CONFIG_BINFMT_DISABLE=y
|
||||
CONFIG_BL602_HAVE_UART0=y
|
||||
CONFIG_BL602_TIMER0=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=10000
|
||||
CONFIG_BUILTIN=y
|
||||
CONFIG_DEBUG_FEATURES=y
|
||||
CONFIG_DEBUG_FULLOPT=y
|
||||
CONFIG_DEBUG_SYMBOLS=y
|
||||
CONFIG_DEFAULT_SMALL=y
|
||||
CONFIG_DEV_GPIO=y
|
||||
CONFIG_DEV_ZERO=y
|
||||
CONFIG_DISABLE_MQUEUE=y
|
||||
CONFIG_EXAMPLES_GPIO=y
|
||||
CONFIG_EXAMPLES_HELLO=y
|
||||
CONFIG_EXAMPLES_HELLO_STACKSIZE=8192
|
||||
CONFIG_EXAMPLES_TIMER=y
|
||||
CONFIG_FS_PROCFS=y
|
||||
CONFIG_IDLETHREAD_STACKSIZE=8192
|
||||
CONFIG_INTELHEX_BINARY=y
|
||||
CONFIG_LIBC_PERROR_STDOUT=y
|
||||
CONFIG_LIBC_STRERROR=y
|
||||
CONFIG_MAX_TASKS=8
|
||||
CONFIG_NFILE_DESCRIPTORS=6
|
||||
CONFIG_NSH_ARCHINIT=y
|
||||
CONFIG_NSH_BUILTIN_APPS=y
|
||||
CONFIG_NSH_DISABLE_CD=y
|
||||
CONFIG_NSH_DISABLE_CP=y
|
||||
CONFIG_NSH_DISABLE_IFUPDOWN=y
|
||||
CONFIG_NSH_DISABLE_MKDIR=y
|
||||
CONFIG_NSH_DISABLE_RM=y
|
||||
CONFIG_NSH_DISABLE_RMDIR=y
|
||||
CONFIG_NSH_DISABLE_UMOUNT=y
|
||||
CONFIG_NSH_FILEIOSIZE=64
|
||||
CONFIG_NSH_STRERROR=y
|
||||
CONFIG_PREALLOC_TIMERS=0
|
||||
CONFIG_PTHREAD_STACK_DEFAULT=8192
|
||||
CONFIG_RAM_SIZE=134217728
|
||||
CONFIG_RAM_START=0xc0800000
|
||||
CONFIG_RAW_BINARY=y
|
||||
CONFIG_RR_INTERVAL=200
|
||||
CONFIG_RV32IM_CUSTOM_IRQ_SUPPORT=y
|
||||
CONFIG_SCHED_WAITPID=y
|
||||
CONFIG_STACK_COLORATION=y
|
||||
CONFIG_START_DAY=20
|
||||
CONFIG_START_MONTH=3
|
||||
CONFIG_START_YEAR=2020
|
||||
CONFIG_STDIO_DISABLE_BUFFERING=y
|
||||
CONFIG_SYSTEM_NSH=y
|
||||
CONFIG_TASK_NAME_SIZE=12
|
||||
CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=8192
|
||||
CONFIG_TESTING_GETPRIME=y
|
||||
CONFIG_TIMER=y
|
||||
CONFIG_TIMER_ARCH=y
|
||||
CONFIG_UART0_BAUD=2000000
|
||||
CONFIG_UART0_RXBUFSIZE=128
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_UART0_TXBUFSIZE=128
|
||||
CONFIG_USERMAIN_STACKSIZE=8192
|
||||
CONFIG_USER_ENTRYPOINT="nsh_main"
|
||||
@@ -0,0 +1,78 @@
|
||||
#
|
||||
# This file is autogenerated: PLEASE DO NOT EDIT IT.
|
||||
#
|
||||
# You can use "make menuconfig" to make any modifications to the installed .config file.
|
||||
# You can then do "make savedefconfig" to generate a new defconfig file that includes your
|
||||
# modifications.
|
||||
#
|
||||
# CONFIG_NSH_DISABLEBG is not set
|
||||
# CONFIG_NSH_DISABLE_LOSMART is not set
|
||||
# CONFIG_NSH_DISABLE_UNAME is not set
|
||||
CONFIG_ARCH="risc-v"
|
||||
CONFIG_ARCH_BOARD="bl602evb"
|
||||
CONFIG_ARCH_BOARD_BL602EVB=y
|
||||
CONFIG_ARCH_CHIP="bl602"
|
||||
CONFIG_ARCH_CHIP_BL602=y
|
||||
CONFIG_ARCH_INTERRUPTSTACK=8192
|
||||
CONFIG_ARCH_RISCV=y
|
||||
CONFIG_ARCH_STACKDUMP=y
|
||||
CONFIG_BINFMT_DISABLE=y
|
||||
CONFIG_BL602_HAVE_UART0=y
|
||||
CONFIG_BL602_I2C0=y
|
||||
CONFIG_BL602_TIMER0=y
|
||||
CONFIG_BOARD_LOOPSPERMSEC=10000
|
||||
CONFIG_BUILTIN=y
|
||||
CONFIG_DEBUG_FEATURES=y
|
||||
CONFIG_DEBUG_FULLOPT=y
|
||||
CONFIG_DEBUG_SYMBOLS=y
|
||||
CONFIG_DEFAULT_SMALL=y
|
||||
CONFIG_DEV_ZERO=y
|
||||
CONFIG_DISABLE_MQUEUE=y
|
||||
CONFIG_EXAMPLES_HELLO=y
|
||||
CONFIG_EXAMPLES_HELLO_STACKSIZE=8192
|
||||
CONFIG_EXAMPLES_TIMER=y
|
||||
CONFIG_FS_PROCFS=y
|
||||
CONFIG_I2C=y
|
||||
CONFIG_IDLETHREAD_STACKSIZE=8192
|
||||
CONFIG_INTELHEX_BINARY=y
|
||||
CONFIG_LIBC_PERROR_STDOUT=y
|
||||
CONFIG_LIBC_STRERROR=y
|
||||
CONFIG_MAX_TASKS=8
|
||||
CONFIG_NFILE_DESCRIPTORS=6
|
||||
CONFIG_NSH_ARCHINIT=y
|
||||
CONFIG_NSH_BUILTIN_APPS=y
|
||||
CONFIG_NSH_DISABLE_CD=y
|
||||
CONFIG_NSH_DISABLE_CP=y
|
||||
CONFIG_NSH_DISABLE_IFUPDOWN=y
|
||||
CONFIG_NSH_DISABLE_MKDIR=y
|
||||
CONFIG_NSH_DISABLE_RM=y
|
||||
CONFIG_NSH_DISABLE_RMDIR=y
|
||||
CONFIG_NSH_DISABLE_UMOUNT=y
|
||||
CONFIG_NSH_FILEIOSIZE=64
|
||||
CONFIG_NSH_STRERROR=y
|
||||
CONFIG_PREALLOC_TIMERS=0
|
||||
CONFIG_PTHREAD_STACK_DEFAULT=8192
|
||||
CONFIG_RAM_SIZE=134217728
|
||||
CONFIG_RAM_START=0xc0800000
|
||||
CONFIG_RAW_BINARY=y
|
||||
CONFIG_RR_INTERVAL=200
|
||||
CONFIG_RV32IM_CUSTOM_IRQ_SUPPORT=y
|
||||
CONFIG_SCHED_WAITPID=y
|
||||
CONFIG_STACK_COLORATION=y
|
||||
CONFIG_START_DAY=20
|
||||
CONFIG_START_MONTH=3
|
||||
CONFIG_START_YEAR=2020
|
||||
CONFIG_STDIO_DISABLE_BUFFERING=y
|
||||
CONFIG_SYSTEM_I2CTOOL=y
|
||||
CONFIG_SYSTEM_NSH=y
|
||||
CONFIG_TASK_NAME_SIZE=12
|
||||
CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=8192
|
||||
CONFIG_TESTING_GETPRIME=y
|
||||
CONFIG_TIMER=y
|
||||
CONFIG_TIMER_ARCH=y
|
||||
CONFIG_UART0_BAUD=2000000
|
||||
CONFIG_UART0_RXBUFSIZE=128
|
||||
CONFIG_UART0_SERIAL_CONSOLE=y
|
||||
CONFIG_UART0_TXBUFSIZE=128
|
||||
CONFIG_USERMAIN_STACKSIZE=8192
|
||||
CONFIG_USER_ENTRYPOINT="nsh_main"
|
||||
@@ -33,20 +33,47 @@
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/* GPIO Configuration */
|
||||
|
||||
#define BOARD_NGPIOIN 1 /* Amount of GPIO Input pins */
|
||||
#define BOARD_NGPIOOUT 1 /* Amount of GPIO Output pins */
|
||||
#define BOARD_NGPIOINT 1 /* Amount of GPIO Input w/ Interruption pins */
|
||||
|
||||
#define BOARD_GPIO_IN1 (GPIO_INPUT | GPIO_PULLUP | \
|
||||
GPIO_FUNC_SWGPIO | GPIO_PIN0)
|
||||
#define BOARD_GPIO_OUT1 (GPIO_OUTPUT | GPIO_PULLDOWN | \
|
||||
GPIO_FUNC_SWGPIO | GPIO_PIN1)
|
||||
#define BOARD_GPIO_INT1 (GPIO_INPUT | GPIO_PULLUP | \
|
||||
GPIO_FUNC_SWGPIO | GPIO_PIN2)
|
||||
|
||||
/* UART Configuration */
|
||||
|
||||
#define BOARD_UART_0_RX_PIN (GPIO_INPUT | GPIO_PULLUP | GPIO_FUNC_UART | GPIO_PIN7)
|
||||
#define BOARD_UART_0_TX_PIN (GPIO_INPUT | GPIO_PULLUP | GPIO_FUNC_UART | GPIO_PIN16)
|
||||
#define BOARD_UART_1_RX_PIN (GPIO_INPUT | GPIO_PULLUP | GPIO_FUNC_UART | GPIO_PIN3)
|
||||
#define BOARD_UART_1_TX_PIN (GPIO_INPUT | GPIO_PULLUP | GPIO_FUNC_UART | GPIO_PIN4)
|
||||
#define BOARD_UART_0_RX_PIN (GPIO_INPUT | GPIO_PULLUP | \
|
||||
GPIO_FUNC_UART | GPIO_PIN7)
|
||||
#define BOARD_UART_0_TX_PIN (GPIO_INPUT | GPIO_PULLUP | \
|
||||
GPIO_FUNC_UART | GPIO_PIN16)
|
||||
#define BOARD_UART_1_RX_PIN (GPIO_INPUT | GPIO_PULLUP | \
|
||||
GPIO_FUNC_UART | GPIO_PIN3)
|
||||
#define BOARD_UART_1_TX_PIN (GPIO_INPUT | GPIO_PULLUP | \
|
||||
GPIO_FUNC_UART | GPIO_PIN4)
|
||||
|
||||
/* PWM Configuration */
|
||||
|
||||
#define BOARD_PWM_CH0_PIN (GPIO_OUTPUT | GPIO_PULLDOWN | GPIO_FUNC_PWM | GPIO_PIN0)
|
||||
#define BOARD_PWM_CH1_PIN (GPIO_OUTPUT | GPIO_PULLDOWN | GPIO_FUNC_PWM | GPIO_PIN1)
|
||||
#define BOARD_PWM_CH2_PIN (GPIO_OUTPUT | GPIO_PULLDOWN | GPIO_FUNC_PWM | GPIO_PIN2)
|
||||
#define BOARD_PWM_CH3_PIN (GPIO_OUTPUT | GPIO_PULLDOWN | GPIO_FUNC_PWM | GPIO_PIN3)
|
||||
#define BOARD_PWM_CH4_PIN (GPIO_OUTPUT | GPIO_PULLDOWN | GPIO_FUNC_PWM | GPIO_PIN4)
|
||||
#define BOARD_PWM_CH0_PIN (GPIO_OUTPUT | GPIO_PULLDOWN | \
|
||||
GPIO_FUNC_PWM | GPIO_PIN0)
|
||||
#define BOARD_PWM_CH1_PIN (GPIO_OUTPUT | GPIO_PULLDOWN | \
|
||||
GPIO_FUNC_PWM | GPIO_PIN1)
|
||||
#define BOARD_PWM_CH2_PIN (GPIO_OUTPUT | GPIO_PULLDOWN | \
|
||||
GPIO_FUNC_PWM | GPIO_PIN2)
|
||||
#define BOARD_PWM_CH3_PIN (GPIO_OUTPUT | GPIO_PULLDOWN | \
|
||||
GPIO_FUNC_PWM | GPIO_PIN3)
|
||||
#define BOARD_PWM_CH4_PIN (GPIO_OUTPUT | GPIO_PULLDOWN | \
|
||||
GPIO_FUNC_PWM | GPIO_PIN4)
|
||||
|
||||
/* I2C Configuration */
|
||||
|
||||
#define BOARD_I2C_SCL (GPIO_INPUT | GPIO_PULLUP | GPIO_FUNC_I2C | GPIO_PIN4)
|
||||
#define BOARD_I2C_SDA (GPIO_INPUT | GPIO_PULLUP | GPIO_FUNC_I2C | GPIO_PIN3)
|
||||
|
||||
/****************************************************************************
|
||||
* Public Types
|
||||
|
||||
@@ -25,8 +25,12 @@ CSRCS = bl602_bringup.c bl602_boot.c
|
||||
ifeq ($(CONFIG_LIB_BOARDCTL),y)
|
||||
CSRCS += bl602_appinit.c
|
||||
ifeq ($(CONFIG_BOARDCTL_RESET),y)
|
||||
CSRCS += bl602_reset.c
|
||||
CSRCS += bl602_reset.c
|
||||
endif
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_DEV_GPIO),y)
|
||||
CSRCS += bl602_gpio.c
|
||||
endif
|
||||
|
||||
include $(TOPDIR)/boards/Board.mk
|
||||
|
||||
@@ -38,6 +38,8 @@
|
||||
#include <bl602_oneshot_lowerhalf.h>
|
||||
#include <bl602_pwm_lowerhalf.h>
|
||||
#include <bl602_wdt_lowerhalf.h>
|
||||
#include <bl602_gpio.h>
|
||||
#include <bl602_i2c.h>
|
||||
|
||||
#if defined(CONFIG_BL602_SPIFLASH)
|
||||
#include <bl602_spiflash.h>
|
||||
@@ -62,6 +64,9 @@ int bl602_bringup(void)
|
||||
#if defined(CONFIG_BL602_SPIFLASH)
|
||||
FAR struct mtd_dev_s *mtd_part = NULL;
|
||||
const char *path = "/dev/mtdflash";
|
||||
#endif
|
||||
#ifdef CONFIG_I2C
|
||||
struct i2c_master_s *i2c_bus;
|
||||
#endif
|
||||
int ret = OK;
|
||||
|
||||
@@ -149,6 +154,20 @@ int bl602_bringup(void)
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_DEV_GPIO
|
||||
ret = bl602_gpio_initialize();
|
||||
if (ret < 0)
|
||||
{
|
||||
syslog(LOG_ERR, "Failed to initialize GPIO Driver: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_I2C
|
||||
i2c_bus = bl602_i2cbus_initialize(0);
|
||||
i2c_register(i2c_bus, 0);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BL602_SPIFLASH
|
||||
mtd_part = bl602_spiflash_alloc_mtdpart();
|
||||
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user