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https://github.com/apache/nuttx.git
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H5 Kconfig add ethernet, cleanup comments.
This is a combination of 2 commits:
H5 Kconfig ethernet options added.
- This commit cleans up unecessary comments in the Kconfig and adds the the Ethernet/MAC menu.
The menu is copied from the H7 menu, since the peripheral IP is identical.
Remove trailing whitespaces.
Update suggested mask
This commit is contained in:
stbenn
Xiang Xiao
+241
-75
@@ -17,6 +17,7 @@ config ARCH_CHIP_STM32H563ZI
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select STM32H5_STM32H5XXXX
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select STM32H5_STM32H56XXX
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select STM32H5_STM32H563XX
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select STM32H5_STM32H5X3XX
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select STM32H5_FLASH_CONFIG_I
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select STM32H5_IO_CONFIG_Z
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---help---
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@@ -52,7 +53,8 @@ config STM32H5_STM32H563XX
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# STM32H552 and STM32H562 devices documented in RM0439
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bool
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default n
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select STM32H5_HAVE_ETHERNET
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choice
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prompt "Override Flash Size Designator"
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depends on ARCH_CHIP_STM32H5
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@@ -191,10 +193,18 @@ config STM32H5_SRAM2_INIT
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comment "STM32H5 Peripherals"
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menu "STM32H5 Peripheral Support"
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menu "STM32H5 Peripheral Selection"
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# These "hidden" settings determine is a peripheral option is available for the
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# selection MCU
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# These "hidden" settings determine if a peripheral option is available
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# for the selected MCU
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config STM32H5_HAVE_ETHERNET
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bool
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default n
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config STM32H5_HAVE_PHY_POLLED
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bool
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default n
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config STM32H5_HAVE_LPUART1
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bool
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@@ -257,52 +267,14 @@ config STM32H5_USART
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# These are the peripheral selections proper
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comment "AHB1 Peripherals"
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config STM32H5_ETHMAC
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bool "Ethernet MAC"
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default n
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depends on STM32H5_HAVE_ETHERNET
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select NETDEVICES
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select ARCH_HAVE_PHY
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select STM32H5_HAVE_PHY_POLLED
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# TODO
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# GPDMA1, GPDMA2
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# FLITF
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# CRC
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# CORDIC
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# FMAC
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# RAMCFG
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# ETH, ETHTX, ETHRX
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# TZSC1
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# BKPRAM
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# DCACHE
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# SRAM1
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comment "AHB2 Peripherals"
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# TODO
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# GPIOA, GPIOB, GPIOC, GPIOD, GPIOE, GPIOF, GPIOH, GPIOI
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# ADC
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# DAC1
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# DCMI_PSSI
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# AES
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# HASH
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# RNG
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# PKA
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# SAES
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# SRAM2, SRAM3
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comment "AHB4 Peripherals"
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# TODO
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# OTFDEC1
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# SDMMC1, SDMMC2
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# FMC
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# OCTOSPI1
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comment "APB1L Peripherals"
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# TODO
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# TIM2, TIM3, TIM4, TIM5, TIM6, TIM7
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# TIM12, TIM13, TIM14
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# WWDGEN
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# SPI2, SPI3
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# CEC
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#
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config STM32H5_USART2
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bool "USART2"
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default n
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@@ -366,14 +338,6 @@ config STM32H5_USART11
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select ARCH_HAVE_SERIAL_TERMIOS
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select STM32H5_USART
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comment "APB1H Peripherals"
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# TODO
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# DTS
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# LPTIM2
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# FDCAN
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# UCPD1
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config STM32H5_UART9
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bool "UART9"
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default n
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@@ -388,14 +352,6 @@ config STM32H5_UART12
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select ARCH_HAVE_SERIAL_TERMIOS
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select STM32H5_USART
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comment "APB2 Peripherals"
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# TODO
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# TIM1, TIM8, TIM15, TIM16, TIM17
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# SPI1, SPI4, SPI6
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# SAI1, SAI2
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# USBEN
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config STM32H5_USART1
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bool "USART1"
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default n
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@@ -403,8 +359,6 @@ config STM32H5_USART1
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select ARCH_HAVE_SERIAL_TERMIOS
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select STM32H5_USART
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comment "APB3 Peripherals"
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config STM32H5_LPUART1
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bool "LPUART1"
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default n
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@@ -412,14 +366,6 @@ config STM32H5_LPUART1
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select ARCH_HAVE_SERIAL_TERMIOS
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select STM32H5_USART
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# TODO
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# SBS
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# SPI5
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# I2C3, I2C4, I3C2
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# LPTIM1, LPTIM3, LPTIM4, LPTIM5, LPTIM6
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# VREFBUF
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# RTCAPB
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endmenu
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@@ -895,4 +841,224 @@ endif # STM32H5_SERIALDRIVER
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endmenu # U[S]ART Configuration
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menu "Ethernet MAC Configuration"
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depends on STM32H5_ETHMAC
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config STM32H5_PHYADDR
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int "PHY address"
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default 0
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---help---
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The 5-bit address of the PHY on the board. Default: 0
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config STM32H5_PHYINIT
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bool "Board-specific PHY Initialization"
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default n
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---help---
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Some boards require specialized initialization of the PHY before it can be used.
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This may include such things as configuring GPIOs, resetting the PHY, etc.
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If STM32H5_PHYINIT is defined in the configuration then the board specific logic
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must provide stm32_phyinitialize(); The STM32 Ethernet driver will call this
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function one time before it first uses the PHY.
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config STM32H5_PHY_POLLING
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bool "Support network monitoring by polling the PHY"
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default n
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depends on STM32H5_HAVE_PHY_POLLED
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select ARCH_PHY_POLLED
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---help---
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Some boards may not have an interrupt connected to the PHY.
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This option allows the network monitor to be used by polling the PHY for status.
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config STM32H5_MII
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bool "Use MII interface"
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default n
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---help---
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Support Ethernet MII interface.
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choice
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prompt "MII clock configuration"
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default STM32H5_MII_EXTCLK
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depends on STM32H5_MII
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config STM32H5_MII_MCO1
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bool "Use MC01 as MII clock"
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---help---
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Use MC01 to clock the MII interface.
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config STM32H5_MII_MCO2
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bool "Use MC02 as MII clock"
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---help---
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Use MC02 to clock the MII interface.
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config STM32H5_MII_EXTCLK
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bool "External MII clock"
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---help---
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Clocking is provided by external logic.
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endchoice
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config STM32H5_AUTONEG
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bool "Use autonegotiation"
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default y
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---help---
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Use PHY autonegotiation to determine speed and mode
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config STM32H5_ETH_NRXDESC
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int "Number of RX descriptors"
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default 8
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---help---
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Number of RX DMA descriptors to use.
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config STM32H5_ETH_NTXDESC
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int "Number of TX descriptors"
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default 4
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---help---
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Number of TX DMA descriptors to use.
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config STM32H5_ETHFD
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bool "Full duplex"
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default n
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depends on !STM32H5_AUTONEG
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---help---
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If STM32H5_AUTONEG is not defined, then this may be defined to select full duplex
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mode. Default: half-duplex
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config STM32H5_ETH100MBPS
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bool "100 Mbps"
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default n
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depends on !STM32H5_AUTONEG
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---help---
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If STM32H5_AUTONEG is not defined, then this may be defined to select 100 MBps
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speed. Default: 10 Mbps
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config STM32H5_PHYSR
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int "PHY Status Register Address (decimal)"
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depends on STM32H5_AUTONEG
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---help---
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This must be provided if STM32H5_AUTONEG is defined. The PHY status register
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address may diff from PHY to PHY. This configuration sets the address of
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the PHY status register.
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config STM32H5_PHYSR_ALTCONFIG
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bool "PHY Status Alternate Bit Layout"
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default n
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depends on STM32H5_AUTONEG
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---help---
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Different PHYs present speed and mode information in different ways. Some
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will present separate information for speed and mode (this is the default).
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Those PHYs, for example, may provide a 10/100 Mbps indication and a separate
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full/half duplex indication. This options selects an alternative representation
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where speed and mode information are combined. This might mean, for example,
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separate bits for 10HD, 100HD, 10FD and 100FD.
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config STM32H5_PHYSR_SPEED
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hex "PHY Speed Mask"
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depends on STM32H5_AUTONEG && !STM32H5_PHYSR_ALTCONFIG
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---help---
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This must be provided if STM32H5_AUTONEG is defined. This provides bit mask
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for isolating the 10 or 100MBps speed indication.
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config STM32H5_PHYSR_100MBPS
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hex "PHY 100Mbps Speed Value"
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depends on STM32H5_AUTONEG && !STM32H5_PHYSR_ALTCONFIG
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---help---
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This must be provided if STM32H5_AUTONEG is defined. This provides the value
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of the speed bit(s) indicating 100MBps speed.
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config STM32H5_PHYSR_MODE
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hex "PHY Mode Mask"
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depends on STM32H5_AUTONEG && !STM32H5_PHYSR_ALTCONFIG
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---help---
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This must be provided if STM32H5_AUTONEG is defined. This provide bit mask
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for isolating the full or half duplex mode bits.
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config STM32H5_PHYSR_FULLDUPLEX
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hex "PHY Full Duplex Mode Value"
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depends on STM32H5_AUTONEG && !STM32H5_PHYSR_ALTCONFIG
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---help---
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This must be provided if STM32H5_AUTONEG is defined. This provides the
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value of the mode bits indicating full duplex mode.
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config STM32H5_PHYSR_ALTMODE
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hex "PHY Mode Mask"
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depends on STM32H5_AUTONEG && STM32H5_PHYSR_ALTCONFIG
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---help---
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This must be provided if STM32H5_AUTONEG is defined. This provide bit mask
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for isolating the speed and full/half duplex mode bits.
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config STM32H5_PHYSR_10HD
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hex "10MBase-T Half Duplex Value"
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depends on STM32H5_AUTONEG && STM32H5_PHYSR_ALTCONFIG
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---help---
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This must be provided if STM32H5_AUTONEG is defined. This is the value
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under the bit mask that represents the 10Mbps, half duplex setting.
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config STM32H5_PHYSR_100HD
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hex "100Base-T Half Duplex Value"
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depends on STM32H5_AUTONEG && STM32H5_PHYSR_ALTCONFIG
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---help---
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This must be provided if STM32H5_AUTONEG is defined. This is the value
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under the bit mask that represents the 100Mbps, half duplex setting.
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config STM32H5_PHYSR_10FD
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hex "10Base-T Full Duplex Value"
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depends on STM32H5_AUTONEG && STM32H5_PHYSR_ALTCONFIG
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---help---
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This must be provided if STM32H5_AUTONEG is defined. This is the value
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under the bit mask that represents the 10Mbps, full duplex setting.
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config STM32H5_PHYSR_100FD
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hex "100Base-T Full Duplex Value"
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depends on STM32H5_AUTONEG && STM32H5_PHYSR_ALTCONFIG
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---help---
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This must be provided if STM32H5_AUTONEG is defined. This is the value
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under the bit mask that represents the 100Mbps, full duplex setting.
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config STM32H5_ETH_PTP
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bool "Precision Time Protocol (PTP)"
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default n
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---help---
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Precision Time Protocol (PTP). Not supported but some hooks are indicated
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with this condition.
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config STM32H5_RMII
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bool
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default !STM32H5_MII
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choice
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prompt "RMII clock configuration"
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default STM32H5_RMII_EXTCLK
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depends on STM32H5_RMII
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config STM32H5_RMII_MCO1
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bool "Use MC01 as RMII clock"
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---help---
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Use MCO1 to clock the RMII interface.
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config STM32H5_RMII_MCO2
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bool "Use MC02 as RMII clock"
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---help---
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Use MCO2 to clock the RMII interface.
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config STM32H5_RMII_EXTCLK
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bool "External RMII clock"
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---help---
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Clocking is provided by external logic.
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endchoice # RMII clock configuration
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config STM32H5_ETHMAC_REGDEBUG
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bool "Register-Level Debug"
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default n
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depends on DEBUG_NET_INFO
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---help---
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Enable very low-level register access debug. Depends on
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CONFIG_DEBUG_FEATURES.
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config STM32H5_NO_PHY
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bool "MAC has no PHY"
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default n
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endmenu # Ethernet MAC Configuration
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endif # ARCH_CHIP_STM32H5
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