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https://github.com/apache/nuttx.git
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arm64: GoldFish Platform support
Summary: Adding virtual evaluate platform GoldFish. Which is based on Android Goldfish Emulator, it's a ARM virt board but Android enhance it with more featue The patch set goldfish as a chip Signed-off-by: qinwei1 <qinwei1@xiaomi.com>
This commit is contained in:
qinwei1
Xiang Xiao
@@ -53,6 +53,18 @@ config ARCH_CHIP_QEMU
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---help---
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QEMU virt platform (ARMv8a)
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config ARCH_CHIP_GOLDFISH
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bool "goldfish platform (ARMv8a)"
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select ARCH_CORTEX_A53
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select ARCH_HAVE_MULTICPU
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select ARMV8A_HAVE_GICv2
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select ARCH_HAVE_ADDRENV
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select ARCH_HAVE_IRQTRIGGER
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select ARCH_NEED_ADDRENV_MAPPING
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---help---
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Android GoldFish platform for NuttX (ARMv8a),
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based on ARM virt board
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config ARCH_CHIP_FVP_ARMV8R
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bool "ARM FVP virt platform (ARMv8r)"
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select ARCH_CORTEX_R82
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@@ -202,6 +214,7 @@ config ARCH_CHIP
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default "a64" if ARCH_CHIP_A64
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default "rk3399" if ARCH_CHIP_RK3399
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default "qemu" if ARCH_CHIP_QEMU
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default "goldfish" if ARCH_CHIP_GOLDFISH
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default "fvp-v8r" if ARCH_CHIP_FVP_ARMV8R
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default "imx8" if ARCH_CHIP_IMX8
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@@ -278,4 +291,8 @@ if ARCH_CHIP_IMX8
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source "arch/arm64/src/imx8/Kconfig"
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endif
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if ARCH_CHIP_GOLDFISH
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source "arch/arm64/src/goldfish/Kconfig"
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endif
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endif # ARCH_ARM64
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@@ -0,0 +1,92 @@
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/****************************************************************************
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* arch/arm64/include/goldfish/chip.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM64_INCLUDE_GOLDFISH_CHIP_H
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#define __ARCH_ARM64_INCLUDE_GOLDFISH_CHIP_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Number of bytes in @p x kibibytes/mebibytes/gibibytes */
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#define KB(x) ((x) << 10)
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#define MB(x) (KB(x) << 10)
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#define GB(x) (MB(UINT64_C(x)) << 10)
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#if defined(CONFIG_ARCH_CHIP_GOLDFISH)
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/* Addresses and sizes of goldfish (external/qemu/hw/arm/virt.c).
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*
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* 0x00000000 ~ 0x08000000 (128MB):
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* Space for a flash device so we can run bootrom code
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* such as UEFI.
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* 0x08000000 ~ 0x10000000 (128MB..256MB):
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* Used for miscellaneous device I/O (GIC, UART, RTC,
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* GPIO, MMIO, FB, AUDIO, PIPE etc)
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* 0x10000000 ~ 0x40000000 (256MB..1GB):
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* Reserved for possible future PCI support
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* 0x40000000 ~ 0x48000000 (1GB up):
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* RAM, 128MB, The RAM can be config up to 255GB, but
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* it's useless for NuttX
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*/
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#if CONFIG_ARM_GIC_VERSION == 2
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#define CONFIG_GICD_BASE 0x8000000
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#define CONFIG_GICR_BASE 0x8010000
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#endif /* CONFIG_ARM_GIC_VERSION */
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#define CONFIG_FLASH_BASEADDR 0x7000000
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#define CONFIG_FLASH_SIZE MB(128)
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#define CONFIG_DEVICEIO_BASEADDR 0x08000000
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#define CONFIG_DEVICEIO_SIZE MB(512)
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#define CONFIG_RAM_ADDR 0x40000000
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#define CONFIG_RAM_SIZE MB(128)
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#define CONFIG_LOAD_BASE 0x40280000
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#define MPID_TO_CLUSTER_ID(mpid) ((mpid) & ~0xff)
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#endif
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/****************************************************************************
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* Assembly Macros
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****************************************************************************/
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#ifdef __ASSEMBLY__
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.macro get_cpu_id xreg0
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mrs \xreg0, mpidr_el1
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ubfx \xreg0, \xreg0, #0, #8
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.endm
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM64_INCLUDE_GOLDFISH_CHIP_H */
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@@ -0,0 +1,34 @@
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/****************************************************************************
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* arch/arm64/include/goldfish/irq.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/* This file should never be included directly but, rather,
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* only indirectly through nuttx/irq.h
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*/
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#ifndef __ARCH_ARM64_INCLUDE_GOLDFISH_IRQ_H
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#define __ARCH_ARM64_INCLUDE_GOLDFISH_IRQ_H
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define NR_IRQS 220 /* Total number of interrupts */
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#endif /* __ARCH_ARM64_INCLUDE_GOLDFISH_IRQ_H */
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@@ -0,0 +1,8 @@
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#
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# For a description of the syntax of this configuration file,
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# see the file kconfig-language.txt in the NuttX tools repository.
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#
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if ARCH_CHIP_GOLDFISH
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endif # ARCH_CHIP_GOLDFISH
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@@ -0,0 +1,28 @@
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############################################################################
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# arch/arm64/src/qemu/Make.defs
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#
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# Licensed to the Apache Software Foundation (ASF) under one or more
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# contributor license agreements. See the NOTICE file distributed with
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# this work for additional information regarding copyright ownership. The
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# ASF licenses this file to you under the Apache License, Version 2.0 (the
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# "License"); you may not use this file except in compliance with the
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# License. You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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# License for the specific language governing permissions and limitations
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# under the License.
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#
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############################################################################
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include common/Make.defs
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# qemu-specific C source files
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CHIP_CSRCS = goldfish_boot.c goldfish_serial.c
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ifeq ($(CONFIG_ARCH_EARLY_PRINT),y)
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CHIP_ASRCS = goldfish_lowputc.S
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endif
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@@ -0,0 +1,42 @@
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/****************************************************************************
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* arch/arm64/src/goldfish/chip.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM64_SRC_GOLDFISH_CHIP_H
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#define __ARCH_ARM64_SRC_GOLDFISH_CHIP_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <nuttx/arch.h>
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#endif
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/****************************************************************************
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* Macro Definitions
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****************************************************************************/
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#endif /* __ARCH_ARM64_SRC_GOLDFISH_CHIP_H */
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@@ -0,0 +1,177 @@
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/****************************************************************************
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* arch/arm64/src/goldfish/goldfish_boot.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
|
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <assert.h>
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#include <debug.h>
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#include <nuttx/cache.h>
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#ifdef CONFIG_PAGING
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# include <nuttx/page.h>
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#endif
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#include <arch/chip/chip.h>
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#ifdef CONFIG_SMP
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#include "arm64_smp.h"
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#endif
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#include "arm64_arch.h"
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#include "arm64_internal.h"
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#include "arm64_mmu.h"
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#include "goldfish_boot.h"
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#include "goldfish_serial.h"
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/****************************************************************************
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* Private Data
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****************************************************************************/
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static const struct arm_mmu_region g_mmu_regions[] =
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{
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MMU_REGION_FLAT_ENTRY("FLASH_REGION",
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CONFIG_FLASH_BASEADDR, CONFIG_FLASH_SIZE,
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MT_NORMAL | MT_RO | MT_SECURE),
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MMU_REGION_FLAT_ENTRY("DEVICE_REGION",
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CONFIG_DEVICEIO_BASEADDR, CONFIG_DEVICEIO_SIZE,
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MT_DEVICE_NGNRNE | MT_RW | MT_SECURE),
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MMU_REGION_FLAT_ENTRY("DRAM0_S0",
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CONFIG_RAM_ADDR, CONFIG_RAM_SIZE,
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MT_NORMAL | MT_RW | MT_SECURE),
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};
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const struct arm_mmu_config g_mmu_config =
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{
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.num_regions = nitems(g_mmu_regions),
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.mmu_regions = g_mmu_regions,
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};
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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#ifdef CONFIG_SMP
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_cpu_index
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*
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* Description:
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* Return an index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
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* corresponds to the currently executing CPU.
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*
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* If TLS is enabled, then the RTOS can get this information from the TLS
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* info structure. Otherwise, the MCU-specific logic must provide some
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* mechanism to provide the CPU index.
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* An integer index in the range of 0 through (CONFIG_SMP_NCPUS-1) that
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* corresponds to the currently executing CPU.
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*
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****************************************************************************/
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int up_cpu_index(void)
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{
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/* Read the Multiprocessor Affinity Register (MPIDR)
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* And return the CPU ID field
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*/
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return MPID_TO_CORE(GET_MPIDR(), 0);
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}
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|
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/****************************************************************************
|
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* Name: arm64_get_mpid
|
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*
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* Description:
|
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* The function from cpu index to get cpu mpid which is reading
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* from mpidr_el1 register. Different ARM64 Core will use different
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* Affn define, the mpidr_el1 value is not CPU number, So we need
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* to change CPU number to mpid and vice versa
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*
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****************************************************************************/
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uint64_t arm64_get_mpid(int cpu)
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{
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return CORE_TO_MPID(cpu, 0);
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}
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|
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#endif /* CONFIG_SMP */
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|
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/****************************************************************************
|
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* Name: arm64_el_init
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*
|
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* Description:
|
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* The function called from arm64_head.S at very early stage for these
|
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* platform, it's use to:
|
||||
* - Handling special hardware initialize routine which is need to
|
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* run at high ELs
|
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* - Initialize system software such as hypervisor or security firmware
|
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* which is need to run at high ELs
|
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*
|
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****************************************************************************/
|
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void arm64_el_init(void)
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{
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write_sysreg(CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC, cntfrq_el0);
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|
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ARM64_ISB();
|
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}
|
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|
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/****************************************************************************
|
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* Name: arm64_chip_boot
|
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*
|
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* Description:
|
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* Complete boot operations started in arm64_head.S
|
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*
|
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****************************************************************************/
|
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void arm64_chip_boot(void)
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{
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/* MAP IO and DRAM, enable MMU. */
|
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|
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arm64_mmu_init(true);
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|
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/* Perform board-specific device initialization. This would include
|
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* configuration of board specific resources such as GPIOs, LEDs, etc.
|
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*/
|
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|
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goldfish_board_initialize();
|
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|
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#ifdef USE_EARLYSERIALINIT
|
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/* Perform early serial initialization if we are going to use the serial
|
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* driver.
|
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*/
|
||||
|
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arm64_earlyserialinit();
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#endif
|
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}
|
||||
@@ -0,0 +1,81 @@
|
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/****************************************************************************
|
||||
* arch/arm64/src/goldfish/goldfish_boot.h
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM64_SRC_GOLDFISH_GOLDFISH_BOOT_H
|
||||
#define __ARCH_ARM64_SRC_GOLDFISH_GOLDFISH_BOOT_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <nuttx/compiler.h>
|
||||
#include <sys/types.h>
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <arch/chip/chip.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
#define CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC 62500000
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: goldfish_board_initialize
|
||||
*
|
||||
* Description:
|
||||
* All qemu architectures must provide the following entry point. This
|
||||
* entry point is called in the initialization phase -- after
|
||||
* goldfish_memory_initialize and after all memory has been configured and
|
||||
* mapped but before any devices have been initialized.
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* None
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void goldfish_board_initialize(void);
|
||||
|
||||
#undef EXTERN
|
||||
#if defined(__cplusplus)
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_ARM64_SRC_GOLDFISH_GOLDFISH_BOOT_H */
|
||||
@@ -0,0 +1,93 @@
|
||||
/****************************************************************************
|
||||
* arch/arm64/src/goldfish/goldfish_lowputc.S
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************
|
||||
*
|
||||
* DESCRIPTION
|
||||
* Wrapper for early printk
|
||||
*
|
||||
***************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
#include "arm64_macro.inc"
|
||||
|
||||
/****************************************************************************
|
||||
* Public Symbols
|
||||
****************************************************************************/
|
||||
|
||||
.file "goldfish_lowputc.S"
|
||||
|
||||
/****************************************************************************
|
||||
* Assembly Macros
|
||||
****************************************************************************/
|
||||
|
||||
/* 32-bit register definition for qemu pl011 uart */
|
||||
|
||||
#define UART1_BASE_ADDRESS 0x9000000
|
||||
#define EARLY_UART_PL011_BAUD_RATE 115200
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/* PL011 UART initialization
|
||||
*/
|
||||
|
||||
GTEXT(arm64_earlyprintinit)
|
||||
SECTION_FUNC(text, arm64_earlyprintinit)
|
||||
/* it's seem we can do nothing at the qemu platform
|
||||
* for qemu pl011, the QEMU has already initialized UART
|
||||
*/
|
||||
ret
|
||||
|
||||
/* PL011 UART wait UART to be ready to transmit
|
||||
* xb: register which contains the UART base address
|
||||
* c: scratch register number
|
||||
*/
|
||||
|
||||
.macro early_uart_ready xb, wt
|
||||
1:
|
||||
ldrh \wt, [\xb, #0x18] /* <- UARTFR (Flag register) */
|
||||
tst \wt, #0x8 /* Check BUSY bit */
|
||||
b.ne 1b /* Wait for the UART to be ready */
|
||||
.endm
|
||||
|
||||
/* PL011 UART transmit character
|
||||
* xb: register which contains the UART base address
|
||||
* wt: register which contains the character to transmit
|
||||
*/
|
||||
|
||||
.macro early_uart_transmit xb, wt
|
||||
strb \wt, [\xb] /* -> UARTDR (Data Register) */
|
||||
.endm
|
||||
|
||||
/* Print a character on the UART - this function is called by C
|
||||
* x0: character to print
|
||||
*/
|
||||
|
||||
GTEXT(arm64_lowputc)
|
||||
SECTION_FUNC(text, arm64_lowputc)
|
||||
ldr x15, =UART1_BASE_ADDRESS
|
||||
early_uart_ready x15, w2
|
||||
early_uart_transmit x15, w0
|
||||
ret
|
||||
@@ -0,0 +1,74 @@
|
||||
/***************************************************************************
|
||||
* arch/arm64/src/goldfish/goldfish_serial.c
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
***************************************************************************/
|
||||
|
||||
/***************************************************************************
|
||||
* Included Files
|
||||
***************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
#include <sys/types.h>
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <unistd.h>
|
||||
#include <string.h>
|
||||
#include <assert.h>
|
||||
#include <errno.h>
|
||||
#include <debug.h>
|
||||
|
||||
#include <nuttx/serial/uart_pl011.h>
|
||||
|
||||
#include "arm64_internal.h"
|
||||
|
||||
#ifdef USE_SERIALDRIVER
|
||||
/***************************************************************************
|
||||
* Public Functions
|
||||
***************************************************************************/
|
||||
|
||||
/***************************************************************************
|
||||
* Name: arm64_earlyserialinit
|
||||
*
|
||||
* Description:
|
||||
* see arm64_internal.h
|
||||
*
|
||||
***************************************************************************/
|
||||
|
||||
void arm64_earlyserialinit(void)
|
||||
{
|
||||
/* Enable the console UART. The other UARTs will be initialized if and
|
||||
* when they are first opened.
|
||||
*/
|
||||
|
||||
pl011_earlyserialinit();
|
||||
}
|
||||
|
||||
/***************************************************************************
|
||||
* Name: arm64_serialinit
|
||||
*
|
||||
* Description:
|
||||
* see arm64_internal.h
|
||||
*
|
||||
***************************************************************************/
|
||||
|
||||
void arm64_serialinit(void)
|
||||
{
|
||||
pl011_serialinit();
|
||||
}
|
||||
|
||||
#endif /* USE_SERIALDRIVER */
|
||||
@@ -0,0 +1,58 @@
|
||||
/****************************************************************************
|
||||
* arch/arm64/src/goldfish/goldfish_serial.h
|
||||
*
|
||||
* Licensed to the Apache Software Foundation (ASF) under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership. The
|
||||
* ASF licenses this file to you under the Apache License, Version 2.0 (the
|
||||
* "License"); you may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ARCH_ARM64_SRC_GOLDFISH_GOLDFISH_SERIAL_H
|
||||
#define __ARCH_ARM64_SRC_GOLDFISH_GOLDFISH_SERIAL_H
|
||||
|
||||
/****************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Inline Functions
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/****************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_ARCH_CHIP_GOLDFISH
|
||||
#define CONFIG_QEMU_UART_BASE 0x9000000
|
||||
#define CONFIG_QEMU_UART_IRQ (GIC_SPI_INT_BASE + 1)
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif /* __ARCH_ARM64_SRC_GOLDFISH_GOLDFISH_SERIAL_H */
|
||||
Reference in New Issue
Block a user