risc-v/bl602: Add RTC support

arch/risc-v/src/bl602/Kconfig

@@ -45,6 +45,14 @@ config BL602_I2C0
 config BL602_SPI0
 	bool "SPI0"
 
+config BL602_RTC
+	bool "RTC"
+
+config BL602_RTC_USE_XTAL32K
+	bool "Select enable RTC XTAL32K clock source, otherwise use internal RC32K"
+	default n
+	depends on BL602_RTC
+
 config BL602_SPIFLASH
 	bool "SPI Flash"
 	default n

arch/risc-v/src/bl602/Make.defs

@@ -75,6 +75,9 @@ endif
 ifeq ($(CONFIG_BL602_SPIFLASH),y)
 CHIP_CSRCS += bl602_flash.c bl602_spiflash.c
 endif
+ifeq ($(CONFIG_RTC_DRIVER),y)
+CHIP_CSRCS += bl602_rtc.c bl602_rtc_lowerhalf.c
+endif
 
 CHIP_CSRCS += bl602_glb.c bl602_gpio.c bl602_hbn.c bl602_systemreset.c
 

arch/risc-v/src/bl602/bl602_hbn.c

@@ -22,9 +22,85 @@
  * Included Files
  ****************************************************************************/
 
+#include "nuttx/arch.h"
 #include "hardware/bl602_hbn.h"
+#include "bl602_hbn.h"
+#include "bl602_rtc.h"
 #include "riscv_arch.h"
 
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+struct bl602_hbn_info_s
+{
+  bl602_hbn_cb_t out0_callback[3];
+  void *out0_arg[3];
+};
+
+/****************************************************************************
+ * Private Data
+ ****************************************************************************/
+
+static struct bl602_hbn_info_s g_bl602_hbn_info;
+
+/****************************************************************************
+ * Name: bl602_hbn_irq
+ ****************************************************************************/
+
+static int bl602_hbn_irq(int irq, void *context, void *p_arg)
+{
+  bl602_hbn_cb_t isr_cb;
+  void *arg;
+
+  /* GPIO7 GPIO8 and RTC */
+
+  if (bl602_hbn_get_int_state(BL602_HBN_INT_GPIO7))
+    {
+      /* gpio7 sync/async mode */
+
+      bl602_hbn_clear_irq(BL602_HBN_INT_GPIO7);
+
+      isr_cb = g_bl602_hbn_info.out0_callback[BL602_HBN_OUT0_INT_GPIO7];
+      arg = g_bl602_hbn_info.out0_arg[BL602_HBN_OUT0_INT_GPIO7];
+
+      if (isr_cb)
+        {
+          isr_cb(arg);
+        }
+    }
+
+  if (bl602_hbn_get_int_state(BL602_HBN_INT_GPIO8))
+    {
+      /* gpio8 sync/async mode */
+
+      bl602_hbn_clear_irq(BL602_HBN_INT_GPIO8);
+
+      isr_cb = g_bl602_hbn_info.out0_callback[BL602_HBN_OUT0_INT_GPIO8];
+      arg = g_bl602_hbn_info.out0_arg[BL602_HBN_OUT0_INT_GPIO8];
+
+      if (isr_cb)
+        {
+          isr_cb(arg);
+        }
+    }
+
+  if (bl602_hbn_get_int_state(BL602_HBN_INT_RTC))
+    {
+      bl602_hbn_clear_irq(BL602_HBN_INT_RTC);
+      bl602_hbn_clear_rtc_int();
+
+      isr_cb = g_bl602_hbn_info.out0_callback[BL602_HBN_OUT0_INT_RTC];
+      arg = g_bl602_hbn_info.out0_arg[BL602_HBN_OUT0_INT_RTC];
+
+      if (isr_cb)
+        {
+          isr_cb(arg);
+        }
+    }
+  return OK;
+}
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -64,3 +140,160 @@ void bl602_aon_pad_iesmt_cfg(uint8_t pad_cfg)
   modifyreg32(BL602_HBN_IRQ_MODE, HBN_IRQ_MODE_REG_AON_PAD_IE_SMT,
       pad_cfg << 8);
 }
+
+/****************************************************************************
+ * Name: bl602_hbn_get_int_state
+ *
+ * Description:
+ *   HBN get interrupt status.
+ *
+ * Input Parameters:
+ *   irq_type: HBN interrupt type
+ *
+ * Returned Value:
+ *   true or false
+ *
+ ****************************************************************************/
+
+bool bl602_hbn_get_int_state(uint8_t irq_type)
+{
+  uint32_t tmp_val;
+
+  /* Check the parameters */
+
+  tmp_val = getreg32(BL602_HBN_IRQ_STAT);
+
+  if (tmp_val & (1 << irq_type))
+    {
+      return true;
+    }
+
+  return false;
+}
+
+/****************************************************************************
+ * Name: bl602_hbn_clear_irq
+ *
+ * Description:
+ *   HBN clear interrupt status.
+ *
+ * Input Parameters:
+ *   hbn_int_type: HBN interrupt type
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void bl602_hbn_clear_irq(uint8_t hbn_int_type)
+{
+  modifyreg32(BL602_HBN_IRQ_CLR, 0, 1 << hbn_int_type);
+  modifyreg32(BL602_HBN_IRQ_CLR, 1 << hbn_int_type, 0);
+}
+
+/****************************************************************************
+ * Name: bl602_hbn_out0_int_register
+ *
+ * Description:
+ *   HBN out0 interrupt cllback register.
+ *
+ * Input Parameters:
+ *   irq_type: HBN interrupt type
+ *   isr_cb: callback
+ *   arg: callback arg
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on any failure.
+ *
+ ****************************************************************************/
+
+int bl602_hbn_out0_int_register(uint8_t irq_type, bl602_hbn_cb_t isr_cb,
+                                void *arg)
+{
+  irqstate_t flags;
+
+  if (irq_type > 2)
+    {
+      return -EINVAL;
+    }
+
+  flags = enter_critical_section();
+  g_bl602_hbn_info.out0_callback[irq_type] = isr_cb;
+  g_bl602_hbn_info.out0_arg[irq_type] = arg;
+  leave_critical_section(flags);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: bl602_hbn_out0_int_unregister
+ *
+ * Description:
+ *   HBN out0 interrupt cllback unregister.
+ *
+ * Input Parameters:
+ *   irq_type: HBN interrupt type
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on any failure.
+ *
+ ****************************************************************************/
+
+int bl602_hbn_out0_int_unregister(uint8_t irq_type)
+{
+  irqstate_t flags;
+
+  if (irq_type > 2)
+    {
+      return -EINVAL;
+    }
+
+  flags = enter_critical_section();
+  g_bl602_hbn_info.out0_callback[irq_type] = NULL;
+  g_bl602_hbn_info.out0_arg[irq_type] = NULL;
+  leave_critical_section(flags);
+
+  return OK;
+}
+
+/****************************************************************************
+ * Name: bl602_hbn_out0_int_enable
+ *
+ * Description:
+ *   HBN out0 interrupt enable.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+void bl602_hbn_out0_int_enable(void)
+{
+  irq_attach(BL602_IRQ_HBN_OUT0, bl602_hbn_irq, NULL);
+  up_enable_irq(BL602_IRQ_HBN_OUT0);
+}
+
+/****************************************************************************
+ * Name: bl602_hbn_out0_int_disable
+ *
+ * Description:
+ *   HBN out0 interrupt disable.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+void bl602_hbn_out0_int_disable(void)
+{
+  irq_detach(BL602_IRQ_HBN_OUT0);
+  up_disable_irq(BL602_IRQ_HBN_OUT0);
+}

arch/risc-v/src/bl602/bl602_hbn.h

@@ -26,7 +26,11 @@
  ****************************************************************************/
 
 #include <nuttx/config.h>
+#include <stdbool.h>
 
+#include <sys/types.h>
+#include <string.h>
+#include <errno.h>
 #include <stdint.h>
 
 /****************************************************************************
@@ -44,6 +48,24 @@ extern "C"
 #define EXTERN extern
 #endif
 
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define BL602_HBN_OUT0_INT_GPIO7 (0)     /* HBN out 0 interrupt type: GPIO7 */
+#define BL602_HBN_OUT0_INT_GPIO8 (1)     /* HBN out 0 interrupt type: GPIO8 */
+#define BL602_HBN_OUT0_INT_RTC   (2)     /* HBN out 0 interrupt type: RTC */
+
+#define BL602_HBN_INT_GPIO7      (0)     /* HBN interrupt type: GPIO7 */
+#define BL602_HBN_INT_GPIO8      (1)     /* HBN interrupt type: GPIO8 */
+#define BL602_HBN_INT_RTC        (16)    /* HBN interrupt type: RTC */
+#define BL602_HBN_INT_PIR        (17)    /* HBN interrupt type: PIR */
+#define BL602_HBN_INT_BOR        (18)    /* HBN interrupt type: BOR */
+#define BL602_HBN_INT_ACOMP0     (20)    /* HBN interrupt type: ACOMP0 */
+#define BL602_HBN_INT_ACOMP1     (22)    /* HBN interrupt type: ACOMP1 */
+
+typedef CODE int (*bl602_hbn_cb_t)(FAR void *arg);
+
 /****************************************************************************
  * Public Function Prototypes
  ****************************************************************************/
@@ -68,6 +90,107 @@ extern "C"
 
 void bl602_set_uart_clk_sel(int clk_sel);
 
+/****************************************************************************
+ * Name: bl602_hbn_get_int_state
+ *
+ * Description:
+ *   HBN get interrupt status.
+ *
+ * Input Parameters:
+ *   irq_type: HBN interrupt type
+ *
+ * Returned Value:
+ *   true or false
+ *
+ ****************************************************************************/
+
+bool bl602_hbn_get_int_state(uint8_t irq_type);
+
+/****************************************************************************
+ * Name: bl602_hbn_clear_irq
+ *
+ * Description:
+ *   HBN clear interrupt status.
+ *
+ * Input Parameters:
+ *   hbn_int_type: HBN interrupt type
+ *
+ * Returned Value:
+ *   None
+ *
+ ****************************************************************************/
+
+void bl602_hbn_clear_irq(uint8_t hbn_int_type);
+
+/****************************************************************************
+ * Name: bl602_hbn_out0_int_register
+ *
+ * Description:
+ *   HBN out0 interrupt cllback register.
+ *
+ * Input Parameters:
+ *   irq_type: HBN interrupt type
+ *   isr_cb: callback
+ *   arg: callback arg
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on any failure.
+ *
+ ****************************************************************************/
+
+int bl602_hbn_out0_int_register(uint8_t irq_type, bl602_hbn_cb_t isr_cb,
+                                void *arg);
+
+/****************************************************************************
+ * Name: bl602_hbn_out0_int_unregister
+ *
+ * Description:
+ *   HBN out0 interrupt cllback unregister.
+ *
+ * Input Parameters:
+ *   irq_type: HBN interrupt type
+ *
+ * Returned Value:
+ *   Zero (OK) is returned on success; a negated errno value is returned
+ *   on any failure.
+ *
+ ****************************************************************************/
+
+int bl602_hbn_out0_int_unregister(uint8_t irq_type);
+
+/****************************************************************************
+ * Name: bl602_hbn_out0_int_enable
+ *
+ * Description:
+ *   HBN out0 interrupt enable.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+void bl602_hbn_out0_int_enable(void);
+
+/****************************************************************************
+ * Name: bl602_hbn_out0_int_disable
+ *
+ * Description:
+ *   HBN out0 interrupt disable.
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+void bl602_hbn_out0_int_disable(void);
+
 #undef EXTERN
 #if defined(__cplusplus)
 }

arch/risc-v/src/bl602/bl602_rtc.c

@@ -0,0 +1,187 @@
+/****************************************************************************
+ * arch/risc-v/src/bl602/bl602_rtc.c
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include <sys/types.h>
+#include <stdbool.h>
+#include <string.h>
+#include <errno.h>
+
+#include <nuttx/arch.h>
+#include <nuttx/timers/rtc.h>
+
+#include "riscv_arch.h"
+
+#include "chip.h"
+#include "hardware/bl602_hbn.h"
+#include "bl602_rtc.h"
+
+#define ROM_APITABLE            ((uint32_t *)0x21010800)
+#define ROMAPI_HBN_32K_SEL      (ROM_APITABLE + 66)
+
+/****************************************************************************
+ * Private Types
+ ****************************************************************************/
+
+typedef void (*bl602_romapi_hbn_sel_t)(uint8_t clk_type);
+
+/****************************************************************************
+ * Public Functions
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: bl602_hbn_sel
+ *
+ * Description:
+ *   HBN select 32K
+ *
+ * Input Parameters:
+ *   clk_type: HBN 32k clock type
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+void bl602_hbn_sel(uint8_t clk_type)
+{
+  modifyreg32(BL602_HBN_GLB,
+              HBN_GLB_HBN_F32K_SEL_MASK,
+              clk_type << HBN_GLB_HBN_F32K_SEL_SHIFT);
+}
+
+/****************************************************************************
+ * Name: bl602_hbn_clear_rtc_int
+ *
+ * Description:
+ *   HBN clear RTC timer interrupt,this function must be called to clear
+ *   delayed rtc IRQ
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+void bl602_hbn_clear_rtc_int(void)
+{
+  /* Clear RTC commpare:bit1-3 for clearing Delayed RTC IRQ */
+
+  modifyreg32(BL602_HBN_CTL, 0x7 << 1, 0);
+}
+
+/****************************************************************************
+ * Name: bl602_hbn_set_rtc_timer
+ *
+ * Description:
+ *   HBN set RTC timer configuration
+ *
+ * Input Parameters:
+ *   delay: RTC interrupt delay 32 clocks
+ *   compval_low: RTC interrupt commpare value low 32 bits
+ *   compval_high: RTC interrupt commpare value high 32 bits
+ *   comp_mode: RTC interrupt commpare
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+void bl602_hbn_set_rtc_timer(uint8_t delay_type, uint32_t compval_low,
+                             uint32_t compval_high,  uint8_t comp_mode)
+{
+  putreg32(compval_low, BL602_HBN_TIME_L);
+  putreg32(compval_high & 0xff, BL602_HBN_TIME_H);
+
+  modifyreg32(BL602_HBN_CTL,
+              HBN_CTL_RTC_DLY_OPTION | (0x7 << 1),
+              delay_type | (comp_mode << 1));
+}
+
+/****************************************************************************
+ * Name: bl602_hbn_clear_rtc_counter
+ *
+ * Description:
+ *   HBN set RTC timer configuration
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+void bl602_hbn_clear_rtc_counter(void)
+{
+  modifyreg32(BL602_HBN_CTL, 1, 0);
+}
+
+/****************************************************************************
+ * Name: bl602_hbn_enable_rtc_counter
+ *
+ * Description:
+ *   HBN clear RTC timer counter
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+void bl602_hbn_enable_rtc_counter(void)
+{
+  modifyreg32(BL602_HBN_CTL, 0, 1);
+}
+
+/****************************************************************************
+ * Name: bl602_hbn_get_rtc_timer_val
+ *
+ * Description:
+ *   HBN get RTC timer count value
+ *
+ * Input Parameters:
+ *   val_low: RTC count value pointer for low 32 bits
+ *   val_high: RTC count value pointer for high 8 bits
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+void bl602_hbn_get_rtc_timer_val(uint32_t *val_low, uint32_t *val_high)
+{
+  modifyreg32(BL602_HBN_RTC_TIME_H, 0, HBN_RTC_TIME_H_RTC_TIME_LATCH);
+
+  modifyreg32(BL602_HBN_RTC_TIME_H, HBN_RTC_TIME_H_RTC_TIME_LATCH, 0);
+
+  *val_low = getreg32(BL602_HBN_RTC_TIME_L);
+  *val_high = getreg32(BL602_HBN_RTC_TIME_H) & 0xff;
+}
+

arch/risc-v/src/bl602/bl602_rtc.h

@@ -0,0 +1,170 @@
+/****************************************************************************
+ * arch/risc-v/src/bl602/bl602_rtc.h
+ *
+ * Licensed to the Apache Software Foundation (ASF) under one or more
+ * contributor license agreements.  See the NOTICE file distributed with
+ * this work for additional information regarding copyright ownership.  The
+ * ASF licenses this file to you under the Apache License, Version 2.0 (the
+ * "License"); you may not use this file except in compliance with the
+ * License.  You may obtain a copy of the License at
+ *
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations
+ * under the License.
+ *
+ ****************************************************************************/
+
+#ifndef __ARCH_RISCV_SRC_BL602_RTC_LOWERHALF_H
+#define __ARCH_RISCV_SRC_BL602_RTC_LOWERHALF_H
+
+/****************************************************************************
+ * Included Files
+ ****************************************************************************/
+
+#include <nuttx/config.h>
+
+#include "chip.h"
+
+/****************************************************************************
+ * Pre-processor Definitions
+ ****************************************************************************/
+
+#define BL602_HBN_32K_RC               0         /* HBN use rc 32k */
+#define BL602_HBN_32K_XTAL             1         /* HBN use xtal 32k */
+#define BL602_HBN_32K_DIG              3         /* HBN use dig 32k */
+
+#define BL602_HBN_RTC_INT_DELAY_32T    0         /* HBN RTC int delay 32T */
+#define BL602_HBN_RTC_INT_DELAY_0T     1         /* HBN RTC int delay 0T */
+
+#define BL602_HBN_RTC_COMP_BIT0_39     0x01      /* RTC COMP mode bit0-39 */
+#define BL602_HBN_RTC_COMP_BIT0_23     0x02      /* RTC COMP mode bit0-23 */
+#define BL602_HBN_RTC_COMP_BIT13_39    0x04      /* RTC COMP mode bit13-39 */
+
+/****************************************************************************
+ * Public Function Prototypes
+ ****************************************************************************/
+
+/****************************************************************************
+ * Name: bl602_hbn_sel
+ *
+ * Description:
+ *   HBN select 32K
+ *
+ * Input Parameters:
+ *   clk_type: HBN 32k clock type
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+FAR void bl602_hbn_sel(uint8_t clk_type);
+
+/****************************************************************************
+ * Name: bl602_hbn_clear_rtc_int
+ *
+ * Description:
+ *   HBN clear RTC timer interrupt,this function must be called to clear
+ *   delayed rtc IRQ
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+FAR void bl602_hbn_clear_rtc_int(void);
+
+/****************************************************************************
+ * Name: bl602_hbn_set_rtc_timer
+ *
+ * Description:
+ *   HBN set RTC timer configuration
+ *
+ * Input Parameters:
+ *   delay: RTC interrupt delay 32 clocks
+ *   compval_low: RTC interrupt commpare value low 32 bits
+ *   compval_high: RTC interrupt commpare value high 32 bits
+ *   comp_mode: RTC interrupt commpare
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+FAR void bl602_hbn_set_rtc_timer(uint8_t delay_type, uint32_t compval_low,
+                                 uint32_t compval_high,  uint8_t comp_mode);
+
+/****************************************************************************
+ * Name: bl602_hbn_clear_rtc_counter
+ *
+ * Description:
+ *   HBN set RTC timer configuration
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+FAR void bl602_hbn_clear_rtc_counter(void);
+
+/****************************************************************************
+ * Name: bl602_hbn_enable_rtc_counter
+ *
+ * Description:
+ *   HBN clear RTC timer counter
+ *
+ * Input Parameters:
+ *   None
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+FAR void bl602_hbn_enable_rtc_counter(void);
+
+/****************************************************************************
+ * Name: bl602_hbn_get_rtc_timer_val
+ *
+ * Description:
+ *   HBN get RTC timer count value
+ *
+ * Input Parameters:
+ *   val_low: RTC count value pointer for low 32 bits
+ *   val_high: RTC count value pointer for high 8 bits
+ *
+ * Returned Value:
+ *   None.
+ *
+ ****************************************************************************/
+
+FAR void bl602_hbn_get_rtc_timer_val(uint32_t *val_low, uint32_t *val_high);
+
+/****************************************************************************
+ * Name: bl602_rtc_lowerhalf_initialize
+ *
+ * Description:
+ *   None.
+ *
+ * Input Parameters:
+ *   pwm - A number identifying the pwm instance.
+ *
+ * Returned Value:
+ *   On success, a pointer to the BL602 lower half PWM driver is returned.
+ *   NULL is returned on any failure.
+ *
+ ****************************************************************************/
+
+FAR struct rtc_lowerhalf_s *bl602_rtc_lowerhalf_initialize(void);
+
+#endif /* __ARCH_RISCV_SRC_BL602_RTC_LOWERHALF_H */

boards/risc-v/bl602/bl602evb/src/bl602_bringup.c

@@ -38,6 +38,7 @@
 #include <nuttx/wdog.h>
 #include <nuttx/wqueue.h>
 #include <nuttx/input/buttons.h>
+#include <nuttx/timers/rtc.h>
 #include <bl602_tim_lowerhalf.h>
 #include <bl602_oneshot_lowerhalf.h>
 #include <bl602_pwm_lowerhalf.h>
@@ -46,6 +47,7 @@
 #include <bl602_gpio.h>
 #include <bl602_i2c.h>
 #include <bl602_spi.h>
+#include <bl602_rtc.h>
 
 #if defined(CONFIG_BL602_SPIFLASH)
 #include <bl602_spiflash.h>
@@ -275,6 +277,33 @@ int bl602_bringup(void)
   bl602_net_initialize(0);
 #endif
 
+#ifdef CONFIG_RTC_DRIVER
+  /* Instantiate the BL602 lower-half RTC driver */
+
+  FAR struct rtc_lowerhalf_s *lower;
+
+  lower = bl602_rtc_lowerhalf_initialize();
+  if (!lower)
+    {
+      syslog(LOG_ERR,
+             "ERROR: Failed to instantiate the RTC lower-half driver\n");
+    }
+  else
+    {
+      /* Bind the lower half driver and register the combined RTC driver
+       * as /dev/rtc0
+       */
+
+      ret = rtc_initialize(0, lower);
+      if (ret < 0)
+        {
+          syslog(LOG_ERR,
+                 "ERROR: Failed to bind/register the RTC driver: %d\n",
+                 ret);
+        }
+    }
+#endif
+
 #if defined(CONFIG_BL602_BLE_CONTROLLER)
   bl602_hci_uart_init(0);