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Added serial console driver for dm320
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@79 42af7a65-404d-4744-a932-0658087f49c3
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@@ -136,7 +136,7 @@ struct uart_ops_s g_uart_ops =
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static char g_irdarxbuffer[CONFIG_UART_IRDA_RXBUFSIZE];
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static char g_irdatxbuffer[CONFIG_UART_IRDA_TXBUFSIZE];
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static char g_modemrxbuffer[CONFIG_UART_IRDA_RXBUFSIZE];
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static char g_modemrxbuffer[CONFIG_UART_MODEM_RXBUFSIZE];
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static char g_modemtxbuffer[CONFIG_UART_MODEM_TXBUFSIZE];
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/* This describes the state of the C5471 serial IRDA port. */
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@@ -54,7 +54,6 @@ CONFIG_ARCH_STACKDUMP=y
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#
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# CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the
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# console and ttys0 (default is the UART0).
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# CONFIG_UARTn_HWFLOWCONTROL - enables hardware flow control
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# CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received.
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# This specific the size of the receive buffer
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# CONFIG_UARTn_TXBUFSIZE - Characters are buffered before
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@@ -66,8 +65,6 @@ CONFIG_ARCH_STACKDUMP=y
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#
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CONFIG_UART0_SERIAL_CONSOLE=y
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CONFIG_UART1_SERIAL_CONSOLE=n
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CONFIG_UART0_HWFLOWCONTROL=n
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CONFIG_UART1_HWFLOWCONTROL=n
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CONFIG_UART0_TXBUFSIZE=256
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CONFIG_UART1_TXBUFSIZE=256
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CONFIG_UART0_RXBUFSIZE=256
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@@ -0,0 +1,61 @@
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/************************************************************
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* serial.h
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*
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* Copyright (C) 2007 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name Gregory Nutt nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************/
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#ifndef __ARCH_SERIAL_H
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#define __ARCH_SERIAL_H
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/************************************************************
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* Included Files
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************************************************************/
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/************************************************************
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* Definitions
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************************************************************/
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/* IOCTL commands supported by the DM320 serial driver */
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#define TIOCSBRK 0x5401 /* BSD compatibility */
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#define TIOCCBRK 0x5402 /* " " " " */
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#define TIOCSERGSTRUCT 0x5403 /* Get up_dev_t for port */
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/************************************************************
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* Public Data
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************************************************************/
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/************************************************************
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* Public Functions
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************************************************************/
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#endif /* __ARCH_SERIAL_H */
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@@ -45,14 +45,14 @@ ASRCS += up_lowputc.S
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endif
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AOBJS = $(ASRCS:.S=.o)
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CSRCS = up_boot.c up_initialize.c up_initialstate.c up_idle.c up_doirq.c \
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up_irq.c up_syscall.c up_dataabort.c up_prefetchabort.c \
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up_undefinedinsn.c up_interruptcontext.c up_timerisr.c \
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up_createstack.c up_usestack.c up_releasestack.c \
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up_exit.c up_assert.c up_blocktask.c up_unblocktask.c \
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up_releasepending.c up_reprioritizertr.c up_copystate.c \
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up_schedulesigaction.c up_sigdeliver.c \
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up_delay.c up_allocateheap.c
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CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_boot.c \
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up_copystate.c up_createstack.c up_dataabort.c up_delay.c \
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up_doirq.c up_exit.c up_idle.c up_initialize.c \
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up_initialstate.c up_interruptcontext.c up_irq.c \
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up_prefetchabort.c up_releasepending.c up_releasestack.c \
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up_reprioritizertr.c up_schedulesigaction.c up_serial.c \
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up_sigdeliver.c up_syscall.c up_timerisr.c up_unblocktask.c \
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up_undefinedinsn.c up_usestack.c
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COBJS = $(CSRCS:.c=.o)
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SRCS = $(ASRCS) $(CSRCS)
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@@ -67,7 +67,7 @@
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#define UART_DTRR_FE 0x0400 /* Framing error */
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#define UART_DTRR_ORF 0x0200 /* Overrun flag */
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#define UART_DTRR_PEF 0x0100 /* Parity error */
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#define UART_DTRR_DTR_MAS K 0x00ff /* Data transmit/receive */
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#define UART_DTRR_DTR_MASK 0x00ff /* Data transmit/receive */
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/* UART BRSR register bit definitions */
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/* The UART clock is half of the ARM clock */
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@@ -277,6 +277,13 @@ __start:
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bl up_boot
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/* Perform early serial initialization */
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#ifdef CONFIG_DEV_CONSOLE
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mov fp, #0
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bl up_earlyserialinit
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#endif
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/* Finally branch to the OS entry point */
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mov lr, #0
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