Added serial console driver for dm320

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@79 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
2007-03-17 14:52:46 +00:00
parent 223a7dcd51
commit bf8f372a39
7 changed files with 804 additions and 13 deletions
+1 -1
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@@ -136,7 +136,7 @@ struct uart_ops_s g_uart_ops =
static char g_irdarxbuffer[CONFIG_UART_IRDA_RXBUFSIZE];
static char g_irdatxbuffer[CONFIG_UART_IRDA_TXBUFSIZE];
static char g_modemrxbuffer[CONFIG_UART_IRDA_RXBUFSIZE];
static char g_modemrxbuffer[CONFIG_UART_MODEM_RXBUFSIZE];
static char g_modemtxbuffer[CONFIG_UART_MODEM_TXBUFSIZE];
/* This describes the state of the C5471 serial IRDA port. */
-3
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@@ -54,7 +54,6 @@ CONFIG_ARCH_STACKDUMP=y
#
# CONFIG_UARTn_SERIAL_CONSOLE - selects the UARTn for the
# console and ttys0 (default is the UART0).
# CONFIG_UARTn_HWFLOWCONTROL - enables hardware flow control
# CONFIG_UARTn_RXBUFSIZE - Characters are buffered as received.
# This specific the size of the receive buffer
# CONFIG_UARTn_TXBUFSIZE - Characters are buffered before
@@ -66,8 +65,6 @@ CONFIG_ARCH_STACKDUMP=y
#
CONFIG_UART0_SERIAL_CONSOLE=y
CONFIG_UART1_SERIAL_CONSOLE=n
CONFIG_UART0_HWFLOWCONTROL=n
CONFIG_UART1_HWFLOWCONTROL=n
CONFIG_UART0_TXBUFSIZE=256
CONFIG_UART1_TXBUFSIZE=256
CONFIG_UART0_RXBUFSIZE=256
+61
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@@ -0,0 +1,61 @@
/************************************************************
* serial.h
*
* Copyright (C) 2007 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name Gregory Nutt nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************/
#ifndef __ARCH_SERIAL_H
#define __ARCH_SERIAL_H
/************************************************************
* Included Files
************************************************************/
/************************************************************
* Definitions
************************************************************/
/* IOCTL commands supported by the DM320 serial driver */
#define TIOCSBRK 0x5401 /* BSD compatibility */
#define TIOCCBRK 0x5402 /* " " " " */
#define TIOCSERGSTRUCT 0x5403 /* Get up_dev_t for port */
/************************************************************
* Public Data
************************************************************/
/************************************************************
* Public Functions
************************************************************/
#endif /* __ARCH_SERIAL_H */
+8 -8
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@@ -45,14 +45,14 @@ ASRCS += up_lowputc.S
endif
AOBJS = $(ASRCS:.S=.o)
CSRCS = up_boot.c up_initialize.c up_initialstate.c up_idle.c up_doirq.c \
up_irq.c up_syscall.c up_dataabort.c up_prefetchabort.c \
up_undefinedinsn.c up_interruptcontext.c up_timerisr.c \
up_createstack.c up_usestack.c up_releasestack.c \
up_exit.c up_assert.c up_blocktask.c up_unblocktask.c \
up_releasepending.c up_reprioritizertr.c up_copystate.c \
up_schedulesigaction.c up_sigdeliver.c \
up_delay.c up_allocateheap.c
CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_boot.c \
up_copystate.c up_createstack.c up_dataabort.c up_delay.c \
up_doirq.c up_exit.c up_idle.c up_initialize.c \
up_initialstate.c up_interruptcontext.c up_irq.c \
up_prefetchabort.c up_releasepending.c up_releasestack.c \
up_reprioritizertr.c up_schedulesigaction.c up_serial.c \
up_sigdeliver.c up_syscall.c up_timerisr.c up_unblocktask.c \
up_undefinedinsn.c up_usestack.c
COBJS = $(CSRCS:.c=.o)
SRCS = $(ASRCS) $(CSRCS)
+1 -1
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@@ -67,7 +67,7 @@
#define UART_DTRR_FE 0x0400 /* Framing error */
#define UART_DTRR_ORF 0x0200 /* Overrun flag */
#define UART_DTRR_PEF 0x0100 /* Parity error */
#define UART_DTRR_DTR_MAS K 0x00ff /* Data transmit/receive */
#define UART_DTRR_DTR_MASK 0x00ff /* Data transmit/receive */
/* UART BRSR register bit definitions */
/* The UART clock is half of the ARM clock */
+7
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@@ -277,6 +277,13 @@ __start:
bl up_boot
/* Perform early serial initialization */
#ifdef CONFIG_DEV_CONSOLE
mov fp, #0
bl up_earlyserialinit
#endif
/* Finally branch to the OS entry point */
mov lr, #0
File diff suppressed because it is too large Load Diff