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https://github.com/apache/nuttx.git
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Add preliminary support for Z16F serial port
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@560 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
@@ -44,5 +44,5 @@ CMN_CSRCS = up_allocateheap.c up_initialize.c up_schedulesigaction.c \
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up_exit.c up_releasestack.c up_idle.c up_reprioritizertr.c
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CHIP_SSRCS = z16f_lowuart.S
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CHIP_CSRCS = z16f_clkinit.c z16f_irq.c z16f_timerisr.c
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CHIP_CSRCS = z16f_clkinit.c z16f_irq.c z16f_timerisr.c z16f_serial.c
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@@ -322,7 +322,24 @@
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# define Z16F_GPIOK_SMRE _HX32(ffffe198) /* 8-bits: Port K Stop Mode Recovery En */
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#endif
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/* UART0/1 registers ****************************************************************/
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/* UART Register Offsets *************************************************************/
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#define Z16F_UART_TXD _HX8(00) /* 8-bits: UART Transmit Data */
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#define Z16F_UART_RXD _HX8(00) /* 8-bits: UART Receive Data */
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#define Z16F_UART_STAT0 _HX8(01) /* 8-bits: UART Status 0 */
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#define Z16F_UART_CTL _HX8(02) /* 16-bits: UART Control */
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#define Z16F_UART_CTL0 _HX8(02) /* 8-bits: UART Control 0 */
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#define Z16F_UART_CTL1 _HX8(03) /* 8-bits: UART COntrol 1 */
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#define Z16F_UART_MDSTAT _HX8(04) /* 8-bits: UART Mode Select & Status */
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#define Z16F_UART_ADDR _HX8(05) /* 8-bits: UART Address Compare */
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#define Z16F_UART_BR _HX8(06) /* 16-bits: UART Baud Rate */
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#define Z16F_UART_BRH _HX8(06) /* 8-bits: UART Baud Rate High Byte */
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#define Z16F_UART_BRL _HX8(07) /* 8-bits: UART Baud Rate Low Byte */
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#define Z16F_UART0_BASE _HX32(ffffe200) /* UART0 Register Base Address */
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#define Z16F_UART1_BASE _HX32(ffffe210) /* UART1 Register Base Address */
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/* UART0/1 Registers ****************************************************************/
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#define Z16F_UART0_TXD _HX32(ffffe200) /* 8-bits: UART0 Transmit Data */
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#define Z16F_UART0_RXD _HX32(ffffe200) /* 8-bits: UART0 Receive Data */
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@@ -348,6 +365,45 @@
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#define Z16F_UART1_BRH _HX32(ffffe216) /* 8-bits: UART1 Baud Rate High Byte */
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#define Z16F_UART1_BRL _HX32(ffffe217) /* 8-bits: UART1 Baud Rate Low Byte */
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/* UART0/1 Status 0 Register Bit Definitions ****************************************/
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#define Z16F_UARTSTAT0_RDA _HX8(0x80) /* Bit 7: Receive Data Available */
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#define Z16F_UARTSTAT0_PE _HX8(0x40) /* Bit 6: Parity Error */
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#define Z16F_UARTSTAT0_OE _HX8(0x20) /* Bit 5: Overrun Error */
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#define Z16F_UARTSTAT0_FE _HX8(0x10) /* Bit 4: Framing Error */
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#define Z16F_UARTSTAT0_BRKD _HX8(0x08) /* Bit 3: Break Detect */
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#define Z16F_UARTSTAT0_TDRE _HX8(0x04) /* Bit 2: Transmitter Data Register Empty */
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#define Z16F_UARTSTAT0_TXE _HX8(0x02) /* Bit 1: Transmitter Empty */
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#define Z16F_UARTSTAT0_CTS _HX8(0x01) /* Bit 0: Clear To Send */
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/* UART0/1 Control 0/1 Register Bit Definitions *************************************/
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#define Z16F_UARTCTL0_TEN _HX8(0x80) /* Bit 7: Transmit Enable */
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#define Z16F_UARTCTL0_REN _HX8(0x40) /* Bit 6: Receive Enable */
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#define Z16F_UARTCTL0_CTSE _HX8(0x20) /* Bit 5: CTS Enable */
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#define Z16F_UARTCTL0_PEN _HX8(0x10) /* Bit 4: Parity Enable */
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#define Z16F_UARTCTL0_PSEL _HX8(0x08) /* Bit 3: Odd Parity Select */
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#define Z16F_UARTCTL0_SBRK _HX8(0x04) /* Bit 2: Send Break */
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#define Z16F_UARTCTL0_STOP _HX8(0x02) /* Bit 1: Stop Bit Select */
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#define Z16F_UARTCTL0_LBEN _HX8(0x01) /* Bit 0: Loopback Enable */
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#define Z16F_UARTCTL1_MPMD1 _HX8(0x80) /* Bit 7: Multiprocessor Mode (bit1) */
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#define Z16F_UARTCTL1_MPEN _HX8(0x40) /* Bit 6: Multiprocessor Enable */
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#define Z16F_UARTCTL1_MPMD0 _HX8(0x20) /* Bit 5: Multiprocessor Mode (bit0) */
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#define Z16F_UARTCTL1_MPBT _HX8(0x10) /* Bit 4: Multiprocessor Bit Transmit */
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#define Z16F_UARTCTL1_DEPOL _HX8(0x08) /* Bit 3: Driver Enable Polarity */
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#define Z16F_UARTCTL1_BRGCTL _HX8(0x04) /* Bit 2: Baud Rate Generator Control */
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#define Z16F_UARTCTL1_RDAIRQ _HX8(0x02) /* Bit 1: Receive Data Interrupt Enable */
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#define Z16F_UARTCTL1_IREN _HX8(0x01) /* Bit 0: Infrared Encoder/Decoder Eanble */
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/* UART0/1 Mode Status/Select Register Bit Definitions ******************************/
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#define Z16F_UARTMDSEL_NORMAL _HX8(0x00) /* Bits 5-7=0: Multiprocessor and Normal Mode */
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#define Z16F_UARTMDSEL_FILTER _HX8(0x20) /* Bits 5-7=1: Noise Filter Control/Status */
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#define Z16F_UARTMDSEL_LINP _HX8(0x40) /* Bits 5-7=2: LIN protocol Contol/Status */
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#define Z16F_UARTMDSEL_HWREV _HX8(0xe0) /* Bits 5-7=7: LIN-UART Hardware Revision */
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/* Bits 0-4: Mode dependent status */
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/* Timer0/1/2 registers *************************************************************/
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#define Z16F_TIMER0_HL _HX32(ffffe300) /* 16-bit: Timer 0 */
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@@ -79,42 +79,55 @@
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* Initialize UART0 or UART1
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*
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* Parameters:
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* r1 = 0:UART0 1:UART1
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* r2 = Frequency
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* r3 = BAUD rate
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* None
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*
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*************************************************************************/
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z16f_lowuartinit:
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pushmlo <r0,R3> /* Save registers */
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pushmlo <r0, r3> /* Save registers */
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/* Calculate and set the baud rate generation register */
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ld r3, #_SYS_CLK_FREQ
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ld r0, R3
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sll r0, #3
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#ifdef CONFIG_UART0_SERIAL_CONSOLE
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sll r0, #CONFIG_UART0_BAUD
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ld r3, #CONFIG_UART0_BAUD /* r3 = baud */
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#else
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sll r0, #CONFIG_UART1_BAUD
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ld r3, #CONFIG_UART1_BAUD /* r3 = baud */
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#endif
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sll R3, #4
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udiv r0, R3 /* BRG = (freq + baud * 8)/(baud * 16) */
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ld r0, r3 /* r0 = baud */
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sll r0, #3 /* r0 = baud * 8 */
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add r0, #_SYS_CLK_FREQ /* r3 = freq + baud * 8*/
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sll r3, #4 /* r3 = baud * 16 */
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udiv r0, r3 /* BRG = (freq + baud * 8)/(baud * 16) */
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#ifdef CONFIG_UART0_SERIAL_CONSOLE
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ld.w Z16F_UART0_BR, r0 /* Z16F_UART0_BR = BRG */
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/* Set the GPIO Alternate Function Register Lo (AFL) register */
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ld r0, #%30
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or.b Z16F_GPIOA_AFL, r0 /* Z16F_GPIOA_AFL |= %30 */
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/* Enable UART receive (REN) and transmit (TEN) */
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clr.b Z16F_UART0_CTL1 /* Z16F_UART0_CTL1 = 0 */
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ld r0, #%c0
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ld r0, #(Z16F_UARTCTL0_TEN|Z16F_UARTCTL0_REN)
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ld.b Z16F_UART0_CTL0, r0 /* Z16F_UART0_CTL0 = %c0 */
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#else
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ld.w Z16F_UART1_BR, r0 /* Z16F_UART1_BR = BRG */
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/* Set the GPIO Alternate Function Register Lo (AFL) register */
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ld r0, #%30
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or.b Z16F_GPIOD_AFL, r0 /* Z16F_GPIOD_AFL |= %30 */
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/* Enable UART receive (REN) and transmit (TEN) */
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clr.b Z16F_UART1_CTL1 /* Z16F_UART1_CTL1 = 0 */
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ld r0, #%c0
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ld r0, #(Z16F_UARTCTL0_TEN|Z16F_UARTCTL0_REN)
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ld.b Z16F_UART1_CTL0, r0 /* Z16F_UART1_CTL0 = %c0 */
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#endif
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popmlo <r0, R3> /* Restore registers */
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popmlo <r0, r3> /* Restore registers */
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ret /* Return */
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@@ -131,22 +144,21 @@ z16f_lowuartinit:
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#ifdef CONFIG_ARCH_LOWPUTC
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_z16f_xmitc:
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pushmlo <r0> /* Save registers */
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pushmlo <r0> /* Save registers */
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_z16f_xmitc1:
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ld r0, #Z16F_UARTSTAT0_TDRE /* TDRE=Transmitter Data Register Empty */
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#ifdef CONFIG_UART0_SERIAL_CONSOLE
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ld r0,#4
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tm.b Z16F_UART0_STAT0,r0
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jp eq, _z16f_xmitc1 /* While (!(Z16F_UART0_STAT0 & %4)) */
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ld.b Z16F_UART0_TXD,r1 /* Z16F_UART0_TXD = r1 (character) */
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tm.b Z16F_UART0_STAT0, r0 /* r0 = Z16F_UART0_STAT0 */
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jp eq, _z16f_xmitc1 /* While (!(Z16F_UART0_STAT0 & TDRE)) */
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ld.b Z16F_UART0_TXD, r1 /* Z16F_UART0_TXD = r1 (character) */
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#else
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ld r0,#4
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tm.b Z16F_UART1_STAT0,r0
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jp eq, _z16f_xmitc1 /* While (!(Z16F_UART1_STAT0 & %4)) */
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ld.b Z16F_UART1_TXD,r1 /* Z16F_UART1_TXD = r1 (character) */
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tm.b Z16F_UART1_STAT0, r0 /* r0 = Z16F_UART0_STAT1 */
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jp eq, _z16f_xmitc1 /* While (!(Z16F_UART1_STAT0 & TDRE)) */
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ld.b Z16F_UART1_TXD, r1 /* Z16F_UART1_TXD = r1 (character) */
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#endif
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popmlo <r0> /* Restore registers */
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ret /* Return */
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popmlo <r0> /* Restore registers */
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ret /* Return */
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#endif
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/*************************************************************************
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@@ -200,13 +212,13 @@ _up_lowputc1:
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#ifdef CONFIG_ARCH_LOWGETC
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_up_lowgetc:
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up_lowgetc1:
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ld r0, #%80
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ld r0, #Z16F_UARTSTAT0_RDA /* RDA=Receive data available */
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#ifdef CONFIG_UART0_SERIAL_CONSOLE
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tm.b Z16F_UART0_STAT0,r0
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jp eq, _up_lowgetc1 /* While (!Z16F_UART0_STAT0 & %80)) */
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tm.b Z16F_UART0_STAT0, r0
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jp eq, _up_lowgetc1 /* While (!Z16F_UART0_STAT0 & RDA)) */
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ld.ub r0, Z16F_UART0_RXD /* r0 = Z16F_UART0_RXD */
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#else
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tm.b Z16F_UART1_STAT0,r0 /* While (!Z16F_UART1_STAT0 & %80) */
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tm.b Z16F_UART1_STAT0,r0 /* While (!Z16F_UART1_STAT0 & RDA) */
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jp eq, _up_lowgetc1
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ld.ub r0, Z16F_UART1_RXD /* r0 = Z16F_UART1_RXD */
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#endif
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File diff suppressed because it is too large
Load Diff
@@ -70,10 +70,9 @@ CONFIG_DRAM_SIZE=65536
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# This specific the size of the receive buffer
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# CONFIG_UARTn_TXBUFSIZE - Characters are buffered before
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# being sent. This specific the size of the transmit buffer
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# CONFIG_UARTn_BAUD - The configure BAUD of the UART. Must be
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# CONFIG_UARTn_BITS - The number of bits. Must be either 7 or 8.
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# CONFIG_UARTn_BAUD - The configure BAUD of the UART.
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# CONFIG_UARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
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# CONFIG_UARTn_2STOP - Two stop bits
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# CONFIG_UARTn_2STOP - 0=1 stop bit; 1=Two stop bits
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#
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CONFIG_UART0_SERIAL_CONSOLE=y
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CONFIG_UART1_SERIAL_CONSOLE=n
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@@ -83,8 +82,6 @@ CONFIG_UART0_RXBUFSIZE=256
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CONFIG_UART1_RXBUFSIZE=256
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CONFIG_UART0_BAUD=115200
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CONFIG_UART1_BAUD=115200
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CONFIG_UART0_BITS=8
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CONFIG_UART1_BITS=8
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CONFIG_UART0_PARITY=0
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CONFIG_UART1_PARITY=0
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CONFIG_UART0_2STOP=0
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@@ -73,6 +73,11 @@ static void z16f_gpioinit(void)
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/* Configure Direction switch port */
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putreg8(getreg8(Z16F_GPIOC_DD) | 0x01, Z16F_GPIOC_DD);
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/* Configure to use both UART0 and 1 */
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putreg8(getreg8(Z16F_GPIOA_AFL) | 0x30, Z16F_GPIOA_AFL);
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putreg8(getreg8(Z16F_GPIOD_AFL) | 0x30, Z16F_GPIOD_AFL);
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}
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/***************************************************************************
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@@ -1,7 +1,7 @@
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/************************************************************************************
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* serial.h
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*
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* Copyright (C) 2007 Gregory Nutt. All rights reserved.
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* Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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@@ -14,7 +14,7 @@
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name Gregory Nutt nor the names of its contributors may be
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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