mirror of
https://github.com/apache/nuttx.git
synced 2026-06-06 00:14:22 +08:00
Updates from Uros
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3424 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
@@ -55,51 +55,6 @@
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* Board Peripheral Assignment
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*
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* RS232/Power connector:
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* - USART1, is the default bootloader and console
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*
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* Sensor Connector:
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* Digital:
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* - GPIOs: PB10, PB11 (or even TIM2 CH3 and CH4)
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* - USART3
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* - I2C2
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* Analog:
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* - ADC1
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* Supporting Analog Circuitry (not seen outside)
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* - RefTap (TIM3_CH3)
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* - Power PWM Out (TIM8_CH1 / TIM3_CH1)
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* - Filtered Out (TIM3_CH4)
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* (TIM8 could run at lower frequency, while TIM3 must run at highest possible)
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* - Gain selection muxed with SDcard I/Os.
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*
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* Radio connector:
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* - UART3 / UART4
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* - SPI2
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* - I2C1 (remapped pins vs. Expansion connector)
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* - CAN
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* - TIM4 CH[3:4]
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*
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* Expansion connector:
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* - WakeUp Pin
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* - System Wide Reset
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* - SPI1 is wired to expansion port
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* - I2C1
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* - USART2 [Rx, Tx, CTS, RTS]
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* - DAC [0:1]
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* - ADC2 on pins [0:7]
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* - TIM2 Channels [1:4]
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* - TIM5 Channels [1:4]
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*
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* Onboard Components:
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* - SPI3 has direct connection with FRAM
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* - SDCard, conencts the microSD and shares the control lines with Sensor Interface
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* to select Amplifier Gain
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* - ADC3 is used also for power management (can be shared with ADC1 on sensor connector
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* if not used)
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*/
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/* Clocking *************************************************************************/
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+34
-11
@@ -101,6 +101,40 @@ CONFIG_STM32_RAISONANCE=n
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CONFIG_STM32_BUILDROOT=y
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CONFIG_STM32_DFU=n
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#
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# STM32 JTAG Options
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#
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# CONFIG_STM32_JTAG_FULL_ENABLE -- Full JTAG Enable (Parallel and Serial)
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# CONFIG_STM32_JTAG_NOJNTRST_ENABLE -- Full but without the JNTRST pin
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# CONFIG_STM32_JTAG_SW_ENABLE - Serial (SWJ) dual pin only which, can
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# coexist besides the FRAM on SPI3
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#
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CONFIG_STM32_JTAG_FULL_ENABLE=n
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CONFIG_STM32_JTAG_NOJNTRST_ENABLE=n
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CONFIG_STM32_JTAG_SW_ENABLE=n
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#
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# STM32 Individual Peripheral Pin Mapping
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#
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CONFIG_STM32_TIM1_FULL_REMAP=n
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CONFIG_STM32_TIM1_PARTIAL_REMAP=n
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CONFIG_STM32_TIM2_FULL_REMAP=n
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CONFIG_STM32_TIM2_PARTIAL_REMAP_1=n
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CONFIG_STM32_TIM2_PARTIAL_REMAP_2=n
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CONFIG_STM32_TIM3_FULL_REMAP=n
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CONFIG_STM32_TIM3_PARTIAL_REMAP=n
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CONFIG_STM32_TIM4_REMAP=n
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CONFIG_STM32_USART1_REMAP=n
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CONFIG_STM32_USART2_REMAP=n
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CONFIG_STM32_USART3_FULL_REMAP=n
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CONFIG_STM32_USART3_PARTIAL_REMAP=n
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CONFIG_STM32_SPI1_REMAP=n
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CONFIG_STM32_SPI3_REMAP=n
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CONFIG_STM32_I2C1_REMAP=y
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CONFIG_STM32_CAN1_REMAP1=n
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CONFIG_STM32_CAN1_REMAP2=n
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#
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# Individual subsystems can be enabled:
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# AHB:
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@@ -139,17 +173,6 @@ CONFIG_STM32_TIM8=n
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CONFIG_STM32_USART1=y
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CONFIG_STM32_ADC3=n
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#
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# STM32 JTAG Options
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#
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# CONFIG_STM32_JTAG_FULL_ENABLE -- Full JTAG Enable (Parallel and Serial)
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# CONFIG_STM32_JTAG_NOJNTRST_ENABLE -- Full but without the JNTRST pin
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# CONFIG_STM32_JTAG_SW_ENABLE - Serial (SWJ) dual pin only which, can
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# coexist besides the FRAM on SPI3
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#
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CONFIG_STM32_JTAG_FULL_ENABLE=n
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CONFIG_STM32_JTAG_NOJNTRST_ENABLE=n
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CONFIG_STM32_JTAG_SW_ENABLE=n
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#
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# STM32F103Z specific serial device driver settings
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@@ -1,89 +0,0 @@
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/****************************************************************************
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* config/vsn/src/nsh.c
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* arch/arm/src/board/nsh.c
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*
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* Copyright (C) 2011 Uros Platise. All rights reserved.
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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*
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* Authors: Uros Platise <uros.platise@isotel.eu>
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* Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdbool.h>
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#include <stdio.h>
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#include <debug.h>
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#include <errno.h>
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#include "vsn.h"
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/****************************************************************************
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* Pre-Processor Definitions
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****************************************************************************/
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/* Configuration ************************************************************/
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/* PORT and SLOT number probably depend on the board configuration */
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#define CONFIG_NSH_HAVEUSBDEV 1
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/* Can't support USB features if USB is not enabled */
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#ifndef CONFIG_USBDEV
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# undef CONFIG_NSH_HAVEUSBDEV
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: nsh_archinitialize
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*
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* Description:
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* Perform architecture specific initialization
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*
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****************************************************************************/
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int nsh_archinitialize(void)
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{
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// up_ramtron();
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// up_sdcard();
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return OK;
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}
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+18
-11
@@ -70,6 +70,7 @@
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#include <nuttx/config.h>
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#include <nuttx/fs.h>
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#include <nuttx/i2c.h>
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#include <semaphore.h>
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#include <stdio.h>
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@@ -171,6 +172,9 @@ struct vsn_sif_s {
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struct stm32_tim_dev_s * tim3; // Timer3 is used for PWM, and Analog RefTap
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struct stm32_tim_dev_s * tim8; // Timer8 is used for Power Switch
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struct i2c_dev_s * i2c1;
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struct i2c_dev_s * i2c2;
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sem_t exclusive_access;
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};
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@@ -226,7 +230,8 @@ void sif_gpio1_update(void)
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case VSN_SIF_GPIO_OUTHIGH: val = GPIO_GP1_HIGH;break;
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default: return;
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}
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stm32_configgpio(val);
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if (stm32_configgpio(val) == ERROR)
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printf("Error updating1\n");
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if ( stm32_gpioread(val) )
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vsn_sif.gpio[0] |= VSN_SIF_GPIO_READ_MASK;
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@@ -246,7 +251,8 @@ void sif_gpio2_update(void)
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case VSN_SIF_GPIO_OUTHIGH: val = GPIO_GP2_HIGH;break;
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default: return;
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}
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stm32_configgpio(val);
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if (stm32_configgpio(val) == ERROR)
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printf("Error updating2\n");
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if ( stm32_gpioread(val) )
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vsn_sif.gpio[1] |= VSN_SIF_GPIO_READ_MASK;
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@@ -289,30 +295,31 @@ int sif_anout_init(void)
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vsn_sif.tim3 = stm32_tim_init(3);
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vsn_sif.tim8 = stm32_tim_init(8);
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vsn_sif.i2c1 = up_i2cinitialize(1);
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vsn_sif.i2c2 = up_i2cinitialize(2);
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if (!vsn_sif.tim3 || !vsn_sif.tim8) return ERROR;
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// Use the TIM3 as PWM modulated analogue output
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STM32_TIM_SETCHANNEL(vsn_sif.tim3, GPIO_OUT_PWM_TIM3_CH4, STM32_TIM_CH_OUTPWM | STM32_TIM_CH_POLARITY_NEG);
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STM32_TIM_SETPERIOD(vsn_sif.tim3, 4096);
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STM32_TIM_SETCOMPARE(vsn_sif.tim3, GPIO_OUT_PWM_TIM3_CH4, 1024);
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STM32_TIM_SETCOMPARE(vsn_sif.tim3, GPIO_OUT_PWM_TIM3_CH, 1024);
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STM32_TIM_SETCLOCK(vsn_sif.tim3, 36e6);
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STM32_TIM_SETMODE(vsn_sif.tim3, STM32_TIM_MODE_UP);
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stm32_configgpio(GPIO_OUT_HIZ);
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//STM32_TIM_SETCHANNEL(vsn_sif.tim3, GPIO_OUT_PWM_TIM3_CH, STM32_TIM_CH_OUTPWM | STM32_TIM_CH_POLARITY_NEG);
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// Use the TIM8 to drive the upper power mosfet
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STM32_TIM_SETISR(vsn_sif.tim8, sif_anout_isr, 0);
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STM32_TIM_ENABLEINT(vsn_sif.tim8, 0);
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STM32_TIM_SETCHANNEL(vsn_sif.tim8, GPIO_OUT_PWRPWM_TIM8_CH1P, STM32_TIM_CH_OUTPWM | STM32_TIM_CH_POLARITY_NEG);
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STM32_TIM_SETPERIOD(vsn_sif.tim8, 4096);
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STM32_TIM_SETCOMPARE(vsn_sif.tim8, GPIO_OUT_PWRPWM_TIM8_CH1P, 0);
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STM32_TIM_SETCOMPARE(vsn_sif.tim8, GPIO_OUT_PWRPWM_TIM8_CH, 0);
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STM32_TIM_SETCLOCK(vsn_sif.tim8, 36e6);
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STM32_TIM_SETMODE(vsn_sif.tim8, STM32_TIM_MODE_UP);
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stm32_configgpio(GPIO_OUT_PWRPWM);
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STM32_TIM_SETCHANNEL(vsn_sif.tim8, GPIO_OUT_PWRPWM_TIM8_CH, STM32_TIM_CH_OUTPWM | STM32_TIM_CH_POLARITY_NEG);
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return OK;
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}
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@@ -476,7 +483,7 @@ int sif_init(void)
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int sif_main(int argc, char *argv[])
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{
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if (argc >= 2) {
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if (!strcmp(argv[1], "init")) {
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if (!strcmp(argv[1], "init")) {
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return sif_init();
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}
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else if (!strcmp(argv[1], "gpio") && argc == 4) {
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@@ -489,7 +496,7 @@ int sif_main(int argc, char *argv[])
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}
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else if (!strcmp(argv[1], "pwr") && argc == 3) {
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int val = atoi(argv[2]);
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STM32_TIM_SETCOMPARE(vsn_sif.tim8, GPIO_OUT_PWRPWM_TIM8_CH1P, val);
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STM32_TIM_SETCOMPARE(vsn_sif.tim8, GPIO_OUT_PWRPWM_TIM8_CH, val);
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return 0;
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}
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else if (!strcmp(argv[1], "c")) {
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+47
-2
@@ -51,6 +51,51 @@
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/************************************************************************************
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* PIN Definitions
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************************************************************************************/
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/* Board Peripheral Assignment
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*
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* RS232/Power connector:
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* - USART1, is the default bootloader and console
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*
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* Sensor Connector:
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* Digital:
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* - GPIOs: PB10, PB11 (or even TIM2 CH3 and CH4)
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* - USART3
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* - I2C2
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* Analog:
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* - ADC1
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* Supporting Analog Circuitry (not seen outside)
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* - RefTap (TIM3_CH3)
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* - Power PWM Out (TIM8_CH1 / TIM3_CH1)
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* - Filtered Out (TIM3_CH4)
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* (TIM8 could run at lower frequency, while TIM3 must run at highest possible)
|
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* - Gain selection muxed with SDcard I/Os.
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*
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* Radio connector:
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* - UART3 / UART4
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* - SPI2
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* - I2C1 (remapped pins vs. Expansion connector)
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* - CAN
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* - TIM4 CH[3:4]
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*
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* Expansion connector:
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* - WakeUp Pin
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* - System Wide Reset
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* - SPI1 is wired to expansion port
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* - I2C1
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* - USART2 [Rx, Tx, CTS, RTS]
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* - DAC [0:1]
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* - ADC2 on pins [0:7]
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* - TIM2 Channels [1:4]
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* - TIM5 Channels [1:4]
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*
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* Onboard Components:
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* - SPI3 has direct connection with FRAM
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* - SDCard, conencts the microSD and shares the control lines with Sensor Interface
|
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* to select Amplifier Gain
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* - ADC3 is used also for power management (can be shared with ADC1 on sensor connector
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* if not used)
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*/
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/* LED */
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@@ -94,7 +139,7 @@
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#define GPIO_OUT_PWRON (GPIO_OUTPUT|GPIO_CNF_OUTPP |GPIO_MODE_2MHz |GPIO_PORTC|GPIO_PIN6 |GPIO_OUTPUT_CLEAR)
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#define GPIO_OUT_PWROFF (GPIO_OUTPUT|GPIO_CNF_OUTPP |GPIO_MODE_2MHz |GPIO_PORTC|GPIO_PIN6 |GPIO_OUTPUT_SET)
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#define GPIO_OUT_PWRPWM (GPIO_ALT |GPIO_CNF_AFPP |GPIO_MODE_10MHz|GPIO_PORTC|GPIO_PIN6 )
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#define GPIO_OUT_PWRPWM_TIM8_CH1P 1 /* TIM8.CH1 */
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#define GPIO_OUT_PWRPWM_TIM8_CH 1 /* TIM8.CH1 */
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#define GPIO_OUT_HIZ (GPIO_INPUT |GPIO_CNF_INFLOAT |GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN1 )
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#define GPIO_OUT_PUP (GPIO_INPUT |GPIO_CNF_INPULLUP |GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN1 )
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@@ -103,7 +148,7 @@
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#define GPIO_OUT_HIGH (GPIO_OUTPUT|GPIO_CNF_OUTPP |GPIO_MODE_2MHz |GPIO_PORTB|GPIO_PIN1 |GPIO_OUTPUT_SET)
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#define GPIO_OUT_AIN (GPIO_INPUT |GPIO_CNF_ANALOGIN |GPIO_MODE_INPUT|GPIO_PORTB|GPIO_PIN1 )
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#define GPIO_OUT_PWM (GPIO_ALT |GPIO_CNF_AFPP |GPIO_MODE_10MHz|GPIO_PORTB|GPIO_PIN1 )
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#define GPIO_OUT_PWM_TIM3_CH4 4 /* TIM3.CH4 */
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#define GPIO_OUT_PWM_TIM3_CH 4 /* TIM3.CH4 */
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/* Radio Connector */
|
||||
|
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Reference in New Issue
Block a user