Kinetis: Updated comment in clockconfig

This commit is contained in:
David Sidrane
2017-02-10 05:44:11 -10:00
parent 3840c802d1
commit bd7d7edcf8
+2 -1
View File
@@ -278,7 +278,8 @@ void kinetis_pllconfig(void)
*
* Either the external clock or crystal frequency is used to select the
* PRDIV value. Only reference clock frequencies are supported that will
* produce a 2MHz reference clock to the PLL.
* produce a KINETIS_MCG_PLL_REF_MIN >= PLLIN <= KINETIS_MCG_PLL_REF_MAX
* reference clock to the PLL.
*/
putreg8(MCG_C5_PRDIV(BOARD_PRDIV), KINETIS_MCG_C5);