Mirrors_Framework/nuttx
1
0
Fork 0
mirror of https://github.com/apache/nuttx.git synced 2026-09-21 21:43:38 +08:00
Code Issues Actions 8 Packages Projects Releases Wiki Activity

!arm/stm32l4: standardize public API/type prefix to stm32_

Browse Source 
BREAKING CHANGE: Public STM32L4 interfaces were renamed from stm32l4_* forms to
canonical stm32_* forms across arch and board headers/sources.

Public type names were normalized to stm32_*
equivalents (including timer/lptimer/dma/freerun API-facing types), and
stm32l4can_initialize() was renamed to stm32_caninitialize().

The STM32L4 root family header was renamed from stm32l4.h to stm32.h;
all STM32L4 arch/board includes were updated accordingly.

Signed-off-by: raiden00pl <raiden00@railab.me>
This commit is contained in:
raiden00pl
2026-06-13 12:45:16 +08:00
committed by Xiang Xiao
parent fe42e755a1
commit bc41d984cc
220 changed files with 4966 additions and 4974 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/src/stm32l4/stm32l4.h → arch/arm/src/stm32l4/stm32.h
+1 -1
View File
@@ -1,5 +1,5 @@
/****************************************************************************
* arch/arm/src/stm32l4/stm32l4.h
* arch/arm/src/stm32l4/stm32.h
*
* SPDX-License-Identifier: Apache-2.0
*
arch/arm/src/stm32l4/stm32l4_1wire.c
+7 -7
View File
@@ -575,7 +575,7 @@ static int stm32_1wire_init(struct stm32_1wire_priv_s *priv)
/* Configure pins for USART use */
stm32l4_configgpio(config->data_pin);
stm32_configgpio(config->data_pin);
ret = irq_attach(config->irq, stm32_1wire_isr, priv);
if (ret == OK)
@@ -604,7 +604,7 @@ static int stm32_1wire_deinit(struct stm32_1wire_priv_s *priv)
/* Unconfigure GPIO pins */
stm32l4_unconfiggpio(config->data_pin);
stm32_unconfiggpio(config->data_pin);
/* Disable RXNEIE, Rx, Tx, and the USART */
@@ -1125,7 +1125,7 @@ static int stm32_1wire_pm_prepare(struct pm_callback_s *cb, int domain,
****************************************************************************/
/****************************************************************************
* Name: stm32l4_1wireinitialize
* Name: stm32_1wireinitialize
*
* Description:
* Initialize the selected 1-Wire port. And return a unique instance of
@@ -1141,7 +1141,7 @@ static int stm32_1wire_pm_prepare(struct pm_callback_s *cb, int domain,
*
****************************************************************************/
struct onewire_dev_s *stm32l4_1wireinitialize(int port)
struct onewire_dev_s *stm32_1wireinitialize(int port)
{
struct stm32_1wire_priv_s *priv = NULL; /* Private data of device with multiple instances */
struct stm32_1wire_inst_s *inst = NULL; /* Device, single instance */
@@ -1218,13 +1218,13 @@ struct onewire_dev_s *stm32l4_1wireinitialize(int port)
}
/****************************************************************************
* Name: stm32l4_1wireuninitialize
* Name: stm32_1wireuninitialize
*
* Description:
* De-initialize the selected 1-Wire port, and power down the device.
*
* Input Parameters:
* Device structure as returned by the stm32l4_1wireinitialize()
* Device structure as returned by the stm32_1wireinitialize()
*
* Returned Value:
* OK on success, ERROR when internal reference count mismatch or dev
@@ -1232,7 +1232,7 @@ struct onewire_dev_s *stm32l4_1wireinitialize(int port)
*
****************************************************************************/
int stm32l4_1wireuninitialize(struct onewire_dev_s *dev)
int stm32_1wireuninitialize(struct onewire_dev_s *dev)
{
struct stm32_1wire_priv_s *priv = ((struct stm32_1wire_inst_s *)dev)->priv;
arch/arm/src/stm32l4/stm32l4_1wire.h
+5 -5
View File
@@ -36,7 +36,7 @@
****************************************************************************/
/****************************************************************************
* Name: stm32l4_1wireinitialize
* Name: stm32_1wireinitialize
*
* Description:
* Initialize the selected 1-Wire port. And return a unique instance of
@@ -52,16 +52,16 @@
*
****************************************************************************/
struct onewire_dev_s *stm32l4_1wireinitialize(int port);
struct onewire_dev_s *stm32_1wireinitialize(int port);
/****************************************************************************
* Name: stm32l4_1wireuninitialize
* Name: stm32_1wireuninitialize
*
* Description:
* De-initialize the selected 1-Wire port, and power down the device.
*
* Input Parameters:
* Device structure as returned by the stm32l4_1wireinitialize()
* Device structure as returned by the stm32_1wireinitialize()
*
* Returned Value:
* OK on success, ERROR when internal reference count mismatch or dev
@@ -69,6 +69,6 @@ struct onewire_dev_s *stm32l4_1wireinitialize(int port);
*
****************************************************************************/
int stm32l4_1wireuninitialize(struct onewire_dev_s *dev);
int stm32_1wireuninitialize(struct onewire_dev_s *dev);
#endif /* __ARCH_ARM_SRC_STM32L4_STM32L4_1WIRE_H */
arch/arm/src/stm32l4/stm32l4_adc.c
+19 -20
View File
@@ -2074,7 +2074,7 @@ static int adc_ioctl(struct adc_dev_s *dev, int cmd, unsigned long arg)
}
break;
case ANIOC_STM32L4_TRIGGER_REG:
case ANIOC_STM32_TRIGGER_REG:
/* Start regular conversion if regular channels configured */
@@ -2086,7 +2086,7 @@ static int adc_ioctl(struct adc_dev_s *dev, int cmd, unsigned long arg)
break;
#ifdef ADC_HAVE_INJECTED
case ANIOC_STM32L4_TRIGGER_INJ:
case ANIOC_STM32_TRIGGER_INJ:
/* Start injected conversion if injected channels configured */
@@ -2354,20 +2354,20 @@ static void adc_dma_start(struct adc_dev_s *dev)
if (priv->dma != NULL)
{
stm32l4_dmastop(priv->dma);
stm32l4_dmafree(priv->dma);
stm32_dmastop(priv->dma);
stm32_dmafree(priv->dma);
}
priv->dma = stm32l4_dmachannel(priv->dmachan);
priv->dma = stm32_dmachannel(priv->dmachan);
#ifndef CONFIG_STM32L4_ADC_NOIRQ
stm32l4_dmasetup(priv->dma,
stm32_dmasetup(priv->dma,
priv->base + STM32_ADC_DR_OFFSET,
(uint32_t)priv->r_dmabuffer,
priv->rnchannels * priv->dmabatch,
ADC_DMA_CONTROL_WORD);
stm32l4_dmastart(priv->dma, adc_dmaconvcallback, dev, false);
stm32_dmastart(priv->dma, adc_dmaconvcallback, dev, false);
#endif
}
@@ -2544,7 +2544,7 @@ static int adc_regbufregister(struct stm32_adc_dev_s *dev,
{
struct stm32_dev_s *priv = (struct stm32_dev_s *)dev;
stm32l4_dmasetup(priv->dma,
stm32_dmasetup(priv->dma,
priv->base + STM32_ADC_DR_OFFSET,
(uint32_t)buffer,
len,
@@ -2552,7 +2552,7 @@ static int adc_regbufregister(struct stm32_adc_dev_s *dev,
/* No DMA callback */
stm32l4_dmastart(priv->dma, NULL, dev, false);
stm32_dmastart(priv->dma, NULL, dev, false);
return OK;
}
@@ -2571,19 +2571,19 @@ static void adc_llops_dma_start(struct stm32_adc_dev_s *adc,
if (dev->dma != NULL)
{
stm32l4_dmastop(dev->dma);
stm32l4_dmafree(dev->dma);
stm32_dmastop(dev->dma);
stm32_dmafree(dev->dma);
}
dev->dma = stm32l4_dmachannel(dev->dmachan);
dev->dma = stm32_dmachannel(dev->dmachan);
stm32l4_dmasetup(dev->dma,
stm32_dmasetup(dev->dma,
dev->base + STM32_ADC_DR_OFFSET,
(uint32_t)buffer,
len,
ADC_DMA_CONTROL_WORD);
stm32l4_dmastart(dev->dma, callback, dev, false);
stm32_dmastart(dev->dma, callback, dev, false);
}
/****************************************************************************
@@ -2598,8 +2598,8 @@ static void adc_llops_dma_stop(struct stm32_adc_dev_s *adc)
if (dev->dma != NULL)
{
stm32l4_dmastop(dev->dma);
stm32l4_dmafree(dev->dma);
stm32_dmastop(dev->dma);
stm32_dmafree(dev->dma);
}
}
@@ -2678,7 +2678,7 @@ static void adc_llops_dumpregs(struct stm32_adc_dev_s *dev)
****************************************************************************/
/****************************************************************************
* Name: stm32l4_adc_initialize
* Name: stm32_adc_initialize
*
* Description:
* Initialize the ADC.
@@ -2725,9 +2725,8 @@ static void adc_llops_dumpregs(struct stm32_adc_dev_s *dev)
*
****************************************************************************/
struct adc_dev_s *stm32l4_adc_initialize(int intf,
const uint8_t *chanlist,
int cchannels)
struct adc_dev_s *stm32_adc_initialize(int intf, const uint8_t *chanlist,
int cchannels)
{
struct adc_dev_s *dev;
struct stm32_dev_s *priv;
arch/arm/src/stm32l4/stm32l4_adc.h
+8 -9
View File
@@ -483,13 +483,13 @@
/* IOCTL Commands ***********************************************************
*
* Cmd: ANIOC_STM32L4_TRIGGER_REG Arg:
* Cmd: ANIOC_STM32L4_TRIGGER_INJ Arg:
* Cmd: ANIOC_STM32_TRIGGER_REG Arg:
* Cmd: ANIOC_STM32_TRIGGER_INJ Arg:
*
*/
#define ANIOC_STM32L4_TRIGGER_REG _ANIOC(AN_STM32L4_FIRST + 0)
#define ANIOC_STM32L4_TRIGGER_INJ _ANIOC(AN_STM32L4_FIRST + 1)
#define ANIOC_STM32_TRIGGER_REG _ANIOC(AN_STM32_FIRST + 0)
#define ANIOC_STM32_TRIGGER_INJ _ANIOC(AN_STM32_FIRST + 1)
/****************************************************************************
* Public Types
@@ -600,7 +600,7 @@ extern "C"
#endif
/****************************************************************************
* Name: stm32l4_adc_initialize
* Name: stm32_adc_initialize
*
* Description:
* Initialize the ADC.
@@ -616,9 +616,8 @@ extern "C"
****************************************************************************/
struct adc_dev_s;
struct adc_dev_s *stm32l4_adc_initialize(int intf,
const uint8_t *chanlist,
int nchannels);
struct adc_dev_s *stm32_adc_initialize(int intf, const uint8_t *chanlist,
int nchannels);
#undef EXTERN
#ifdef __cplusplus
}
@@ -626,4 +625,4 @@ struct adc_dev_s *stm32l4_adc_initialize(int intf,
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_STM32L4_ADC1 || CONFIG_STM32L4_ADC2 || CONFIG_STM32L4_ADC3 */
#endif /* __ARCH_ARM_SRC_STM32L4_STM32L4_ADC_H */
#endif /* __ARCH_ARM_SRC_STM32L4_STM32L4_ADC_H */
arch/arm/src/stm32l4/stm32l4_allocateheap.c
+4 -4
View File
@@ -241,7 +241,7 @@ void up_allocate_heap(void **heap_start, size_t *heap_size)
/* Allow user-mode access to the user heap memory */
stm32l4_mpu_uheap((uintptr_t)ubase, usize);
stm32_mpu_uheap((uintptr_t)ubase, usize);
#else
/* Return the heap settings */
@@ -319,7 +319,7 @@ void arm_addregion(void)
/* Allow user-mode access to the SRAM2 heap */
stm32l4_mpu_uheap((uintptr_t)SRAM2_START, SRAM2_END - SRAM2_START);
stm32_mpu_uheap((uintptr_t)SRAM2_START, SRAM2_END - SRAM2_START);
#endif
/* Colorize the heap for debug */
@@ -338,7 +338,7 @@ void arm_addregion(void)
/* Allow user-mode access to the SRAM3 heap */
stm32l4_mpu_uheap((uintptr_t)SRAM3_START, SRAM3_END - SRAM3_START);
stm32_mpu_uheap((uintptr_t)SRAM3_START, SRAM3_END - SRAM3_START);
#endif
@@ -357,7 +357,7 @@ void arm_addregion(void)
/* Allow user-mode access to the FSMC SRAM user heap memory */
stm32l4_mpu_uheap((uintptr_t)CONFIG_HEAP2_BASE, CONFIG_HEAP2_SIZE);
stm32_mpu_uheap((uintptr_t)CONFIG_HEAP2_BASE, CONFIG_HEAP2_SIZE);
#endif
arch/arm/src/stm32l4/stm32l4_can.c
+55 -55
View File
@@ -41,7 +41,7 @@
#include "arm_internal.h"
#include "chip.h"
#include "stm32l4.h"
#include "stm32.h"
#include "stm32l4_can.h"
#if defined(CONFIG_CAN) && defined(CONFIG_STM32L4_CAN1)
@@ -72,7 +72,7 @@
* Private Types
****************************************************************************/
struct stm32l4_can_s
struct stm32_can_s
{
uint8_t port; /* CAN port number (1 or 2) */
uint8_t canrx[2]; /* CAN RX FIFO 0/1 IRQ number */
@@ -89,20 +89,20 @@ struct stm32l4_can_s
/* CAN Register access */
static uint32_t stm32l4can_getreg(struct stm32l4_can_s *priv,
static uint32_t stm32l4can_getreg(struct stm32_can_s *priv,
int offset);
static uint32_t stm32l4can_getfreg(struct stm32l4_can_s *priv,
static uint32_t stm32l4can_getfreg(struct stm32_can_s *priv,
int offset);
static void stm32l4can_putreg(struct stm32l4_can_s *priv, int offset,
static void stm32l4can_putreg(struct stm32_can_s *priv, int offset,
uint32_t value);
static void stm32l4can_putfreg(struct stm32l4_can_s *priv, int offset,
static void stm32l4can_putfreg(struct stm32_can_s *priv, int offset,
uint32_t value);
#ifdef CONFIG_STM32L4_CAN_REGDEBUG
static void stm32l4can_dumpctrlregs(struct stm32l4_can_s *priv,
static void stm32l4can_dumpctrlregs(struct stm32_can_s *priv,
const char *msg);
static void stm32l4can_dumpmbregs(struct stm32l4_can_s *priv,
static void stm32l4can_dumpmbregs(struct stm32_can_s *priv,
const char *msg);
static void stm32l4can_dumpfiltregs(struct stm32l4_can_s *priv,
static void stm32l4can_dumpfiltregs(struct stm32_can_s *priv,
const char *msg);
#else
# define stm32l4can_dumpctrlregs(priv,msg)
@@ -113,14 +113,14 @@ static void stm32l4can_dumpfiltregs(struct stm32l4_can_s *priv,
/* Filtering (todo) */
#ifdef CONFIG_CAN_EXTID
static int stm32l4can_addextfilter(struct stm32l4_can_s *priv,
static int stm32l4can_addextfilter(struct stm32_can_s *priv,
struct canioc_extfilter_s *arg);
static int stm32l4can_delextfilter(struct stm32l4_can_s *priv,
static int stm32l4can_delextfilter(struct stm32_can_s *priv,
int arg);
#endif
static int stm32l4can_addstdfilter(struct stm32l4_can_s *priv,
static int stm32l4can_addstdfilter(struct stm32_can_s *priv,
struct canioc_stdfilter_s *arg);
static int stm32l4can_delstdfilter(struct stm32l4_can_s *priv,
static int stm32l4can_delstdfilter(struct stm32_can_s *priv,
int arg);
/* CAN driver methods */
@@ -151,11 +151,11 @@ static int stm32l4can_txinterrupt(int irq, void *context,
/* Initialization */
static int stm32l4can_enterinitmode(struct stm32l4_can_s *priv);
static int stm32l4can_exitinitmode(struct stm32l4_can_s *priv);
static int stm32l4can_bittiming(struct stm32l4_can_s *priv);
static int stm32l4can_cellinit(struct stm32l4_can_s *priv);
static int stm32l4can_filterinit(struct stm32l4_can_s *priv);
static int stm32l4can_enterinitmode(struct stm32_can_s *priv);
static int stm32l4can_exitinitmode(struct stm32_can_s *priv);
static int stm32l4can_bittiming(struct stm32_can_s *priv);
static int stm32l4can_cellinit(struct stm32_can_s *priv);
static int stm32l4can_filterinit(struct stm32_can_s *priv);
/****************************************************************************
* Private Data
@@ -176,7 +176,7 @@ static const struct can_ops_s g_canops =
};
#ifdef CONFIG_STM32L4_CAN1
static struct stm32l4_can_s g_can1priv =
static struct stm32_can_s g_can1priv =
{
.port = 1,
.canrx =
@@ -271,24 +271,24 @@ static uint32_t stm32l4can_vgetreg(uint32_t addr)
return val;
}
static uint32_t stm32l4can_getreg(struct stm32l4_can_s *priv, int offset)
static uint32_t stm32l4can_getreg(struct stm32_can_s *priv, int offset)
{
return stm32l4can_vgetreg(priv->base + offset);
}
static uint32_t stm32l4can_getfreg(struct stm32l4_can_s *priv,
static uint32_t stm32l4can_getfreg(struct stm32_can_s *priv,
int offset)
{
return stm32l4can_vgetreg(priv->fbase + offset);
}
#else
static uint32_t stm32l4can_getreg(struct stm32l4_can_s *priv, int offset)
static uint32_t stm32l4can_getreg(struct stm32_can_s *priv, int offset)
{
return getreg32(priv->base + offset);
}
static uint32_t stm32l4can_getfreg(struct stm32l4_can_s *priv,
static uint32_t stm32l4can_getfreg(struct stm32_can_s *priv,
int offset)
{
return getreg32(priv->fbase + offset);
@@ -325,26 +325,26 @@ static void stm32l4can_vputreg(uint32_t addr, uint32_t value)
putreg32(value, addr);
}
static void stm32l4can_putreg(struct stm32l4_can_s *priv, int offset,
static void stm32l4can_putreg(struct stm32_can_s *priv, int offset,
uint32_t value)
{
stm32l4can_vputreg(priv->base + offset, value);
}
static void stm32l4can_putfreg(struct stm32l4_can_s *priv, int offset,
static void stm32l4can_putfreg(struct stm32_can_s *priv, int offset,
uint32_t value)
{
stm32l4can_vputreg(priv->fbase + offset, value);
}
#else
static void stm32l4can_putreg(struct stm32l4_can_s *priv, int offset,
static void stm32l4can_putreg(struct stm32_can_s *priv, int offset,
uint32_t value)
{
putreg32(value, priv->base + offset);
}
static void stm32l4can_putfreg(struct stm32l4_can_s *priv, int offset,
static void stm32l4can_putfreg(struct stm32_can_s *priv, int offset,
uint32_t value)
{
putreg32(value, priv->fbase + offset);
@@ -366,7 +366,7 @@ static void stm32l4can_putfreg(struct stm32l4_can_s *priv, int offset,
****************************************************************************/
#ifdef CONFIG_STM32L4_CAN_REGDEBUG
static void stm32l4can_dumpctrlregs(struct stm32l4_can_s *priv,
static void stm32l4can_dumpctrlregs(struct stm32_can_s *priv,
const char *msg)
{
if (msg)
@@ -411,7 +411,7 @@ static void stm32l4can_dumpctrlregs(struct stm32l4_can_s *priv,
****************************************************************************/
#ifdef CONFIG_STM32L4_CAN_REGDEBUG
static void stm32l4can_dumpmbregs(struct stm32l4_can_s *priv,
static void stm32l4can_dumpmbregs(struct stm32_can_s *priv,
const char *msg)
{
if (msg)
@@ -477,7 +477,7 @@ static void stm32l4can_dumpmbregs(struct stm32l4_can_s *priv,
****************************************************************************/
#ifdef CONFIG_STM32L4_CAN_REGDEBUG
static void stm32l4can_dumpfiltregs(struct stm32l4_can_s *priv,
static void stm32l4can_dumpfiltregs(struct stm32_can_s *priv,
const char *msg)
{
int i;
@@ -526,7 +526,7 @@ static void stm32l4can_dumpfiltregs(struct stm32l4_can_s *priv,
static void stm32l4can_reset(struct can_dev_s *dev)
{
struct stm32l4_can_s *priv = dev->cd_priv;
struct stm32_can_s *priv = dev->cd_priv;
uint32_t regval;
uint32_t regbit = 0;
irqstate_t flags;
@@ -583,7 +583,7 @@ static void stm32l4can_reset(struct can_dev_s *dev)
static int stm32l4can_setup(struct can_dev_s *dev)
{
struct stm32l4_can_s *priv = dev->cd_priv;
struct stm32_can_s *priv = dev->cd_priv;
int ret;
caninfo("CAN%d RX0 irq: %d RX1 irq: %d TX irq: %d\n",
@@ -670,7 +670,7 @@ static int stm32l4can_setup(struct can_dev_s *dev)
static void stm32l4can_shutdown(struct can_dev_s *dev)
{
struct stm32l4_can_s *priv = dev->cd_priv;
struct stm32_can_s *priv = dev->cd_priv;
caninfo("CAN%d\n", priv->port);
@@ -707,7 +707,7 @@ static void stm32l4can_shutdown(struct can_dev_s *dev)
static void stm32l4can_rxint(struct can_dev_s *dev, bool enable)
{
struct stm32l4_can_s *priv = dev->cd_priv;
struct stm32_can_s *priv = dev->cd_priv;
uint32_t regval;
caninfo("CAN%d enable: %d\n", priv->port, enable);
@@ -743,7 +743,7 @@ static void stm32l4can_rxint(struct can_dev_s *dev, bool enable)
static void stm32l4can_txint(struct can_dev_s *dev, bool enable)
{
struct stm32l4_can_s *priv = dev->cd_priv;
struct stm32_can_s *priv = dev->cd_priv;
uint32_t regval;
caninfo("CAN%d enable: %d\n", priv->port, enable);
@@ -775,7 +775,7 @@ static void stm32l4can_txint(struct can_dev_s *dev, bool enable)
static int stm32l4can_ioctl(struct can_dev_s *dev, int cmd,
unsigned long arg)
{
struct stm32l4_can_s *priv;
struct stm32_can_s *priv;
int ret = -ENOTTY;
caninfo("cmd=%04x arg=%lu\n", cmd, arg);
@@ -1173,7 +1173,7 @@ static int stm32l4can_remoterequest(struct can_dev_s *dev, uint16_t id)
static int stm32l4can_send(struct can_dev_s *dev,
struct can_msg_s *msg)
{
struct stm32l4_can_s *priv = dev->cd_priv;
struct stm32_can_s *priv = dev->cd_priv;
uint8_t *ptr;
uint32_t regval;
uint32_t tmp;
@@ -1333,7 +1333,7 @@ static int stm32l4can_send(struct can_dev_s *dev,
static bool stm32l4can_txready(struct can_dev_s *dev)
{
struct stm32l4_can_s *priv = dev->cd_priv;
struct stm32_can_s *priv = dev->cd_priv;
uint32_t regval;
/* Return true if any mailbox is available */
@@ -1364,7 +1364,7 @@ static bool stm32l4can_txready(struct can_dev_s *dev)
static bool stm32l4can_txempty(struct can_dev_s *dev)
{
struct stm32l4_can_s *priv = dev->cd_priv;
struct stm32_can_s *priv = dev->cd_priv;
uint32_t regval;
/* Return true if all mailboxes are available */
@@ -1394,7 +1394,7 @@ static bool stm32l4can_txempty(struct can_dev_s *dev)
static int stm32l4can_rxinterrupt(int irq, void *context, int rxmb)
{
struct can_dev_s *dev = NULL;
struct stm32l4_can_s *priv;
struct stm32_can_s *priv;
struct can_hdr_s hdr;
uint8_t data[CAN_MAXDATALEN];
uint32_t regval;
@@ -1552,7 +1552,7 @@ static int stm32l4can_rx1interrupt(int irq, void *context, void *arg)
static int stm32l4can_txinterrupt(int irq, void *context, void *arg)
{
struct can_dev_s *dev = NULL;
struct stm32l4_can_s *priv;
struct stm32_can_s *priv;
uint32_t regval;
dev = &g_can1dev;
@@ -1682,7 +1682,7 @@ static int stm32l4can_txinterrupt(int irq, void *context, void *arg)
*
****************************************************************************/
static int stm32l4can_bittiming(struct stm32l4_can_s *priv)
static int stm32l4can_bittiming(struct stm32_can_s *priv)
{
uint32_t tmp;
uint32_t brp;
@@ -1782,7 +1782,7 @@ static int stm32l4can_bittiming(struct stm32l4_can_s *priv)
*
****************************************************************************/
static int stm32l4can_enterinitmode(struct stm32l4_can_s *priv)
static int stm32l4can_enterinitmode(struct stm32_can_s *priv)
{
uint32_t regval;
volatile uint32_t timeout;
@@ -1833,7 +1833,7 @@ static int stm32l4can_enterinitmode(struct stm32l4_can_s *priv)
*
****************************************************************************/
static int stm32l4can_exitinitmode(struct stm32l4_can_s *priv)
static int stm32l4can_exitinitmode(struct stm32_can_s *priv)
{
uint32_t regval;
volatile uint32_t timeout;
@@ -1884,7 +1884,7 @@ static int stm32l4can_exitinitmode(struct stm32l4_can_s *priv)
*
****************************************************************************/
static int stm32l4can_cellinit(struct stm32l4_can_s *priv)
static int stm32l4can_cellinit(struct stm32_can_s *priv)
{
uint32_t regval;
int ret;
@@ -1962,7 +1962,7 @@ static int stm32l4can_cellinit(struct stm32l4_can_s *priv)
*
****************************************************************************/
static int stm32l4can_filterinit(struct stm32l4_can_s *priv)
static int stm32l4can_filterinit(struct stm32_can_s *priv)
{
uint32_t regval;
uint32_t bitmask;
@@ -2042,7 +2042,7 @@ static int stm32l4can_filterinit(struct stm32l4_can_s *priv)
****************************************************************************/
#ifdef CONFIG_CAN_EXTID
static int stm32l4can_addextfilter(struct stm32l4_can_s *priv,
static int stm32l4can_addextfilter(struct stm32_can_s *priv,
struct canioc_extfilter_s *arg)
{
return -ENOTTY;
@@ -2068,7 +2068,7 @@ static int stm32l4can_addextfilter(struct stm32l4_can_s *priv,
****************************************************************************/
#ifdef CONFIG_CAN_EXTID
static int stm32l4can_delextfilter(struct stm32l4_can_s *priv, int arg)
static int stm32l4can_delextfilter(struct stm32_can_s *priv, int arg)
{
return -ENOTTY;
}
@@ -2091,7 +2091,7 @@ static int stm32l4can_delextfilter(struct stm32l4_can_s *priv, int arg)
*
****************************************************************************/
static int stm32l4can_addstdfilter(struct stm32l4_can_s *priv,
static int stm32l4can_addstdfilter(struct stm32_can_s *priv,
struct canioc_stdfilter_s *arg)
{
return -ENOTTY;
@@ -2115,7 +2115,7 @@ static int stm32l4can_addstdfilter(struct stm32l4_can_s *priv,
*
****************************************************************************/
static int stm32l4can_delstdfilter(struct stm32l4_can_s *priv, int arg)
static int stm32l4can_delstdfilter(struct stm32_can_s *priv, int arg)
{
return -ENOTTY;
}
@@ -2125,7 +2125,7 @@ static int stm32l4can_delstdfilter(struct stm32l4_can_s *priv, int arg)
****************************************************************************/
/****************************************************************************
* Name: stm32l4can_initialize
* Name: stm32_caninitialize
*
* Description:
* Initialize the selected CAN port
@@ -2138,14 +2138,14 @@ static int stm32l4can_delstdfilter(struct stm32l4_can_s *priv, int arg)
*
****************************************************************************/
struct can_dev_s *stm32l4can_initialize(int port)
struct can_dev_s *stm32_caninitialize(int port)
{
struct can_dev_s *dev = NULL;
caninfo("CAN%d\n", port);
/* NOTE: Peripherical clocking for CAN1 and/or CAN2 was already provided
* by stm32l4_clockconfig() early in the reset sequence.
* by stm32_clockconfig() early in the reset sequence.
*/
#ifdef CONFIG_STM32L4_CAN1
@@ -2159,8 +2159,8 @@ struct can_dev_s *stm32l4can_initialize(int port)
* file must have been disambiguated in the board.h file.
*/
stm32l4_configgpio(GPIO_CAN1_RX);
stm32l4_configgpio(GPIO_CAN1_TX);
stm32_configgpio(GPIO_CAN1_RX);
stm32_configgpio(GPIO_CAN1_TX);
}
else
#endif
arch/arm/src/stm32l4/stm32l4_can.h
+2 -2
View File
@@ -101,7 +101,7 @@ extern "C"
****************************************************************************/
/****************************************************************************
* Name: stm32l4can_initialize
* Name: stm32_caninitialize
*
* Description:
* Initialize the selected CAN port
@@ -115,7 +115,7 @@ extern "C"
****************************************************************************/
struct can_dev_s;
struct can_dev_s *stm32l4can_initialize(int port);
struct can_dev_s *stm32_caninitialize(int port);
#undef EXTERN
#if defined(__cplusplus)
arch/arm/src/stm32l4/stm32l4_comp.c
+35 -38
View File
@@ -66,12 +66,11 @@
/* COMP Register access */
static inline void modify_csr(const struct stm32l4_comp_config_s *cfg,
static inline void modify_csr(const struct stm32_comp_config_s *cfg,
uint32_t clearbits, uint32_t setbits);
static inline uint32_t get_csr(const struct stm32l4_comp_config_s *cfg);
static void stm32l4_compenable(struct stm32l4_comp_config_s *cfg,
bool en);
static int stm32l4_compconfig(const struct comp_dev_s *dev);
static inline uint32_t get_csr(const struct stm32_comp_config_s *cfg);
static void stm32_compenable(struct stm32_comp_config_s *cfg, bool en);
static int stm32_compconfig(const struct comp_dev_s *dev);
/* COMP Driver Methods */
@@ -96,7 +95,7 @@ static const struct comp_ops_s g_compops =
.ao_bind = comp_bind,
};
static struct stm32l4_comp_config_s g_comp1priv =
static struct stm32_comp_config_s g_comp1priv =
{
.interrupt =
{
@@ -118,7 +117,7 @@ static struct comp_dev_s g_comp1dev =
.ad_priv = &g_comp1priv,
};
static struct stm32l4_comp_config_s g_comp2priv =
static struct stm32_comp_config_s g_comp2priv =
{
.interrupt =
{
@@ -148,7 +147,7 @@ static struct comp_dev_s g_comp2dev =
* Name: modify_csr
****************************************************************************/
static inline void modify_csr(const struct stm32l4_comp_config_s *cfg,
static inline void modify_csr(const struct stm32_comp_config_s *cfg,
uint32_t clearbits, uint32_t setbits)
{
modifyreg32(cfg->csr, clearbits, setbits);
@@ -158,7 +157,7 @@ static inline void modify_csr(const struct stm32l4_comp_config_s *cfg,
* Name: get_csr
****************************************************************************/
static inline uint32_t get_csr(const struct stm32l4_comp_config_s *cfg)
static inline uint32_t get_csr(const struct stm32_comp_config_s *cfg)
{
return getreg32(cfg->csr);
}
@@ -184,7 +183,7 @@ static int comp_setup(struct comp_dev_s *dev)
/* Configure selected comparator */
ret = stm32l4_compconfig(dev);
ret = stm32_compconfig(dev);
if (ret < 0)
{
aerr("ERROR: Failed to initialize COMP: %d\n", ret);
@@ -212,10 +211,10 @@ static int comp_setup(struct comp_dev_s *dev)
static void comp_shutdown(struct comp_dev_s *dev)
{
struct stm32l4_comp_config_s *cfg;
struct stm32_comp_config_s *cfg;
cfg = dev->ad_priv;
stm32l4_compenable(cfg, false);
stm32_compenable(cfg, false);
}
/****************************************************************************
@@ -235,7 +234,7 @@ static void comp_shutdown(struct comp_dev_s *dev)
static int comp_read(struct comp_dev_s *dev)
{
struct stm32l4_comp_config_s *cfg;
struct stm32_comp_config_s *cfg;
uint32_t regval;
cfg = dev->ad_priv;
@@ -283,8 +282,8 @@ static int comp_ioctl(struct comp_dev_s *dev, int cmd, unsigned long arg)
static int comp_bind(struct comp_dev_s *dev,
const struct comp_callback_s *callback)
{
struct stm32l4_comp_config_s *priv =
(struct stm32l4_comp_config_s *)dev->ad_priv;
struct stm32_comp_config_s *priv =
(struct stm32_comp_config_s *)dev->ad_priv;
DEBUGASSERT(priv != NULL);
priv->interrupt.cb = callback;
@@ -296,7 +295,7 @@ static int comp_bind(struct comp_dev_s *dev,
****************************************************************************/
/****************************************************************************
* Name: stm32l4_compenable
* Name: stm32_compenable
*
* Description:
* Enable/disable comparator
@@ -307,8 +306,7 @@ static int comp_bind(struct comp_dev_s *dev,
*
****************************************************************************/
static void stm32l4_compenable(struct stm32l4_comp_config_s *cfg,
bool en)
static void stm32_compenable(struct stm32_comp_config_s *cfg, bool en)
{
uint32_t clearbits = en ? 0 : COMP_CSR_EN;
uint32_t setbits = en ? COMP_CSR_EN : 0;
@@ -316,10 +314,10 @@ static void stm32l4_compenable(struct stm32l4_comp_config_s *cfg,
modify_csr(cfg, clearbits, setbits);
}
static int stm32l4_exti_comp_isr(int irq, void *context, void *arg)
static int stm32_exti_comp_isr(int irq, void *context, void *arg)
{
struct comp_dev_s *dev = (struct comp_dev_s *)arg;
struct stm32l4_comp_config_s *cfg = dev->ad_priv;
struct stm32_comp_config_s *cfg = dev->ad_priv;
DEBUGASSERT(cfg->interrupt.cb &&
(cfg->interrupt.rising || cfg->interrupt.falling));
@@ -332,7 +330,7 @@ static int stm32l4_exti_comp_isr(int irq, void *context, void *arg)
}
/****************************************************************************
* Name: stm32l4_compconfig
* Name: stm32_compconfig
*
* Description:
* Configure comparator and I/Os used as comparators inputs
@@ -345,9 +343,9 @@ static int stm32l4_exti_comp_isr(int irq, void *context, void *arg)
*
****************************************************************************/
static int stm32l4_compconfig(const struct comp_dev_s *dev)
static int stm32_compconfig(const struct comp_dev_s *dev)
{
struct stm32l4_comp_config_s *cfg;
struct stm32_comp_config_s *cfg;
uint32_t regval = 0;
uint32_t mask = 0;
uint32_t clearbits;
@@ -364,20 +362,20 @@ static int stm32l4_compconfig(const struct comp_dev_s *dev)
switch (cfg->inp)
{
case STM32_COMP_INP_PIN_1:
stm32l4_configgpio(cmp == STM32_COMP1 ? GPIO_COMP1_INP_1 :
stm32_configgpio(cmp == STM32_COMP1 ? GPIO_COMP1_INP_1 :
GPIO_COMP2_INP_1);
regval |= COMP_CSR_INPSEL_PIN1;
break;
case STM32_COMP_INP_PIN_2:
stm32l4_configgpio(cmp == STM32_COMP1 ? GPIO_COMP1_INP_2 :
stm32_configgpio(cmp == STM32_COMP1 ? GPIO_COMP1_INP_2 :
GPIO_COMP2_INP_2);
regval |= COMP_CSR_INPSEL_PIN2;
break;
#if defined(CONFIG_STM32L4_STM32L4X3)
case STM32_COMP_INP_PIN_3:
stm32l4_configgpio(cmp == STM32_COMP1 ? GPIO_COMP1_INP_3 :
stm32_configgpio(cmp == STM32_COMP1 ? GPIO_COMP1_INP_3 :
GPIO_COMP2_INP_3);
regval |= COMP_CSR_INPSEL_PIN3;
break;
@@ -425,13 +423,13 @@ static int stm32l4_compconfig(const struct comp_dev_s *dev)
break;
case STM32_COMP_INM_PIN_1:
stm32l4_configgpio(cmp == STM32_COMP1 ? GPIO_COMP1_INM_1 :
stm32_configgpio(cmp == STM32_COMP1 ? GPIO_COMP1_INM_1 :
GPIO_COMP2_INM_1);
regval |= COMP_CSR_INMSEL_PIN1;
break;
case STM32_COMP_INM_PIN_2:
stm32l4_configgpio(cmp == STM32_COMP1 ? GPIO_COMP1_INM_2 :
stm32_configgpio(cmp == STM32_COMP1 ? GPIO_COMP1_INM_2 :
GPIO_COMP2_INM_2);
#if defined(CONFIG_STM32L4_STM32L4X5) || defined(CONFIG_STM32L4_STM32L4X6) || \
defined(CONFIG_STM32L4_STM32L4XR)
@@ -445,7 +443,7 @@ static int stm32l4_compconfig(const struct comp_dev_s *dev)
#if defined(CONFIG_STM32L4_STM32L4X3)
case STM32_COMP_INM_PIN_3:
stm32l4_configgpio(cmp == STM32_COMP1 ? GPIO_COMP1_INM_3 :
stm32_configgpio(cmp == STM32_COMP1 ? GPIO_COMP1_INM_3 :
GPIO_COMP2_INM_3);
regval |= COMP_CSR_INMSEL_INMESEL;
mask |= COMP_CSR_INMESEL_MASK;
@@ -453,7 +451,7 @@ static int stm32l4_compconfig(const struct comp_dev_s *dev)
break;
case STM32_COMP_INM_PIN_4:
stm32l4_configgpio(cmp == STM32_COMP1 ? GPIO_COMP1_INM_4 :
stm32_configgpio(cmp == STM32_COMP1 ? GPIO_COMP1_INM_4 :
GPIO_COMP2_INM_4);
regval |= COMP_CSR_INMSEL_INMESEL;
mask |= COMP_CSR_INMESEL_MASK;
@@ -461,7 +459,7 @@ static int stm32l4_compconfig(const struct comp_dev_s *dev)
break;
case STM32_COMP_INM_PIN_5:
stm32l4_configgpio(cmp == STM32_COMP1 ? GPIO_COMP1_INM_5 :
stm32_configgpio(cmp == STM32_COMP1 ? GPIO_COMP1_INM_5 :
GPIO_COMP2_INM_5);
regval |= COMP_CSR_INMSEL_INMESEL;
mask |= COMP_CSR_INMESEL_MASK;
@@ -539,18 +537,18 @@ static int stm32l4_compconfig(const struct comp_dev_s *dev)
/* Enable */
stm32l4_compenable(cfg, true);
stm32_compenable(cfg, true);
/* Enable interrupt */
if (cfg->interrupt.cb && (cfg->interrupt.rising || cfg->interrupt.falling))
{
ret = stm32l4_exti_comp(cmp, cfg->interrupt.rising,
ret = stm32_exti_comp(cmp, cfg->interrupt.rising,
cfg->interrupt.falling, 0,
stm32l4_exti_comp_isr, (void *)dev);
stm32_exti_comp_isr, (void *)dev);
if (ret < 0)
{
aerr("stm32l4_exti_comp failed ret = %d\n", ret);
aerr("stm32_exti_comp failed ret = %d\n", ret);
return ERROR;
}
}
@@ -561,7 +559,7 @@ static int stm32l4_compconfig(const struct comp_dev_s *dev)
}
/****************************************************************************
* Name: stm32l4_compinitialize
* Name: stm32_compinitialize
*
* Description:
* Initialize the COMP.
@@ -579,8 +577,7 @@ static int stm32l4_compconfig(const struct comp_dev_s *dev)
****************************************************************************/
struct comp_dev_s *
stm32l4_compinitialize(int intf,
const struct stm32l4_comp_config_s *cfg)
stm32_compinitialize(int intf, const struct stm32_comp_config_s *cfg)
{
struct comp_dev_s *dev;
arch/arm/src/stm32l4/stm32l4_comp.h
+16 -17
View File
@@ -54,7 +54,7 @@
/* Comparators */
enum stm32l4_comp_e
enum stm32_comp_e
{
STM32_COMP1,
STM32_COMP2,
@@ -63,7 +63,7 @@ enum stm32l4_comp_e
/* Plus input */
enum stm32l4_comp_inp_e
enum stm32_comp_inp_e
{
STM32_COMP_INP_PIN_1, /* COMP1: PC5, COMP2: PB4 */
STM32_COMP_INP_PIN_2, /* COMP1: PB2, COMP2: PB6 */
@@ -72,7 +72,7 @@ enum stm32l4_comp_inp_e
/* Minus input */
enum stm32l4_comp_inm_e
enum stm32_comp_inm_e
{
STM32_COMP_INM_1_4_VREF,
STM32_COMP_INM_1_2_VREF,
@@ -91,7 +91,7 @@ enum stm32l4_comp_inm_e
/* Comparators */
enum stm32l4_comp_e
enum stm32_comp_e
{
STM32_COMP1,
STM32_COMP2,
@@ -100,7 +100,7 @@ enum stm32l4_comp_e
/* Plus input */
enum stm32l4_comp_inp_e
enum stm32_comp_inp_e
{
STM32_COMP_INP_PIN_1, /* COMP1: PC5, COMP2: PB4 */
STM32_COMP_INP_PIN_2 /* COMP1: PB2, COMP2: PB6 */
@@ -108,7 +108,7 @@ enum stm32l4_comp_inp_e
/* Minus input */
enum stm32l4_comp_inm_e
enum stm32_comp_inm_e
{
STM32_COMP_INM_1_4_VREF,
STM32_COMP_INM_1_2_VREF,
@@ -123,7 +123,7 @@ enum stm32l4_comp_inm_e
/* Hysteresis */
enum stm32l4_comp_hyst_e
enum stm32_comp_hyst_e
{
STM32_COMP_HYST_NONE,
STM32_COMP_HYST_LOW,
@@ -133,7 +133,7 @@ enum stm32l4_comp_hyst_e
/* Power/Speed Modes */
enum stm32l4_comp_speed_e
enum stm32_comp_speed_e
{
STM32_COMP_SPEED_HIGH,
STM32_COMP_SPEED_MEDIUM,
@@ -142,7 +142,7 @@ enum stm32l4_comp_speed_e
/* Comparator configuration *************************************************/
struct stm32l4_comp_config_s
struct stm32_comp_config_s
{
struct
{
@@ -151,10 +151,10 @@ struct stm32l4_comp_config_s
bool falling;
} interrupt;
uint8_t inp; /* Plus input pin (see enum stm32l4_comp_inp_e) */
uint8_t inm; /* Minus input pin (see enum stm32l4_comp_inm_e) */
uint8_t hyst; /* Hysteresis (see enum stm32l4_comp_hyst_e) */
uint8_t speed; /* Speed (see stm32l4_comp_speed_e) */
uint8_t inp; /* Plus input pin (see enum stm32_comp_inp_e) */
uint8_t inm; /* Minus input pin (see enum stm32_comp_inm_e) */
uint8_t hyst; /* Hysteresis (see enum stm32_comp_hyst_e) */
uint8_t speed; /* Speed (see stm32_comp_speed_e) */
bool inverted; /* Invert output? */
uint32_t csr; /* Control and status register */
};
@@ -173,7 +173,7 @@ extern "C"
#endif
/****************************************************************************
* Name: stm32l4_compinitialize
* Name: stm32_compinitialize
*
* Description:
* Initialize the COMP.
@@ -191,9 +191,8 @@ extern "C"
*
****************************************************************************/
struct
comp_dev_s *stm32l4_compinitialize(int intf,
const struct stm32l4_comp_config_s *cfg);
struct comp_dev_s *
stm32_compinitialize(int intf, const struct stm32_comp_config_s *cfg);
#undef EXTERN
#ifdef __cplusplus
arch/arm/src/stm32l4/stm32l4_dac.c
+31 -31
View File
@@ -40,7 +40,7 @@
#include "arm_internal.h"
#include "chip.h"
#include "stm32l4.h"
#include "stm32.h"
#include "stm32l4_dac.h"
#include "stm32l4_rcc.h"
#include "stm32l4_dma.h"
@@ -408,7 +408,7 @@ static const struct stm32_dac_ops_s g_dac_llops =
/* Channel 1 */
#ifdef CONFIG_STM32L4_DAC1_DMA
uint16_t stm32l4_dac1_dmabuffer[CONFIG_STM32L4_DAC1_DMA_BUFFER_SIZE];
uint16_t stm32_dac1_dmabuffer[CONFIG_STM32L4_DAC1_DMA_BUFFER_SIZE];
#endif
static struct stm32_chan_s g_dac1priv =
@@ -428,7 +428,7 @@ static struct stm32_chan_s g_dac1priv =
.hasdma = 1,
.dmachan = DAC1_DMA_CHAN,
.buffer_len = CONFIG_STM32L4_DAC1_DMA_BUFFER_SIZE,
.dmabuffer = stm32l4_dac1_dmabuffer,
.dmabuffer = stm32_dac1_dmabuffer,
.timer = CONFIG_STM32L4_DAC1_TIMER,
.tsel = DAC1_TSEL_VALUE,
.tbase = DAC1_TIMER_BASE,
@@ -448,7 +448,7 @@ static struct dac_dev_s g_dac1dev =
/* Channel 2 */
#ifdef CONFIG_STM32L4_DAC2_DMA
uint16_t stm32l4_dac2_dmabuffer[CONFIG_STM32L4_DAC2_DMA_BUFFER_SIZE];
uint16_t stm32_dac2_dmabuffer[CONFIG_STM32L4_DAC2_DMA_BUFFER_SIZE];
#endif
static struct stm32_chan_s g_dac2priv =
@@ -468,7 +468,7 @@ static struct stm32_chan_s g_dac2priv =
.hasdma = 1,
.dmachan = DAC2_DMA_CHAN,
.buffer_len = CONFIG_STM32L4_DAC2_DMA_BUFFER_SIZE,
.dmabuffer = stm32l4_dac2_dmabuffer,
.dmabuffer = stm32_dac2_dmabuffer,
.timer = CONFIG_STM32L4_DAC2_TIMER,
.tsel = DAC2_TSEL_VALUE,
.tbase = DAC2_TIMER_BASE,
@@ -511,7 +511,7 @@ static uint32_t dac_getreg(struct stm32_chan_s *priv, int offset)
}
/****************************************************************************
* Name: stm32l4_dac_modify_cr
* Name: stm32_dac_modify_cr
*
* Description:
* Modify the contents of the DAC control register.
@@ -526,7 +526,7 @@ static uint32_t dac_getreg(struct stm32_chan_s *priv, int offset)
*
****************************************************************************/
static inline void stm32l4_dac_modify_cr(struct stm32_chan_s *chan,
static inline void stm32_dac_modify_cr(struct stm32_chan_s *chan,
uint32_t clearbits,
uint32_t setbits)
{
@@ -546,7 +546,7 @@ static inline void stm32l4_dac_modify_cr(struct stm32_chan_s *chan,
}
/****************************************************************************
* Name: stm32l4_dac_modify_mcr
* Name: stm32_dac_modify_mcr
*
* Description:
* Modify the contents of the DAC mode register.
@@ -561,9 +561,9 @@ static inline void stm32l4_dac_modify_cr(struct stm32_chan_s *chan,
*
****************************************************************************/
static inline void stm32l4_dac_modify_mcr(struct stm32_chan_s *chan,
uint32_t clearbits,
uint32_t setbits)
static inline void stm32_dac_modify_mcr(struct stm32_chan_s *chan,
uint32_t clearbits,
uint32_t setbits)
{
unsigned int shift;
@@ -807,7 +807,7 @@ static int dac_send(struct dac_dev_s *dev, struct dac_msg_s *msg)
/* Enable DAC Channel */
stm32l4_dac_modify_cr(chan, 0, DAC_CR_EN);
stm32_dac_modify_cr(chan, 0, DAC_CR_EN);
#ifdef HAVE_DMA
if (chan->hasdma)
@@ -843,17 +843,17 @@ static int dac_send(struct dac_dev_s *dev, struct dac_msg_s *msg)
* - Peripheral Burst: single
*/
stm32l4_dmasetup(chan->dma, chan->dro, (uint32_t)chan->dmabuffer,
stm32_dmasetup(chan->dma, chan->dro, (uint32_t)chan->dmabuffer,
chan->buffer_len, DAC_DMA_CONTROL_WORD);
/* Start the DMA */
chan->result = -EBUSY;
stm32l4_dmastart(chan->dma, dac_dmatxcallback, chan, false);
stm32_dmastart(chan->dma, dac_dmatxcallback, chan, false);
/* Enable DMA for DAC Channel */
stm32l4_dac_modify_cr(chan, 0, DAC_CR_DMAEN);
stm32_dac_modify_cr(chan, 0, DAC_CR_DMAEN);
}
else
#endif
@@ -1098,7 +1098,7 @@ static int dac_chaninit(struct stm32_chan_s *chan)
if (chan->pin != 0xffffffffu)
{
stm32l4_configgpio(chan->pin);
stm32_configgpio(chan->pin);
}
/* DAC channel configuration:
@@ -1110,7 +1110,7 @@ static int dac_chaninit(struct stm32_chan_s *chan)
/* Disable before change */
stm32l4_dac_modify_cr(chan, DAC_CR_EN, 0);
stm32_dac_modify_cr(chan, DAC_CR_EN, 0);
clearbits = DAC_CR_TSEL_MASK |
DAC_CR_MAMP_MASK |
@@ -1119,7 +1119,7 @@ static int dac_chaninit(struct stm32_chan_s *chan)
chan->tsel | /* Set trigger source (SW or timer TRGO event) */
DAC_CR_MAMP_AMP1 | /* Set waveform characteristics */
DAC_CR_WAVE_DISABLED; /* Set no noise */
stm32l4_dac_modify_cr(chan, clearbits, setbits);
stm32_dac_modify_cr(chan, clearbits, setbits);
/* Enable output buffer or route DAC output to on-chip peripherals (ADC) */
@@ -1133,7 +1133,7 @@ static int dac_chaninit(struct stm32_chan_s *chan)
setbits = DAC_MCR_MODE_IN;
}
stm32l4_dac_modify_mcr(chan, clearbits, setbits);
stm32_dac_modify_mcr(chan, clearbits, setbits);
#ifdef HAVE_DMA
/* Determine if DMA is supported by this channel */
@@ -1144,11 +1144,11 @@ static int dac_chaninit(struct stm32_chan_s *chan)
/* Yes.. DAC trigger enable */
stm32l4_dac_modify_cr(chan, 0, DAC_CR_TEN);
stm32_dac_modify_cr(chan, 0, DAC_CR_TEN);
/* Allocate a DMA channel */
chan->dma = stm32l4_dmachannel(chan->dmachan);
chan->dma = stm32_dmachannel(chan->dmachan);
if (!chan->dma)
{
aerr("ERROR: Failed to allocate a DMA channel\n");
@@ -1161,7 +1161,7 @@ static int dac_chaninit(struct stm32_chan_s *chan)
if (ret < 0)
{
aerr("ERROR: Failed to initialize the DMA timer: %d\n", ret);
stm32l4_dmafree(chan->dma);
stm32_dmafree(chan->dma);
return ret;
}
}
@@ -1229,11 +1229,11 @@ static void dac_llops_enable(struct stm32_dac_dev_s *dev, bool enabled)
if (enabled)
{
stm32l4_dac_modify_cr(priv, 0, DAC_CR_EN);
stm32_dac_modify_cr(priv, 0, DAC_CR_EN);
}
else
{
stm32l4_dac_modify_cr(priv, DAC_CR_EN, 0);
stm32_dac_modify_cr(priv, DAC_CR_EN, 0);
}
}
@@ -1272,17 +1272,17 @@ static void dac_llops_startdma(struct stm32_dac_dev_s *dev)
* - Peripheral Burst: single
*/
stm32l4_dmasetup(priv->dma, priv->dro, (uint32_t)priv->dmabuffer,
stm32_dmasetup(priv->dma, priv->dro, (uint32_t)priv->dmabuffer,
priv->buffer_len, DAC_DMA_CONTROL_WORD);
/* Start the DMA */
priv->result = -EBUSY;
stm32l4_dmastart(priv->dma, dac_dmatxcallback, priv, false);
stm32_dmastart(priv->dma, dac_dmatxcallback, priv, false);
/* Enable DMA for DAC Channel */
stm32l4_dac_modify_cr(priv, 0, DAC_CR_DMAEN);
stm32_dac_modify_cr(priv, 0, DAC_CR_DMAEN);
/* Reset counters (generate an update) */
@@ -1300,11 +1300,11 @@ static void dac_llops_stopdma(struct stm32_dac_dev_s *dev)
/* Stop the DMA */
priv->result = -EBUSY;
stm32l4_dmastop(priv->dma);
stm32_dmastop(priv->dma);
/* Enable DMA for DAC Channel */
stm32l4_dac_modify_cr(priv, 0, DAC_CR_DMAEN);
stm32_dac_modify_cr(priv, 0, DAC_CR_DMAEN);
}
#endif
@@ -1326,7 +1326,7 @@ static void dac_llops_dumpregs(struct stm32_dac_dev_s *dev)
****************************************************************************/
/****************************************************************************
* Name: stm32l4_dacinitialize
* Name: stm32_dacinitialize
*
* Description:
* Initialize the DAC.
@@ -1343,7 +1343,7 @@ static void dac_llops_dumpregs(struct stm32_dac_dev_s *dev)
*
****************************************************************************/
struct dac_dev_s *stm32l4_dacinitialize(int intf)
struct dac_dev_s *stm32_dacinitialize(int intf)
{
struct dac_dev_s *dev;
struct stm32_chan_s *chan;
arch/arm/src/stm32l4/stm32l4_dac.h
+4 -4
View File
@@ -144,10 +144,10 @@ struct stm32_dac_ops_s
****************************************************************************/
#ifdef CONFIG_STM32L4_DAC1_DMA
extern uint16_t stm32l4_dac1_dmabuffer[];
extern uint16_t stm32_dac1_dmabuffer[];
#endif
#ifdef CONFIG_STM32L4_DAC2_DMA
extern uint16_t stm32l4_dac2_dmabuffer[];
extern uint16_t stm32_dac2_dmabuffer[];
#endif
/****************************************************************************
@@ -164,7 +164,7 @@ extern "C"
#endif
/****************************************************************************
* Name: stm32l4_dacinitialize
* Name: stm32_dacinitialize
*
* Description:
* Initialize the DAC
@@ -178,7 +178,7 @@ extern "C"
****************************************************************************/
struct dac_dev_s;
struct dac_dev_s *stm32l4_dacinitialize(int intf);
struct dac_dev_s *stm32_dacinitialize(int intf);
#undef EXTERN
#ifdef __cplusplus
arch/arm/src/stm32l4/stm32l4_dfsdm.c
+8 -9
View File
@@ -1204,19 +1204,19 @@ static int dfsdm_setup(struct adc_dev_s *dev)
if (priv->dma != NULL)
{
stm32l4_dmastop(priv->dma);
stm32l4_dmafree(priv->dma);
stm32_dmastop(priv->dma);
stm32_dmafree(priv->dma);
}
priv->dma = stm32l4_dmachannel(priv->dmachan);
priv->dma = stm32_dmachannel(priv->dmachan);
stm32l4_dmasetup(priv->dma,
stm32_dmasetup(priv->dma,
priv->base + FLTRDATAR_OFFSET(priv),
(uint32_t)priv->dmabuffer,
priv->nchannels,
DFSDM_DMA_CONTROL_WORD);
stm32l4_dmastart(priv->dma, dfsdm_dmaconvcallback, dev, false);
stm32_dmastart(priv->dma, dfsdm_dmaconvcallback, dev, false);
}
#endif
@@ -1735,7 +1735,7 @@ static void dfsdm_dmaconvcallback(DMA_HANDLE handle,
****************************************************************************/
/****************************************************************************
* Name: stm32l4_dfsdm_initialize
* Name: stm32_dfsdm_initialize
*
* Description:
* Initialize the DFSDM.
@@ -1750,9 +1750,8 @@ static void dfsdm_dmaconvcallback(DMA_HANDLE handle,
*
****************************************************************************/
struct adc_dev_s *stm32l4_dfsdm_initialize(int intf,
const uint8_t *chanlist,
int cchannels)
struct adc_dev_s *stm32_dfsdm_initialize(int intf, const uint8_t *chanlist,
int cchannels)
{
struct adc_dev_s *dev;
struct stm32_dev_s *priv;
arch/arm/src/stm32l4/stm32l4_dfsdm.h
+3 -4
View File
@@ -306,7 +306,7 @@ extern "C"
#endif
/****************************************************************************
* Name: stm32l4_dfsdm_initialize
* Name: stm32_dfsdm_initialize
*
* Description:
* Initialize the DFSDM.
@@ -322,9 +322,8 @@ extern "C"
****************************************************************************/
struct adc_dev_s;
struct adc_dev_s *stm32l4_dfsdm_initialize(int intf,
const uint8_t *chanlist,
int nchannels);
struct adc_dev_s *stm32_dfsdm_initialize(int intf, const uint8_t *chanlist,
int nchannels);
#undef EXTERN
#ifdef __cplusplus
}
arch/arm/src/stm32l4/stm32l4_dfumode.c
+2 -2
View File
@@ -120,7 +120,7 @@ static inline void apb_reset(void)
****************************************************************************/
/****************************************************************************
* Name: stm32l4_dfumode
* Name: stm32_dfumode
*
* Description:
* Reboot the part in DFU mode (GCC only).
@@ -128,7 +128,7 @@ static inline void apb_reset(void)
****************************************************************************/
#if defined(CONFIG_STM32L4_STM32L4X6) || defined(CONFIG_STM32L4_STM32L4XR)
void stm32l4_dfumode(void)
void stm32_dfumode(void)
{
uint32_t regval;
boot_call_t boot;
arch/arm/src/stm32l4/stm32l4_dfumode.h
+2 -2
View File
@@ -34,7 +34,7 @@
****************************************************************************/
/****************************************************************************
* Name: stm32l4_dfumode
* Name: stm32_dfumode
*
* Description:
* Reboot the part in DFU mode.
@@ -42,7 +42,7 @@
****************************************************************************/
#if defined(CONFIG_STM32L4_STM32L4X6) || defined(CONFIG_STM32L4_STM32L4XR)
void stm32l4_dfumode(void) noreturn_function;
void stm32_dfumode(void) noreturn_function;
#endif
#endif /* __ARCH_ARM_SRC_STM32L4_STM32L4_DFUMODE_H */
arch/arm/src/stm32l4/stm32l4_dma.h
+36 -36
View File
@@ -77,13 +77,13 @@ typedef void *DMA_HANDLE;
* status - A bit encoded value that provides the completion status. See
* the DMASTATUS_* definitions above.
* arg - A user-provided value that was provided when
* stm32l4_dmastart() was called.
* stm32_dmastart() was called.
*/
typedef void (*dma_callback_t)(DMA_HANDLE handle, uint8_t status, void *arg);
#ifdef CONFIG_DEBUG_DMA_INFO
struct stm32l4_dmaregs_s
struct stm32_dmaregs_s
{
uint32_t isr; /* Interrupt Status Register; each channel gets 4 bits */
uint32_t ccr; /* Channel Configuration Register; determines functionality */
@@ -130,7 +130,7 @@ extern "C"
defined(CONFIG_STM32L4_STM32L4X6)
/****************************************************************************
* Name: stm32l4_dmachannel
* Name: stm32_dmachannel
*
* Description:
* Allocate a DMA channel. This function gives the caller mutually
@@ -139,11 +139,11 @@ extern "C"
* channel cannot do DMA concurrently! See the DMACHAN_* definitions in
* stm32l4_dma.h.
*
* If the DMA channel is not available, then stm32l4_dmachannel() will
* If the DMA channel is not available, then stm32_dmachannel() will
* wait until the holder of the channel relinquishes the channel by
* calling stm32l4_dmafree(). WARNING: If you have two devices sharing a
* calling stm32_dmafree(). WARNING: If you have two devices sharing a
* DMA channel and the code never releases the channel, the
* stm32l4_dmachannel call for the other will hang forever in this
* stm32_dmachannel call for the other will hang forever in this
* function! Don't let your design do that!
*
* Hmm.. I suppose this interface could be extended to make a non-blocking
@@ -166,7 +166,7 @@ extern "C"
*
****************************************************************************/
DMA_HANDLE stm32l4_dmachannel(unsigned int chan);
DMA_HANDLE stm32_dmachannel(unsigned int chan);
#elif defined(CONFIG_STM32L4_STM32L4XR)
@@ -195,20 +195,20 @@ DMA_HANDLE stm32l4_dmachannel(unsigned int chan);
*
****************************************************************************/
DMA_HANDLE stm32l4_dmachannel(unsigned int dmamap);
DMA_HANDLE stm32_dmachannel(unsigned int dmamap);
#endif
/****************************************************************************
* Name: stm32l4_dmafree
* Name: stm32_dmafree
*
* Description:
* Release a DMA channel. If another thread is waiting for this DMA
* channel in a call to stm32l4_dmachannel, then this function will
* channel in a call to stm32_dmachannel, then this function will
* re-assign the DMA channel to that thread and wake it up.
*
* NOTE: The 'handle' used in this argument must NEVER be used again
* until stm32l4_dmachannel() is called again to re-gain access to
* until stm32_dmachannel() is called again to re-gain access to
* the channel.
*
* Returned Value:
@@ -220,64 +220,64 @@ DMA_HANDLE stm32l4_dmachannel(unsigned int dmamap);
*
****************************************************************************/
void stm32l4_dmafree(DMA_HANDLE handle);
void stm32_dmafree(DMA_HANDLE handle);
/****************************************************************************
* Name: stm32l4_dmasetup
* Name: stm32_dmasetup
*
* Description:
* Configure DMA before using
*
****************************************************************************/
void stm32l4_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
size_t ntransfers, uint32_t ccr);
/****************************************************************************
* Name: stm32l4_dmastart
* Name: stm32_dmastart
*
* Description:
* Start the DMA transfer
*
* Assumptions:
* - DMA handle allocated by stm32l4_dmachannel()
* - DMA handle allocated by stm32_dmachannel()
* - No DMA in progress
*
****************************************************************************/
void stm32l4_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg,
void stm32_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg,
bool half);
/****************************************************************************
* Name: stm32l4_dmastop
* Name: stm32_dmastop
*
* Description:
* Cancel the DMA. After stm32l4_dmastop() is called, the DMA channel is
* reset and stm32l4_dmasetup() must be called before stm32l4_dmastart()
* Cancel the DMA. After stm32_dmastop() is called, the DMA channel is
* reset and stm32_dmasetup() must be called before stm32_dmastart()
* can be called again
*
* Assumptions:
* - DMA handle allocated by stm32l4_dmachannel()
* - DMA handle allocated by stm32_dmachannel()
*
****************************************************************************/
void stm32l4_dmastop(DMA_HANDLE handle);
void stm32_dmastop(DMA_HANDLE handle);
/****************************************************************************
* Name: stm32l4_dmaresidual
* Name: stm32_dmaresidual
*
* Description:
* Returns the number of bytes remaining to be transferred
*
* Assumptions:
* - DMA handle allocated by stm32l4_dmachannel()
* - DMA handle allocated by stm32_dmachannel()
*
****************************************************************************/
size_t stm32l4_dmaresidual(DMA_HANDLE handle);
size_t stm32_dmaresidual(DMA_HANDLE handle);
/****************************************************************************
* Name: stm32l4_dmacapable
* Name: stm32_dmacapable
*
* Description:
* Check if the DMA controller can transfer data to/from given memory
@@ -292,44 +292,44 @@ size_t stm32l4_dmaresidual(DMA_HANDLE handle);
****************************************************************************/
#ifdef CONFIG_STM32L4_DMACAPABLE
bool stm32l4_dmacapable(uintptr_t maddr, uint32_t count, uint32_t ccr);
bool stm32_dmacapable(uintptr_t maddr, uint32_t count, uint32_t ccr);
#else
# define stm32l4_dmacapable(maddr, count, ccr) (true)
# define stm32_dmacapable(maddr, count, ccr) (true)
#endif
/****************************************************************************
* Name: stm32l4_dmasample
* Name: stm32_dmasample
*
* Description:
* Sample DMA register contents
*
* Assumptions:
* - DMA handle allocated by stm32l4_dmachannel()
* - DMA handle allocated by stm32_dmachannel()
*
****************************************************************************/
#ifdef CONFIG_DEBUG_DMA_INFO
void stm32l4_dmasample(DMA_HANDLE handle, struct stm32l4_dmaregs_s *regs);
void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs);
#else
# define stm32l4_dmasample(handle,regs) ((void)0)
# define stm32_dmasample(handle,regs) ((void)0)
#endif
/****************************************************************************
* Name: stm32l4_dmadump
* Name: stm32_dmadump
*
* Description:
* Dump previously sampled DMA register contents
*
* Assumptions:
* - DMA handle allocated by stm32l4_dmachannel()
* - DMA handle allocated by stm32_dmachannel()
*
****************************************************************************/
#ifdef CONFIG_DEBUG_DMA_INFO
void stm32l4_dmadump(DMA_HANDLE handle, const struct stm32l4_dmaregs_s *regs,
void stm32_dmadump(DMA_HANDLE handle, const struct stm32_dmaregs_s *regs,
const char *msg);
#else
# define stm32l4_dmadump(handle,regs,msg) ((void)0)
# define stm32_dmadump(handle,regs,msg) ((void)0)
#endif
#undef EXTERN
arch/arm/src/stm32l4/stm32l4_dumpgpio.c
+2 -2
View File
@@ -86,14 +86,14 @@ static const char g_portchar[STM32_NPORTS] =
****************************************************************************/
/****************************************************************************
* Function: stm32l4_dumpgpio
* Function: stm32_dumpgpio
*
* Description:
* Dump all GPIO registers associated with the provided base address
*
****************************************************************************/
int stm32l4_dumpgpio(uint32_t pinset, const char *msg)
int stm32_dumpgpio(uint32_t pinset, const char *msg)
{
irqstate_t flags;
uint32_t base;
arch/arm/src/stm32l4/stm32l4_exti.h
+8 -8
View File
@@ -54,7 +54,7 @@ extern "C"
****************************************************************************/
/****************************************************************************
* Name: stm32l4_gpiosetevent
* Name: stm32_gpiosetevent
*
* Description:
* Sets/clears GPIO based event and interrupt triggers.
@@ -73,11 +73,11 @@ extern "C"
*
****************************************************************************/
int stm32l4_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
int stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
bool event, xcpt_t func, void *arg);
/****************************************************************************
* Name: stm32l4_exti_alarm
* Name: stm32_exti_alarm
*
* Description:
* Sets/clears EXTI alarm interrupt.
@@ -95,12 +95,12 @@ int stm32l4_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
****************************************************************************/
#ifdef CONFIG_RTC_ALARM
int stm32l4_exti_alarm(bool risingedge, bool fallingedge, bool event,
int stm32_exti_alarm(bool risingedge, bool fallingedge, bool event,
xcpt_t func, void *arg);
#endif
/****************************************************************************
* Name: stm32l4_exti_wakeup
* Name: stm32_exti_wakeup
*
* Description:
* Sets/clears EXTI wakeup interrupt.
@@ -118,12 +118,12 @@ int stm32l4_exti_alarm(bool risingedge, bool fallingedge, bool event,
****************************************************************************/
#ifdef CONFIG_RTC_PERIODIC
int stm32l4_exti_wakeup(bool risingedge, bool fallingedge, bool event,
int stm32_exti_wakeup(bool risingedge, bool fallingedge, bool event,
xcpt_t func, void *arg);
#endif
/****************************************************************************
* Name: stm32l4_exti_comp
* Name: stm32_exti_comp
*
* Description:
* Sets/clears comparator based events and interrupt triggers.
@@ -142,7 +142,7 @@ int stm32l4_exti_wakeup(bool risingedge, bool fallingedge, bool event,
****************************************************************************/
#ifdef CONFIG_STM32L4_COMP
int stm32l4_exti_comp(int cmp, bool risingedge, bool fallingedge,
int stm32_exti_comp(int cmp, bool risingedge, bool fallingedge,
bool event, xcpt_t func, void *arg);
#endif
arch/arm/src/stm32l4/stm32l4_exti_alarm.c
+5 -5
View File
@@ -53,14 +53,14 @@ static void *g_callback_arg;
****************************************************************************/
/****************************************************************************
* Name: stm32l4_exti_alarm_isr
* Name: stm32_exti_alarm_isr
*
* Description:
* EXTI ALARM interrupt service routine/dispatcher
*
****************************************************************************/
static int stm32l4_exti_alarm_isr(int irq, void *context, void *arg)
static int stm32_exti_alarm_isr(int irq, void *context, void *arg)
{
int ret = OK;
@@ -83,7 +83,7 @@ static int stm32l4_exti_alarm_isr(int irq, void *context, void *arg)
****************************************************************************/
/****************************************************************************
* Name: stm32l4_exti_alarm
* Name: stm32_exti_alarm
*
* Description:
* Sets/clears EXTI alarm interrupt.
@@ -99,7 +99,7 @@ static int stm32l4_exti_alarm_isr(int irq, void *context, void *arg)
*
****************************************************************************/
int stm32l4_exti_alarm(bool risingedge, bool fallingedge, bool event,
int stm32_exti_alarm(bool risingedge, bool fallingedge, bool event,
xcpt_t func, void *arg)
{
g_alarm_callback = func;
@@ -109,7 +109,7 @@ int stm32l4_exti_alarm(bool risingedge, bool fallingedge, bool event,
if (func)
{
irq_attach(STM32_IRQ_RTCALRM, stm32l4_exti_alarm_isr, NULL);
irq_attach(STM32_IRQ_RTCALRM, stm32_exti_alarm_isr, NULL);
up_enable_irq(STM32_IRQ_RTCALRM);
}
else
arch/arm/src/stm32l4/stm32l4_exti_comp.c
+4 -4
View File
@@ -83,7 +83,7 @@ static const uint32_t g_comp_lines[STM32_COMP_NUM] =
* Private Functions
****************************************************************************/
static int stm32l4_exti_comp_isr(int irq, void *context, void *arg)
static int stm32_exti_comp_isr(int irq, void *context, void *arg)
{
uint32_t pr;
uint32_t ln;
@@ -118,7 +118,7 @@ static int stm32l4_exti_comp_isr(int irq, void *context, void *arg)
****************************************************************************/
/****************************************************************************
* Name: stm32l4_exti_comp
* Name: stm32_exti_comp
*
* Description:
* Sets/clears comparator based events and interrupt triggers.
@@ -136,7 +136,7 @@ static int stm32l4_exti_comp_isr(int irq, void *context, void *arg)
*
****************************************************************************/
int stm32l4_exti_comp(int cmp, bool risingedge, bool fallingedge,
int stm32_exti_comp(int cmp, bool risingedge, bool fallingedge,
bool event, xcpt_t func, void *arg)
{
irqstate_t flags;
@@ -152,7 +152,7 @@ int stm32l4_exti_comp(int cmp, bool risingedge, bool fallingedge,
if (func != NULL)
{
irq_attach(STM32_IRQ_COMP, stm32l4_exti_comp_isr, NULL);
irq_attach(STM32_IRQ_COMP, stm32_exti_comp_isr, NULL);
up_enable_irq(STM32_IRQ_COMP);
}
else
arch/arm/src/stm32l4/stm32l4_exti_gpio.c
+20 -20
View File
@@ -66,7 +66,7 @@ static struct gpio_callback_s g_gpio_handlers[16];
* Interrupt Service Routines - Dispatchers
****************************************************************************/
static int stm32l4_exti0_isr(int irq, void *context, void *arg)
static int stm32_exti0_isr(int irq, void *context, void *arg)
{
int ret = OK;
@@ -87,7 +87,7 @@ static int stm32l4_exti0_isr(int irq, void *context, void *arg)
return ret;
}
static int stm32l4_exti1_isr(int irq, void *context, void *arg)
static int stm32_exti1_isr(int irq, void *context, void *arg)
{
int ret = OK;
@@ -108,7 +108,7 @@ static int stm32l4_exti1_isr(int irq, void *context, void *arg)
return ret;
}
static int stm32l4_exti2_isr(int irq, void *context, void *arg)
static int stm32_exti2_isr(int irq, void *context, void *arg)
{
int ret = OK;
@@ -129,7 +129,7 @@ static int stm32l4_exti2_isr(int irq, void *context, void *arg)
return ret;
}
static int stm32l4_exti3_isr(int irq, void *context, void *arg)
static int stm32_exti3_isr(int irq, void *context, void *arg)
{
int ret = OK;
@@ -150,7 +150,7 @@ static int stm32l4_exti3_isr(int irq, void *context, void *arg)
return ret;
}
static int stm32l4_exti4_isr(int irq, void *context, void *arg)
static int stm32_exti4_isr(int irq, void *context, void *arg)
{
int ret = OK;
@@ -171,7 +171,7 @@ static int stm32l4_exti4_isr(int irq, void *context, void *arg)
return ret;
}
static int stm32l4_exti_multiisr(int irq, void *context, void *arg,
static int stm32_exti_multiisr(int irq, void *context, void *arg,
int first, int last)
{
uint32_t pr;
@@ -215,14 +215,14 @@ static int stm32l4_exti_multiisr(int irq, void *context, void *arg,
return ret;
}
static int stm32l4_exti95_isr(int irq, void *context, void *arg)
static int stm32_exti95_isr(int irq, void *context, void *arg)
{
return stm32l4_exti_multiisr(irq, context, arg, 5, 9);
return stm32_exti_multiisr(irq, context, arg, 5, 9);
}
static int stm32l4_exti1510_isr(int irq, void *context, void *arg)
static int stm32_exti1510_isr(int irq, void *context, void *arg)
{
return stm32l4_exti_multiisr(irq, context, arg, 10, 15);
return stm32_exti_multiisr(irq, context, arg, 10, 15);
}
/****************************************************************************
@@ -230,7 +230,7 @@ static int stm32l4_exti1510_isr(int irq, void *context, void *arg)
****************************************************************************/
/****************************************************************************
* Name: stm32l4_gpiosetevent
* Name: stm32_gpiosetevent
*
* Description:
* Sets/clears GPIO based event and interrupt triggers.
@@ -252,7 +252,7 @@ static int stm32l4_exti1510_isr(int irq, void *context, void *arg)
*
****************************************************************************/
int stm32l4_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
int stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
bool event, xcpt_t func, void *arg)
{
struct gpio_callback_s *shared_cbs;
@@ -273,37 +273,37 @@ int stm32l4_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
switch (pin)
{
case 0:
handler = stm32l4_exti0_isr;
handler = stm32_exti0_isr;
break;
case 1:
handler = stm32l4_exti1_isr;
handler = stm32_exti1_isr;
break;
case 2:
handler = stm32l4_exti2_isr;
handler = stm32_exti2_isr;
break;
case 3:
handler = stm32l4_exti3_isr;
handler = stm32_exti3_isr;
break;
default:
handler = stm32l4_exti4_isr;
handler = stm32_exti4_isr;
break;
}
}
else if (pin < 10)
{
irq = STM32_IRQ_EXTI95;
handler = stm32l4_exti95_isr;
handler = stm32_exti95_isr;
shared_cbs = &g_gpio_handlers[5];
nshared = 5;
}
else
{
irq = STM32_IRQ_EXTI1510;
handler = stm32l4_exti1510_isr;
handler = stm32_exti1510_isr;
shared_cbs = &g_gpio_handlers[10];
nshared = 6;
}
@@ -349,7 +349,7 @@ int stm32l4_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
pinset |= GPIO_EXTI;
}
stm32l4_configgpio(pinset);
stm32_configgpio(pinset);
/* Configure rising/falling edges */
arch/arm/src/stm32l4/stm32l4_exti_pwr.c
+5 -5
View File
@@ -58,14 +58,14 @@ static void *g_callback_arg;
****************************************************************************/
/****************************************************************************
* Name: stm32l4_exti_pvd_isr
* Name: stm32_exti_pvd_isr
*
* Description:
* EXTI PVD interrupt service routine/dispatcher
*
****************************************************************************/
static int stm32l4_exti_pvd_isr(int irq, void *context, void *arg)
static int stm32_exti_pvd_isr(int irq, void *context, void *arg)
{
int ret = OK;
@@ -88,7 +88,7 @@ static int stm32l4_exti_pvd_isr(int irq, void *context, void *arg)
****************************************************************************/
/****************************************************************************
* Name: stm32l4_exti_pvd
* Name: stm32_exti_pvd
*
* Description:
* Sets/clears EXTI PVD interrupt.
@@ -104,7 +104,7 @@ static int stm32l4_exti_pvd_isr(int irq, void *context, void *arg)
*
****************************************************************************/
int stm32l4_exti_pvd(bool risingedge, bool fallingedge, bool event,
int stm32_exti_pvd(bool risingedge, bool fallingedge, bool event,
xcpt_t func, void *arg)
{
/* Get the previous GPIO IRQ handler; Save the new IRQ handler. */
@@ -116,7 +116,7 @@ int stm32l4_exti_pvd(bool risingedge, bool fallingedge, bool event,
if (func)
{
irq_attach(STM32_IRQ_PVD, stm32l4_exti_pvd_isr, NULL);
irq_attach(STM32_IRQ_PVD, stm32_exti_pvd_isr, NULL);
up_enable_irq(STM32_IRQ_PVD);
}
else
arch/arm/src/stm32l4/stm32l4_exti_pwr.h
+2 -2
View File
@@ -35,7 +35,7 @@
****************************************************************************/
/****************************************************************************
* Name: stm32l4_exti_pvd
* Name: stm32_exti_pvd
*
* Description:
* Sets/clears EXTI PVD interrupt.
@@ -52,7 +52,7 @@
*
****************************************************************************/
int stm32l4_exti_pvd(bool risingedge, bool fallingedge, bool event,
int stm32_exti_pvd(bool risingedge, bool fallingedge, bool event,
xcpt_t func, void *arg);
#endif /* STM32L4_EXTI_PWR_H_ */
arch/arm/src/stm32l4/stm32l4_exti_wakeup.c
+5 -5
View File
@@ -53,14 +53,14 @@ static void *g_callback_arg;
****************************************************************************/
/****************************************************************************
* Name: stm32l4_exti_wakeup_isr
* Name: stm32_exti_wakeup_isr
*
* Description:
* EXTI periodic WAKEUP interrupt service routine/dispatcher
*
****************************************************************************/
static int stm32l4_exti_wakeup_isr(int irq, void *context, void *arg)
static int stm32_exti_wakeup_isr(int irq, void *context, void *arg)
{
int ret = OK;
@@ -83,7 +83,7 @@ static int stm32l4_exti_wakeup_isr(int irq, void *context, void *arg)
****************************************************************************/
/****************************************************************************
* Name: stm32l4_exti_wakeup
* Name: stm32_exti_wakeup
*
* Description:
* Sets/clears EXTI wakeup interrupt.
@@ -99,7 +99,7 @@ static int stm32l4_exti_wakeup_isr(int irq, void *context, void *arg)
*
****************************************************************************/
int stm32l4_exti_wakeup(bool risingedge, bool fallingedge, bool event,
int stm32_exti_wakeup(bool risingedge, bool fallingedge, bool event,
xcpt_t func, void *arg)
{
g_wakeup_callback = func;
@@ -109,7 +109,7 @@ int stm32l4_exti_wakeup(bool risingedge, bool fallingedge, bool event,
if (func)
{
irq_attach(STM32_IRQ_RTC_WKUP, stm32l4_exti_wakeup_isr, NULL);
irq_attach(STM32_IRQ_RTC_WKUP, stm32_exti_wakeup_isr, NULL);
up_enable_irq(STM32_IRQ_RTC_WKUP);
}
else
arch/arm/src/stm32l4/stm32l4_firewall.c
+1 -1
View File
@@ -39,7 +39,7 @@
* Public Functions
****************************************************************************/
int stm32l4_firewallsetup(struct stm32l4_firewall_t *setup)
int stm32_firewallsetup(struct stm32_firewall_t *setup)
{
uint32_t reg;
arch/arm/src/stm32l4/stm32l4_firewall.h
+3 -3
View File
@@ -52,7 +52,7 @@
* Public Types
****************************************************************************/
struct stm32l4_firewall_t
struct stm32_firewall_t
{
uintptr_t codestart;
size_t codelen;
@@ -84,7 +84,7 @@ extern "C"
****************************************************************************/
/****************************************************************************
* Name: stm32l4_firewallsetup
* Name: stm32_firewallsetup
*
* Description:
* Configure the STM32L4 firewall. After this, protected code will only
@@ -95,7 +95,7 @@ extern "C"
*
****************************************************************************/
int stm32l4_firewallsetup(struct stm32l4_firewall_t *setup);
int stm32_firewallsetup(struct stm32_firewall_t *setup);
#undef EXTERN
#if defined(__cplusplus)
arch/arm/src/stm32l4/stm32l4_flash.c
+8 -8
View File
@@ -106,7 +106,7 @@ static void flash_unlock(void)
{
while (getreg32(STM32_FLASH_SR) & FLASH_SR_BSY)
{
stm32l4_waste();
stm32_waste();
}
if (getreg32(STM32_FLASH_CR) & FLASH_CR_LOCK)
@@ -174,7 +174,7 @@ static inline void flash_erase(size_t page)
while (getreg32(STM32_FLASH_SR) & FLASH_SR_BSY)
{
stm32l4_waste();
stm32_waste();
}
modifyreg32(STM32_FLASH_CR, FLASH_CR_PAGE_ERASE, 0);
@@ -202,7 +202,7 @@ static void data_cache_enable(void)
* Public Functions
****************************************************************************/
int stm32l4_flash_unlock(void)
int stm32_flash_unlock(void)
{
int ret;
@@ -218,7 +218,7 @@ int stm32l4_flash_unlock(void)
return ret;
}
int stm32l4_flash_lock(void)
int stm32_flash_lock(void)
{
int ret;
@@ -235,7 +235,7 @@ int stm32l4_flash_lock(void)
}
/****************************************************************************
* Name: stm32l4_flash_user_optbytes
* Name: stm32_flash_user_optbytes
*
* Description:
* Modify the contents of the user option bytes (USR OPT) on the flash.
@@ -251,7 +251,7 @@ int stm32l4_flash_lock(void)
*
****************************************************************************/
uint32_t stm32l4_flash_user_optbytes(uint32_t clrbits, uint32_t setbits)
uint32_t stm32_flash_user_optbytes(uint32_t clrbits, uint32_t setbits)
{
uint32_t regval;
int ret;
@@ -289,7 +289,7 @@ uint32_t stm32l4_flash_user_optbytes(uint32_t clrbits, uint32_t setbits)
while (getreg32(STM32_FLASH_SR) & FLASH_SR_BSY)
{
stm32l4_waste();
stm32_waste();
}
flash_optbytes_lock();
@@ -508,7 +508,7 @@ ssize_t up_progmem_write(size_t addr, const void *buf, size_t buflen)
while (getreg32(STM32_FLASH_SR) & FLASH_SR_BSY)
{
stm32l4_waste();
stm32_waste();
}
/* Verify */
arch/arm/src/stm32l4/stm32l4_flash.h
+4 -4
View File
@@ -34,11 +34,11 @@
* Public Functions Prototypes
****************************************************************************/
int stm32l4_flash_lock(void);
int stm32l4_flash_unlock(void);
int stm32_flash_lock(void);
int stm32_flash_unlock(void);
/****************************************************************************
* Name: stm32l4_flash_user_optbytes
* Name: stm32_flash_user_optbytes
*
* Description:
* Modify the contents of the user option bytes (USR OPT) on the flash.
@@ -54,6 +54,6 @@ int stm32l4_flash_unlock(void);
*
****************************************************************************/
uint32_t stm32l4_flash_user_optbytes(uint32_t clrbits, uint32_t setbits);
uint32_t stm32_flash_user_optbytes(uint32_t clrbits, uint32_t setbits);
#endif /* __ARCH_ARM_SRC_STM32L4_STM32L4_FLASH_H */
arch/arm/src/stm32l4/stm32l4_freerun.c
+16 -16
View File
@@ -44,7 +44,7 @@
****************************************************************************/
/****************************************************************************
* Name: stm32l4_freerun_handler
* Name: stm32_freerun_handler
*
* Description:
* Timer interrupt callback. When the freerun timer counter overflows,
@@ -61,10 +61,10 @@
*
****************************************************************************/
static int stm32l4_freerun_handler(int irq, void *context, void *arg)
static int stm32_freerun_handler(int irq, void *context, void *arg)
{
struct stm32l4_freerun_s *freerun =
(struct stm32l4_freerun_s *)arg;
struct stm32_freerun_s *freerun =
(struct stm32_freerun_s *)arg;
DEBUGASSERT(freerun != NULL && freerun->overflow < UINT32_MAX);
freerun->overflow++;
@@ -78,7 +78,7 @@ static int stm32l4_freerun_handler(int irq, void *context, void *arg)
****************************************************************************/
/****************************************************************************
* Name: stm32l4_freerun_initialize
* Name: stm32_freerun_initialize
*
* Description:
* Initialize the freerun timer wrapper
@@ -96,7 +96,7 @@ static int stm32l4_freerun_handler(int irq, void *context, void *arg)
*
****************************************************************************/
int stm32l4_freerun_initialize(struct stm32l4_freerun_s *freerun,
int stm32_freerun_initialize(struct stm32_freerun_s *freerun,
int chan,
uint16_t resolution)
{
@@ -110,7 +110,7 @@ int stm32l4_freerun_initialize(struct stm32l4_freerun_s *freerun,
frequency = USEC_PER_SEC / (uint32_t)resolution;
freerun->frequency = frequency;
freerun->tch = stm32l4_tim_init(chan);
freerun->tch = stm32_tim_init(chan);
if (!freerun->tch)
{
tmrerr("ERROR: Failed to allocate TIM%d\n", chan);
@@ -128,7 +128,7 @@ int stm32l4_freerun_initialize(struct stm32l4_freerun_s *freerun,
/* Set up to receive the callback when the counter overflow occurs */
STM32_TIM_SETISR(freerun->tch, stm32l4_freerun_handler, freerun, 0);
STM32_TIM_SETISR(freerun->tch, stm32_freerun_handler, freerun, 0);
/* Set timer period */
@@ -144,7 +144,7 @@ int stm32l4_freerun_initialize(struct stm32l4_freerun_s *freerun,
}
/****************************************************************************
* Name: stm32l4_freerun_counter
* Name: stm32_freerun_counter
*
* Description:
* Read the counter register of the free-running timer.
@@ -152,7 +152,7 @@ int stm32l4_freerun_initialize(struct stm32l4_freerun_s *freerun,
* Input Parameters:
* freerun Caller allocated instance of the freerun state structure. This
* structure must have been previously initialized via a call to
* stm32l4_freerun_initialize();
* stm32_freerun_initialize();
* ts The location in which to return the time from the free-running
* timer.
*
@@ -162,7 +162,7 @@ int stm32l4_freerun_initialize(struct stm32l4_freerun_s *freerun,
*
****************************************************************************/
int stm32l4_freerun_counter(struct stm32l4_freerun_s *freerun,
int stm32_freerun_counter(struct stm32_freerun_s *freerun,
struct timespec *ts)
{
uint64_t usec;
@@ -176,7 +176,7 @@ int stm32l4_freerun_counter(struct stm32l4_freerun_s *freerun,
DEBUGASSERT(freerun && freerun->tch && ts);
/* Temporarily disable the overflow counter. NOTE that we have to be
* careful here because stm32l4_tc_getpending() will reset the pending
* careful here because stm32_tc_getpending() will reset the pending
* interrupt status. If we do not handle the overflow here then, it will
* be lost.
*/
@@ -238,7 +238,7 @@ int stm32l4_freerun_counter(struct stm32l4_freerun_s *freerun,
}
/****************************************************************************
* Name: stm32l4_freerun_uninitialize
* Name: stm32_freerun_uninitialize
*
* Description:
* Stop the free-running timer and release all resources that it uses.
@@ -246,7 +246,7 @@ int stm32l4_freerun_counter(struct stm32l4_freerun_s *freerun,
* Input Parameters:
* freerun Caller allocated instance of the freerun state structure. This
* structure must have been previously initialized via a call to
* stm32l4_freerun_initialize();
* stm32_freerun_initialize();
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
@@ -254,7 +254,7 @@ int stm32l4_freerun_counter(struct stm32l4_freerun_s *freerun,
*
****************************************************************************/
int stm32l4_freerun_uninitialize(struct stm32l4_freerun_s *freerun)
int stm32_freerun_uninitialize(struct stm32_freerun_s *freerun)
{
DEBUGASSERT(freerun && freerun->tch);
@@ -266,7 +266,7 @@ int stm32l4_freerun_uninitialize(struct stm32l4_freerun_s *freerun)
/* Free the timer */
stm32l4_tim_deinit(freerun->tch);
stm32_tim_deinit(freerun->tch);
freerun->tch = NULL;
return OK;
arch/arm/src/stm32l4/stm32l4_freerun.h
+11 -11
View File
@@ -42,16 +42,16 @@
****************************************************************************/
/* The freerun client must allocate an instance of this structure and called
* stm32l4_freerun_initialize() before using the freerun facilities. The
* stm32_freerun_initialize() before using the freerun facilities. The
* client should not access the contents of this structure directly since the
* contents are subject to change.
*/
struct stm32l4_freerun_s
struct stm32_freerun_s
{
uint8_t chan; /* The timer/counter in use */
uint32_t overflow; /* Timer counter overflow */
struct stm32l4_tim_dev_s *tch; /* Handle returned by stm32l4_tim_init() */
struct stm32_tim_dev_s *tch; /* Handle returned by stm32_tim_init() */
uint32_t frequency;
};
@@ -73,7 +73,7 @@ extern "C"
****************************************************************************/
/****************************************************************************
* Name: stm32l4_freerun_initialize
* Name: stm32_freerun_initialize
*
* Description:
* Initialize the freerun timer wrapper
@@ -91,11 +91,11 @@ extern "C"
*
****************************************************************************/
int stm32l4_freerun_initialize(struct stm32l4_freerun_s *freerun, int chan,
int stm32_freerun_initialize(struct stm32_freerun_s *freerun, int chan,
uint16_t resolution);
/****************************************************************************
* Name: stm32l4_freerun_counter
* Name: stm32_freerun_counter
*
* Description:
* Read the counter register of the free-running timer.
@@ -103,7 +103,7 @@ int stm32l4_freerun_initialize(struct stm32l4_freerun_s *freerun, int chan,
* Input Parameters:
* freerun Caller allocated instance of the freerun state structure. This
* structure must have been previously initialized via a call to
* stm32l4_freerun_initialize();
* stm32_freerun_initialize();
* ts The location in which to return the time remaining on the
* oneshot timer.
*
@@ -113,11 +113,11 @@ int stm32l4_freerun_initialize(struct stm32l4_freerun_s *freerun, int chan,
*
****************************************************************************/
int stm32l4_freerun_counter(struct stm32l4_freerun_s *freerun,
int stm32_freerun_counter(struct stm32_freerun_s *freerun,
struct timespec *ts);
/****************************************************************************
* Name: stm32l4_freerun_uninitialize
* Name: stm32_freerun_uninitialize
*
* Description:
* Stop the free-running timer and release all resources that it uses.
@@ -125,7 +125,7 @@ int stm32l4_freerun_counter(struct stm32l4_freerun_s *freerun,
* Input Parameters:
* freerun Caller allocated instance of the freerun state structure. This
* structure must have been previously initialized via a call to
* stm32l4_freerun_initialize();
* stm32_freerun_initialize();
*
* Returned Value:
* Zero (OK) is returned on success; a negated errno value is returned
@@ -133,7 +133,7 @@ int stm32l4_freerun_counter(struct stm32l4_freerun_s *freerun,
*
****************************************************************************/
int stm32l4_freerun_uninitialize(struct stm32l4_freerun_s *freerun);
int stm32_freerun_uninitialize(struct stm32_freerun_s *freerun);
#undef EXTERN
#ifdef __cplusplus
arch/arm/src/stm32l4/stm32l4_gpio.c
+14 -14
View File
@@ -94,13 +94,13 @@ const uint32_t g_gpiobase[STM32_NPORTS] =
****************************************************************************/
/****************************************************************************
* Function: stm32l4_gpioinit
* Function: stm32_gpioinit
*
* Description:
* Based on configuration within the .config file, it does:
* - Remaps positions of alternative functions.
*
* Typically called from stm32l4_start().
* Typically called from stm32_start().
*
* Assumptions:
* This function is called early in the initialization sequence so that
@@ -108,17 +108,17 @@ const uint32_t g_gpiobase[STM32_NPORTS] =
*
****************************************************************************/
void stm32l4_gpioinit(void)
void stm32_gpioinit(void)
{
}
/****************************************************************************
* Name: stm32l4_configgpio
* Name: stm32_configgpio
*
* Description:
* Configure a GPIO pin based on bit-encoded description of the pin.
* Once it is configured as Alternative (GPIO_ALT|GPIO_CNF_AFPP|...)
* function, it must be unconfigured with stm32l4_unconfiggpio() with
* function, it must be unconfigured with stm32_unconfiggpio() with
* the same cfgset first before it can be set to non-alternative function.
*
* Returned Value:
@@ -129,7 +129,7 @@ void stm32l4_gpioinit(void)
* To-Do: Auto Power Enable
****************************************************************************/
int stm32l4_configgpio(uint32_t cfgset)
int stm32_configgpio(uint32_t cfgset)
{
uintptr_t base;
uint32_t regval;
@@ -177,7 +177,7 @@ int stm32l4_configgpio(uint32_t cfgset)
/* Set the initial output value */
stm32l4_gpiowrite(cfgset, (cfgset & GPIO_OUTPUT_SET) != 0);
stm32_gpiowrite(cfgset, (cfgset & GPIO_OUTPUT_SET) != 0);
pinmode = GPIO_MODER_OUTPUT;
break;
@@ -364,7 +364,7 @@ int stm32l4_configgpio(uint32_t cfgset)
}
/****************************************************************************
* Name: stm32l4_unconfiggpio
* Name: stm32_unconfiggpio
*
* Description:
* Unconfigure a GPIO pin based on bit-encoded description of the pin, set
@@ -384,7 +384,7 @@ int stm32l4_configgpio(uint32_t cfgset)
* To-Do: Auto Power Disable
****************************************************************************/
int stm32l4_unconfiggpio(uint32_t cfgset)
int stm32_unconfiggpio(uint32_t cfgset)
{
/* Reuse port and pin number and set it to default HiZ INPUT */
@@ -393,18 +393,18 @@ int stm32l4_unconfiggpio(uint32_t cfgset)
/* To-Do: Mark its unuse for automatic power saving options */
return stm32l4_configgpio(cfgset);
return stm32_configgpio(cfgset);
}
/****************************************************************************
* Name: stm32l4_gpiowrite
* Name: stm32_gpiowrite
*
* Description:
* Write one or zero to the selected GPIO pin
*
****************************************************************************/
void stm32l4_gpiowrite(uint32_t pinset, bool value)
void stm32_gpiowrite(uint32_t pinset, bool value)
{
uint32_t base;
uint32_t bit;
@@ -438,14 +438,14 @@ void stm32l4_gpiowrite(uint32_t pinset, bool value)
}
/****************************************************************************
* Name: stm32l4_gpioread
* Name: stm32_gpioread
*
* Description:
* Read one or zero from the selected GPIO pin
*
****************************************************************************/
bool stm32l4_gpioread(uint32_t pinset)
bool stm32_gpioread(uint32_t pinset)
{
uint32_t base;
unsigned int port;
arch/arm/src/stm32l4/stm32l4_gpio.h
+18 -18
View File
@@ -50,7 +50,7 @@
* Pre-Processor Declarations
****************************************************************************/
/* Bit-encoded input to stm32l4_configgpio() */
/* Bit-encoded input to stm32_configgpio() */
/* Each port bit of the general-purpose I/O (GPIO) ports can be individually
* configured by software in several modes:
@@ -251,12 +251,12 @@ EXTERN const uint32_t g_gpiobase[STM32_NPORTS];
****************************************************************************/
/****************************************************************************
* Name: stm32l4_configgpio
* Name: stm32_configgpio
*
* Description:
* Configure a GPIO pin based on bit-encoded description of the pin.
* Once it is configured as Alternative (GPIO_ALT|GPIO_CNF_AFPP|...)
* function, it must be unconfigured with stm32l4_unconfiggpio() with
* function, it must be unconfigured with stm32_unconfiggpio() with
* the same cfgset first before it can be set to non-alternative
* function.
*
@@ -266,10 +266,10 @@ EXTERN const uint32_t g_gpiobase[STM32_NPORTS];
*
****************************************************************************/
int stm32l4_configgpio(uint32_t cfgset);
int stm32_configgpio(uint32_t cfgset);
/****************************************************************************
* Name: stm32l4_unconfiggpio
* Name: stm32_unconfiggpio
*
* Description:
* Unconfigure a GPIO pin based on bit-encoded description of the pin, set
@@ -288,30 +288,30 @@ int stm32l4_configgpio(uint32_t cfgset);
*
****************************************************************************/
int stm32l4_unconfiggpio(uint32_t cfgset);
int stm32_unconfiggpio(uint32_t cfgset);
/****************************************************************************
* Name: stm32l4_gpiowrite
* Name: stm32_gpiowrite
*
* Description:
* Write one or zero to the selected GPIO pin
*
****************************************************************************/
void stm32l4_gpiowrite(uint32_t pinset, bool value);
void stm32_gpiowrite(uint32_t pinset, bool value);
/****************************************************************************
* Name: stm32l4_gpioread
* Name: stm32_gpioread
*
* Description:
* Read one or zero from the selected GPIO pin
*
****************************************************************************/
bool stm32l4_gpioread(uint32_t pinset);
bool stm32_gpioread(uint32_t pinset);
/****************************************************************************
* Name: stm32l4_gpiosetevent
* Name: stm32_gpiosetevent
*
* Description:
* Sets/clears GPIO based event and interrupt triggers.
@@ -330,11 +330,11 @@ bool stm32l4_gpioread(uint32_t pinset);
*
****************************************************************************/
int stm32l4_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
int stm32_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
bool event, xcpt_t func, void *arg);
/****************************************************************************
* Function: stm32l4_dumpgpio
* Function: stm32_dumpgpio
*
* Description:
* Dump all GPIO registers associated with the provided base address
@@ -342,23 +342,23 @@ int stm32l4_gpiosetevent(uint32_t pinset, bool risingedge, bool fallingedge,
****************************************************************************/
#ifdef CONFIG_DEBUG_FEATURES
int stm32l4_dumpgpio(uint32_t pinset, const char *msg);
int stm32_dumpgpio(uint32_t pinset, const char *msg);
#else
# define stm32l4_dumpgpio(p,m)
# define stm32_dumpgpio(p,m)
#endif
/****************************************************************************
* Function: stm32l4_gpioinit
* Function: stm32_gpioinit
*
* Description:
* Based on configuration within the .config file, it does:
* - Remaps positions of alternative functions.
*
* Typically called from stm32l4_start().
* Typically called from stm32_start().
*
****************************************************************************/
void stm32l4_gpioinit(void);
void stm32_gpioinit(void);
#undef EXTERN
#if defined(__cplusplus)
arch/arm/src/stm32l4/stm32l4_hsi48.c
+4 -4
View File
@@ -38,7 +38,7 @@
****************************************************************************/
/****************************************************************************
* Name: stm32l4_enable_hsi48
* Name: stm32_enable_hsi48
*
* Description:
* On STM32L4X3, STM32L496xx/4A6xx and STM32L4XR devices only, the HSI48
@@ -64,7 +64,7 @@
*
****************************************************************************/
void stm32l4_enable_hsi48(enum syncsrc_e syncsrc)
void stm32_enable_hsi48(enum syncsrc_e syncsrc)
{
uint32_t regval;
@@ -133,7 +133,7 @@ void stm32l4_enable_hsi48(enum syncsrc_e syncsrc)
}
/****************************************************************************
* Name: stm32l4_disable_hsi48
* Name: stm32_disable_hsi48
*
* Description:
* Disable the HSI48 clock.
@@ -146,7 +146,7 @@ void stm32l4_enable_hsi48(enum syncsrc_e syncsrc)
*
****************************************************************************/
void stm32l4_disable_hsi48(void)
void stm32_disable_hsi48(void)
{
uint32_t regval;
arch/arm/src/stm32l4/stm32l4_hsi48.h
+4 -4
View File
@@ -48,7 +48,7 @@ enum syncsrc_e
****************************************************************************/
/****************************************************************************
* Name: stm32l4_enable_hsi48
* Name: stm32_enable_hsi48
*
* Description:
* On STM32L4X3, STM32L496xx/4A6xx and STM32L4XR devices only, the HSI48
@@ -74,10 +74,10 @@ enum syncsrc_e
*
****************************************************************************/
void stm32l4_enable_hsi48(enum syncsrc_e syncsrc);
void stm32_enable_hsi48(enum syncsrc_e syncsrc);
/****************************************************************************
* Name: stm32l4_disable_hsi48
* Name: stm32_disable_hsi48
*
* Description:
* Disable the HSI48 clock.
@@ -90,7 +90,7 @@ void stm32l4_enable_hsi48(enum syncsrc_e syncsrc);
*
****************************************************************************/
void stm32l4_disable_hsi48(void);
void stm32_disable_hsi48(void);
#endif /* CONFIG_STM32L4_HAVE_HSI48 */
#endif /* __ARCH_ARM_SRC_STM32L4_STM32L4_HSI48_H */
arch/arm/src/stm32l4/stm32l4_i2c.c
+266 -266
View File
File diff suppressed because it is too large Load Diff
arch/arm/src/stm32l4/stm32l4_i2c.h
+5 -5
View File
@@ -53,7 +53,7 @@
****************************************************************************/
/****************************************************************************
* Name: stm32l4_i2cbus_initialize
* Name: stm32_i2cbus_initialize
*
* Description:
* Initialize the selected I2C port. And return a unique instance of struct
@@ -69,16 +69,16 @@
*
****************************************************************************/
struct i2c_master_s *stm32l4_i2cbus_initialize(int port);
struct i2c_master_s *stm32_i2cbus_initialize(int port);
/****************************************************************************
* Name: stm32l4_i2cbus_uninitialize
* Name: stm32_i2cbus_uninitialize
*
* Description:
* De-initialize the selected I2C port, and power down the device.
*
* Input Parameters:
* Device structure as returned by the stm32l4_i2cbus_initialize()
* Device structure as returned by the stm32_i2cbus_initialize()
*
* Returned Value:
* OK on success, ERROR when internal reference count mismatch or dev
@@ -86,6 +86,6 @@ struct i2c_master_s *stm32l4_i2cbus_initialize(int port);
*
****************************************************************************/
int stm32l4_i2cbus_uninitialize(struct i2c_master_s *dev);
int stm32_i2cbus_uninitialize(struct i2c_master_s *dev);
#endif /* __ARCH_ARM_SRC_STM32L4_STM32L4_I2C_H */
arch/arm/src/stm32l4/stm32l4_idle.c
+3 -3
View File
@@ -119,12 +119,12 @@ static void up_idlepm(void)
/* Enter STOP mode */
BEGIN_IDLE();
stm32l4_pmstop(true);
stm32_pmstop(true);
END_IDLE();
/* Set correct clock again after returning from STOP */
stm32l4_clockenable();
stm32_clockenable();
/* Inform of all drivers of the new state */
@@ -137,7 +137,7 @@ static void up_idlepm(void)
break;
case PM_SLEEP:
stm32l4_pmstandby();
stm32_pmstandby();
break;
default:
arch/arm/src/stm32l4/stm32l4_irq.c
+20 -20
View File
@@ -38,7 +38,7 @@
#include "nvic.h"
#include "ram_vectors.h"
#include "arm_internal.h"
#include "stm32l4.h"
#include "stm32.h"
/****************************************************************************
* Pre-processor Definitions
@@ -64,7 +64,7 @@
****************************************************************************/
/****************************************************************************
* Name: stm32l4_dumpnvic
* Name: stm32_dumpnvic
*
* Description:
* Dump some interesting NVIC registers
@@ -72,7 +72,7 @@
****************************************************************************/
#if defined(CONFIG_DEBUG_IRQ_INFO)
static void stm32l4_dumpnvic(const char *msg, int irq)
static void stm32_dumpnvic(const char *msg, int irq)
{
irqstate_t flags;
@@ -128,11 +128,11 @@ static void stm32l4_dumpnvic(const char *msg, int irq)
leave_critical_section(flags);
}
#else
# define stm32l4_dumpnvic(msg, irq)
# define stm32_dumpnvic(msg, irq)
#endif
/****************************************************************************
* Name: stm32l4_nmi, stm32l4_pendsv, stm32l4_pendsv, stm32l4_reserved
* Name: stm32_nmi, stm32_pendsv, stm32_pendsv, stm32_reserved
*
* Description:
* Handlers for various exceptions. None are handled and all are fatal
@@ -142,7 +142,7 @@ static void stm32l4_dumpnvic(const char *msg, int irq)
****************************************************************************/
#ifdef CONFIG_DEBUG_FEATURES
static int stm32l4_nmi(int irq, void *context, void *arg)
static int stm32_nmi(int irq, void *context, void *arg)
{
up_irq_save();
_err("PANIC!!! NMI received\n");
@@ -150,7 +150,7 @@ static int stm32l4_nmi(int irq, void *context, void *arg)
return 0;
}
static int stm32l4_pendsv(int irq, void *context, void *arg)
static int stm32_pendsv(int irq, void *context, void *arg)
{
#ifndef CONFIG_ARCH_HIPRI_INTERRUPT
up_irq_save();
@@ -160,7 +160,7 @@ static int stm32l4_pendsv(int irq, void *context, void *arg)
return 0;
}
static int stm32l4_reserved(int irq, void *context, void *arg)
static int stm32_reserved(int irq, void *context, void *arg)
{
up_irq_save();
_err("PANIC!!! Reserved interrupt\n");
@@ -170,7 +170,7 @@ static int stm32l4_reserved(int irq, void *context, void *arg)
#endif
/****************************************************************************
* Name: stm32l4_prioritize_syscall
* Name: stm32_prioritize_syscall
*
* Description:
* Set the priority of an exception. This function may be needed
@@ -178,7 +178,7 @@ static int stm32l4_reserved(int irq, void *context, void *arg)
*
****************************************************************************/
static inline void stm32l4_prioritize_syscall(int priority)
static inline void stm32_prioritize_syscall(int priority)
{
uint32_t regval;
@@ -191,7 +191,7 @@ static inline void stm32l4_prioritize_syscall(int priority)
}
/****************************************************************************
* Name: stm32l4_irqinfo
* Name: stm32_irqinfo
*
* Description:
* Given an IRQ number, provide the register and bit setting to enable or
@@ -199,7 +199,7 @@ static inline void stm32l4_prioritize_syscall(int priority)
*
****************************************************************************/
static int stm32l4_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
static int stm32_irqinfo(int irq, uintptr_t *regaddr, uint32_t *bit,
uintptr_t offset)
{
int n;
@@ -325,7 +325,7 @@ void up_irqinitialize(void)
/* up_prioritize_irq(STM32_IRQ_PENDSV, NVIC_SYSH_PRIORITY_MIN); */
#endif
stm32l4_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
stm32_prioritize_syscall(NVIC_SYSH_SVCALL_PRIORITY);
/* If the MPU is enabled, then attach and enable the Memory Management
* Fault handler.
@@ -339,19 +339,19 @@ void up_irqinitialize(void)
/* Attach all other processor exceptions (except reset and sys tick) */
#ifdef CONFIG_DEBUG_FEATURES
irq_attach(STM32_IRQ_NMI, stm32l4_nmi, NULL);
irq_attach(STM32_IRQ_NMI, stm32_nmi, NULL);
#ifndef CONFIG_ARM_MPU
irq_attach(STM32_IRQ_MEMFAULT, arm_memfault, NULL);
#endif
irq_attach(STM32_IRQ_BUSFAULT, arm_busfault, NULL);
irq_attach(STM32_IRQ_USAGEFAULT, arm_usagefault, NULL);
irq_attach(STM32_IRQ_PENDSV, stm32l4_pendsv, NULL);
irq_attach(STM32_IRQ_PENDSV, stm32_pendsv, NULL);
arm_enable_dbgmonitor();
irq_attach(STM32_IRQ_DBGMONITOR, arm_dbgmonitor, NULL);
irq_attach(STM32_IRQ_RESERVED, stm32l4_reserved, NULL);
irq_attach(STM32_IRQ_RESERVED, stm32_reserved, NULL);
#endif
stm32l4_dumpnvic("initial", NR_IRQS);
stm32_dumpnvic("initial", NR_IRQS);
#ifndef CONFIG_SUPPRESS_INTERRUPTS
@@ -376,7 +376,7 @@ void up_disable_irq(int irq)
uint32_t regval;
uint32_t bit;
if (stm32l4_irqinfo(irq, &regaddr, &bit, NVIC_CLRENA_OFFSET) == 0)
if (stm32_irqinfo(irq, &regaddr, &bit, NVIC_CLRENA_OFFSET) == 0)
{
/* Modify the appropriate bit in the register to disable the interrupt.
* For normal interrupts, we need to set the bit in the associated
@@ -411,7 +411,7 @@ void up_enable_irq(int irq)
uint32_t regval;
uint32_t bit;
if (stm32l4_irqinfo(irq, &regaddr, &bit, NVIC_ENA_OFFSET) == 0)
if (stm32_irqinfo(irq, &regaddr, &bit, NVIC_ENA_OFFSET) == 0)
{
/* Modify the appropriate bit in the register to enable the interrupt.
* For normal interrupts, we need to set the bit in the associated
@@ -488,7 +488,7 @@ int up_prioritize_irq(int irq, int priority)
regval |= (priority << shift);
putreg32(regval, regaddr);
stm32l4_dumpnvic("prioritize", irq);
stm32_dumpnvic("prioritize", irq);
return OK;
}
#endif
arch/arm/src/stm32l4/stm32l4_iwdg.c
+56 -56
View File
@@ -87,7 +87,7 @@
* well-known watchdog_lowerhalf_s structure.
*/
struct stm32l4_lowerhalf_s
struct stm32_lowerhalf_s
{
const struct watchdog_ops_s *ops; /* Lower half operations */
uint32_t lsifreq; /* The calibrated frequency of the LSI oscillator */
@@ -105,24 +105,24 @@ struct stm32l4_lowerhalf_s
/* Register operations ******************************************************/
#ifdef CONFIG_STM32L4_IWDG_REGDEBUG
static uint16_t stm32l4_getreg(uint32_t addr);
static void stm32l4_putreg(uint16_t val, uint32_t addr);
static uint16_t stm32_getreg(uint32_t addr);
static void stm32_putreg(uint16_t val, uint32_t addr);
#else
# define stm32l4_getreg(addr) getreg16(addr)
# define stm32l4_putreg(val,addr) putreg16(val,addr)
# define stm32_getreg(addr) getreg16(addr)
# define stm32_putreg(val,addr) putreg16(val,addr)
#endif
static inline void
stm32l4_setprescaler(struct stm32l4_lowerhalf_s *priv);
stm32_setprescaler(struct stm32_lowerhalf_s *priv);
/* "Lower half" driver methods **********************************************/
static int stm32l4_start(struct watchdog_lowerhalf_s *lower);
static int stm32l4_stop(struct watchdog_lowerhalf_s *lower);
static int stm32l4_keepalive(struct watchdog_lowerhalf_s *lower);
static int stm32l4_getstatus(struct watchdog_lowerhalf_s *lower,
static int stm32_start(struct watchdog_lowerhalf_s *lower);
static int stm32_stop(struct watchdog_lowerhalf_s *lower);
static int stm32_keepalive(struct watchdog_lowerhalf_s *lower);
static int stm32_getstatus(struct watchdog_lowerhalf_s *lower,
struct watchdog_status_s *status);
static int stm32l4_settimeout(struct watchdog_lowerhalf_s *lower,
static int stm32_settimeout(struct watchdog_lowerhalf_s *lower,
uint32_t timeout);
/****************************************************************************
@@ -133,25 +133,25 @@ static int stm32l4_settimeout(struct watchdog_lowerhalf_s *lower,
static const struct watchdog_ops_s g_wdgops =
{
.start = stm32l4_start,
.stop = stm32l4_stop,
.keepalive = stm32l4_keepalive,
.getstatus = stm32l4_getstatus,
.settimeout = stm32l4_settimeout,
.start = stm32_start,
.stop = stm32_stop,
.keepalive = stm32_keepalive,
.getstatus = stm32_getstatus,
.settimeout = stm32_settimeout,
.capture = NULL,
.ioctl = NULL,
};
/* "Lower half" driver state */
static struct stm32l4_lowerhalf_s g_wdgdev;
static struct stm32_lowerhalf_s g_wdgdev;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: stm32l4_getreg
* Name: stm32_getreg
*
* Description:
* Get the contents of an STM32 IWDG register
@@ -159,7 +159,7 @@ static struct stm32l4_lowerhalf_s g_wdgdev;
****************************************************************************/
#ifdef CONFIG_STM32L4_IWDG_REGDEBUG
static uint16_t stm32l4_getreg(uint32_t addr)
static uint16_t stm32_getreg(uint32_t addr)
{
static uint32_t prevaddr = 0;
static uint32_t count = 0;
@@ -214,7 +214,7 @@ static uint16_t stm32l4_getreg(uint32_t addr)
#endif
/****************************************************************************
* Name: stm32l4_putreg
* Name: stm32_putreg
*
* Description:
* Set the contents of an STM32 register to a value
@@ -222,7 +222,7 @@ static uint16_t stm32l4_getreg(uint32_t addr)
****************************************************************************/
#ifdef CONFIG_STM32L4_IWDG_REGDEBUG
static void stm32l4_putreg(uint16_t val, uint32_t addr)
static void stm32_putreg(uint16_t val, uint32_t addr)
{
/* Show the register value being written */
@@ -235,7 +235,7 @@ static void stm32l4_putreg(uint16_t val, uint32_t addr)
#endif
/****************************************************************************
* Name: stm32l4_setprescaler
* Name: stm32_setprescaler
*
* Description:
* Set up the prescaler and reload values.
@@ -246,7 +246,7 @@ static void stm32l4_putreg(uint16_t val, uint32_t addr)
*
****************************************************************************/
static inline void stm32l4_setprescaler(struct stm32l4_lowerhalf_s *priv)
static inline void stm32_setprescaler(struct stm32_lowerhalf_s *priv)
{
irqstate_t flags;
@@ -254,26 +254,26 @@ static inline void stm32l4_setprescaler(struct stm32l4_lowerhalf_s *priv)
/* Enable write access to IWDG_PR and IWDG_RLR registers */
stm32l4_putreg(IWDG_KR_KEY_ENABLE, STM32_IWDG_KR);
stm32_putreg(IWDG_KR_KEY_ENABLE, STM32_IWDG_KR);
/* Wait for the PVU and RVU bits to be reset by hardware. These bits
* were set the last time that the PR register was written and may not
* yet be cleared.
*/
while (stm32l4_getreg(STM32_IWDG_SR) & (IWDG_SR_PVU | IWDG_SR_RVU));
while (stm32_getreg(STM32_IWDG_SR) & (IWDG_SR_PVU | IWDG_SR_RVU));
/* Set the prescaler */
stm32l4_putreg(priv->prescaler << IWDG_PR_SHIFT, STM32_IWDG_PR);
stm32_putreg(priv->prescaler << IWDG_PR_SHIFT, STM32_IWDG_PR);
/* Set the reload value */
stm32l4_putreg((uint16_t)priv->reload, STM32_IWDG_RLR);
stm32_putreg((uint16_t)priv->reload, STM32_IWDG_RLR);
/* Reload the counter (and disable write access) */
stm32l4_putreg(IWDG_KR_KEY_RELOAD, STM32_IWDG_KR);
stm32_putreg(IWDG_KR_KEY_RELOAD, STM32_IWDG_KR);
/* Wait for the PVU and RVU bits to be reset by hardware. This is
* to wait for the change to take effect before exiting critical section,
@@ -289,14 +289,14 @@ static inline void stm32l4_setprescaler(struct stm32l4_lowerhalf_s *priv)
if (priv->started)
{
while (stm32l4_getreg(STM32_IWDG_SR) & (IWDG_SR_PVU | IWDG_SR_RVU));
while (stm32_getreg(STM32_IWDG_SR) & (IWDG_SR_PVU | IWDG_SR_RVU));
}
leave_critical_section(flags);
}
/****************************************************************************
* Name: stm32l4_start
* Name: stm32_start
*
* Description:
* Start the watchdog timer, resetting the time to the current timeout,
@@ -310,10 +310,10 @@ static inline void stm32l4_setprescaler(struct stm32l4_lowerhalf_s *priv)
*
****************************************************************************/
static int stm32l4_start(struct watchdog_lowerhalf_s *lower)
static int stm32_start(struct watchdog_lowerhalf_s *lower)
{
struct stm32l4_lowerhalf_s *priv =
(struct stm32l4_lowerhalf_s *)lower;
struct stm32_lowerhalf_s *priv =
(struct stm32_lowerhalf_s *)lower;
irqstate_t flags;
wdinfo("Entry: started\n");
@@ -327,7 +327,7 @@ static int stm32l4_start(struct watchdog_lowerhalf_s *lower)
* starting the watchdog timer.
*/
stm32l4_setprescaler(priv);
stm32_setprescaler(priv);
/* Enable IWDG (the LSI oscillator will be enabled by hardware). NOTE:
* If the "Hardware watchdog" feature is enabled through the device
@@ -335,7 +335,7 @@ static int stm32l4_start(struct watchdog_lowerhalf_s *lower)
*/
flags = enter_critical_section();
stm32l4_putreg(IWDG_KR_KEY_START, STM32_IWDG_KR);
stm32_putreg(IWDG_KR_KEY_START, STM32_IWDG_KR);
priv->lastreset = clock_systime_ticks();
priv->started = true;
leave_critical_section(flags);
@@ -345,7 +345,7 @@ static int stm32l4_start(struct watchdog_lowerhalf_s *lower)
}
/****************************************************************************
* Name: stm32l4_stop
* Name: stm32_stop
*
* Description:
* Stop the watchdog timer
@@ -359,7 +359,7 @@ static int stm32l4_start(struct watchdog_lowerhalf_s *lower)
*
****************************************************************************/
static int stm32l4_stop(struct watchdog_lowerhalf_s *lower)
static int stm32_stop(struct watchdog_lowerhalf_s *lower)
{
/* There is no way to disable the IDWG timer once it has been started */
@@ -368,7 +368,7 @@ static int stm32l4_stop(struct watchdog_lowerhalf_s *lower)
}
/****************************************************************************
* Name: stm32l4_keepalive
* Name: stm32_keepalive
*
* Description:
* Reset the watchdog timer to the current timeout value, prevent any
@@ -384,10 +384,10 @@ static int stm32l4_stop(struct watchdog_lowerhalf_s *lower)
*
****************************************************************************/
static int stm32l4_keepalive(struct watchdog_lowerhalf_s *lower)
static int stm32_keepalive(struct watchdog_lowerhalf_s *lower)
{
struct stm32l4_lowerhalf_s *priv =
(struct stm32l4_lowerhalf_s *)lower;
struct stm32_lowerhalf_s *priv =
(struct stm32_lowerhalf_s *)lower;
irqstate_t flags;
wdinfo("Entry\n");
@@ -395,7 +395,7 @@ static int stm32l4_keepalive(struct watchdog_lowerhalf_s *lower)
/* Reload the IWDG timer */
flags = enter_critical_section();
stm32l4_putreg(IWDG_KR_KEY_RELOAD, STM32_IWDG_KR);
stm32_putreg(IWDG_KR_KEY_RELOAD, STM32_IWDG_KR);
priv->lastreset = clock_systime_ticks();
leave_critical_section(flags);
@@ -403,7 +403,7 @@ static int stm32l4_keepalive(struct watchdog_lowerhalf_s *lower)
}
/****************************************************************************
* Name: stm32l4_getstatus
* Name: stm32_getstatus
*
* Description:
* Get the current watchdog timer status
@@ -418,11 +418,11 @@ static int stm32l4_keepalive(struct watchdog_lowerhalf_s *lower)
*
****************************************************************************/
static int stm32l4_getstatus(struct watchdog_lowerhalf_s *lower,
static int stm32_getstatus(struct watchdog_lowerhalf_s *lower,
struct watchdog_status_s *status)
{
struct stm32l4_lowerhalf_s *priv =
(struct stm32l4_lowerhalf_s *)lower;
struct stm32_lowerhalf_s *priv =
(struct stm32_lowerhalf_s *)lower;
uint32_t ticks;
uint32_t elapsed;
@@ -463,7 +463,7 @@ static int stm32l4_getstatus(struct watchdog_lowerhalf_s *lower,
}
/****************************************************************************
* Name: stm32l4_settimeout
* Name: stm32_settimeout
*
* Description:
* Set a new timeout value (and reset the watchdog timer)
@@ -478,11 +478,11 @@ static int stm32l4_getstatus(struct watchdog_lowerhalf_s *lower,
*
****************************************************************************/
static int stm32l4_settimeout(struct watchdog_lowerhalf_s *lower,
static int stm32_settimeout(struct watchdog_lowerhalf_s *lower,
uint32_t timeout)
{
struct stm32l4_lowerhalf_s *priv =
(struct stm32l4_lowerhalf_s *)lower;
struct stm32_lowerhalf_s *priv =
(struct stm32_lowerhalf_s *)lower;
uint32_t fiwdg;
uint64_t reload;
int prescaler;
@@ -574,7 +574,7 @@ static int stm32l4_settimeout(struct watchdog_lowerhalf_s *lower,
if (priv->started)
{
stm32l4_setprescaler(priv);
stm32_setprescaler(priv);
}
wdinfo("prescaler=%d fiwdg=%" PRId32 " reload=%" PRId64 "\n",
@@ -588,7 +588,7 @@ static int stm32l4_settimeout(struct watchdog_lowerhalf_s *lower,
****************************************************************************/
/****************************************************************************
* Name: stm32l4_iwdginitialize
* Name: stm32_iwdginitialize
*
* Description:
* Initialize the IWDG watchdog timer. The watchdog timer is initialized
@@ -605,9 +605,9 @@ static int stm32l4_settimeout(struct watchdog_lowerhalf_s *lower,
*
****************************************************************************/
void stm32l4_iwdginitialize(const char *devpath, uint32_t lsifreq)
void stm32_iwdginitialize(const char *devpath, uint32_t lsifreq)
{
struct stm32l4_lowerhalf_s *priv = &g_wdgdev;
struct stm32_lowerhalf_s *priv = &g_wdgdev;
wdinfo("Entry: devpath=%s lsifreq=%" PRId32 "\n", devpath, lsifreq);
@@ -628,7 +628,7 @@ void stm32l4_iwdginitialize(const char *devpath, uint32_t lsifreq)
* LSI controls outside of this file.
*/
stm32l4_rcc_enablelsi();
stm32_rcc_enablelsi();
wdinfo("RCC CSR: %08" PRIx32 "\n", getreg32(STM32_RCC_CSR));
/* Select an arbitrary initial timeout value. But don't start the watchdog
@@ -636,7 +636,7 @@ void stm32l4_iwdginitialize(const char *devpath, uint32_t lsifreq)
* device option bits, the watchdog is automatically enabled at power-on.
*/
stm32l4_settimeout((struct watchdog_lowerhalf_s *)priv,
stm32_settimeout((struct watchdog_lowerhalf_s *)priv,
CONFIG_STM32L4_IWDG_DEFTIMOUT);
/* Register the watchdog driver as /dev/watchdog0 */
arch/arm/src/stm32l4/stm32l4_lowputc.c
+10 -10
View File
@@ -33,7 +33,7 @@
#include "arm_internal.h"
#include "chip.h"
#include "stm32l4.h"
#include "stm32.h"
#include "stm32l4_rcc.h"
#include "stm32l4_gpio.h"
#include "stm32l4_uart.h"
@@ -291,7 +291,7 @@ void arm_lowputc(char ch)
while ((getreg32(STM32_CONSOLE_BASE + STM32_USART_ISR_OFFSET) &
USART_ISR_TXE) == 0);
#ifdef STM32_CONSOLE_RS485_DIR
stm32l4_gpiowrite(STM32_CONSOLE_RS485_DIR,
stm32_gpiowrite(STM32_CONSOLE_RS485_DIR,
STM32_CONSOLE_RS485_DIR_POLARITY);
#endif
@@ -302,7 +302,7 @@ void arm_lowputc(char ch)
#ifdef STM32_CONSOLE_RS485_DIR
while ((getreg32(STM32_CONSOLE_BASE + STM32_USART_ISR_OFFSET) &
USART_ISR_TC) == 0);
stm32l4_gpiowrite(STM32_CONSOLE_RS485_DIR,
stm32_gpiowrite(STM32_CONSOLE_RS485_DIR,
!STM32_CONSOLE_RS485_DIR_POLARITY);
#endif
@@ -310,7 +310,7 @@ void arm_lowputc(char ch)
}
/****************************************************************************
* Name: stm32l4_lowsetup
* Name: stm32_lowsetup
*
* Description:
* This performs basic initialization of the USART used for the serial
@@ -319,7 +319,7 @@ void arm_lowputc(char ch)
*
****************************************************************************/
void stm32l4_lowsetup(void)
void stm32_lowsetup(void)
{
#if defined(HAVE_UART)
#if defined(HAVE_CONSOLE) && !defined(CONFIG_SUPPRESS_UART_CONFIG)
@@ -335,19 +335,19 @@ void stm32l4_lowsetup(void)
/* Enable the console USART and configure GPIO pins needed for rx/tx.
*
* NOTE: Clocking for selected U[S]ARTs was already provided in
* stm32l4_rcc.c
* stm32_rcc.c
*/
#ifdef STM32_CONSOLE_TX
stm32l4_configgpio(STM32_CONSOLE_TX);
stm32_configgpio(STM32_CONSOLE_TX);
#endif
#ifdef STM32_CONSOLE_RX
stm32l4_configgpio(STM32_CONSOLE_RX);
stm32_configgpio(STM32_CONSOLE_RX);
#endif
#ifdef STM32_CONSOLE_RS485_DIR
stm32l4_configgpio(STM32_CONSOLE_RS485_DIR);
stm32l4_gpiowrite(STM32_CONSOLE_RS485_DIR,
stm32_configgpio(STM32_CONSOLE_RS485_DIR);
stm32_gpiowrite(STM32_CONSOLE_RS485_DIR,
!STM32_CONSOLE_RS485_DIR_POLARITY);
#endif
arch/arm/src/stm32l4/stm32l4_lowputc.h
+2 -2
View File
@@ -47,7 +47,7 @@ extern "C"
#endif
/****************************************************************************
* Name: stm32l4_lowsetup
* Name: stm32_lowsetup
*
* Description:
* Called at the very beginning of _start.
@@ -55,7 +55,7 @@ extern "C"
*
****************************************************************************/
void stm32l4_lowsetup(void);
void stm32_lowsetup(void);
#undef EXTERN
#if defined(__cplusplus)
arch/arm/src/stm32l4/stm32l4_lptim.c
+119 -119
View File
File diff suppressed because it is too large Load Diff
arch/arm/src/stm32l4/stm32l4_lptim.h
+24 -24
View File
@@ -112,9 +112,9 @@ extern "C"
/* LPTIM Device Structure */
struct stm32l4_lptim_dev_s
struct stm32_lptim_dev_s
{
struct stm32l4_lptim_ops_s *ops;
struct stm32_lptim_ops_s *ops;
};
/* LPTIM Modes of Operation */
@@ -129,7 +129,7 @@ typedef enum
STM32_LPTIM_MODE_SINGLE = 0x0001,
STM32_LPTIM_MODE_CONTINUOUS = 0x0002,
STM32_LPTIM_MODE_MASK = 0x000f,
} stm32l4_lptim_mode_t;
} stm32_lptim_mode_t;
/* LPTIM Clock Source */
@@ -142,7 +142,7 @@ typedef enum
STM32_LPTIM_CLK_HSI = 0x0002,
STM32_LPTIM_CLK_LSE = 0x0003,
STM32_LPTIM_CLK_EXT = 0x0004,
} stm32l4_lptim_clksrc_t;
} stm32_lptim_clksrc_t;
/* LPTIM Counter Modes */
@@ -152,7 +152,7 @@ typedef enum
STM32_LPTIM_COUNT_CLOCK = 0x0000,
STM32_LPTIM_COUNT_EXTTRIG = 0x0001,
} stm32l4_lptim_cntmode_t;
} stm32_lptim_cntmode_t;
/* LPTIM Clock Polarity */
@@ -163,7 +163,7 @@ typedef enum
STM32_LPTIM_CLKPOL_RISING = 0x0000,
STM32_LPTIM_CLKPOL_FALLING = 0x0001,
STM32_LPTIM_CLKPOL_BOTH = 0x0002,
} stm32l4_lptim_clkpol_t;
} stm32_lptim_clkpol_t;
/* LPTIM Channel Modes */
@@ -178,26 +178,26 @@ typedef enum
STM32_LPTIM_CH_CH2 = 0x0002,
STM32_LPTIM_CH_CH3 = 0x0003,
STM32_LPTIM_CH_MASK = 0x000f,
} stm32l4_lptim_channel_t;
} stm32_lptim_channel_t;
/* LPTIM Operations */
struct stm32l4_lptim_ops_s
struct stm32_lptim_ops_s
{
int (*setmode)(struct stm32l4_lptim_dev_s *dev,
stm32l4_lptim_mode_t mode);
int (*setclock)(struct stm32l4_lptim_dev_s *dev, uint32_t freq);
int (*setchannel)(struct stm32l4_lptim_dev_s *dev,
stm32l4_lptim_channel_t channel, int enable);
int (*setclocksource)(struct stm32l4_lptim_dev_s *dev,
stm32l4_lptim_clksrc_t clksrc);
int (*setpolarity)(struct stm32l4_lptim_dev_s *dev,
stm32l4_lptim_clkpol_t polarity);
uint32_t (*getcounter)(struct stm32l4_lptim_dev_s *dev);
int (*setcountmode)(struct stm32l4_lptim_dev_s *dev,
stm32l4_lptim_cntmode_t cntmode);
void (*setperiod)(struct stm32l4_lptim_dev_s *dev, uint32_t period);
uint32_t (*getperiod)(struct stm32l4_lptim_dev_s *dev);
int (*setmode)(struct stm32_lptim_dev_s *dev,
stm32_lptim_mode_t mode);
int (*setclock)(struct stm32_lptim_dev_s *dev, uint32_t freq);
int (*setchannel)(struct stm32_lptim_dev_s *dev,
stm32_lptim_channel_t channel, int enable);
int (*setclocksource)(struct stm32_lptim_dev_s *dev,
stm32_lptim_clksrc_t clksrc);
int (*setpolarity)(struct stm32_lptim_dev_s *dev,
stm32_lptim_clkpol_t polarity);
uint32_t (*getcounter)(struct stm32_lptim_dev_s *dev);
int (*setcountmode)(struct stm32_lptim_dev_s *dev,
stm32_lptim_cntmode_t cntmode);
void (*setperiod)(struct stm32_lptim_dev_s *dev, uint32_t period);
uint32_t (*getperiod)(struct stm32_lptim_dev_s *dev);
};
/****************************************************************************
@@ -206,11 +206,11 @@ struct stm32l4_lptim_ops_s
/* Get timer structure, power-up, reset, and mark it as used */
struct stm32l4_lptim_dev_s *stm32l4_lptim_init(int timer);
struct stm32_lptim_dev_s *stm32_lptim_init(int timer);
/* Power-down timer, mark it as unused */
int stm32l4_lptim_deinit(struct stm32l4_lptim_dev_s *dev);
int stm32_lptim_deinit(struct stm32_lptim_dev_s *dev);
#undef EXTERN
#if defined(__cplusplus)
arch/arm/src/stm32l4/stm32l4_lse.c
+5 -5
View File
@@ -54,14 +54,14 @@
****************************************************************************/
/****************************************************************************
* Name: stm32l4_rcc_enablelse
* Name: stm32_rcc_enablelse
*
* Description:
* Enable the External Low-Speed (LSE) oscillator.
*
****************************************************************************/
void stm32l4_rcc_enablelse(void)
void stm32_rcc_enablelse(void)
{
bool writable;
uint32_t regval;
@@ -78,7 +78,7 @@ void stm32l4_rcc_enablelse(void)
* in the PWR CR register before to configuring the LSE.
*/
writable = stm32l4_pwr_enablebkp(true);
writable = stm32_pwr_enablebkp(true);
/* Enable the External Low-Speed (LSE) oscillator by setting the
* LSEON bit the RCC BDCR register.
@@ -100,7 +100,7 @@ void stm32l4_rcc_enablelse(void)
while (((regval = getreg32(STM32_RCC_BDCR)) & RCC_BDCR_LSERDY) == 0)
{
stm32l4_waste();
stm32_waste();
}
#if defined(CONFIG_STM32L4_RTC_LSECLOCK_RUN_DRV_CAPABILITY) && \
@@ -121,6 +121,6 @@ void stm32l4_rcc_enablelse(void)
/* Disable backup domain access if it was disabled on entry */
stm32l4_pwr_enablebkp(writable);
stm32_pwr_enablebkp(writable);
}
}
arch/arm/src/stm32l4/stm32l4_lsi.c
+4 -4
View File
@@ -33,14 +33,14 @@
****************************************************************************/
/****************************************************************************
* Name: stm32l4_rcc_enablelsi
* Name: stm32_rcc_enablelsi
*
* Description:
* Enable the Internal Low-Speed (LSI) RC Oscillator.
*
****************************************************************************/
void stm32l4_rcc_enablelsi(void)
void stm32_rcc_enablelsi(void)
{
/* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION
* bit the RCC CSR register.
@@ -54,14 +54,14 @@ void stm32l4_rcc_enablelsi(void)
}
/****************************************************************************
* Name: stm32l4_rcc_disablelsi
* Name: stm32_rcc_disablelsi
*
* Description:
* Disable the Internal Low-Speed (LSI) RC Oscillator.
*
****************************************************************************/
void stm32l4_rcc_disablelsi(void)
void stm32_rcc_disablelsi(void)
{
/* Enable the Internal Low-Speed (LSI) RC Oscillator by setting the LSION
* bit the RCC CSR register.
arch/arm/src/stm32l4/stm32l4_mpuinit.c
+4 -4
View File
@@ -41,7 +41,7 @@
****************************************************************************/
/****************************************************************************
* Name: stm32l4_mpuinitialize
* Name: stm32_mpuinitialize
*
* Description:
* Configure the MPU to permit user-space access to only restricted SAM3U
@@ -49,7 +49,7 @@
*
****************************************************************************/
void stm32l4_mpuinitialize(void)
void stm32_mpuinitialize(void)
{
uintptr_t datastart = MIN(USERSPACE->us_datastart, USERSPACE->us_bssstart);
uintptr_t dataend = MAX(USERSPACE->us_dataend, USERSPACE->us_bssend);
@@ -74,7 +74,7 @@ void stm32l4_mpuinitialize(void)
}
/****************************************************************************
* Name: stm32l4_mpu_uheap
* Name: stm32_mpu_uheap
*
* Description:
* Map the user-heap region.
@@ -83,7 +83,7 @@ void stm32l4_mpuinitialize(void)
*
****************************************************************************/
void stm32l4_mpu_uheap(uintptr_t start, size_t size)
void stm32_mpu_uheap(uintptr_t start, size_t size)
{
mpu_user_intsram(start, size);
}
arch/arm/src/stm32l4/stm32l4_mpuinit.h
+6 -6
View File
@@ -34,7 +34,7 @@
****************************************************************************/
/****************************************************************************
* Name: stm32l4_mpuinitialize
* Name: stm32_mpuinitialize
*
* Description:
* Configure the MPU to permit user-space access to only unrestricted MCU
@@ -43,13 +43,13 @@
****************************************************************************/
#ifdef CONFIG_BUILD_PROTECTED
void stm32l4_mpuinitialize(void);
void stm32_mpuinitialize(void);
#else
# define stm32l4_mpuinitialize()
# define stm32_mpuinitialize()
#endif
/****************************************************************************
* Name: stm32l4_mpu_uheap
* Name: stm32_mpu_uheap
*
* Description:
* Map the user heap region.
@@ -57,9 +57,9 @@ void stm32l4_mpuinitialize(void);
****************************************************************************/
#ifdef CONFIG_BUILD_PROTECTED
void stm32l4_mpu_uheap(uintptr_t start, size_t size);
void stm32_mpu_uheap(uintptr_t start, size_t size);
#else
# define stm32l4_mpu_uheap(start,size)
# define stm32_mpu_uheap(start,size)
#endif
#endif /* __ARCH_ARM_SRC_STM32L4_STM32L4_MPUINIT_H */
arch/arm/src/stm32l4/stm32l4_oneshot.c
+21 -21
View File
@@ -45,20 +45,20 @@
* Private Function Prototypes
****************************************************************************/
static int stm32l4_oneshot_handler(int irq, void *context, void *arg);
static int stm32_oneshot_handler(int irq, void *context, void *arg);
/****************************************************************************
* Private Data
****************************************************************************/
static struct stm32l4_oneshot_s *g_oneshot[CONFIG_STM32L4_ONESHOT_MAXTIMERS];
static struct stm32_oneshot_s *g_oneshot[CONFIG_STM32L4_ONESHOT_MAXTIMERS];
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Name: stm32l4_oneshot_handler
* Name: stm32_oneshot_handler
*
* Description:
* Common timer interrupt callback. When any oneshot timer interrupt
@@ -73,9 +73,9 @@ static struct stm32l4_oneshot_s *g_oneshot[CONFIG_STM32L4_ONESHOT_MAXTIMERS];
*
****************************************************************************/
static int stm32l4_oneshot_handler(int irq, void *context, void *arg)
static int stm32_oneshot_handler(int irq, void *context, void *arg)
{
struct stm32l4_oneshot_s *oneshot = (struct stm32l4_oneshot_s *) arg;
struct stm32_oneshot_s *oneshot = (struct stm32_oneshot_s *) arg;
oneshot_handler_t oneshot_handler;
void *oneshot_arg;
@@ -107,7 +107,7 @@ static int stm32l4_oneshot_handler(int irq, void *context, void *arg)
}
/****************************************************************************
* Name: stm32l4_allocate_handler
* Name: stm32_allocate_handler
*
* Description:
* Allocate a timer callback handler for the oneshot instance.
@@ -121,7 +121,7 @@ static int stm32l4_oneshot_handler(int irq, void *context, void *arg)
*
****************************************************************************/
static inline int stm32l4_allocate_handler(struct stm32l4_oneshot_s *oneshot)
static inline int stm32_allocate_handler(struct stm32_oneshot_s *oneshot)
{
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 1
int ret = -EBUSY;
@@ -162,7 +162,7 @@ static inline int stm32l4_allocate_handler(struct stm32l4_oneshot_s *oneshot)
****************************************************************************/
/****************************************************************************
* Name: stm32l4_oneshot_initialize
* Name: stm32_oneshot_initialize
*
* Description:
* Initialize the oneshot timer wrapper
@@ -180,7 +180,7 @@ static inline int stm32l4_allocate_handler(struct stm32l4_oneshot_s *oneshot)
*
****************************************************************************/
int stm32l4_oneshot_initialize(struct stm32l4_oneshot_s *oneshot,
int stm32_oneshot_initialize(struct stm32_oneshot_s *oneshot,
int chan, uint16_t resolution)
{
uint32_t frequency;
@@ -193,7 +193,7 @@ int stm32l4_oneshot_initialize(struct stm32l4_oneshot_s *oneshot,
frequency = USEC_PER_SEC / (uint32_t)resolution;
oneshot->frequency = frequency;
oneshot->tch = stm32l4_tim_init(chan);
oneshot->tch = stm32_tim_init(chan);
if (!oneshot->tch)
{
tmrerr("ERROR: Failed to allocate TIM%d\n", chan);
@@ -211,18 +211,18 @@ int stm32l4_oneshot_initialize(struct stm32l4_oneshot_s *oneshot,
/* Assign a callback handler to the oneshot */
return stm32l4_allocate_handler(oneshot);
return stm32_allocate_handler(oneshot);
}
/****************************************************************************
* Name: stm32l4_oneshot_max_delay
* Name: stm32_oneshot_max_delay
*
* Description:
* Determine the maximum delay of the one-shot timer (in microseconds)
*
****************************************************************************/
int stm32l4_oneshot_max_delay(struct stm32l4_oneshot_s *oneshot,
int stm32_oneshot_max_delay(struct stm32_oneshot_s *oneshot,
uint64_t *usec)
{
DEBUGASSERT(oneshot != NULL && usec != NULL);
@@ -233,7 +233,7 @@ int stm32l4_oneshot_max_delay(struct stm32l4_oneshot_s *oneshot,
}
/****************************************************************************
* Name: stm32l4_oneshot_start
* Name: stm32_oneshot_start
*
* Description:
* Start the oneshot timer
@@ -241,7 +241,7 @@ int stm32l4_oneshot_max_delay(struct stm32l4_oneshot_s *oneshot,
* Input Parameters:
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* stm32l4_oneshot_initialize();
* stm32_oneshot_initialize();
* handler The function to call when when the oneshot timer expires.
* arg An opaque argument that will accompany the callback.
* ts Provides the duration of the one shot timer.
@@ -252,7 +252,7 @@ int stm32l4_oneshot_max_delay(struct stm32l4_oneshot_s *oneshot,
*
****************************************************************************/
int stm32l4_oneshot_start(struct stm32l4_oneshot_s *oneshot,
int stm32_oneshot_start(struct stm32_oneshot_s *oneshot,
oneshot_handler_t handler, void *arg,
const struct timespec *ts)
{
@@ -273,7 +273,7 @@ int stm32l4_oneshot_start(struct stm32l4_oneshot_s *oneshot,
/* Yes.. then cancel it */
tmrinfo("Already running... cancelling\n");
stm32l4_oneshot_cancel(oneshot, NULL);
stm32_oneshot_cancel(oneshot, NULL);
}
/* Save the new handler and its argument */
@@ -302,7 +302,7 @@ int stm32l4_oneshot_start(struct stm32l4_oneshot_s *oneshot,
/* Set up to receive the callback when the interrupt occurs */
STM32_TIM_SETISR(oneshot->tch, stm32l4_oneshot_handler, oneshot, 0);
STM32_TIM_SETISR(oneshot->tch, stm32_oneshot_handler, oneshot, 0);
/* Set timer period */
@@ -326,7 +326,7 @@ int stm32l4_oneshot_start(struct stm32l4_oneshot_s *oneshot,
}
/****************************************************************************
* Name: stm32l4_oneshot_cancel
* Name: stm32_oneshot_cancel
*
* Description:
* Cancel the oneshot timer and return the time remaining on the timer.
@@ -337,7 +337,7 @@ int stm32l4_oneshot_start(struct stm32l4_oneshot_s *oneshot,
* Input Parameters:
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* stm32l4_oneshot_initialize();
* stm32_oneshot_initialize();
* ts The location in which to return the time remaining on the
* oneshot timer. A time of zero is returned if the timer is
* not running. ts may be zero in which case the time remaining
@@ -350,7 +350,7 @@ int stm32l4_oneshot_start(struct stm32l4_oneshot_s *oneshot,
*
****************************************************************************/
int stm32l4_oneshot_cancel(struct stm32l4_oneshot_s *oneshot,
int stm32_oneshot_cancel(struct stm32_oneshot_s *oneshot,
struct timespec *ts)
{
irqstate_t flags;
arch/arm/src/stm32l4/stm32l4_oneshot.h
+14 -14
View File
@@ -67,20 +67,20 @@
typedef void (*oneshot_handler_t)(void *arg);
/* The oneshot client must allocate an instance of this structure and called
* stm32l4_oneshot_initialize() before using the oneshot facilities. The
* stm32_oneshot_initialize() before using the oneshot facilities. The
* client should not access the contents of this structure directly since
* the contents are subject to change.
*/
struct stm32l4_oneshot_s
struct stm32_oneshot_s
{
uint8_t chan; /* The timer/counter in use */
#if CONFIG_STM32L4_ONESHOT_MAXTIMERS > 1
uint8_t cbndx; /* Timer callback handler index */
#endif
volatile bool running; /* True: the timer is running */
struct stm32l4_tim_dev_s *tch; /* Pointer returned by
* stm32l4_tim_init() */
struct stm32_tim_dev_s *tch; /* Pointer returned by
* stm32_tim_init() */
volatile oneshot_handler_t handler; /* Oneshot expiration callback */
volatile void *arg; /* The argument that will accompany
* the callback */
@@ -106,7 +106,7 @@ extern "C"
****************************************************************************/
/****************************************************************************
* Name: stm32l4_oneshot_initialize
* Name: stm32_oneshot_initialize
*
* Description:
* Initialize the oneshot timer wrapper
@@ -124,22 +124,22 @@ extern "C"
*
****************************************************************************/
int stm32l4_oneshot_initialize(struct stm32l4_oneshot_s *oneshot, int chan,
int stm32_oneshot_initialize(struct stm32_oneshot_s *oneshot, int chan,
uint16_t resolution);
/****************************************************************************
* Name: stm32l4_oneshot_max_delay
* Name: stm32_oneshot_max_delay
*
* Description:
* Determine the maximum delay of the one-shot timer (in microseconds)
*
****************************************************************************/
int stm32l4_oneshot_max_delay(struct stm32l4_oneshot_s *oneshot,
int stm32_oneshot_max_delay(struct stm32_oneshot_s *oneshot,
uint64_t *usec);
/****************************************************************************
* Name: stm32l4_oneshot_start
* Name: stm32_oneshot_start
*
* Description:
* Start the oneshot timer
@@ -147,7 +147,7 @@ int stm32l4_oneshot_max_delay(struct stm32l4_oneshot_s *oneshot,
* Input Parameters:
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* stm32l4_oneshot_initialize();
* stm32_oneshot_initialize();
* handler The function to call when when the oneshot timer expires.
* arg An opaque argument that will accompany the callback.
* ts Provides the duration of the one shot timer.
@@ -158,12 +158,12 @@ int stm32l4_oneshot_max_delay(struct stm32l4_oneshot_s *oneshot,
*
****************************************************************************/
int stm32l4_oneshot_start(struct stm32l4_oneshot_s *oneshot,
int stm32_oneshot_start(struct stm32_oneshot_s *oneshot,
oneshot_handler_t handler, void *arg,
const struct timespec *ts);
/****************************************************************************
* Name: stm32l4_oneshot_cancel
* Name: stm32_oneshot_cancel
*
* Description:
* Cancel the oneshot timer and return the time remaining on the timer.
@@ -174,7 +174,7 @@ int stm32l4_oneshot_start(struct stm32l4_oneshot_s *oneshot,
* Input Parameters:
* oneshot Caller allocated instance of the oneshot state structure. This
* structure must have been previously initialized via a call to
* stm32l4_oneshot_initialize();
* stm32_oneshot_initialize();
* ts The location in which to return the time remaining on the
* oneshot timer. A time of zero is returned if the timer is
* not running.
@@ -186,7 +186,7 @@ int stm32l4_oneshot_start(struct stm32l4_oneshot_s *oneshot,
*
****************************************************************************/
int stm32l4_oneshot_cancel(struct stm32l4_oneshot_s *oneshot,
int stm32_oneshot_cancel(struct stm32_oneshot_s *oneshot,
struct timespec *ts);
#undef EXTERN

Some files were not shown because too many files have changed in this diff Show More