mirror of
https://github.com/apache/nuttx.git
synced 2026-05-25 09:45:55 +08:00
SAMV71: Add pin mapping definitions
This commit is contained in:
Gregory Nutt
@@ -288,7 +288,7 @@
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#define GPIO_USART0_CTS (GPIO_PERIPHC | GPIO_CFG_DEFAULT | GPIO_PORT_PIOB | GPIO_PIN2)
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#define GPIO_USART0_RTS (GPIO_PERIPHC | GPIO_CFG_DEFAULT | GPIO_PORT_PIOB | GPIO_PIN3)
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#define GPIO_USART0_RXD (GPIO_PERIPHC | GPIO_CFG_DEFAULT | GPIO_PORT_PIOB | GPIO_PIN0)
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#define GPIO_USART0_SCK0 (GPIO_PERIPHC | GPIO_CFG_DEFAULT | GPIO_PORT_PIOB | GPIO_PIN13)
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#define GPIO_USART0_SCK (GPIO_PERIPHC | GPIO_CFG_DEFAULT | GPIO_PORT_PIOB | GPIO_PIN13)
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#define GPIO_USART0_TXD (GPIO_PERIPHC | GPIO_CFG_DEFAULT | GPIO_PORT_PIOB | GPIO_PIN1)
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#define GPIO_USART1_CTS (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOA | GPIO_PIN25)
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@@ -298,7 +298,7 @@
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#define GPIO_USART1_RI (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOA | GPIO_PIN29)
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#define GPIO_USART1_RTS (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOA | GPIO_PIN24)
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#define GPIO_USART1_RXD (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOA | GPIO_PIN21)
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#define GPIO_USART1_SCK1 (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOA | GPIO_PIN23)
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#define GPIO_USART1_SCK (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOA | GPIO_PIN23)
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#define GPIO_USART1_TXD (GPIO_PERIPHA | GPIO_CFG_DEFAULT | GPIO_PORT_PIOA | GPIO_PIN22)
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/************************************************************************************
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@@ -0,0 +1,52 @@
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/************************************************************************************
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* arch/arm/src/samv7/chip/sam_pinmap.h
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*
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* Copyright (C) 2012-2014 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_SAMV7_CHIP_SAM_PINMAP_H
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#define __ARCH_ARM_SRC_SAMV7_CHIP_SAM_PINMAP_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#if defined(CONFIG_ARCH_CHIP_SAMV71)
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# include "chip/samv71_pinmap.h"
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#else
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# error Unrecognized SAMV7 architecture
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#endif
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#endif /* __ARCH_ARM_SRC_SAMV7_CHIP_SAM_PINMAP_H */
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File diff suppressed because it is too large
Load Diff
Executable
+321
@@ -0,0 +1,321 @@
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/************************************************************************************
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* arch/arm/src/samv7/sam_gpio.h
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*
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* Copyright (C) 2015 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_SAM34_SAM_GPIO_H
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#define __ARCH_ARM_SRC_SAM34_SAM_GPIO_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdbool.h>
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Configuration ********************************************************************/
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#define GPIO_HAVE_PULLDOWN 1
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#define GPIO_HAVE_PERIPHCD 1
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#define GPIO_HAVE_SCHMITT 1
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#define GPIO_HAVE_DELAYR 1
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/* Bit-encoded input to sam_configgpio() ********************************************/
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/* 32-bit Encoding:
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*
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* MMMC CCCC IIIV PPPB BBBB
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*/
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/* Input/Output mode:
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*
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* MMM. .... .... .... ....
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*/
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#define GPIO_MODE_SHIFT (17) /* Bits 17-19: GPIO mode */
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#define GPIO_MODE_MASK (7 << GPIO_MODE_SHIFT)
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# define GPIO_ALTERNATE (0 << GPIO_MODE_SHIFT) /* PIO alternate function */
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# define GPIO_INPUT (1 << GPIO_MODE_SHIFT) /* PIO Input */
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# define GPIO_OUTPUT (2 << GPIO_MODE_SHIFT) /* PIO Output */
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# define GPIO_PERIPHA (3 << GPIO_MODE_SHIFT) /* Controlled by periph A signal */
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# define GPIO_PERIPHB (4 << GPIO_MODE_SHIFT) /* Controlled by periph B signal */
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# define GPIO_PERIPHC (5 << GPIO_MODE_SHIFT) /* Controlled by periph C signal */
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# define GPIO_PERIPHD (6 << GPIO_MODE_SHIFT) /* Controlled by periph D signal */
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/* These bits set the configuration of the pin:
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* NOTE: No definitions for parallel capture mode
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*
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* ...C CCCC .... .... ....
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*/
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#define GPIO_CFG_SHIFT (12) /* Bits 12-16: GPIO configuration bits */
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#define GPIO_CFG_MASK (31 << GPIO_CFG_SHIFT)
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# define GPIO_CFG_DEFAULT (0 << GPIO_CFG_SHIFT) /* Default, no attribute */
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# define GPIO_CFG_PULLUP (1 << GPIO_CFG_SHIFT) /* Bit 11: Internal pull-up */
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# define GPIO_CFG_PULLDOWN (2 << GPIO_CFG_SHIFT) /* Bit 11: Internal pull-down */
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# define GPIO_CFG_DEGLITCH (4 << GPIO_CFG_SHIFT) /* Bit 12: Internal glitch filter */
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# define GPIO_CFG_OPENDRAIN (8 << GPIO_CFG_SHIFT) /* Bit 13: Open drain */
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# define GPIO_CFG_SCHMITT (16 << GPIO_CFG_SHIFT) /* Bit 13: Schmitt trigger */
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/* Additional interrupt modes:
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*
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* .... .... III. .... ....
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*/
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#define GPIO_INT_SHIFT (9) /* Bits 9-11: GPIO interrupt bits */
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#define GPIO_INT_MASK (7 << GPIO_INT_SHIFT)
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# define _GIO_INT_AIM (1 << 10) /* Bit 10: Additional Interrupt modes */
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# define _GPIO_INT_LEVEL (1 << 9) /* Bit 9: Level detection interrupt */
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# define _GPIO_INT_EDGE (0) /* (vs. Edge detection interrupt) */
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# define _GPIO_INT_RH (1 << 8) /* Bit 9: Rising edge/High level detection interrupt */
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# define _GPIO_INT_FL (0) /* (vs. Falling edge/Low level detection interrupt) */
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# define GPIO_INT_HIGHLEVEL (_GIO_INT_AIM | _GPIO_INT_LEVEL | _GPIO_INT_RH)
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# define GPIO_INT_LOWLEVEL (_GIO_INT_AIM | _GPIO_INT_LEVEL | _GPIO_INT_FL)
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# define GPIO_INT_RISING (_GIO_INT_AIM | _GPIO_INT_EDGE | _GPIO_INT_RH)
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# define GPIO_INT_FALLING (_GIO_INT_AIM | _GPIO_INT_EDGE | _GPIO_INT_FL)
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# define GPIO_INT_BOTHEDGES (0)
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/* If the pin is an GPIO output, then this identifies the initial output value:
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*
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* .... .... ...V .... ....
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*/
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#define GPIO_OUTPUT_SET (1 << 8) /* Bit 8: Initial value of output */
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#define GPIO_OUTPUT_CLEAR (0)
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/* This identifies the GPIO port:
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*
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* .... .... .... PPP. ....
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*/
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#define GPIO_PORT_SHIFT (5) /* Bit 5-6: Port number */
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#define GPIO_PORT_MASK (7 << GPIO_PORT_SHIFT)
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# define GPIO_PORT_PIOA (0 << GPIO_PORT_SHIFT)
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# define GPIO_PORT_PIOB (1 << GPIO_PORT_SHIFT)
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# define GPIO_PORT_PIOC (2 << GPIO_PORT_SHIFT)
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# define GPIO_PORT_PIOD (3 << GPIO_PORT_SHIFT)
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# define GPIO_PORT_PIOE (4 << GPIO_PORT_SHIFT)
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/* This identifies the bit in the port:
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*
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* .... .... .... ...B BBBB
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*/
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#define GPIO_PIN_SHIFT (0) /* Bits 0-4: GPIO number: 0-31 */
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#define GPIO_PIN_MASK (31 << GPIO_PIN_SHIFT)
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#define GPIO_PIN0 (0 << GPIO_PIN_SHIFT)
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#define GPIO_PIN1 (1 << GPIO_PIN_SHIFT)
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#define GPIO_PIN2 (2 << GPIO_PIN_SHIFT)
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#define GPIO_PIN3 (3 << GPIO_PIN_SHIFT)
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#define GPIO_PIN4 (4 << GPIO_PIN_SHIFT)
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#define GPIO_PIN5 (5 << GPIO_PIN_SHIFT)
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#define GPIO_PIN6 (6 << GPIO_PIN_SHIFT)
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#define GPIO_PIN7 (7 << GPIO_PIN_SHIFT)
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#define GPIO_PIN8 (8 << GPIO_PIN_SHIFT)
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#define GPIO_PIN9 (9 << GPIO_PIN_SHIFT)
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#define GPIO_PIN10 (10 << GPIO_PIN_SHIFT)
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#define GPIO_PIN11 (11 << GPIO_PIN_SHIFT)
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#define GPIO_PIN12 (12 << GPIO_PIN_SHIFT)
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#define GPIO_PIN13 (13 << GPIO_PIN_SHIFT)
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#define GPIO_PIN14 (14 << GPIO_PIN_SHIFT)
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#define GPIO_PIN15 (15 << GPIO_PIN_SHIFT)
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#define GPIO_PIN16 (16 << GPIO_PIN_SHIFT)
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#define GPIO_PIN17 (17 << GPIO_PIN_SHIFT)
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#define GPIO_PIN18 (18 << GPIO_PIN_SHIFT)
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#define GPIO_PIN19 (19 << GPIO_PIN_SHIFT)
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#define GPIO_PIN20 (20 << GPIO_PIN_SHIFT)
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#define GPIO_PIN21 (21 << GPIO_PIN_SHIFT)
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#define GPIO_PIN22 (22 << GPIO_PIN_SHIFT)
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#define GPIO_PIN23 (23 << GPIO_PIN_SHIFT)
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#define GPIO_PIN24 (24 << GPIO_PIN_SHIFT)
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#define GPIO_PIN25 (25 << GPIO_PIN_SHIFT)
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#define GPIO_PIN26 (26 << GPIO_PIN_SHIFT)
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#define GPIO_PIN27 (27 << GPIO_PIN_SHIFT)
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#define GPIO_PIN28 (28 << GPIO_PIN_SHIFT)
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#define GPIO_PIN29 (29 << GPIO_PIN_SHIFT)
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#define GPIO_PIN30 (30 << GPIO_PIN_SHIFT)
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#define GPIO_PIN31 (31 << GPIO_PIN_SHIFT)
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/* Must be big enough to hold the 32-bit encoding */
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typedef uint32_t gpio_pinset_t;
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#ifndef CONFIG_DEBUG
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# undef CONFIG_DEBUG_GPIO
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#endif
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Inline Functions
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************************************************************************************/
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#ifndef __ASSEMBLY__
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/************************************************************************************
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* Public Data
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************************************************************************************/
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/************************************************************************************
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* Public Function Prototypes
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************************************************************************************/
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/************************************************************************************
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* Name: sam_gpioirqinitialize
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*
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* Description:
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* Initialize logic to support a second level of interrupt decoding for GPIO pins.
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*
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************************************************************************************/
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#ifdef CONFIG_SAM34_GPIO_IRQ
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void sam_gpioirqinitialize(void);
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#else
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# define sam_gpioirqinitialize()
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#endif
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/************************************************************************************
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* Name: sam_configgpio
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*
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* Description:
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* Configure a GPIO pin based on bit-encoded description of the pin.
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*
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************************************************************************************/
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int sam_configgpio(gpio_pinset_t cfgset);
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/************************************************************************************
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* Name: sam_gpiowrite
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*
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* Description:
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* Write one or zero to the selected GPIO pin
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*
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************************************************************************************/
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void sam_gpiowrite(gpio_pinset_t pinset, bool value);
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/************************************************************************************
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* Name: sam_gpioread
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*
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* Description:
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* Read one or zero from the selected GPIO pin
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*
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************************************************************************************/
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bool sam_gpioread(gpio_pinset_t pinset);
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/************************************************************************************
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* Name: sam_gpioirq
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*
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* Description:
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* Configure an interrupt for the specified GPIO pin.
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*
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************************************************************************************/
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#ifdef CONFIG_SAM34_GPIO_IRQ
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void sam_gpioirq(gpio_pinset_t pinset);
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#else
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# define sam_gpioirq(pinset)
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#endif
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/************************************************************************************
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* Name: sam_gpioirqenable
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*
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* Description:
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* Enable the interrupt for specified GPIO IRQ
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*
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************************************************************************************/
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#ifdef CONFIG_SAM34_GPIO_IRQ
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void sam_gpioirqenable(int irq);
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#else
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# define sam_gpioirqenable(irq)
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#endif
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/************************************************************************************
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* Name: sam_gpioirqdisable
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*
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* Description:
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* Disable the interrupt for specified GPIO IRQ
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*
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************************************************************************************/
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#ifdef CONFIG_SAM34_GPIO_IRQ
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void sam_gpioirqdisable(int irq);
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#else
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# define sam_gpioirqdisable(irq)
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#endif
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/************************************************************************************
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* Function: sam_dumpgpio
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*
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* Description:
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* Dump all GPIO registers associated with the base address of the provided pinset.
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*
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************************************************************************************/
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#ifdef CONFIG_DEBUG_GPIO
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int sam_dumpgpio(uint32_t pinset, const char *msg);
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#else
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# define sam_dumpgpio(p,m)
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#endif
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_SRC_SAM34_SAM_GPIO_H */
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