mirror of
https://github.com/apache/nuttx.git
synced 2026-06-06 08:36:24 +08:00
resolve and Merge branch 'master' into stm32l4_usb
resolved Conflicts: configs/stm32l476vg-disco/nsh/defconfig
This commit is contained in:
ziggurat29
+33
-30
@@ -1,30 +1,33 @@
|
||||
.depend
|
||||
Make.dep
|
||||
*.o
|
||||
*.a
|
||||
*.d
|
||||
*.i
|
||||
*~
|
||||
.swp
|
||||
.*.swp
|
||||
core
|
||||
.gdbinit
|
||||
cscope.out
|
||||
/.config
|
||||
/.config.old
|
||||
/.version
|
||||
/Make.defs
|
||||
/setenv.sh
|
||||
/setenv.bat
|
||||
/nuttx
|
||||
/nuttx.*
|
||||
/nuttx-*
|
||||
/_SAVED_APPS_config
|
||||
/*.map
|
||||
/*.elf
|
||||
/*.srec
|
||||
/*.bin
|
||||
/*.ihx
|
||||
/*.hex
|
||||
/pcode
|
||||
/tags
|
||||
.depend
|
||||
Make.dep
|
||||
*.o
|
||||
*.a
|
||||
*.d
|
||||
*.i
|
||||
*~
|
||||
.swp
|
||||
.*.swp
|
||||
core
|
||||
.gdbinit
|
||||
cscope.out
|
||||
/.config
|
||||
/.config.old
|
||||
/.version
|
||||
/Make.defs
|
||||
/setenv.sh
|
||||
/setenv.bat
|
||||
/nuttx
|
||||
/nuttx.*
|
||||
/nuttx-*
|
||||
/_SAVED_APPS_config
|
||||
/*.map
|
||||
/*.elf
|
||||
/*.srec
|
||||
/*.bin
|
||||
/*.ihx
|
||||
/*.hex
|
||||
/pcode
|
||||
/tags
|
||||
/.settings/
|
||||
/.cproject
|
||||
/.project
|
||||
|
||||
@@ -93,7 +93,7 @@ has a similar BSD style license:
|
||||
IGMP
|
||||
^^^^
|
||||
|
||||
IGMP support, if enabled in uIP, adds additional logic by Steve Reynolds:
|
||||
IGMP support, if enabled, adds additional logic by Steve Reynolds:
|
||||
|
||||
Copyright (c) 2002 CITEL Technologies Ltd.
|
||||
All rights reserved.
|
||||
|
||||
@@ -11586,7 +11586,7 @@
|
||||
* configs/stm32l476vg-disco: Add support for the STM32L476VG Discovery
|
||||
board. From Dave (2016-03-25).
|
||||
|
||||
7.16 2016-xx-xx Gregory Nutt <gnutt@nuttx.org>
|
||||
7.16 2016-06-01 Gregory Nutt <gnutt@nuttx.org>
|
||||
|
||||
* PM: Add activity domain to all PM interfaces and driver callbacks. If
|
||||
CONFIG_PM_NDOMAINS == 1, then the legacy behavior is preserved. If
|
||||
@@ -11615,7 +11615,7 @@
|
||||
* STM3220G-EVAL: Add support for both the IAR and uVision GCC IDEs
|
||||
From Kha Vo (2016-04-08).
|
||||
* STM32F429I Discovery: Add support for the uVision GCC IDE. From
|
||||
* Kha Vo (2016-04-08).
|
||||
Kha Vo (2016-04-08).
|
||||
* libc/signal and include/signal.h: Rename sigset() to signal().
|
||||
sigset() is the System V function; signal() is the obsoleted POSIX
|
||||
name. These seem to be equivalent. Neither are relevant in modern
|
||||
@@ -11640,7 +11640,7 @@
|
||||
is interpreted as a packed dual frame exchange. Sebastien Lorquet
|
||||
(2016-04-13).
|
||||
* net/sockets/listen.c and accept.c and include/nuttx/net: Separate
|
||||
out psock_listen() and psock_accepti() for internal OS usage
|
||||
out psock_listen() and psock_accept() for internal OS usage
|
||||
(2016-04-14).
|
||||
* fs/inode/, fs/vfs/, and sched/task/: File and socket descriptors are
|
||||
no longer allocated for kernel threads. They must use SYSLOG for
|
||||
@@ -11753,7 +11753,7 @@
|
||||
* arch/srm/src/stm32l4: Add CAN support for STM32L4. From Sebastien
|
||||
Lorquet (2016-05-19).
|
||||
* arch/arm/src/samv7: Adds a JTAG config and ERASE config to Kconfig to
|
||||
set the CCFG_SYSIO SYSIO Pins. From Davide Sidrane (2016-05-19).
|
||||
set the CCFG_SYSIO SYSIO Pins. From David Sidrane (2016-05-19).
|
||||
* arch/sim/src: Enhance networking support for the simulation under Linux.
|
||||
Includes updated support for Linux TUN/TAP, and the addition of support
|
||||
for Linux bridge devices. From Steve (2016-05-20).
|
||||
@@ -11767,7 +11767,7 @@
|
||||
configurations (2016-05-22).
|
||||
* include/nuttx/crypto/aes.h: Modifications to the crypto API needed
|
||||
for LPC43xx. From Alexander Vasiljev (2016-05-23).
|
||||
* arch/arm/src/lpc32xx: Add AES support. From Alexander Vasiljev
|
||||
* arch/arm/src/lpc43xx: Add AES support. From Alexander Vasiljev
|
||||
(2016-05-24).
|
||||
* configs/*/src/tiva_timer.c: Tiva boards: Fix a naming collision,
|
||||
rename board-specific function from tiva_timer_initialize() to
|
||||
@@ -11813,3 +11813,361 @@
|
||||
* fs/: Add logic to detach a file structure from a file descriptor.
|
||||
This is for use only within the OS. It permits an open file or driver
|
||||
to be used across multiple threads (2016-05-26).
|
||||
* arch/arm/src/stm32l4: Get I2C working for STM32L4. From Dave
|
||||
(ziggurat29) (2016-05-25).
|
||||
* fs/ and include/nuttx/fs: Add logic to detach a file structure from a
|
||||
file descriptor. This is for use only within the OS. It permits an
|
||||
open file or driver to be used across multiple threads. (2016-05-26).
|
||||
* drivers/analog/adc.c, include/nuttx/analog/adc.h, and all ADC lower
|
||||
half drivers: No longer uses global adc_receive() call. Added a new
|
||||
bind() method to the ADC interface. Now the ADC upper half driver
|
||||
will register its receipt-of-data callback. This change allows the
|
||||
ADC lower half driver to be used with a differ ADC upper half
|
||||
(2016-05-26).
|
||||
* drivers/analog/ads1255.c: Must not do SPI access from interrupt
|
||||
handler. Use the worker thread instead. Must also lock the SPI bus
|
||||
before using it. (2015-05-26).
|
||||
* drivers/: Several SPI-based drivers modified. All drivers that use
|
||||
SPI must call SPI_LOCK and SPI_UNLOCK. This is not optional
|
||||
(2016-05-26).
|
||||
* drivers/sensors: Fix a bug in crc computation for ms583730.
|
||||
Implement POSIX read (2016-05-27).
|
||||
* arch/arm/src/samv7: This is a fix to a problem in the handling of the
|
||||
oneshot timer. Due to a wrong assumption concerning the behavior
|
||||
directly after the start of the timer/counter the function
|
||||
sam_oneshot_cancel(…) calculates the wrong remaining time. The code
|
||||
assumes that the counter register is zero directly after the start of
|
||||
the timer, but this is not true. To start the time/counter a software
|
||||
trigger is invoked, this trigger starts the timer/count and sets the
|
||||
counter register to zero, but the reset of the counter register is not
|
||||
performed instantly. According to the datasheet: "The counter can be
|
||||
reset by a trigger. In this case, the counter value passes to zero on
|
||||
the next valid edge of the selected clock." Thus the counter is set to
|
||||
zero between 0 and USEC_PER_TICK microseconds after the clock was
|
||||
started.
|
||||
In my fix I use the freerun count value to determine if at least one
|
||||
tick passed since the start of the timer and thus if the value of the
|
||||
oneshot counter is correct. I also tried to use the function
|
||||
up_timer_gettime(…) to achieve this but, at least if compiled with no
|
||||
optimization the problem vanishes without using the value of the
|
||||
function, the function call takes too long.
|
||||
Another problem treated in the fix is that if the oneshot timer/counter
|
||||
is canceled, we only know the remaining time with a precision of
|
||||
USEC_PER_TICK microseconds. This means the calculated remaining time
|
||||
is between 0 and USEC_PER_TICK microseconds too long. To fix this I
|
||||
subtract one tick if the calculated remaining time is greater than one
|
||||
tick and otherwise set the remaining time to zero. By doing so the
|
||||
measured times are much more precise as without it. From Stefan Kolb
|
||||
(2016-05-27).
|
||||
* arch/arm/src/sama5: Stefan Kolb's change to the SAMV7 Oneshot Timer
|
||||
should also be applied to the SAMA5 oneshot time since the drivers are
|
||||
identical (2016-05-27).
|
||||
* arch/arm/src/stm32l4: Add support for SPI 4 and 5 on stm32f411 chips.
|
||||
From Konstantin Berezenko (2016-05-27).
|
||||
* arch/arm/src/sam34: Stefan Kolb's change to the SAMV7 Oneshot Timer
|
||||
should also be applied to the SAM3/4 oneshot time since the drivers
|
||||
are identical (2016-05-29).
|
||||
* arch/arm/src/stm32: Allow to not use all channel in a lower part of
|
||||
PWM. From Pierre-noel Bouteville (2016-05-30).
|
||||
* libc/math: Add a NAN test on 'x' in asin function of lib_asin.c.
|
||||
Suggested by Pierre-noel Bouteville (2016-05-31).
|
||||
* arch/arm/src/stm32: Fix logic in F4 RTCC driver that prevent ALARM
|
||||
interrupt. From Neil Hancock (2016-05-31).
|
||||
* arch/arm/src/stm32: Fix STM32 ValueLine ADC IRQ number selection.
|
||||
From David Sidrane (2016-05-31).
|
||||
* arch/arm/src/samv7: Fix missing unlock of device in MCAN
|
||||
mcan_txempty(). From Frank Benkert (2016-06-01).
|
||||
|
||||
7.17 2016-xx-xx Gregory Nutt <gnutt@nuttx.org>
|
||||
|
||||
* drivers/mtd/flash_eraseall.c: Removed. This is no longer used
|
||||
in the OS and is simply a wrapper around the MDIOC_BULKERASE
|
||||
IOCTL command. It used to be called (only) from
|
||||
apps/system/flash_eraseall, but that has been removed because it
|
||||
violated the OS/application interface -- by calling flash_eraseall().
|
||||
The old code can be found in the Obsoleted' repository (and a revised
|
||||
version can be found at apps/fsutils/flash_eraseall) (2016-06-03).
|
||||
* arch/arm/src/stm32: STM32 Timer Driver: Change calculation of per-
|
||||
timer pre-scaler value. Add support for all timers (2016-6-03)
|
||||
* drivers/lcd: Correct conditional compilation in ST7565 driver. From
|
||||
Pierre-noel Bouteville (2016-6-03)
|
||||
* arch/arm/src/stm32: Correct conditional compilation in STM32 timer
|
||||
capture logic. From Pierre-noel Bouteville (2016-6-03)
|
||||
* arch/arm/src/efm32: Fix EFM32 FLASH conditional compilation. From
|
||||
Pierre-noel Bouteville (2016-6-03)
|
||||
* arch/arm/src/lpc43xx: Fix errors in GPIO interrupt logic. From v01d
|
||||
(phreakuencies) (2016-06-04)
|
||||
* arch/arm/src/kl and lpc11xx: rename xyz_lowputc to up_putc. Remove
|
||||
all references to up_lowputc, everywhere (2016-06-04).
|
||||
* configs/stm32f103-minimum: Add minnsh configuration. From Alan
|
||||
Carvalho de Assis (2016-06-04).
|
||||
* arch/arm/src/stm32: Add the up_getc() function to STM32 in order to
|
||||
support the minnsh configuration. From Alan Carvalho de Assis
|
||||
(2016-06-04).
|
||||
* include/sys/boardctl.h: Needs to be usable with C++ files (2016-06-05).
|
||||
* tools/tesbuild.sh will now build NxWM configurations (2016-06-05).
|
||||
* arch/arm/src/stm32: In PWM driver, just update duty if frequency is
|
||||
not changed and PSM started. This removeis glitch or blinking when
|
||||
only duty is frequently changed. From Pierre-noel Bouteville (2016-06-05).
|
||||
* arch/arm/src/kinetis: Add a USB device controller driver. Derived from
|
||||
the pic32mx usb driver, which uses the same usb controller. From kfazz
|
||||
(2016-06).
|
||||
* configs/teensy-3.x: Add USB support and a usbnsh configuration. From
|
||||
kfazz (2016-06).
|
||||
* arch/arm/src/stm32: Add support for the STM32F105R. From Konstantin
|
||||
Berezenko (2016-06-06).
|
||||
* include/signal.h: Change type of SIG_ERR, SIG_IGN, ... to
|
||||
_sa_handler_t. They type void does not work with the IAR toolchain.
|
||||
From Aleksandr Vyhovanec (2016-06-07).
|
||||
* arch/arm/src/stm32f7 and include/stm32f7: Added STM32FF76xxx and
|
||||
STM32FF7xx families. From David Sidrane (2016-06-08).
|
||||
* Refactoring configs/nucleo-144 sub-directories to support additional
|
||||
nucleo-144 board. Add support for the Nucleo-F767ZI board. From David
|
||||
Sidrane (2016-06-08).
|
||||
* arch/arm/src/kinetis: Add a USB device controller driver for kinetis.
|
||||
Derived from pic32mx usb driver, which uses the same usb controller.
|
||||
From kfazz (2016-06-06).
|
||||
* configs/teensy-3.x: Add USB device support and usbnsh configuration.
|
||||
From kfazz (2016-06-06.
|
||||
* arch/arm/src/stm32: Add STM32F105R support. From Konstantin Berezenko
|
||||
(2016-06-06).
|
||||
* include/signal.h: Change type of SIG_IGN and related defines to
|
||||
_sa_handler_t. From Aleksandr Vyhovanec (2016-06-07).
|
||||
* configs/nucleo-144: Refactored configs/nucleo-144 sub-directories to
|
||||
support additional nucleo-144 board. Add support for the Nucleo-F767ZI
|
||||
board. From David Sidrane (2016-06-07).
|
||||
* arch/arm/src/stm32f7: Add support for STM32FF76xxx and STM32FF7xx
|
||||
families. From David Sidrane (2016-06-08).
|
||||
* include/assert.h: Check if NDEBUG is defined. From Paul Alexander
|
||||
Patience (2016-06-08).
|
||||
* arch/arm/src/stm32: Fix STM32 DMA code and configuration for STM32F37X
|
||||
chips. From Marten Svanfeldt (2016-06-08).
|
||||
* drivers/mtd: Add a driver of IS25xP SPI flash devices. From Marten
|
||||
Svanfeldt (2016-06-09).
|
||||
* arch/arm/src/Kconfig and configs/teensy-3.x: Teensy clock fixes. The
|
||||
High Gain bit in MCG_C1 was preventing teensy from booting except
|
||||
after a programming session. The second change doesn't appear to
|
||||
change any functionality, but complies with restrictions in the k20
|
||||
family reference manual on FEI -> FBE clock transiions. From kfazz
|
||||
(2016-06-09).
|
||||
* configs/*/include/board.h: Fix timer input clock definitions. From
|
||||
David Sidrane (2016-06-09).
|
||||
* Networking: In both IPv6 and IPv4 incoming logic: (1) Should check
|
||||
if the packet size is large enough before trying to access the packet
|
||||
length in the IP header. (2) In the comparison between the IP length
|
||||
and the full packet length, need to subtract the size of the link
|
||||
layer header before making the comparison or we will get false
|
||||
positives (i.e., the packet is really too small) (2016-06-09)
|
||||
* drivers/mtd: Added driver of IS25xP SPI flash devices. Based on
|
||||
sst25xx driver. From Marten Svanfeldt (2016-06-09).
|
||||
* arch/arm/src/kinetis: Teensy clock fixes. The High Gain bit in
|
||||
MCG_C1 was preventing teensy from booting except after a programming
|
||||
session. The second change doesn't appear to change any functionality,
|
||||
but complies with restrictions in the k20 family reference manual on
|
||||
FEI -> FBE clock transiions. From kfazz (2016-06-09).
|
||||
* arch/arm/src/stm32: Fix timer input clock definitions. From David
|
||||
Sidrane (2016-06-09).
|
||||
* configs/: All configurations that have both CONFIG_NSH_LIBRARY=y and
|
||||
CONFIG_NET=y must now also have CONFIG_NSH_NETINIT=y (2016-06-09).
|
||||
* arch/arm/src/kinetis: Kinetis pwm support, based on kl_pwm driver.
|
||||
From kfazz (2016-06-09).
|
||||
* net/: In both IPv6 and IPv4 incoming logic: (1) Should check if the
|
||||
packet size is large enough before trying to access the packet length
|
||||
in the IP header. (2) In the comparison between the IP length and the
|
||||
full packet length, need to subtract the size of the link layer header
|
||||
before making the comparison or we will get false positives (i.e., the
|
||||
packet is really too small) (2016-06-09).
|
||||
* arch/srm/src/stm32: Fix compilation errors in debug mode of
|
||||
stm32_pwm.c. From Konstantin Berezenko (2016-06-09).
|
||||
* arch/arm/src/kinetis: Support up to 8 channels per timer. From kfazz
|
||||
(2016-06-09).
|
||||
* lib/: crc16: fix error. From Paul Alexander Patience (2016-06-10).
|
||||
* lib/: Add crc64 support. From Paul Alexander Patience (2016-06-10).
|
||||
* arch/arm/src/kinetis: Added kl_dumpgpio functionality as
|
||||
kinetis_pindump. From kfazz (2016-06-10).
|
||||
* arch/arm/src/sam34: Fix some errors in AFEC header file. From
|
||||
OrbitalFox (2016-06-10).
|
||||
* arch/arm/include/stm32: Correct the can2 rx irq number for stm32f10xx
|
||||
chips. From Konstantin Berezenko (2016-06-10).
|
||||
* drivers/include/input: Button upper half driver: Add definitions
|
||||
needed for compilation with the poll() interface is not disabled
|
||||
(2016-06-11).
|
||||
* Kconfig/, include/debug.h, and many other files: (1) Debug features
|
||||
are now enabled separately from debug output. CONFIG_DEBUG is gone.
|
||||
It is replaced with CONFIG_DEBUG_FEATURES. (2) The macros dbg() and
|
||||
vdbg() have renamed as err() and info(), respectively. This also
|
||||
applies to all of the variants as well, lldbg(), llvdbg(), XXdbg(),
|
||||
XXvdbg(), XXlldbg(), and XXllvdbg(). (3) Add a new debug level,
|
||||
warn() (and all variants vwarn(), llwarn(), etc.). (4) Debug
|
||||
assertions can now be enabled separately from debug output. (5) You
|
||||
can now enable subsystem/device driver debug output at different
|
||||
output levels. For example, CONFIG_DEBUG_FS no longer enables file
|
||||
system debug output. It enables general file system debug logic and
|
||||
enables selection of CONFIG_DEBUG_FS_ERROR, CONFIG_DEBUG_FS_WARN,
|
||||
and CONFIG_DEBUG_FS_INFO (2016-06-12).
|
||||
* strtoul() and strtoull(): Fix errno settings required by function
|
||||
definition. Resolved Bitbucket Issue #1. From Sebastien Lorquet
|
||||
(2016-06-13)
|
||||
* arch/arm/src/stm32f7: Add SPI driver. DMA not yet supported. From
|
||||
David Sidrane (2016-06-14).
|
||||
* configs/nucleo-144: Add test for STM32 F7 SPI. From David Sidrane
|
||||
(2016-06-14).
|
||||
* alert(): New debug macro: alert(). This is high priority,
|
||||
unconditional output and is used to simplify and stanardize crash
|
||||
error reporting(2016-06-14).
|
||||
* arch/arm/src/tiva: Bug Fix in tiva_serial.c - UART5, UART6 and UART7
|
||||
were not being configured as TTYS0 for printing over serial console.
|
||||
From Shirshak Sengupta (2016-06-14).
|
||||
* SAMV7: SPI: SPI-Freq. 40MHz; VARSELECT; hw-features
|
||||
This change adds the following improvements:
|
||||
- Increase the allowed SPI-Frequency from 20 to 40 MHz.
|
||||
- Correct and rename the "VARSELECT" option
|
||||
This option was included in the code as "CONFIG_SPI_VARSELECT" but
|
||||
nowhere defined in a Kconfig file. The change renames it to
|
||||
"CONFIG_SAMV7_SPI_VARSELECT" and corrects the implementation
|
||||
according the datasheet of Atmel. In short, this option switches
|
||||
the processor from "fixed peripheral selection" (single device) to
|
||||
"variable peripheral selection" (multiple devices on the bus).
|
||||
- Add a new Function to the interface to control the timing and delays
|
||||
of the chip according the ChipSelect lines. This function can
|
||||
control the delay between the assertion of the ChipSelect and the
|
||||
first bit, between the last bit and the de-assertion of the
|
||||
ChipSelect and between two ChipSelects. This is needed to tune the
|
||||
transfer according the specification of the connected devices.
|
||||
- Add three "hw-features" for the SAMV7, which controls the behavior
|
||||
of the ChipSelect:
|
||||
- force CS inactive after transfer: this forces a (short)
|
||||
de-assertion of the CS after a transfer, even if more data is
|
||||
available in time
|
||||
- force CS active after transfer: this forces the CS to stay active
|
||||
after a transfer, even if the chip runs out of data.
|
||||
Btw.: this is a prerequisit to make the LASTXFER bit working at all.
|
||||
- escape LASTXFER: this suppresses the LASTXFER bit at the end of the
|
||||
next transfer. The "escape"-Flag is reset automatically.
|
||||
From Frank Benkert (2016-06-14)
|
||||
* Many CONFIG_DEBUG_* options did not have matching macros defined in
|
||||
include/debug.h. Rather, there were various definitions scattered
|
||||
throughout the sourse tree. These were collected together and
|
||||
centralized with single macro definitions in include/debug.h
|
||||
(2016-06-15)
|
||||
* STM32F7: Add SPI, I2C, and ADC drivers. From Lok Tep (2016-06-15).
|
||||
* err(), warn(), info(), and alert() renamed to include leading '_'.
|
||||
This was done to avoid some naming collisions (2-06-16
|
||||
* STM32: Move backup domain reset to to earlier in the initialization
|
||||
sequence (stm32_rcc.c() in order to avoid disabling LSE during RTC
|
||||
initialiation. From Alan Carvalho de Assis (2016-06-16).
|
||||
* SYSLOG: syslog() will now automatically redirect output to lowsyslog()
|
||||
if called from an interrupt handler (2016-06-16).
|
||||
* STM32: When configuring a GPIO via stm32_configgpio() the function
|
||||
will first set the mode to output and then set the initial state of
|
||||
the gpio later on. If you have an application with an externaly
|
||||
pulled-up pin, this would lead to a glitch on the line that may be
|
||||
dangerous in some applications (e.G. Reset Line for other chips,
|
||||
etc). This changes sets the output state before configuring the pin
|
||||
as an output. From Pascal Speck (2016-06-17).
|
||||
* STM32 F7: Apply Pascal Speck's GPIO STM32 change to STM32 L4
|
||||
(2016-06-17).
|
||||
* STM32 L4: Apply Pascal Speck's GPIO STM32 change to STM32 L4.
|
||||
From Sebastien Lorquet (2016-06-17).
|
||||
* Review all uses of *err(). These macro family should indicate only
|
||||
error conditions. Convert *err() to either *info() or add ERROR:,
|
||||
depending on if an error is reported (2016-06-17).
|
||||
* STM32F7: Review, correct, and update I2C, SPI, and ADC drivers. From
|
||||
David Sidrane (2016-06-17).
|
||||
* LPC17 Ethernet: Needs to correctly ignore PHYID2 revision number
|
||||
when comparing PHY IDs (2016-06-18).
|
||||
* SYSLOG: Consolidate all SYSLOG logic in drivers/syslog. Add an
|
||||
abstraction layer that supports: (1) redirection of SYSLOG outpout.
|
||||
This is usually so that you can boot with one SYSLOG output but
|
||||
transition to another SYSLOG output when the OS has initialialized,
|
||||
(2) adds common serialization of interrupt output as a configuration
|
||||
option. Without this configuration setting, interrupt level output
|
||||
will be asynchronous. And (3) vsyslog is now a system call and is
|
||||
usable with other-than-FLAT builds (2016-06-19).
|
||||
* TCP Networking: While working with version 7.10 I discovered a
|
||||
problem in TCP stack that could be observed on high network load.
|
||||
Generally speaking, the problem is that RST flag is set in
|
||||
unnecessary case, in which between loss of some TCP packet and its
|
||||
proper retransmission, another packets had been successfully sent.
|
||||
The scenario is as follows: NuttX did not receive ACK for some
|
||||
sent packet, so it has been probably lost somewhere. But before
|
||||
its retransmission starts, NuttX is correctly issuing next TCP
|
||||
packets, with sequence numbers increasing properly. When the
|
||||
retransmission of previously lost packet finally succeeds, tcp_input
|
||||
receives the accumulated ACK value, which acknowledges also the
|
||||
packets sent in the meantime (i.e. between unsuccessful sending of
|
||||
lost packet and its proper retransmission). However, variable unackseq
|
||||
is still set to conn->isn + conn->sent, which is truth only if no
|
||||
further packets transmission occurred in the meantime. Because of
|
||||
incorrect (in such specific case) unackseq value, few lines further
|
||||
condition if (ackseq <= unackseq)is not met, and, as a result, we
|
||||
are going to reset label. From Jakub Łągwa (2016-06-20).
|
||||
* SYSLOG: Remove lowsyslog(), vlowsyslog(), and associated macros
|
||||
*llinfo(), *llwarn(), and llerr(). In the redesigned syslog() logic,
|
||||
these serve no purpose (2016-06-20).
|
||||
* Make system: Need to build the drivers/ directory even it file
|
||||
descriptors are not supported. There are things in the drivers/
|
||||
directory that are still needed (like SYSLOG logic) (2016-06-20).
|
||||
* assert.h: Define static assert for C++ usage. From Paul Alexander
|
||||
Patience (2016-06-21).
|
||||
* arch/arm/src/stm32l4: Add ioctls to set/get bit timing in stm32l4.
|
||||
Add ioctl hooks to allow future management of can id filters. From
|
||||
Sebastien Lorquet (2016-06-21).
|
||||
* drivers/can.c: Add support for poll. From Paul Alexander Patience
|
||||
(2016-06-21).
|
||||
* drivers/syslog: Extend SYSLOG logic so that we can send SYSLOG output
|
||||
to a file. Not verified on initial commit (2016-06-21).
|
||||
* arch/arm/src/stm32l4: Add some CAN mode IOCTL calls. These will be
|
||||
useful for device autotest when the application boots. They are
|
||||
redundant with the CONFIG_CAN_LOOPBACK option, which can now just be
|
||||
interpreted as a default setting. From Sebastien Lorquet (2016-06-22).
|
||||
* drivers/syslog: syslog_dev_flush() needs to check if the inode is a
|
||||
mountpoint before calling the flush() method. Noted by David Sidrane
|
||||
(2016-06-22).
|
||||
* arch/arm/src/stm32f7: Adds SDMMC1 for stm32F7 74-75. From Lok Tep
|
||||
(2016-06-22).
|
||||
* drivers/syslog: SYSLOG character device channel will now expand LF to
|
||||
CR-LF. Controllable with a configuration option (2016-06-22).
|
||||
* arch/arm/src/stm32l4: Implementation of loopback IOCTLs. From
|
||||
Sebastien Lorquet (2016-06-22).
|
||||
* Documentation: Add SYSLOG documentation to the porting guide
|
||||
(2016-06-22).
|
||||
* configs/stm32f746g-disco: Removed knsh configuration it failed to
|
||||
refresh (via tools/refresh.sh). I assume that it is a hand-edited
|
||||
configuration and, hence, must be removed from the repository
|
||||
(2016-06-23).
|
||||
* arch/arm/arc/sam34: DAC bugfix: DACC_WPMR_WPKEY_MASK -> DACC_WPMR_WPKEY.
|
||||
Timer bugfix: Fix ops check in TCIOC_STOP. From Wolfgang Reissnegge
|
||||
(2016-06-23).
|
||||
* arch/arm/src/stm32: Port STM32L4 CAN IOCTLs to STM32. From Sebastien
|
||||
Lorquet (2016-06-24).
|
||||
* configs/Konfig:Add configuration logic to include a Kconfig file in
|
||||
each custom configuration. Includes adding a dummy custom board
|
||||
configuration directory. A consequence of this that each custom board
|
||||
directory will now need to contain a Kconfig file. NOTE also that
|
||||
the new board directory does not take effect in the configuration
|
||||
menus until the NEXT time you run 'make menuconfig' (2016-06-24).
|
||||
* drivers/ioexpander: Add support for a very simple GPIO driver. It
|
||||
supports only pre-conrigured input and output pins and only basic
|
||||
input and output operations (2016-06-24).
|
||||
* arch/arm/src/lpc43xx: Correct auto-negotiation mode in the LPC43xx
|
||||
Ethernet. From Alexander Vasiljev (2016-06-24)
|
||||
* arch/arm/src/samv7: TWIHS Driver improved and GPIO-Driver fixed for
|
||||
Open-Drain Pins
|
||||
- sam_gpioread: Now the actual line level from the pin is read back.
|
||||
This is extremely important for Open-Drain Pins, which can be used
|
||||
bidirectionally
|
||||
- Re-Implemented twi_reset-function and enhanced it so it can be
|
||||
called from inside the driver (see next point)
|
||||
- Glitch-Filter: Added a configuration option to enable the twi-built-
|
||||
in glitch filter
|
||||
- Added a "Single Master Mode": In EMC Testing the TWI-Bus got stuck
|
||||
because the TWI-Master detected a Multi-Master access (but there is
|
||||
no second master). With the option "Single Master" we detect these
|
||||
events and automatically trigger a twi_reset. We also do an
|
||||
automatic recovery if a slave got stuck (SDA stays low).
|
||||
With the above changes I²C-Bus reliability in harsh environments (eg.
|
||||
EMC) is greatly improved. The small change in the GPIO-Driver was
|
||||
necessary because otherwise you cannot read back the correct line
|
||||
status of Open-Drain Outputs and this is needed by the twi_reset
|
||||
function. From Michael Spahlinger (2016-06-24)
|
||||
|
||||
+6
-3
@@ -59,7 +59,10 @@ endif
|
||||
#
|
||||
# FSDIRS depend on file descriptor support; NONFSDIRS do not (except for parts
|
||||
# of FSDIRS). We will exclude FSDIRS from the build if file descriptor
|
||||
# support is disabled
|
||||
# support is disabled. NOTE that drivers, in general, depends on file
|
||||
# descriptor support but is always built because there are other components
|
||||
# in the drivers directory that are needed even if file descriptors are not
|
||||
# supported.
|
||||
# CONTEXTDIRS include directories that have special, one-time pre-build
|
||||
# requirements. Normally this includes things like auto-generation of
|
||||
# configuration specific files or creation of configurable symbolic links
|
||||
@@ -69,8 +72,8 @@ endif
|
||||
# be cleaned to prevent garbage from collecting in them when changing
|
||||
# configurations.
|
||||
|
||||
NONFSDIRS = sched configs $(ARCH_SRC) $(NUTTX_ADDONS)
|
||||
FSDIRS = fs drivers binfmt
|
||||
NONFSDIRS = sched drivers configs $(ARCH_SRC) $(NUTTX_ADDONS)
|
||||
FSDIRS = fs binfmt
|
||||
CONTEXTDIRS = $(APPDIR)
|
||||
USERDIRS =
|
||||
OTHERDIRS = lib
|
||||
|
||||
+81
-27
@@ -8,7 +8,7 @@
|
||||
<tr align="center" bgcolor="#e4e4e4">
|
||||
<td>
|
||||
<h1><big><font color="#3c34ec"><i>NuttX RTOS</i></font></big></h1>
|
||||
<p>Last Updated: April 12, 2016</p>
|
||||
<p>Last Updated: June 1, 2016</p>
|
||||
</td>
|
||||
</tr>
|
||||
</table>
|
||||
@@ -1340,11 +1340,11 @@
|
||||
<h2>Released Versions</h2>
|
||||
<p>
|
||||
In addition to the ever-changing GIT repository, there are frozen released versions of NuttX available.
|
||||
The current release is NuttX 7.15.
|
||||
NuttX 7.15 is the 115<sup>th</sup> release of NuttX.
|
||||
It was released on March 27, 2016, and is available for download from the
|
||||
The current release is NuttX 7.16.
|
||||
NuttX 7.16 is the 116<sup>th</sup> release of NuttX.
|
||||
It was released on June 1, 2016, and is available for download from the
|
||||
<a href="https://bitbucket.org/nuttx/nuttx/downloads/">Bitbucket.org</a> website.
|
||||
Note that the release consists of two tarballs: <code>nuttx-7.15.tar.gz</code> and <code>apps-7.15.tar.gz</code>.
|
||||
Note that the release consists of two tarballs: <code>nuttx-7.16.tar.gz</code> and <code>apps-7.16.tar.gz</code>.
|
||||
Both may be needed (see the top-level <code>nuttx/README.txt</code> file for build information).
|
||||
</p>
|
||||
|
||||
@@ -1353,7 +1353,7 @@
|
||||
<ul>
|
||||
<li><b>nuttx</b>.
|
||||
<ul><p>
|
||||
Release notes for NuttX 7.15 are available <a href="https://bitbucket.org/nuttx/nuttx/downloads/">here</a>.
|
||||
Release notes for NuttX 7.16 are available <a href="https://bitbucket.org/nuttx/nuttx/downloads/">here</a>.
|
||||
Release notes for all released versions on NuttX are available in the <a href="https://bitbucket.org/nuttx/nuttx/src/master/ReleaseNotes" target="_blank">Bitbucket GIT</a>.
|
||||
The ChangeLog for all releases of NuttX is available in the ChangeLog file that can viewed in the <a href="https://bitbucket.org/nuttx/nuttx/src/master/ChangeLog" target="_blank">Bitbucket GIT</a>.
|
||||
The ChangeLog for the current release is at the bottom of that file.
|
||||
@@ -1361,7 +1361,7 @@
|
||||
</li></ul>
|
||||
<li><b>apps</b>.
|
||||
<ul><p>
|
||||
Release notes for NuttX 7.15 are available <a href="https://bitbucket.org/nuttx/apps/downloads/">here</a>.
|
||||
Release notes for NuttX 7.16 are available <a href="https://bitbucket.org/nuttx/apps/downloads/">here</a>.
|
||||
Release notes for all released versions on NuttX are available in the <a href="https://bitbucket.org/nuttx/nuttx/src/master/ReleaseNotes" target="_blank">Bitbucket GIT</a>
|
||||
The ChangeLog for the all releases of <code>apps/</code> is available in the ChangeLog file that can viewed in the <a href="https://bitbucket.org/nuttx/apps/src/master/ChangeLog.txt" target="_blank">Bitbucket GIT</a>.
|
||||
The ChangeLog for the current release is at the bottom of that file.
|
||||
@@ -1418,8 +1418,8 @@
|
||||
<li><a href="#armcortexa9">ARM Cortex-A9</a> (1)</li>
|
||||
<li><a href="#armcortexr4">ARM Cortex-R4</a> (1)</li>
|
||||
<li><a href="#armcortexm0">ARM Cortex-M0/M0+</a> (7)</li>
|
||||
<li><a href="#armcortexm3">ARM Cortex-M3</a> (34)</li>
|
||||
<li><a href="#armcortexm4">ARM Cortex-M4</a> (28)</li>
|
||||
<li><a href="#armcortexm3">ARM Cortex-M3</a> (35)</li>
|
||||
<li><a href="#armcortexm4">ARM Cortex-M4</a> (29)</li>
|
||||
<li><a href="#armcortexm7">ARM Cortex-M7</a> (4)</li>
|
||||
</ul>
|
||||
<li>Atmel AVR
|
||||
@@ -2257,7 +2257,7 @@
|
||||
<td>
|
||||
<p>
|
||||
<a name="freescaleimx6"><b>NXP/Freescale i.MX6</b>.</a>
|
||||
A port is underway for the following i.MX6 board
|
||||
The basic port has been completed for the following i.MX6 board
|
||||
<p>
|
||||
<ul>
|
||||
<li>
|
||||
@@ -2268,9 +2268,13 @@
|
||||
</p>
|
||||
<p>
|
||||
<b>STATUS:</b>
|
||||
The basic, minimal port is code complete and introduced in NuttX-7.15, but has not yet been tested.
|
||||
I am still waiting for the reciept of the Sabre board.
|
||||
Expect to see the verified Sabre-6Quad support (with SMP!) in NuttX-7.16.
|
||||
The basic, minimal port is code complete and introduced in NuttX-7.15, but had not yet been tested at that time due to the inavailability of hardware.
|
||||
This basic port was verified in the NuttX-7.16 release, however.
|
||||
The port is still mininal and more device drivers are needed to make the port usable.
|
||||
</p>
|
||||
<p>
|
||||
Basic support of NuttX running in SMP mode on the i.MX6Q was also accomplished in NuttX-7.16.
|
||||
However, there are still known issues with SMP support on this platform as described in the <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/sabre-6quad/README.txt" target="_blank">README</a> file for the board.
|
||||
</p>
|
||||
</li>
|
||||
</ul>
|
||||
@@ -2907,13 +2911,26 @@ nsh>
|
||||
<td>
|
||||
<p>
|
||||
<a name="stm32f103cx"><b>STMicro STM32F103C4/8 (STM32 F1 Low- and Medium-Density Family)</b>.</a>
|
||||
This port is for "STM32 Tiny" development board.
|
||||
This board is available from several vendors on the net, and may be sold under different names.
|
||||
It is based on a STM32 F103C8T6 MCU, and is bundled with a nRF24L01 wireless communication module.
|
||||
There are two ports available for this family:
|
||||
</p>
|
||||
<ul>
|
||||
<p>
|
||||
<b>STATUS:</b>
|
||||
<li>
|
||||
<p>
|
||||
One port is for "STM32 Tiny" development board.
|
||||
This board is available from several vendors on the net, and may be sold under different names.
|
||||
It is based on a STM32 F103C8T6 MCU, and is bundled with a nRF24L01 wireless communication module.
|
||||
</p>
|
||||
</li>
|
||||
<li>
|
||||
<p>
|
||||
The other port is for a generic minimual STM32F103CBT6 "blue" board contributed by Alan Carvalho de Assis.
|
||||
</p>
|
||||
</li>
|
||||
</ul>
|
||||
<p>
|
||||
<b>STATUS:</b>
|
||||
</p1>
|
||||
<ul>
|
||||
The basic STM32F103C8 port was released in NuttX version 6.28.
|
||||
This work was contributed by Laurent Latil.
|
||||
Refer to the NuttX board <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm32_tiny/README.txt" target="_blank">README</a> file for further information.
|
||||
@@ -3160,11 +3177,17 @@ nsh>
|
||||
</ul>
|
||||
</p>
|
||||
<ul>
|
||||
<b>STATUS:</b>
|
||||
The peripherals of the STM32 F2 family are compatible with the STM32 F4 family.
|
||||
See discussion of the STM3240G-EVAL board below for further information.
|
||||
Refer also to the NuttX board <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm3220g-eval/README.txt" target="_blank">README</a> file for further information.
|
||||
</ul>
|
||||
<p>
|
||||
<b>STATUS:</b>
|
||||
The peripherals of the STM32 F2 family are compatible with the STM32 F4 family.
|
||||
See discussion of the STM3240G-EVAL board below for further information.
|
||||
Refer also to the NuttX board <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm3220g-eval/README.txt" target="_blank">README</a> file for further information.
|
||||
</p>
|
||||
<p>
|
||||
Support for both the IAR and uVision GCC IDEs added for the STM3220G-EVAL board in NuttX 7.16.
|
||||
From Kha Vo.
|
||||
</p>
|
||||
</ul>
|
||||
</td>
|
||||
</tr>
|
||||
<tr>
|
||||
@@ -3779,6 +3802,10 @@ nsh>
|
||||
In Nutt-7.7, Marco Krahl included support for a framebuffer based driver using the LTDC and DMA2D.
|
||||
Marcos's implementation included extensions to support more advance LTDC functions through an auxiliary interface.
|
||||
</li>
|
||||
<li>
|
||||
Support for the uVision GCC IDE added for theSTM32F429I-Discovery board in NuttX 7.16.
|
||||
From Kha Vo.
|
||||
</li>
|
||||
</ul>
|
||||
<p>
|
||||
Refer to the STM32F429I-Discovery board <a href="https://bitbucket.org/nuttx/nuttx/configs/src/master/stm32f429i-disco/README.txt" target="_blank">README</a> file for further information.
|
||||
@@ -3853,6 +3880,15 @@ nsh>
|
||||
<li>UART, USART, Serial Console</li>
|
||||
<li>GPIO, DMA, I2C, RNG, SPI</li>
|
||||
</ul>
|
||||
<p>
|
||||
<b>NuttX-7.16</b>.
|
||||
Additional drivers were contributed:
|
||||
</p>
|
||||
<ul>
|
||||
<li>QSPI with DMA and memory mapped support. From Dave (ziggurat29).</li>
|
||||
<li>CAN contributed by Sebastien Lorquet.</li>
|
||||
<li>I2C made functional by Dave (ziggurat29).</li>
|
||||
</ul>
|
||||
</td>
|
||||
</tr>
|
||||
|
||||
@@ -3968,6 +4004,13 @@ nsh>
|
||||
The NXP WaveShare LPC4337-WS port is was contributed by Lok Tep and first released in NuttX-7.14.
|
||||
</p>
|
||||
</li>
|
||||
<li>
|
||||
<p><b>NuttX-7.16</b>
|
||||
Support for the LPC4337JET100 chip was contribed by Alexander Vasiljev.
|
||||
Alexander also contributed an LPC43xx AES driver available in NuttX-7.16.
|
||||
</p>
|
||||
</li>
|
||||
|
||||
</ul>
|
||||
</td>
|
||||
</tr>
|
||||
@@ -4407,13 +4450,24 @@ Mem: 29232 5920 23312 23312
|
||||
<td>
|
||||
<p>
|
||||
<a name="stm32f74x"><b>STMicro STM32 F745/F746</b>.</a>
|
||||
This port uses the STMicro STM32F746G-DISCO development board featuring the STM32F746NGH6 MCU. The STM32F746NGH6 is a 216MHz Cortex-M7 operation with 1024Kb Flash.
|
||||
Refer to the <a href="http://www.st.com/stm32f7-discovery">STMicro web site</a> for further information about this board.
|
||||
Two boards are supported for this MCU:
|
||||
</p>
|
||||
<ul>
|
||||
<p>
|
||||
<b>STATUS:</b>
|
||||
The basic port is complete and there are two, verified configurations available.
|
||||
<b>STM32F746G Discovery</b>.
|
||||
One port uses the STMicro STM32F746G-DISCO development board featuring the STM32F746NGH6 MCU. The STM32F746NGH6 is a 216MHz Cortex-M7 operation with 1024Kb Flash.
|
||||
Refer to the <a href="http://www.st.com/stm32f7-discovery">STMicro web site</a> for further information about this board.
|
||||
</p>
|
||||
<p>
|
||||
A basic port for the Nucleo-144 board with the STM32F746ZG MCU was contribued in NuttX-7.16 by Kconstantin Berezenko.
|
||||
</p>
|
||||
</ul>
|
||||
<p>
|
||||
<b>STATUS:</b>
|
||||
</p>
|
||||
<ul>
|
||||
<p>
|
||||
The basic STM32F746G-DISCO port is complete and there are two, verified configurations available.
|
||||
Both configurations use the NuttShell (NSH) and a serial console; one includes Ethernet support.
|
||||
DMA supports is available.
|
||||
The STM32 F7 peripherals are very similar to some members of the STM32 F4 and additional drivers can easily be ported the F7 as discussed in this Wiki page: <a href="http://www.nuttx.org/doku.php?id=wiki:howtos:port-drivers_stm32f7">Porting Drivers to the STM32 F7</a>
|
||||
|
||||
@@ -162,10 +162,10 @@
|
||||
Pre-processor Definitions
|
||||
</li>
|
||||
<li>
|
||||
Private Types
|
||||
Private Types (definitions)
|
||||
</li>
|
||||
<li>
|
||||
Private Function Prototypes
|
||||
Private Function Prototypes (declarations)
|
||||
</li>
|
||||
<li>
|
||||
Private Data (definitions)
|
||||
@@ -191,7 +191,7 @@
|
||||
Pre-processor Definitions
|
||||
</li>
|
||||
<li>
|
||||
Public Types
|
||||
Public Types (definitions)
|
||||
</li>
|
||||
<li>
|
||||
Public Data (declarations)
|
||||
@@ -212,12 +212,12 @@
|
||||
</p>
|
||||
<p>
|
||||
<a name="idempotence"><b>Header File Idempotence</b></a>.
|
||||
C header file must protect against multipleinclusion through the use of macros that "guard" against multiple definitions if the header file is included multiple times.
|
||||
C header file must protect against multiple inclusion through the use of macros that "guard" against multiple definitions if the header file is included multiple times.
|
||||
</p>
|
||||
<ul>
|
||||
<li>
|
||||
<p>
|
||||
Each header file must contain the following pre-processor commands near the beginning of the header file: Between the file header and the "Included Files" block comment.
|
||||
Each header file must contain the following pre-processor conditional logic near the beginning of the header file: Between the file header and the "Included Files" block comment.
|
||||
For example,
|
||||
</p>
|
||||
<ul><pre>
|
||||
@@ -248,7 +248,7 @@
|
||||
|
||||
<p>
|
||||
<b>Deoxygen Information</b>.
|
||||
NuttX does not use Deoxygen for documentation and no file should contain Doxygen tags.
|
||||
NuttX does not use Deoxygen for documentation and no file should contain Doxygen tags or Doxygen style comments.
|
||||
</p>
|
||||
|
||||
<p>
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -8755,9 +8755,8 @@ FAR void *mmap(FAR void *start, size_t length, int prot, int flags, int fd, off_
|
||||
</table>
|
||||
|
||||
<p>
|
||||
NuttX includes a simple interface layer based on uIP (see <a href="http://www.sics.se/~adam/uip/index.php/Main_Page">http://www.sics.se</a>).
|
||||
NuttX supports subset of a standard socket interface to uIP.
|
||||
These network feature can be enabled by settings in the architecture <a href="NuttXConfigVariables.html">configuration file</a>.
|
||||
NuttX supports a BSD-compatible socket interface layer.
|
||||
These socket interface can be enabled by settings in the architecture <a href="NuttXConfigVariables.html">configuration file</a>.
|
||||
Those socket APIs are discussed in the following paragraphs.
|
||||
</p>
|
||||
<ul>
|
||||
|
||||
@@ -125,7 +125,7 @@
|
||||
</p>
|
||||
<ul>
|
||||
<li><code>CONFIG_USBDEV_TRACE</code>, or</li>
|
||||
<li><code>CONFIG_DEBUG and CONFIG_DEBUG_USB</code></li>
|
||||
<li><code>CONFIG_DEBUG_FEATURES and CONFIG_DEBUG_USB</code></li>
|
||||
</ul>
|
||||
<p><b>Log Data Sink</b>.
|
||||
The logged data itself may go to either (1) an internal circular buffer, or (2) may be provided on the console.
|
||||
@@ -137,7 +137,7 @@
|
||||
Here is an example of USB trace output using <code>apps/examples/usbserial</code> for an LPC1768 platform with the following NuttX configuration settings:
|
||||
</p>
|
||||
<ul>
|
||||
<li><code>CONFIG_DEBUG</code>, <code>CONFIG_DEBUG_VERBOSE</code>, <code>CONFIG_USB</code>
|
||||
<li><code>CONFIG_DEBUG_FEATURES</code>, <code>CONFIG_DEBUG_INFO</code>, <code>CONFIG_USB</code>
|
||||
<li><code>CONFIG_EXAMPLES_USBSERIAL_TRACEINIT</code>, <code>CONFIG_EXAMPLES_USBSERIAL_TRACECLASS</code>,
|
||||
<code>CONFIG_EXAMPLES_USBSERIAL_TRACETRANSFERS</code>, <code>CONFIG_EXAMPLES_USBSERIAL_TRACECONTROLLER</code>,
|
||||
<code>CONFIG_EXAMPLES_USBSERIAL_TRACEINTERRUPTS</code>
|
||||
|
||||
+7
-4
@@ -45,6 +45,12 @@
|
||||
NUTTXLIBS = lib$(DELIM)libsched$(LIBEXT)
|
||||
USERLIBS =
|
||||
|
||||
# Driver support. Generally depends on file descriptor support but there
|
||||
# are some components in the drivers directory that are needed even if file
|
||||
# descriptors are not supported.
|
||||
|
||||
NUTTXLIBS += lib$(DELIM)libdrivers$(LIBEXT)
|
||||
|
||||
# Add libraries for board support
|
||||
|
||||
NUTTXLIBS += lib$(DELIM)libconfigs$(LIBEXT)
|
||||
@@ -89,11 +95,8 @@ ifeq ($(CONFIG_NFILE_DESCRIPTORS),0)
|
||||
ifneq ($(CONFIG_NSOCKET_DESCRIPTORS),0)
|
||||
NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT)
|
||||
endif
|
||||
ifeq ($(CONFIG_NET),y)
|
||||
NUTTXLIBS += lib$(DELIM)libdrivers$(LIBEXT)
|
||||
endif
|
||||
else
|
||||
NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT) lib$(DELIM)libdrivers$(LIBEXT) lib$(DELIM)libbinfmt$(LIBEXT)
|
||||
NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT) lib$(DELIM)libbinfmt$(LIBEXT)
|
||||
endif
|
||||
|
||||
# Add libraries for the NX graphics sub-system
|
||||
|
||||
+7
-4
@@ -45,6 +45,12 @@
|
||||
NUTTXLIBS = lib$(DELIM)libsched$(LIBEXT)
|
||||
USERLIBS =
|
||||
|
||||
# Driver support. Generally depends on file descriptor support but there
|
||||
# are some components in the drivers directory that are needed even if file
|
||||
# descriptors are not supported.
|
||||
|
||||
NUTTXLIBS += lib$(DELIM)libdrivers$(LIBEXT)
|
||||
|
||||
# Add libraries for board support
|
||||
|
||||
NUTTXLIBS += lib$(DELIM)libconfigs$(LIBEXT)
|
||||
@@ -83,11 +89,8 @@ ifeq ($(CONFIG_NFILE_DESCRIPTORS),0)
|
||||
ifneq ($(CONFIG_NSOCKET_DESCRIPTORS),0)
|
||||
NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT)
|
||||
endif
|
||||
ifeq ($(CONFIG_NET),y)
|
||||
NUTTXLIBS += lib$(DELIM)libdrivers$(LIBEXT)
|
||||
endif
|
||||
else
|
||||
NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT) lib$(DELIM)libdrivers$(LIBEXT) lib$(DELIM)libbinfmt$(LIBEXT)
|
||||
NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT) lib$(DELIM)libbinfmt$(LIBEXT)
|
||||
endif
|
||||
|
||||
# Add libraries for the NX graphics sub-system
|
||||
|
||||
+6
-6
@@ -480,22 +480,22 @@ pass2dep: context tools/mkdeps$(HOSTEXEEXT) tools/cnvwindeps$(HOSTEXEEXT)
|
||||
# location: http://ymorin.is-a-geek.org/projects/kconfig-frontends. See
|
||||
# README.txt file in the NuttX tools GIT repository for additional information.
|
||||
|
||||
config: apps_preconfig
|
||||
config: context apps_preconfig
|
||||
$(Q) APPSDIR=${CONFIG_APPS_DIR} kconfig-conf Kconfig
|
||||
|
||||
oldconfig: apps_preconfig
|
||||
oldconfig: context apps_preconfig
|
||||
$(Q) APPSDIR=${CONFIG_APPS_DIR} kconfig-conf --oldconfig Kconfig
|
||||
|
||||
olddefconfig: apps_preconfig
|
||||
olddefconfig: context apps_preconfig
|
||||
$(Q) APPSDIR=${CONFIG_APPS_DIR} kconfig-conf --olddefconfig Kconfig
|
||||
|
||||
menuconfig: apps_preconfig
|
||||
menuconfig: context apps_preconfig
|
||||
$(Q) APPSDIR=${CONFIG_APPS_DIR} kconfig-mconf Kconfig
|
||||
|
||||
qconfig: apps_preconfig
|
||||
qconfig: context apps_preconfig
|
||||
$(Q) APPSDIR=${CONFIG_APPS_DIR} kconfig-qconf Kconfig
|
||||
|
||||
gconfig: apps_preconfig
|
||||
gconfig: context apps_preconfig
|
||||
$(Q) APPSDIR=${CONFIG_APPS_DIR} kconfig-gconf Kconfig
|
||||
|
||||
# export
|
||||
|
||||
+5
-5
@@ -480,16 +480,16 @@ pass2dep: context tools\mkdeps$(HOSTEXEEXT)
|
||||
# location: http://ymorin.is-a-geek.org/projects/kconfig-frontends. See
|
||||
# misc\tools\README.txt for additional information.
|
||||
|
||||
config: apps_preconfig
|
||||
config: context apps_preconfig
|
||||
$(Q) set APPSDIR=$(patsubst "%",%,${CONFIG_APPS_DIR})& kconfig-conf Kconfig
|
||||
|
||||
oldconfig: apps_preconfig
|
||||
$(Q) set APPSDIR=$(patsubst "%",%,${CONFIG_APPS_DIR})& kconfig-conf --oldconfig Kconfig
|
||||
oldconfig: context apps_preconfig
|
||||
$(Q) context set APPSDIR=$(patsubst "%",%,${CONFIG_APPS_DIR})& kconfig-conf --oldconfig Kconfig
|
||||
|
||||
olddefconfig: apps_preconfig
|
||||
olddefconfig: context apps_preconfig
|
||||
$(Q) set APPSDIR=$(patsubst "%",%,${CONFIG_APPS_DIR})& kconfig-conf --olddefconfig Kconfig
|
||||
|
||||
menuconfig: configenv apps_preconfig
|
||||
menuconfig: context configenv apps_preconfig
|
||||
$(Q) set APPSDIR=$(patsubst "%",%,${CONFIG_APPS_DIR})& kconfig-mconf Kconfig
|
||||
|
||||
# export
|
||||
|
||||
+7
-4
@@ -45,6 +45,12 @@
|
||||
NUTTXLIBS = lib$(DELIM)libsched$(LIBEXT)
|
||||
USERLIBS =
|
||||
|
||||
# Driver support. Generally depends on file descriptor support but there
|
||||
# are some components in the drivers directory that are needed even if file
|
||||
# descriptors are not supported.
|
||||
|
||||
NUTTXLIBS += lib$(DELIM)libdrivers$(LIBEXT)
|
||||
|
||||
# Add libraries for board support
|
||||
|
||||
NUTTXLIBS += lib$(DELIM)libconfigs$(LIBEXT)
|
||||
@@ -89,11 +95,8 @@ ifeq ($(CONFIG_NFILE_DESCRIPTORS),0)
|
||||
ifneq ($(CONFIG_NSOCKET_DESCRIPTORS),0)
|
||||
NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT)
|
||||
endif
|
||||
ifeq ($(CONFIG_NET),y)
|
||||
NUTTXLIBS += lib$(DELIM)libdrivers$(LIBEXT)
|
||||
endif
|
||||
else
|
||||
NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT) lib$(DELIM)libdrivers$(LIBEXT) lib$(DELIM)libbinfmt$(LIBEXT)
|
||||
NUTTXLIBS += lib$(DELIM)libfs$(LIBEXT) lib$(DELIM)libbinfmt$(LIBEXT)
|
||||
endif
|
||||
|
||||
# Add libraries for the NX graphics sub-system
|
||||
|
||||
+11
-7
@@ -960,10 +960,13 @@ Native Windows Build
|
||||
In this build, you cannot use a Cygwin or MSYS shell. Rather the build must
|
||||
be performed in a Windows console window. Here is a better terminal than the
|
||||
standard issue, CMD.exe terminal: ConEmu which can be downloaded from:
|
||||
http://code.google.com/p/conemu-maximus5/
|
||||
https://sourceforge.net/projects/conemu/ or https://conemu.github.io/ .
|
||||
|
||||
Build Tools. The build still relies on some Unix-like commands. I use
|
||||
the GNUWin32 tools that can be downloaded from http://gnuwin32.sourceforge.net/.
|
||||
the GNUWin32 tools that can be downloaded from http://gnuwin32.sourceforge.net/
|
||||
using the 'Download all' selection. Individual packages can be download
|
||||
instead if you know what you are doing and want a faster download (No, I
|
||||
can't tell you which packages you should or should not download).
|
||||
|
||||
Host Compiler: I use the MingGW GCC compiler which can be downloaded from
|
||||
http://www.mingw.org/. If you are using GNUWin32, then it is recommended
|
||||
@@ -971,12 +974,13 @@ Native Windows Build
|
||||
|
||||
This capability should still be considered a work in progress because:
|
||||
|
||||
(1) It has not been verified on all targets and tools, and
|
||||
(2) it still lacks some of the creature-comforts of the more mature environments.
|
||||
(1) It has not been verified on all targets and tools, and
|
||||
(2) it still lacks some of the creature-comforts of the more mature
|
||||
environments.
|
||||
|
||||
There is an alternative to the setenv.sh script available for the Windows
|
||||
native environment: tools/configure.bat. See tools/README.txt for additional
|
||||
information.
|
||||
There is an alternative to the setenv.sh script available for the Windows
|
||||
native environment: tools/configure.bat. See tools/README.txt for additional
|
||||
information.
|
||||
|
||||
Installing GNUWin32
|
||||
-------------------
|
||||
|
||||
+364
-1
@@ -5303,7 +5303,8 @@ Additional new features and extended functionality:
|
||||
can be re-enabled if needed via configuration option.
|
||||
- NXFFS: Make the start up scan of the media a configuration option.
|
||||
It just takes to long and is not really necessary! Those rare cases
|
||||
where the scan was helpful can be fixed using flash_eraseall().
|
||||
where the scan was helpful can be fixed using MDIOC_BULKERASE IOCTL
|
||||
command.
|
||||
|
||||
* General Drivers:
|
||||
|
||||
@@ -10716,3 +10717,365 @@ detailed bugfix information):
|
||||
- Moved C++ initialization logic out of the RTOS and into the
|
||||
application space, specifically to apps/platform/board, where it
|
||||
belongs.
|
||||
|
||||
NuttX-7.16 Release Notes
|
||||
------------------------
|
||||
|
||||
The 116th release of NuttX, Version 7.16, was made on June 1, 2016,
|
||||
and is available for download from the Bitbucket.org website. Note
|
||||
that release consists of two tarballs: nuttx-7.16.tar.gz and
|
||||
apps-7.16.tar.gz. These are available from:
|
||||
|
||||
https://bitbucket.org/nuttx/nuttx/downloads
|
||||
https://bitbucket.org/nuttx/apps/downloads
|
||||
|
||||
Both may be needed (see the top-level nuttx/README.txt file for build
|
||||
information).
|
||||
|
||||
Additional new features and extended functionality:
|
||||
|
||||
* Core OS:
|
||||
|
||||
- Power Management: Add activity domain to all PM interfaces and
|
||||
driver callbacks. If CONFIG_PM_NDOMAINS == 1, then the legacy
|
||||
behavior is preserved. If CONFIG_PM_NDOMAINS > 1, then multiple
|
||||
PM domains are supported. This will allow separate control for
|
||||
certain power management groups. For example, a network can be
|
||||
shut down without affect an ongoing UI (and vice versa).
|
||||
- board_app_initialize(): board_app_initialize() now accepts an
|
||||
argument that may be used to support initialization in different
|
||||
configurations.
|
||||
|
||||
* File System and Block and MTD Drivers:
|
||||
|
||||
- N25Qxxx: Add MTD support for Micron N25Qxxx family of QSPI flash.
|
||||
From Dave (ziggurat29).
|
||||
- SST26F: Add an MTD driver for SST26F spi/qspi flash devices (SPI
|
||||
mode only). From Sebastien Lorquet.
|
||||
- File Descriptor Detach: Add logic to detach a file structure from a
|
||||
file descriptor. This is for use only within the OS. It permits an
|
||||
open file or driver to be used across multiple threads.
|
||||
|
||||
* Networking and Network Drivers:
|
||||
|
||||
- listen()/accept(): Separate out psock_listen() and psock_accepti()
|
||||
for internal, thread independent OS usage (i.e., without a socket
|
||||
descriptor).
|
||||
- VNC Server: Add support for a VNC server. This logic is code
|
||||
complete and functional, but not well tested.
|
||||
|
||||
* Graphics and Graphic Drivers:
|
||||
|
||||
- Framebuffer driver: Add a display number to each interface in order
|
||||
to support multiple display devices.
|
||||
- VNC Server: Add support for a VNC server. This logic is code
|
||||
complete and functional, but not well tested.
|
||||
- LCD Backpack: Add support for PCF8574 LCD Backpack driver. This
|
||||
driver supports an interface board that is based on the PCF8574 I/O
|
||||
expander and supports the HD44780-based (or compatible) LCD modules.
|
||||
There are a myriad of different vendors of such, but they are
|
||||
principally the same, save wiring and minor features like jumpers
|
||||
for I2C addresses. This driver supports known and unknown variants.
|
||||
From Dave (ziggurat29).
|
||||
|
||||
* Common Device Drivers:
|
||||
|
||||
- RTC: Simplify the RTC interface. The old interface was way too
|
||||
complex and was not fully implemented anywhere.
|
||||
- BH1750FVI: Add a character driver for Rohm Ambient Light Sensor
|
||||
BH1750FVI. From Alan Carvalho de Assis.
|
||||
- CAN: Improve CAN error reporting. From Frank Benkert.
|
||||
- aes.h: Modifications to the crypto API needed for LPC43xx. From
|
||||
Alexander Vasiljev.
|
||||
- ADC: Interface no longer uses global adc_receive() call. Added a
|
||||
new bind() method to the ADC interface. Now the ADC upper half
|
||||
driver will register its receipt-of-data callback. This change
|
||||
allows the ADC lower half driver to be used with a differ ADC upper
|
||||
half.
|
||||
|
||||
* Simulation Platform:
|
||||
|
||||
- Linux Host Networking: Enhance networking support for the
|
||||
simulation under Linux. Includes updated support for Linux TUN/TAP,
|
||||
and the addition of support for Linux bridge devices. From Steve.
|
||||
|
||||
* ARMv7-A, ARMv7-R, and ARMv7-M:
|
||||
|
||||
- ARMv7-M: Convert more assembly language files for use with the IAR
|
||||
toolchain. From Kha Vo.
|
||||
- ARMv7-A: Complete re-design of SMP-related logic to initialize each
|
||||
CPUn, n > 0, when CONFIG_SMP=y.
|
||||
|
||||
* Atmel SAMV7:
|
||||
|
||||
- Add a JTAG config and ERASE config to Kconfig to set the
|
||||
CCFG_SYSIO SYSIO Pins. From David Sidrane.
|
||||
- System Reset: Add the up_systemreset interface to the samv7 arch. The
|
||||
approach is slightly different in that: 1) It enables ARCH_HAVE_RESET
|
||||
and allows the user to set if, and for how long, to drive External
|
||||
nRST signal. It also does not contain a default board_reset, as that
|
||||
really should be done in the config's src if CONFIG_BOARDCTL_RESET
|
||||
is defined. From David Sidrane.
|
||||
|
||||
* Atmel SAMV7 Boards:
|
||||
|
||||
- SAMV71-XULT: Add configuration(s) that were be used to verify VNC
|
||||
graphics output as well as mouse and keyboard input.
|
||||
|
||||
* NXP Freescale i.MX6 Boards:
|
||||
|
||||
- Sabre-6Quad: The basic i.MX6 port is complete. This is a minimal
|
||||
port at present and probably still has some as-of-yet-undiscovered
|
||||
issues.
|
||||
- Sabre-6Quad: Basic SMP NSH configuration is now working. But this
|
||||
is probably only because the SMP test case does not stress the
|
||||
logic. There are know outstanding SMP issues as noted in the
|
||||
Sabre-6Quad README.txt file.
|
||||
|
||||
* NXP Freescale LPC43xx:
|
||||
|
||||
- LPC4337jet100: Add definitions for the LPC4337jet100 chip. From
|
||||
Alexander Vasiljev.
|
||||
|
||||
* NXP Freescale LPC43xx Drivers:
|
||||
|
||||
- AES: Add AES support. From Alexander Vasiljev.
|
||||
|
||||
* STMicro STM32:
|
||||
|
||||
- STM32 L4: Add configuration options to allow SRAM2 to be used for
|
||||
heap, or not at all, and to zero-initialize it on OS start, or not
|
||||
at all. From Dave dev@ziggurat29.com.
|
||||
- STM32 L4: Add support for HSE and MSI clocks, and auto trim of MSI
|
||||
to LSE (needed for USB). From Dave (ziggurat29)
|
||||
- STM32 L4: Add support for unique id function to arch; modified board
|
||||
to support unique id boardctl. From Dave (ziggurat29)
|
||||
|
||||
* STMicro STM32 Drivers:
|
||||
|
||||
- STM32 F4 RTC: Add a custom RTC driver with support for alarms. From
|
||||
Neil Hancock.
|
||||
- STM32 L4 QSPI: Add a QSPI driver with DMA support and (optional
|
||||
memory mapped mode support. From Dave ziggurat29).
|
||||
- STM32, STM32 L4, and STM32 F7 Serial: Add support for compliant
|
||||
SD-style breaks. From David Sidrane.
|
||||
- STM32 L4 CAN: Add CAN support for STM32L4. From Sebastien Lorquet.
|
||||
- STM32 1-Wire: Add support for a custom 1-wire driver. The serial
|
||||
driver already supports a 1-wire interface, but this driver uses the
|
||||
same serial logic to implement a lower half driver much like the
|
||||
I2C lower half driver. From Aleksandr Vyhovanec.
|
||||
- STM32 L4 SPI: Add support for SPI 4 and 5 on stm32f411 chips. From
|
||||
Konstantin Berezenko.
|
||||
- STM32 ADC: Allow omitting use of channels in a lower part of PWM.
|
||||
From Pierre-noel Bouteville.
|
||||
- STM32 L4 I2C: Get I2C working for STM32L4. From Dave (ziggurat29).
|
||||
|
||||
* STMicro STM32 Boards:
|
||||
|
||||
- STM3220G-EVAL: Add support for both the IAR and uVision GCC IDEs.
|
||||
From Kha Vo.
|
||||
- STM32F429I Discovery: Add support for the uVision GCC IDE. From
|
||||
Kha Vo.
|
||||
- STM32F4 Discovery: Integrate BH1750FVI driver in the STM32F4 Discovery
|
||||
board. From Alan Carvalho de Assis.
|
||||
- STM32L476VG Discovery: Add support for QSPI based N25Qxxx flash.
|
||||
From Dave (ziggurat29)
|
||||
- STM32L476VG Discovery: Add board ioctls for allowing user application
|
||||
to cause QSPI memory mapped mode to be engaged and disengaged. Also
|
||||
partitioned QSPI flash for file system and other (eventually xip).
|
||||
From Dave (ziggurat29)
|
||||
- Nucleo-144: Basic port for the Nucleo-144 board with the STM32F746ZG
|
||||
MCU. From Kconstantin Berezenko.
|
||||
- STM32F103 Minimum: Add support for this minimual STM32F103CBT6 "blue"
|
||||
board. From Alan Carvalho de Assis.
|
||||
- STM32F411E Discovery: Add basic configuration for stm32f411e-disco
|
||||
board with STM32F411VE chip. From Konstantin Berezenko.
|
||||
|
||||
* Build/Configuration System:
|
||||
|
||||
- Moved NuttX repository to https://bitbucket.org/nuttx/nuttx.
|
||||
Eliminated use of sub-modules.
|
||||
- Add support for the IAR toolchain for the limited case of the ARMv7-M
|
||||
architecture and the STM32 chip. From Aleksandr Vyhovanec.
|
||||
- make export: Pass top-level make to the script to allow -j greater
|
||||
than 1. From David Sidrane.
|
||||
- fs/Kconfig: Allow CONFIG_FS_WRITABLE to be manually selectable. This
|
||||
is needed when there are no writable file systems, but write support
|
||||
is still needed in BCH or FTL.
|
||||
- arch/*/Makefile: Add definitions that can be overrided to use GCC
|
||||
instead of LD in the final link. From Paul Alexander Patience .
|
||||
|
||||
* Applications: apps/netutils:
|
||||
|
||||
- apps/netutils/esp8266: ESP8266 driver application. From Pierre-noel
|
||||
Bouteville.
|
||||
|
||||
* Applications: apps/examples:
|
||||
|
||||
- apps/examples/alarm: Add a simple test of the ALARM iotcl calls of
|
||||
the RTC driver.
|
||||
- apps/examples/nximage: Add a configuration option to select
|
||||
greyscale.
|
||||
|
||||
* Platforms: apps/platform:
|
||||
|
||||
- apps/platform/nucleo-144: Add platform files for NUCLEO-144
|
||||
(NUCLEO-F746ZG). From Mark Olsson.
|
||||
- apps/examples/media: You can now override the default device driver
|
||||
path by providing an alternal path on the command line. From
|
||||
Sébastien Lorquet.
|
||||
|
||||
Works-In-Progress:
|
||||
|
||||
* IEEE802.14.5/6LowPAN. Hooks and framework for this effort were
|
||||
introduced in NuttX-7.15. Work has continued on this effort on
|
||||
forks from the main repositories, albeit with many interruptions.
|
||||
The completion of this wireless feature will postponed until at
|
||||
least NuttX-7.17.
|
||||
|
||||
* i.MX6 SMP. Partially functional, but there is more that still
|
||||
needs to be done.
|
||||
|
||||
Bugfixes. Only the most critical bugfixes are listed here (see the
|
||||
ChangeLog for the complete list of bugfixes and for additional, more
|
||||
detailed bugfix information):
|
||||
|
||||
* Core OS:
|
||||
|
||||
- Various places: Search for places where a stray semicolon following
|
||||
an if condition cause the if body to be executed unconditionally.
|
||||
Fixes in all SAM DMA logic, unionfs, OS signalling logic, and others.
|
||||
- enter/leave_critical_section() may attempt to access task lists
|
||||
before they have been initialized in the SMP configuration.
|
||||
|
||||
* File System/Block Drivers:
|
||||
|
||||
- SMART MTD: Return code of smart_scan not checked, can cause success
|
||||
result in failure case, leading to 'dev' pointer being invalid. From
|
||||
Dave (ziggurat29)
|
||||
- mount: Fix a backward debug assertion. Noted by David Sidrane.
|
||||
|
||||
* Common Drivers:
|
||||
|
||||
- NRF24L01: Fix backward calculation of relative frequency. Noted by
|
||||
Henry Zhang.
|
||||
- PCA9555 I/O expander: Fix an error in the PCA9555 driver: Under
|
||||
certain error conditions, interrupts were not being re-enabled.
|
||||
Sebastien Lorquet.
|
||||
- ADS1255: Must not do SPI access from interrupt handler. Use the
|
||||
worker thread instead. Must also lock the SPI bus before using it.
|
||||
- Several SPI-based drivers modified. All drivers that use SPI must
|
||||
call SPI_LOCK and SPI_UNLOCK. This is not optional.
|
||||
- MS583730: Fix a bug in crc computation for ms583730. Implement
|
||||
POSIX read.
|
||||
|
||||
* Atmel SAMV7:
|
||||
|
||||
- Fix typo in MATRIX register definitions. From Stefan Kolb.
|
||||
- SAMV7 Tickless Mode: This is a fix to a problem in the handling of
|
||||
the oneshot timer. Due to a wrong assumption concerning the behavior
|
||||
directly after the start of the timer/counter the function
|
||||
sam_oneshot_cancel(…) calculates the wrong remaining time. The code
|
||||
assumes that the counter register is zero directly after the start
|
||||
of the timer, but this is not true. To start the time/counter a
|
||||
software trigger is invoked, this trigger starts the timer/count and
|
||||
sets the counter register to zero, but the reset of the counter
|
||||
register is not performed instantly. According to the datasheet:
|
||||
"The counter can be reset by a trigger. In this case, the counter
|
||||
value passes to zero on the next valid edge of the selected clock."
|
||||
Thus the counter is set to zero between 0 and USEC_PER_TICK
|
||||
microseconds after the clock was started.
|
||||
In my fix I use the freerun count value to determine if at least one
|
||||
tick passed since the start of the timer and thus if the value of
|
||||
the oneshot counter is correct. I also tried to use the function
|
||||
up_timer_gettime(…) to achieve this but, at least if compiled with
|
||||
no optimization the problem vanishes without using the value of the
|
||||
function, the function call takes too long.
|
||||
Another problem treated in the fix is that if the oneshot timer/counter
|
||||
is canceled, we only know the remaining time with a precision of
|
||||
USEC_PER_TICK microseconds. This means the calculated remaining time
|
||||
is between 0 and USEC_PER_TICK microseconds too long. To fix this I
|
||||
subtract one tick if the calculated remaining time is greater than
|
||||
one tick and otherwise set the remaining time to zero. By doing so
|
||||
the measured times are much more precise as without it. From Stefan
|
||||
Kolb.
|
||||
|
||||
* Atmel SAMA5:
|
||||
|
||||
- SAMA5: Stefan Kolb's change to the SAMV7 Oneshot Timer should also
|
||||
be applied to the SAMA5 oneshot time since the drivers are identical.
|
||||
|
||||
* Atmel SAM3/4:
|
||||
|
||||
- SAM3/4: Stefan Kolb's change to the SAMV7 Oneshot Timer should also
|
||||
be applied to the SAM3/4 oneshot time since the drivers are identical.
|
||||
|
||||
* Atmel SAMV7 Drivers:
|
||||
|
||||
- SAMV7 TWIHS (as well as SAM3/4 and SAMA5: Ensure that the TWIHS
|
||||
(i2c) hw get's its clock set when the sequence of
|
||||
sam_i2cbus_initialize(), sam_i2cbus_uninitialize(), then
|
||||
sam_i2cbus_initialize() or twi_reset() is called. I found this a
|
||||
while back in the stm32 family, so there may be more arch-es with
|
||||
this sort of bug. I suppose any driver that has the notion of "do
|
||||
not set the freq if it is already set" could be suspect. From David
|
||||
Sidrane.
|
||||
- USBHS Device: Remove disabling of whole USB on suspend of USBHS.
|
||||
This fix removes the disabling of the whole USB peripheral on
|
||||
suspend interrupt. Its enough to freeze the clock instead. When
|
||||
disabling the whole peripheral, the next wakeup-interrupt comes up
|
||||
with an disabled clocking. The unfreeze clock has no effect, because
|
||||
the master clock is disabled. This makes all registers, including
|
||||
the IDR unwriteable and the IRQ falls in an endless loop blocking
|
||||
the whole system. Furthermore the disabling of the peripheral clock
|
||||
prevents hotplugging or reconnecting the USB. From Frank Benkert.
|
||||
- MCAN: Fix missing unlock of device in MCAN mcan_txempty(). From
|
||||
Frank Benkert.
|
||||
|
||||
* STMicro STM32:
|
||||
|
||||
- STM32 L4 Clocking: Problem with resetting backup domain clears
|
||||
clocking options set up before in *rcc.c use INITS flag to avoid
|
||||
magic reg value to detect power up reset state of RTC correct a
|
||||
problem clearing interrupt flags (they weren't) which prevented an
|
||||
alarm from ever being used more than once per reset cycle. From
|
||||
Dave (ziggurat29)
|
||||
|
||||
* STMicro STM32 Drivers:
|
||||
|
||||
- STM32L4 SPI: That STM32Lr SPI driver is quite different. They now
|
||||
handle frames of arbitrary size between 4 and 16 bits. It was broken
|
||||
before a new bit has to be set (RX fifo threshold) to handle <= 8-bit
|
||||
transactions. If not set, the default is 16-bit packed >=8-bit
|
||||
frames and the RXNE bit is never set (it is set when 16-bits are
|
||||
received). weird things as always. This also add 8-bit access
|
||||
routines to the data register, because a 16-bit access to the data
|
||||
register when the frame size is below 9 bits is interpreted as a
|
||||
packed dual frame exchange. Sebastien Lorquet.
|
||||
- STM32: Correct some bad commits that broke the LTDC display example.
|
||||
From Marco Krahl.
|
||||
- STM32 F4 RTC: Fix logic in F4 RTCC driver that prevent ALARM
|
||||
interrupt. From Neil Hancock.
|
||||
- STM32 F1 ADC: Fix STM32 ValueLine ADC IRQ number selection. From
|
||||
David Sidrane.
|
||||
|
||||
* STMicro STM32 Boards:
|
||||
|
||||
- STM32F429I Discovery: Correct some bad commits that broke the LTDC
|
||||
display example. From Marco Krahl.
|
||||
|
||||
* TI Tiva:
|
||||
|
||||
- GPIO Interrupts: Fix a bug of GPIO falling-edge interrupt for tiva.
|
||||
From Young.
|
||||
|
||||
* C Library:
|
||||
|
||||
- math: Add a NAN test on 'x' in asin function of lib_asin.c. Suggested
|
||||
by Pierre-noel Bouteville.
|
||||
|
||||
* Build/Configuration System:
|
||||
|
||||
- Several Makefiles: Add .PHONY definitions to prevent 'clean up to date'
|
||||
message weirdness when 'make clean' is done with no .config or
|
||||
Make.defs file.
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
NuttX TODO List (Last updated May 28, 2016)
|
||||
NuttX TODO List (Last updated June 6, 2016)
|
||||
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
This file summarizes known NuttX bugs, limitations, inconsistencies with
|
||||
@@ -23,7 +23,7 @@ nuttx/:
|
||||
(11) Libraries (libc/, libm/)
|
||||
(11) File system/Generic drivers (fs/, drivers/)
|
||||
(8) Graphics subsystem (graphics/)
|
||||
(1) Build system / Toolchains
|
||||
(2) Build system / Toolchains
|
||||
(3) Linux/Cywgin simulation (arch/sim)
|
||||
(4) ARM (arch/arm/)
|
||||
|
||||
@@ -599,6 +599,12 @@ o Kernel/Protected Build
|
||||
For a truly secure system. Privileges need to be checked in
|
||||
every interface that permits one thread to modify the
|
||||
properties of another thread.
|
||||
|
||||
NOTE: It would be a simple matter to simply disable user
|
||||
threads from modifying privileged threads. However, you
|
||||
might also want to be able to modify privileged threads from
|
||||
user tasks with certain permissions. Permissions is a much
|
||||
more complex issue.
|
||||
Status: Open
|
||||
Priority: Low for most embedded systems but would be a critical need if
|
||||
NuttX were used in a secure system.
|
||||
@@ -1595,6 +1601,19 @@ o Build system
|
||||
Status: Open
|
||||
Priority: Low.
|
||||
|
||||
Title: NATIVE WINDOWS BUILD BROKEN
|
||||
Description: The way that apps/ no generates Kmenu files depends on changes added
|
||||
to apps/tools/mkkconfig.sh. Similar changes need to be made to
|
||||
apps/tools/mkkconfig.bat to restore the Windows Native build.
|
||||
UPDATE: The mkkconfig.bat script has been updated and appears to work.
|
||||
A native build has still not been attempted and there could likely be
|
||||
issues the carriage returns in Kconfig files. There are also some
|
||||
issues the interpreters/ficl and bas directories during 'make menuconfig'
|
||||
that still need to be investigated.
|
||||
Status: Open
|
||||
Priority: Low, since I am not aware of anyone using the Windows Native build.
|
||||
But, of course, very high if you want to use it.
|
||||
|
||||
o Other drivers (drivers/)
|
||||
^^^^^^^^^^^^^^^^^^^^^^^^
|
||||
|
||||
|
||||
@@ -58,6 +58,7 @@ config ARCH_SIM
|
||||
select ARCH_HAVE_TLS
|
||||
select ARCH_HAVE_TICKLESS
|
||||
select ARCH_HAVE_POWEROFF
|
||||
select SERIAL_CONSOLE
|
||||
---help---
|
||||
Linux/Cywgin user-mode simulation.
|
||||
|
||||
@@ -525,6 +526,7 @@ config ARCH_IRQPRIO
|
||||
config ARCH_STACKDUMP
|
||||
bool "Dump stack on assertions"
|
||||
default n
|
||||
select DEBUG_ALERT
|
||||
---help---
|
||||
Enable to do stack dumps after assertions
|
||||
|
||||
|
||||
+67
-142
@@ -134,6 +134,8 @@ src/Makefile
|
||||
|
||||
Supported Architectures
|
||||
^^^^^^^^^^^^^^^^^^^^^^^
|
||||
NOTE: nuttx/Documentation/NuttX.html for current information about the
|
||||
state of these MCU ports.
|
||||
|
||||
arch/sim - Linux/Cygwin simulation
|
||||
A user-mode port of NuttX to the x86 Linux platform is available.
|
||||
@@ -145,135 +147,68 @@ arch/arm - ARM-based micro-controllers
|
||||
This directory holds common ARM architectures. At present, this includes
|
||||
the following subdirectories:
|
||||
|
||||
arch/arm/include and arch/arm/src/common
|
||||
Common ARM/Cortex-M3 logic.
|
||||
Architecture Support
|
||||
arch/arm/include and arch/arm/src/common
|
||||
arch/arm/src/arm and arch/arm/include/arm
|
||||
arch/arm/src/armv7-a and arch/arm/include/armv7-a
|
||||
arch/arm/src/armv7-m and arch/arm/include/armv7-m
|
||||
arch/arm/src/armv7-r and arch/arm/include/armv7-4
|
||||
|
||||
arch/arm/src/arm and arch/arm/include/arm
|
||||
Common ARM-specific logic
|
||||
|
||||
arch/arm/src/armv7-m and arch/arm/include/armv7-m
|
||||
Common ARMv7-M logic (Cortex-M3 and Cortex-M4)
|
||||
|
||||
arch/arm/include/c5471 and arch/arm/src/c5471
|
||||
TI TMS320C5471 (also called TMS320DM180 or just C5471).
|
||||
NuttX operates on the ARM7 of this dual core processor. This port
|
||||
complete, verified, and included in the NuttX release 0.1.1.
|
||||
|
||||
arch/arm/include/calypso and arch/arm/src/calypso
|
||||
TI "Calypso" MCU used in various cell phones (and, in particular,
|
||||
by the Osmocom-bb project). Like the c5471, NuttX operates on the
|
||||
ARM7 of this dual core processor. This port was contributed by
|
||||
Denis Carilki and includes the work of Denis, Alan Carvalho de Assis,
|
||||
and Stefan Richter. Calypso support first appeared in NuttX-6.17.
|
||||
|
||||
arch/arm/include/dm320 and arch/arm/src/dm320
|
||||
TI TMS320DM320 (also called just DM320).
|
||||
NuttX operates on the ARM9EJS of this dual core processor. This port
|
||||
complete, verified, and included in the NuttX release 0.2.1.
|
||||
|
||||
arch/arm/include/imx and arch/arm/src/imx
|
||||
Freescale MC9328MX1 or i.MX1. This port uses the Freescale MX1ADS
|
||||
development board with a GNU arm-elf toolchain* under either Linux or Cygwin.
|
||||
STATUS: This port has stalled because of development tool issues. Coding
|
||||
is complete on the basic port (timer, serial console, SPI).
|
||||
|
||||
arch/arm/include/lm and arch/arm/src/lm
|
||||
These directories contain support for the Luminary LM3S/4F family. The
|
||||
initial, release of this port was included in NuttX version 0.4.6. The
|
||||
current port includes timer, serial console, Ethernet, SSI, and microSD
|
||||
support. There are working configurations the NuttX OS test, to run the
|
||||
NuttShell (NSH), the NuttX networking test, and the uIP web server.
|
||||
|
||||
arch/arm/include/lpc214x and arch/arm/src/lpc214x
|
||||
These directories provide support for NXP LPC214x family of
|
||||
ARM7TDMI processors. This port boots and passes the OS test (examples/ostest).
|
||||
The port is complete and verifed. As of NuttX 0.3.17, the port includes:
|
||||
timer interrupts, serial console, USB driver, and SPI-based MMC/SD card
|
||||
support. A verifed NuttShell (NSH) configuration is also available.
|
||||
|
||||
arch/arm/include/lpc2378 and arch/arm/src/lpc2378.
|
||||
NXP LPC2378. Support is provided for the NXP LPC2378 MCU. This port was
|
||||
contributed by Rommel Marcelo is was first released in NuttX-5.3.
|
||||
STATUS: This port boots and passes the OS test (examples/ostest) and
|
||||
includes a working implementation of the NuttShell (NSH). The port is
|
||||
complete and verified. As of NuttX 5.3, the port includes only basic
|
||||
timer interrupts and serial console support.
|
||||
|
||||
arch/arm/include/lpc31xx and arch/arm/src/lpc31xx
|
||||
These directories provide support for NXP LPC31xx family of
|
||||
ARM926EJ-S processors. The port for the NXP LPC3131 was first
|
||||
released in NuttX-5.1 (but was not functional until NuttX-5.2).
|
||||
STATUS: The basic EA3131 port is complete and verified in NuttX-5.2
|
||||
This basic port includes basic boot-up, serial console, and timer
|
||||
interrupts. This port was extended in NuttX 5.3 with a USB high
|
||||
speed driver contributed by David Hewson. This port has been
|
||||
verified using the NuttX OS test, USB serial and mass storage tests
|
||||
and includes a working implementation of the NuttShell ((NSH)).
|
||||
|
||||
This port was later extended to support additional members of the
|
||||
LPC31xx family including, specifically, the LPC3152.
|
||||
|
||||
arch/arm/include/sam3u and arch/arm/src/sam3u
|
||||
Atmel AT91SAM3U. This port is for Atmel AT91SAM3U4E MCU.
|
||||
STATUS: The basic AT91SAM3U port was released in NuttX version 5.1.
|
||||
The basic port includes boot-up logic, interrupt driven serial
|
||||
console, and system timer interrupts. That release passes the
|
||||
NuttX OS test and is proven to have a valid OS implementation. A
|
||||
onfiguration to support the NuttShell is also included.
|
||||
|
||||
arch/arm/include/stm32 and arch/arm/src/stm32
|
||||
These directories contain support for the STMicro STM32 F1, F2, and
|
||||
F4 families.
|
||||
|
||||
STATUS: The basic STM32 F1 port was released in NuttX version 0.4.12.
|
||||
and has continued to develop consistently over time. It now includes
|
||||
support for the F2 and F4 families and a rich offering of peripheral
|
||||
drivers.
|
||||
|
||||
arch/arm/include/str71x and arch/arm/src/str71x
|
||||
These directories provide support for the STMicro STR71x processors.
|
||||
Coding is complete on the basic port (boot logic, system time, serial console),
|
||||
but no testing has been performed due to some problems I am having with my
|
||||
JTAG wiggler and OpenOCD on Linux.
|
||||
MCU support
|
||||
arch/arm/include/c5471 and arch/arm/src/c5471
|
||||
arch/arm/include/calypso and arch/arm/src/calypso
|
||||
arch/arm/include/dm320 and arch/arm/src/dm320
|
||||
arch/arm/include/efm32 and arch/arm/src/efm32
|
||||
arch/arm/include/imx1 and arch/arm/src/imx1
|
||||
arch/arm/include/imx6 and arch/arm/src/imx6
|
||||
arch/arm/include/kinetis and arch/arm/src/kinetis
|
||||
arch/arm/include/kl and arch/arm/src/kl
|
||||
arch/arm/include/lpc11xx and arch/arm/src/lpc11xx
|
||||
arch/arm/include/lpc17xx and arch/arm/src/lpc17xx
|
||||
arch/arm/include/lpc214x and arch/arm/src/lpc214x
|
||||
arch/arm/include/lpc2378 and arch/arm/src/lpc2378.
|
||||
arch/arm/include/lpc31xx and arch/arm/src/lpc31xx
|
||||
arch/arm/include/lpc43xx and arch/arm/src/lpc43xx
|
||||
arch/arm/include/moxart and arch/arm/src/moxart
|
||||
arch/arm/include/nuc1xx and arch/arm/src/nuc1xx
|
||||
arch/arm/include/sam34 and arch/arm/src/sam34
|
||||
arch/arm/include/sama45 and arch/arm/src/sama5
|
||||
arch/arm/include/samdl and arch/arm/src/samdl
|
||||
arch/arm/include/samv7 and arch/arm/src/samv7
|
||||
arch/arm/include/stm32 and arch/arm/src/stm32
|
||||
arch/arm/include/stm32f7 and arch/arm/src/stm32f7
|
||||
arch/arm/include/stm32l4 and arch/arm/src/stm32l4
|
||||
arch/arm/include/str71x and arch/arm/src/str71x
|
||||
arch/arm/include/tiva and arch/arm/src/tiva
|
||||
arch/arm/include/tms570 and arch/arm/src/tms570
|
||||
|
||||
arch/avr
|
||||
This directory is dedicated to ports to the Atmel AVR (8-bit) and AVR32 (32-bit)
|
||||
MCU families. STATUS: Under development.
|
||||
|
||||
arch/avr/include/avr and arch/avr/src/avr
|
||||
Common support for all 8-bit AVR MCUs
|
||||
Architecture Support
|
||||
arch/avr/include/avr and arch/avr/src/avr
|
||||
arch/avr/include/avr32 and arch/avr/src/avr32
|
||||
|
||||
arch/avr/include/atmega and arch/avr/src/atmega
|
||||
Support specifically for the AVR ATMega family (specifically only for
|
||||
the ATMega128 at the moment).
|
||||
|
||||
arch/avr/include/at90usb and arch/avr/src/at90usb
|
||||
Support specifically for the AVR AT90USB646, 647, 1286, and 1287 family.
|
||||
|
||||
arch/avr/include/avr32 and arch/avr/src/avr32
|
||||
Common support for all AVR32 MCUs
|
||||
|
||||
arch/avr/include/at32uc3 and arch/avr/src/at32uc3
|
||||
Support specifically for the AT32UC3Bxxx family (specifically only for
|
||||
the AT32UC3B0256 at the moment).
|
||||
MCU support
|
||||
arch/avr/include/atmega and arch/avr/src/atmega
|
||||
arch/avr/include/at90usb and arch/avr/src/at90usb
|
||||
arch/avr/include/at32uc3 and arch/avr/src/at32uc3
|
||||
|
||||
arch/hc
|
||||
This directory is dedicated to ports to the Freescale HC family.
|
||||
|
||||
arch/arm/include/m9s12 and arch/arm/src/m9s12
|
||||
These directories provide support for the Freescale mc9s12x family.
|
||||
STATUS: Fragments of this port were first released in nuttx-5.0 and
|
||||
the port was "code-complete" as nuttx-5.18. However, the final
|
||||
verification effort has been stalled because of higher priority tasks.
|
||||
|
||||
arch/mips
|
||||
This directory is dedicated to ports to the MIPS family.
|
||||
|
||||
arch/mips/include/mips32 and arch/mips/src/mips32
|
||||
Common support for all MIPS32 architectures
|
||||
Architecture Support
|
||||
arch/mips/include/mips32 and arch/mips/src/mips32
|
||||
|
||||
arch/mips/include/pic32mx and arch/mips/src/pic32mx
|
||||
Support for all MicroChip PIC32MX architectures
|
||||
MCU support
|
||||
arch/mips/include/pic32mx and arch/mips/src/pic32mx
|
||||
arch/mips/include/pic32mz and arch/mips/src/pic32mz
|
||||
|
||||
arch/rgmp
|
||||
|
||||
@@ -288,52 +223,42 @@ arch/rgmp
|
||||
|
||||
arch/sh - SuperH and related Hitachi/Renesas microcontrollers
|
||||
|
||||
arch/sh/include and arch/sh/src/common
|
||||
Common SuperH logic.
|
||||
Architecture Support
|
||||
arch/sh/include and arch/sh/src/common
|
||||
|
||||
arch/sh/include/shs and arch/sh/src/sh1
|
||||
Support for the SH-1 processor.
|
||||
MCU support
|
||||
arch/sh/include/m16c and arch/sh/src/m16c
|
||||
arch/sh/include/sh1 and arch/sh/src/sh1
|
||||
|
||||
arch/x86 - Intel x86 architectures
|
||||
This directory holds related, 32- and 64-bit architectures from Intel.
|
||||
At present, this includes the following subdirectories:
|
||||
|
||||
arch/x86/include and arch/x86/src/common
|
||||
Common x86 logic.
|
||||
Architecture Support
|
||||
arch/x86/include and arch/x86/src/common
|
||||
|
||||
arch/x86/include/i486 and arch/x86/src/i486
|
||||
These directories hold definitions and logic appropriate for any
|
||||
instantiation of the 32-bit i486 architecture.
|
||||
|
||||
arch/x86/include/qemu and arch/x86/src/qemu
|
||||
This is the implementation of NuttX on the QEMU x86 simulation.
|
||||
MCU support
|
||||
arch/x86/include/i486 and arch/x86/src/i486
|
||||
arch/x86/include/qemu and arch/x86/src/qemu
|
||||
|
||||
arch/z16 - ZiLOG 16-bit processors
|
||||
This directory holds related, 16-bit architectures from ZiLOG. At
|
||||
present, this includes the following subdirectories:
|
||||
|
||||
arch/z16/include and arch/z16/src/common
|
||||
Common microcontroller logic.
|
||||
Architecture Support
|
||||
arch/z16/include and arch/z16/src/common
|
||||
|
||||
arch/z16/include/z16f and arch/z16/src/z16f
|
||||
ZiLOG z16f Microcontroller.
|
||||
STATUS: Released in nuttx-0.3.7. Fully functional other than issues
|
||||
addressed in ${TOPDIR}/TODO.
|
||||
MCU support
|
||||
arch/z16/include/z16f and arch/z16/src/z16f
|
||||
|
||||
arch/z80 - ZiLOG 8-bit microcontrollers
|
||||
This directory holds related, 8-bit architectures from ZiLOG. At
|
||||
present, this includes the following subdirectories:
|
||||
|
||||
arch/z80/include and arch/z80/src/common
|
||||
Common microcontroller logic.
|
||||
Architecture Support
|
||||
arch/z80/include and arch/z80/src/common
|
||||
|
||||
arch/z80/include/z80 and arch/z80/src/z80
|
||||
Classic ZiLOG z80 Microcontroller.
|
||||
STATUS: Functional with no known defects. There are still several
|
||||
OS features that have not yet been tested (e.g., networking).
|
||||
|
||||
arch/z80/include/z8 and arch/z80/src/z8
|
||||
ZiLOG Z8Encore! Microcontroller
|
||||
|
||||
arch/z80/include/ez80 and arch/z80/src/ez80
|
||||
ZiLOG ez80 Acclaim! Microcontroller
|
||||
MCU support
|
||||
arch/z80/include/z80 and arch/z80/src/z80
|
||||
arch/z80/include/z8 and arch/z80/src/z8
|
||||
arch/z80/include/ez80 and arch/z80/src/ez80
|
||||
|
||||
+2
-1
@@ -213,6 +213,7 @@ config ARCH_CHIP_SAMV7
|
||||
select ARCH_HAVE_RAMFUNCS
|
||||
select ARCH_HAVE_TICKLESS
|
||||
select ARMV7M_HAVE_STACKCHECK
|
||||
select ARCH_HAVE_I2CRESET
|
||||
---help---
|
||||
Atmel SAMV7 (ARM Cortex-M7) architectures
|
||||
|
||||
@@ -588,7 +589,7 @@ config ARCH_ROMPGTABLE
|
||||
config DEBUG_HARDFAULT
|
||||
bool "Verbose Hard-Fault Debug"
|
||||
default n
|
||||
depends on DEBUG && (ARCH_CORTEXM3 || ARCH_CORTEXM4 || ARCH_CORTEXM7)
|
||||
depends on DEBUG_FEATURES && (ARCH_CORTEXM3 || ARCH_CORTEXM4 || ARCH_CORTEXM7)
|
||||
---help---
|
||||
Enables verbose debug output when a hard fault is occurs. This verbose
|
||||
output is sometimes helpful when debugging difficult hard fault problems,
|
||||
|
||||
@@ -60,7 +60,7 @@
|
||||
|
||||
/* Processor Exceptions (vectors 0-15) */
|
||||
|
||||
#define EFM32_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
|
||||
#define EFM32_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
|
||||
/* Vector 0: Reset stack pointer value */
|
||||
/* Vector 1: Reset (not handler as an IRQ) */
|
||||
#define EFM32_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
|
||||
|
||||
@@ -58,7 +58,7 @@
|
||||
|
||||
/* Processor Exceptions (vectors 0-15) */
|
||||
|
||||
#define KINETIS_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
|
||||
#define KINETIS_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
|
||||
/* Vector 0: Reset stack pointer value */
|
||||
/* Vector 1: Reset (not handler as an IRQ) */
|
||||
#define KINETIS_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
|
||||
|
||||
@@ -58,7 +58,7 @@
|
||||
|
||||
/* Processor Exceptions (vectors 0-15) */
|
||||
|
||||
#define KL_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
|
||||
#define KL_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
|
||||
/* Vector 0: Reset stack pointer value */
|
||||
/* Vector 1: Reset (not handler as an IRQ) */
|
||||
#define KL_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
|
||||
|
||||
@@ -59,7 +59,7 @@
|
||||
|
||||
/* Common Processor Exceptions (vectors 0-15) */
|
||||
|
||||
#define LPC11_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
|
||||
#define LPC11_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
|
||||
/* Vector 0: Reset stack pointer value */
|
||||
/* Vector 1: Reset (not handler as an IRQ) */
|
||||
#define LPC11_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
|
||||
|
||||
@@ -59,7 +59,7 @@
|
||||
|
||||
/* Common Processor Exceptions (vectors 0-15) */
|
||||
|
||||
#define LPC17_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
|
||||
#define LPC17_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
|
||||
/* Vector 0: Reset stack pointer value */
|
||||
/* Vector 1: Reset (not handler as an IRQ) */
|
||||
#define LPC17_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
|
||||
|
||||
@@ -322,8 +322,8 @@
|
||||
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */
|
||||
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
|
||||
#elif defined(CONFIG_ARCH_CHIP_LPC4337JBD144)
|
||||
# define LPC43_FLASH_BANKA_SIZE (512*1025) /* 1024Kb FLASH */
|
||||
# define LPC43_FLASH_BANKB_SIZE (512*1025)
|
||||
# define LPC43_FLASH_BANKA_SIZE (512*1024) /* 1024Kb FLASH */
|
||||
# define LPC43_FLASH_BANKB_SIZE (512*1024)
|
||||
# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */
|
||||
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
|
||||
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
|
||||
@@ -426,8 +426,8 @@
|
||||
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */
|
||||
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
|
||||
#elif defined(CONFIG_ARCH_CHIP_LPC4353FBD208)
|
||||
# define LPC43_FLASH_BANKA_SIZE (256*1025) /* 512Kb FLASH */
|
||||
# define LPC43_FLASH_BANKB_SIZE (256*1025)
|
||||
# define LPC43_FLASH_BANKA_SIZE (256*1024) /* 512Kb FLASH */
|
||||
# define LPC43_FLASH_BANKB_SIZE (256*1024)
|
||||
# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */
|
||||
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
|
||||
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
|
||||
@@ -452,8 +452,8 @@
|
||||
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */
|
||||
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
|
||||
#elif defined(CONFIG_ARCH_CHIP_LPC4353FET180)
|
||||
# define LPC43_FLASH_BANKA_SIZE (256*1025) /* 512Kb FLASH */
|
||||
# define LPC43_FLASH_BANKB_SIZE (256*1025)
|
||||
# define LPC43_FLASH_BANKA_SIZE (256*1024) /* 512Kb FLASH */
|
||||
# define LPC43_FLASH_BANKB_SIZE (256*1024)
|
||||
# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */
|
||||
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
|
||||
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
|
||||
@@ -478,8 +478,8 @@
|
||||
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */
|
||||
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
|
||||
#elif defined(CONFIG_ARCH_CHIP_LPC4353FET256)
|
||||
# define LPC43_FLASH_BANKA_SIZE (256*1025) /* 512Kb FLASH */
|
||||
# define LPC43_FLASH_BANKB_SIZE (256*1025)
|
||||
# define LPC43_FLASH_BANKA_SIZE (256*1024) /* 512Kb FLASH */
|
||||
# define LPC43_FLASH_BANKB_SIZE (256*1024)
|
||||
# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */
|
||||
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
|
||||
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
|
||||
@@ -504,8 +504,8 @@
|
||||
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */
|
||||
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
|
||||
#elif defined(CONFIG_ARCH_CHIP_LPC4357FET180)
|
||||
# define LPC43_FLASH_BANKA_SIZE (512*1025) /* 1024Kb FLASH */
|
||||
# define LPC43_FLASH_BANKB_SIZE (512*1025)
|
||||
# define LPC43_FLASH_BANKA_SIZE (512*1024) /* 1024Kb FLASH */
|
||||
# define LPC43_FLASH_BANKB_SIZE (512*1024)
|
||||
# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */
|
||||
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
|
||||
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
|
||||
@@ -530,8 +530,8 @@
|
||||
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */
|
||||
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
|
||||
#elif defined(CONFIG_ARCH_CHIP_LPC4357FBD208)
|
||||
# define LPC43_FLASH_BANKA_SIZE (512*1025) /* 1024Kb FLASH */
|
||||
# define LPC43_FLASH_BANKB_SIZE (512*1025)
|
||||
# define LPC43_FLASH_BANKA_SIZE (512*1024) /* 1024Kb FLASH */
|
||||
# define LPC43_FLASH_BANKB_SIZE (512*1024)
|
||||
# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */
|
||||
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
|
||||
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
|
||||
@@ -556,8 +556,8 @@
|
||||
# define LPC43_NADC10_CHANNELS (8) /* Eight ADC channels */
|
||||
# undef LPC43_NADC12 /* No 12-bit ADC controllers */
|
||||
#elif defined(CONFIG_ARCH_CHIP_LPC4357FET256)
|
||||
# define LPC43_FLASH_BANKA_SIZE (512*1025) /* 1024Kb FLASH */
|
||||
# define LPC43_FLASH_BANKB_SIZE (512*1025)
|
||||
# define LPC43_FLASH_BANKA_SIZE (512*1024) /* 1024Kb FLASH */
|
||||
# define LPC43_FLASH_BANKB_SIZE (512*1024)
|
||||
# define LPC43_LOCSRAM_BANK0_SIZE (32*1024) /* 72Kb Local SRAM */
|
||||
# define LPC43_LOCSRAM_BANK1_SIZE (40*1024)
|
||||
# define LPC43_AHBSRAM_BANK0_SIZE (48*1024) /* 64Kb AHB SRAM */
|
||||
|
||||
@@ -59,7 +59,7 @@
|
||||
|
||||
/* Processor Exceptions (vectors 0-15) */
|
||||
|
||||
#define LPC43_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
|
||||
#define LPC43_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
|
||||
/* Vector 0: Reset stack pointer value */
|
||||
/* Vector 1: Reset (not handler as an IRQ) */
|
||||
#define LPC43_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
|
||||
|
||||
@@ -58,7 +58,7 @@
|
||||
|
||||
/* Processor Exceptions (vectors 0-15) */
|
||||
|
||||
#define NUC_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
|
||||
#define NUC_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
|
||||
/* Vector 0: Reset stack pointer value */
|
||||
/* Vector 1: Reset (not handler as an IRQ) */
|
||||
#define NUC_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
|
||||
|
||||
@@ -58,7 +58,7 @@
|
||||
|
||||
/* Common Processor Exceptions (vectors 0-15) */
|
||||
|
||||
#define SAM_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
|
||||
#define SAM_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
|
||||
/* Vector 0: Reset stack pointer value */
|
||||
/* Vector 1: Reset (not handler as an IRQ) */
|
||||
#define SAM_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
|
||||
|
||||
@@ -58,7 +58,7 @@
|
||||
|
||||
/* Processor Exceptions (vectors 0-15) */
|
||||
|
||||
#define SAM_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
|
||||
#define SAM_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
|
||||
/* Vector 0: Reset stack pointer value */
|
||||
/* Vector 1: Reset (not handler as an IRQ) */
|
||||
#define SAM_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
|
||||
|
||||
@@ -58,7 +58,7 @@
|
||||
|
||||
/* Common Processor Exceptions (vectors 0-15) */
|
||||
|
||||
#define SAM_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
|
||||
#define SAM_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
|
||||
/* Vector 0: Reset stack pointer value */
|
||||
/* Vector 1: Reset (not handler as an IRQ) */
|
||||
#define SAM_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
|
||||
|
||||
@@ -903,6 +903,43 @@
|
||||
# define STM32_NRNG 0 /* No random number generator (RNG) */
|
||||
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_STM32F105RB)
|
||||
# undef CONFIG_STM32_STM32L15XX /* STM32L151xx and STM32L152xx family */
|
||||
# undef CONFIG_STM32_ENERGYLITE /* STM32L EnergyLite family */
|
||||
# define CONFIG_STM32_STM32F10XX 1 /* STM32F10xxx family */
|
||||
# undef CONFIG_STM32_LOWDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 16/32 Kbytes */
|
||||
# undef CONFIG_STM32_MEDIUMDENSITY /* STM32F100x, STM32F101x, STM32F102x and STM32F103x w/ 64/128 Kbytes */
|
||||
# undef CONFIG_STM32_MEDIUMPLUSDENSITY /* STM32L15xxC w/ 32/256 Kbytes */
|
||||
# undef CONFIG_STM32_HIGHDENSITY /* STM32F100x, STM32F101x, and STM32F103x w/ 256/512 Kbytes */
|
||||
# undef CONFIG_STM32_VALUELINE /* STM32F100x */
|
||||
# define CONFIG_STM32_CONNECTIVITYLINE 1 /* STM32F105x and STM32F107x */
|
||||
# undef CONFIG_STM32_STM32F20XX /* STM32F205x and STM32F207x */
|
||||
# undef CONFIG_STM32_STM32F30XX /* STM32F30xxx family */
|
||||
# undef CONFIG_STM32_STM32F37XX /* STM32F37xxx family */
|
||||
# undef CONFIG_STM32_STM32F40XX /* STM32F405xx and STM32407xx */
|
||||
# define STM32_NFSMC 1 /* FSMC */
|
||||
# define STM32_NATIM 1 /* One advanced timers TIM1 */
|
||||
# define STM32_NGTIM 4 /* 16-bit general timers TIM2-5 with DMA */
|
||||
# define STM32_NGTIMNDMA 0 /* No 16-bit general timers without DMA */
|
||||
# define STM32_NBTIM 2 /* Two basic timers, TIM6-7 */
|
||||
# define STM32_NDMA 2 /* DMA1-2 */
|
||||
# define STM32_NSPI 3 /* SPI1-3 */
|
||||
# define STM32_NI2S 2 /* I2S1-2 (multiplexed with SPI2-3) */
|
||||
# define STM32_NUSART 5 /* USART1-3, UART 4-5 */
|
||||
# define STM32_NI2C 2 /* I2C1-2 */
|
||||
# define STM32_NCAN 2 /* CAN1-2 */
|
||||
# define STM32_NSDIO 0 /* No SDIO */
|
||||
# define STM32_NLCD 0 /* No LCD */
|
||||
# define STM32_NUSBOTG 1 /* USB OTG FS/HS */
|
||||
# define STM32_NGPIO 51 /* GPIOA-E */
|
||||
# define STM32_NADC 2 /* ADC1-2 */
|
||||
# define STM32_NDAC 2 /* DAC1-2 */
|
||||
# define STM32_NCAPSENSE 0 /* No capacitive sensing channels */
|
||||
# define STM32_NCRC 1 /* CRC */
|
||||
# define STM32_NETHERNET 0 /* 100/100 Ethernet MAC */
|
||||
# define STM32_NRNG 0 /* No random number generator (RNG) */
|
||||
# define STM32_NDCMI 0 /* No digital camera interface (DCMI) */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_STM32F107VC)
|
||||
# undef CONFIG_STM32_STM32L15XX /* STM32L151xx and STM32L152xx family */
|
||||
# undef CONFIG_STM32_ENERGYLITE /* STM32L EnergyLite family */
|
||||
@@ -2430,7 +2467,7 @@
|
||||
# if defined(CONFIG_ARCH_CHIP_STM32F469A)
|
||||
# define STM32_NETHERNET 0 /* No Ethernet MAC */
|
||||
# elif defined(CONFIG_ARCH_CHIP_STM32F469I) || \
|
||||
# defined(CONFIG_ARCH_CHIP_STM32F469B) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F469B) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F469N)
|
||||
# define STM32_NETHERNET 1 /* 100/100 Ethernet MAC */
|
||||
# endif
|
||||
|
||||
@@ -59,7 +59,7 @@
|
||||
|
||||
/* Processor Exceptions (vectors 0-15) */
|
||||
|
||||
#define STM32_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
|
||||
#define STM32_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
|
||||
/* Vector 0: Reset stack pointer value */
|
||||
/* Vector 1: Reset (not handler as an IRQ) */
|
||||
#define STM32_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
|
||||
|
||||
@@ -199,7 +199,7 @@
|
||||
# define STM32_IRQ_ETH (77) /* 61: Ethernet global interrupt */
|
||||
# define STM32_IRQ_ETHWKUP (78) /* 62: Ethernet Wakeup through EXTI line interrupt */
|
||||
# define STM32_IRQ_CAN2TX (79) /* 63: CAN2 TX interrupts */
|
||||
# define STM32_IRQ_CAN2RX0 (70) /* 64: CAN2 RX0 interrupts */
|
||||
# define STM32_IRQ_CAN2RX0 (80) /* 64: CAN2 RX0 interrupts */
|
||||
# define STM32_IRQ_CAN2RX1 (81) /* 65: CAN2 RX1 interrupt */
|
||||
# define STM32_IRQ_CAN2SCE (82) /* 66: CAN2 SCE interrupt */
|
||||
# define STM32_IRQ_OTGFS (83) /* 67: USB On The Go FS global interrupt */
|
||||
|
||||
+237
-63
@@ -1,8 +1,9 @@
|
||||
/************************************************************************************
|
||||
* arch/arm/include/stm32f7/chip.h
|
||||
*
|
||||
* Copyright (C) 2015 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
* Copyright (C) 2015-2016 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
* David Sidrane <david_s5@nscdg.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
@@ -45,99 +46,272 @@
|
||||
/************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
************************************************************************************/
|
||||
/* STM32F745xx, STM32F746xx, and STM32F56xx. Differences between family members:
|
||||
/* STM32F745xx, STM32F746xx, STM32F756xx, STM32F765xx, STM32F767xx, STM32F768xx,
|
||||
* STM32F769xx, STM32F777xx and STM32F779xx Differences between family members:
|
||||
*
|
||||
* ----------- ---------------- ----- -------- ------------ --------
|
||||
* PART PACKAGE GPIOs SPI/I2S ADC CHANNELS LCD-TFT?
|
||||
* ----------- ---------------- ----- -------- ------------ --------
|
||||
* STM32F745Vx LQFP100 82 4/3 16 No
|
||||
* STM32F745Zx WLCSP143/LQFP144 114 6/3 24 No
|
||||
* STM32F745Ix UFBGA176/LQFP176 140 6/3 24 No
|
||||
* STM32F745Bx LQFP208 168 6/3 24 No
|
||||
* STM32F745Nx TFBGA216 68 6/3 24 No
|
||||
* ----------- ---------------- ----- ---- ----- ---- ---- ---- ---- ---- ----- ----- ---- ------------ ------
|
||||
* SPI ADC LCD
|
||||
* PART PACKAGE GPIOs I2S CHAN TFT MIPI JPEG CAN ETH DFSDM CRYPTO FPU RAM L1
|
||||
* ----------- ---------------- ----- ---- ----- ---- ---- ---- ---- ---- ----- ----- ---- ------------ ------
|
||||
* STM32F745Vx LQFP100 82 4/3 16 No No No 2 Yes No No SFPU (240+16+64) 4+4
|
||||
* STM32F745Zx WLCSP143/LQFP144 114 6/3 24 No No No 2 Yes No No SFPU (240+16+64) 4+4
|
||||
* STM32F745Ix UFBGA176/LQFP176 140 6/3 24 No No No 2 Yes No No SFPU (240+16+64) 4+4
|
||||
* STM32F745Bx LQFP208 168 6/3 24 No No No 2 Yes No No SFPU (240+16+64) 4+4
|
||||
* STM32F745Nx TFBGA216 68 6/3 24 No No No 2 Yes No No SFPU (240+16+64) 4+4
|
||||
*
|
||||
* STM32F746Vx LQFP100 82 4/3 16 Yes
|
||||
* STM32F746Zx WLCSP143/LQFP144 114 6/3 24 Yes
|
||||
* STM32F746Ix UFBGA176/LQFP176 140 6/3 24 Yes
|
||||
* STM32F746Bx LQFP208 168 6/3 24 Yes
|
||||
* STM32F746Nx TFBGA216 168 6/3 24 Yes
|
||||
* STM32F746Vx LQFP100 82 4/3 16 Yes No No 2 Yes No No SFPU (240+16+64) 4+4
|
||||
* STM32F746Zx WLCSP143/LQFP144 114 6/3 24 Yes No No 2 Yes No No SFPU (240+16+64) 4+4
|
||||
* STM32F746Ix UFBGA176/LQFP176 140 6/3 24 Yes No No 2 Yes No No SFPU (240+16+64) 4+4
|
||||
* STM32F746Bx LQFP208 168 6/3 24 Yes No No 2 Yes No No SFPU (240+16+64) 4+4
|
||||
* STM32F746Nx TFBGA216 168 6/3 24 Yes No No 2 Yes No No SFPU
|
||||
*
|
||||
* STM32F756Vx LQFP100 82 4/3 16 Yes
|
||||
* STM32F756Zx WLCSP143/LQFP144 114 6/3 24 Yes
|
||||
* STM32F756Ix UFBGA176/LQFP176 140 6/3 24 Yes
|
||||
* STM32F756Bx LQFP208 168 6/3 24 Yes
|
||||
* STM32F756Nx TFBGA216 168 6/3 24 Yes
|
||||
* ----------- ---------------- ----- -------- ------------ --------
|
||||
* STM32F756Vx LQFP100 82 4/3 16 Yes No No 2 Yes No Yes SFPU (240+16+64) 4+4
|
||||
* STM32F756Zx WLCSP143/LQFP144 114 6/3 24 Yes No No 2 Yes No Yes SFPU (240+16+64) 4+4
|
||||
* STM32F756Ix UFBGA176/LQFP176 140 6/3 24 Yes No No 2 Yes No Yes SFPU (240+16+64) 4+4
|
||||
* STM32F756Bx LQFP208 168 6/3 24 Yes No No 2 Yes No Yes SFPU (240+16+64) 4+4
|
||||
* STM32F756Nx TFBGA216 168 6/3 24 Yes No No 2 Yes No Yes SFPU (240+16+64) 4+4
|
||||
*
|
||||
* STM32F765Vx LQFP100 82 4/3 16 No No No 3 Yes Yes No DFPU (368+16+128) 16+16
|
||||
* STM32F765Zx WLCSP143/LQFP144 114 6/3 24 No No No 3 Yes Yes No DFPU (368+16+128) 16+16
|
||||
* STM32F765Ix UFBGA176/LQFP176 140 6/3 24 No No No 3 Yes Yes No DFPU (368+16+128) 16+16
|
||||
* STM32F765Bx LQFP208 168 6/3 24 No No No 3 Yes Yes No DFPU (368+16+128) 16+16
|
||||
* STM32F765Nx TFBGA216 168 6/3 24 No No No 3 Yes Yes No DFPU (368+16+128) 16+16
|
||||
*
|
||||
* STM32F767Vx LQFP100 82 4/3 16 Yes No Yes 3 Yes Yes No DFPU (368+16+128) 16+16
|
||||
* STM32F767Zx WLCSP143/LQFP144 114 6/3 24 Yes No Yes 3 Yes Yes No DFPU (368+16+128) 16+16
|
||||
* STM32F767Ix UFBGA176/LQFP176 132 6/3 24 Yes Yes Yes 3 Yes Yes No DFPU (368+16+128) 16+16
|
||||
* STM32F767Bx LQFP208 168 6/3 24 Yes Yes Yes 3 Yes Yes No DFPU (368+16+128) 16+16
|
||||
* STM32F767Nx TFBGA216 159 6/3 24 Yes Yes Yes 3 Yes Yes No DFPU (368+16+128) 16+16
|
||||
*
|
||||
* STM32F768Ax WLCSP180 129 6/3 24 Yes Yes Yes 3 No Yes No DFPU (368+16+128) 16+16
|
||||
*
|
||||
* STM32F769Vx LQFP100 82 4/3 16 Yes No Yes 3 Yes Yes No DFPU (368+16+128) 16+16
|
||||
* STM32F769Zx LQFP144 114 6/3 24 Yes No Yes 3 Yes Yes No DFPU (368+16+128) 16+16
|
||||
* STM32F769Ix UFBGA176/LQFP176 132 6/3 24 Yes Yes Yes 3 Yes Yes No DFPU (368+16+128) 16+16
|
||||
* STM32F769Bx LQFP208 168 6/3 24 Yes Yes Yes 3 Yes Yes No DFPU (368+16+128) 16+16
|
||||
* STM32F769Nx TFBGA216 159 6/3 24 Yes Yes Yes 3 Yes Yes No DFPU (368+16+128) 16+16
|
||||
*
|
||||
* STM32F769Ax WLCSP180 129 6/3 24 Yes Yes Yes 3 No Yes No DFPU (368+16+128) 16+16
|
||||
*
|
||||
* STM32F777Vx LQFP100 82 4/3 16 Yes No Yes 3 Yes Yes Yes DFPU (368+16+128) 16+16
|
||||
* STM32F777Zx LQFP144 114 6/3 24 Yes No Yes 3 Yes Yes Yes DFPU (368+16+128) 16+16
|
||||
* STM32F777Ix UFBGA176/LQFP176 132 6/3 24 Yes Yes Yes 3 Yes Yes Yes DFPU (368+16+128) 16+16
|
||||
* STM32F777Bx LQFP208 159 6/3 24 Yes Yes Yes 3 Yes Yes Yes DFPU (368+16+128) 16+16
|
||||
* STM32F777Nx TFBGA216 159 6/3 24 Yes Yes Yes 3 Yes Yes Yes DFPU (368+16+128) 16+16
|
||||
*
|
||||
* STM32F778Ax WLCSP180 129 6/3 24 Yes Yes Yes 3 No Yes Yes DFPU (368+16+128) 16+16
|
||||
*
|
||||
* STM32F779Ix UFBGA176/LQFP176 132 6/3 24 Yes Yes Yes 3 Yes Yes Yes DFPU (368+16+128) 16+16
|
||||
* STM32F779Bx LQFP208 159 6/3 24 Yes Yes Yes 3 Yes Yes Yes DFPU (368+16+128) 16+16
|
||||
* STM32F779Nx TFBGA216 159 6/3 24 Yes Yes Yes 3 Yes Yes Yes DFPU (368+16+128) 16+16
|
||||
|
||||
* STM32F779Ax WLCSP180 129 6/3 24 Yes Yes Yes 3 No Yes Yes DFPU (368+16+128) 16+16
|
||||
* ----------- ---------------- ----- ---- ----- ---- ---- ---- ---- ---- ----- ----- ---- ------------ ------
|
||||
*
|
||||
* Parts STM32F74xxE have 512Kb of FLASH
|
||||
* Parts STM32F74xxG have 1024Kb of FLASH
|
||||
* Parts STM32F74xxI have 2048Kb of FLASH
|
||||
*
|
||||
* The correct FLASH size will be set CONFIG_STM32F7_FLASH_CONFIG_x or overridden
|
||||
* with CONFIG_STM32F7_FLASH_OVERRIDE_x
|
||||
*
|
||||
* The correct FLASH size must be set with a CONFIG_STM32F7_FLASH_*KB
|
||||
* selection.
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_ARCH_CHIP_STM32F745) || defined(CONFIG_ARCH_CHIP_STM32F746) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F756)
|
||||
|
||||
#if defined(CONFIG_ARCH_CHIP_STM32F745)
|
||||
# define STM32F7_STM32F745XX 1 /* STM32F745xx family */
|
||||
# undef STM32F7_STM32F746XX /* Not STM32F746xx family */
|
||||
# undef STM32F7_STM32F756XX /* Not STM32F756xx family */
|
||||
|
||||
# define STM32F7_NLCDTFT 0 /* No LCD-TFT */
|
||||
|
||||
#elif defined(CONFIG_ARCH_CHIP_STM32F746)
|
||||
|
||||
# undef STM32F7_STM32F745XX /* Not STM32F745xx family */
|
||||
# define STM32F7_STM32F746XX 1 /* STM32F746xx family */
|
||||
# undef STM32F7_STM32F756XX /* Not STM32F756xx family */
|
||||
|
||||
# define STM32F7_NLCDTFT 1 /* One LCD-TFT */
|
||||
|
||||
#else /* if defined(CONFIG_ARCH_CHIP_STM32F746) */
|
||||
|
||||
# undef STM32F7_STM32F745XX /* Not STM32F745xx family */
|
||||
# undef STM32F7_STM32F746XX /* Not STM32F746xx family */
|
||||
# define STM32F7_STM32F756XX 1 /* STM32F756xx family */
|
||||
|
||||
# define STM32F7_NLCDTFT 1 /* One LCD-TFT */
|
||||
#if defined(CONFIG_ARCH_CHIP_STM32F745VG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F745VE) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F745IG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F745IE) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F745ZE) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F745ZG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F746BG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F746VG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F746VE) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F746BE) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F746ZG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F746IE) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F746NG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F746NE) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F746ZE) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F746IG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F756NG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F756BG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F756IG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F756VG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F756ZG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F765NI) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F765VI) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F765VG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F765BI) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F765NG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F765ZG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F765ZI) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F765IG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F765BG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F765II) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F767NG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F767IG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F767VG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F767ZG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F767NI) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F767VI) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F767BG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F767ZI) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F767II) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F769BI) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F769II) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F769BG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F769NI) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F769AI) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F769NG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F769IG) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F777ZI) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F777VI) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F777NI) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F777BI) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F777II) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F778AI) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F779II) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F779NI) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F779BI) || \
|
||||
defined(CONFIG_ARCH_CHIP_STM32F779AI)
|
||||
#else
|
||||
# error STM32 F7 chip not identified
|
||||
#endif
|
||||
|
||||
# define STM32F7_SRAM1_SIZE (240*1024) /* 240Kb SRAM1 on AHB bus Matrix */
|
||||
# define STM32F7_SRAM2_SIZE (16*1024) /* 16Kb SRAM2 on AHB bus Matrix */
|
||||
# define STM32F7_DTCM_SRAM_SIZE (64*1024) /* 64Kb DTCM SRAM on TCM inerface */
|
||||
# define STM32F7_ITCM_SRAM_SIZE (16*1024) /* 16Kb ITCM SRAM on TCM inerface */
|
||||
/* Size SRAM */
|
||||
|
||||
#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
|
||||
# define STM32F7_SRAM1_SIZE (240*1024) /* 240Kb SRAM1 on AHB bus Matrix */
|
||||
# define STM32F7_SRAM2_SIZE (16*1024) /* 16Kb SRAM2 on AHB bus Matrix */
|
||||
# if defined(CONFIG_ARMV7M_HAVE_DTCM)
|
||||
# define STM32F7_DTCM_SRAM_SIZE (64*1024) /* 64Kb DTCM SRAM on TCM interface */
|
||||
# else
|
||||
# define STM32F7_DTCM_SRAM_SIZE (0) /* No DTCM SRAM on TCM interface */
|
||||
# endif
|
||||
# if defined(CONFIG_ARMV7M_HAVE_ITCM)
|
||||
# define STM32F7_ITCM_SRAM_SIZE (16*1024) /* 16Kb ITCM SRAM on TCM interface */
|
||||
# else
|
||||
# define STM32F7_ITCM_SRAM_SIZE (0) /* No ITCM SRAM on TCM interface */
|
||||
# endif
|
||||
#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77X)
|
||||
# define STM32F7_SRAM1_SIZE (368*1024) /* 368Kb SRAM1 on AHB bus Matrix */
|
||||
# define STM32F7_SRAM2_SIZE (16*1024) /* 16Kb SRAM2 on AHB bus Matrix */
|
||||
# if defined(CONFIG_ARMV7M_HAVE_DTCM)
|
||||
# define STM32F7_DTCM_SRAM_SIZE (128*1024) /* 128Kb DTCM SRAM on TCM interface */
|
||||
# else
|
||||
# define STM32F7_DTCM_SRAM_SIZE (0) /* No DTCM SRAM on TCM interface */
|
||||
# endif
|
||||
# if defined(CONFIG_ARMV7M_HAVE_ITCM)
|
||||
# define STM32F7_ITCM_SRAM_SIZE (16*1024) /* 16Kb ITCM SRAM on TCM interface */
|
||||
# else
|
||||
# define STM32F7_ITCM_SRAM_SIZE (0) /* No ITCM SRAM on TCM interface */
|
||||
# endif
|
||||
#else
|
||||
# error STM32 F7 chip Family not identified
|
||||
#endif
|
||||
|
||||
/* Common to all Family members */
|
||||
|
||||
# define STM32F7_NFSMC 1 /* Have FSMC memory controller */
|
||||
# define STM32F7_NETHERNET 1 /* 100/100 Ethernet MAC */
|
||||
# define STM32F7_NATIM 2 /* Two advanced timers TIM1 and 8 */
|
||||
# define STM32F7_NGTIM32 2 /* 32-bit general timers TIM2 and 5 with DMA */
|
||||
# define STM32F7_NGTIM16 2 /* 16-bit general timers TIM3 and 4 with DMA */
|
||||
# define STM32F7_NGTIMNDMA 6 /* 16-bit general timers TIM9-14 without DMA */
|
||||
# define STM32F7_NBTIM 2 /* Two basic timers, TIM6-7 */
|
||||
# define STM32F7_NRNG 1 /* Random number generator (RNG) */
|
||||
# define STM32F7_NUART 4 /* UART 4-5 and 7-8 */
|
||||
# define STM32F7_NUSART 4 /* USART1-3 and 6 */
|
||||
# define STM32F7_NSPI 6 /* SPI1-6 (Except V series) */
|
||||
# define STM32F7_NI2S 3 /* I2S1-2 (multiplexed with SPI1-3) */
|
||||
# define STM32F7_NI2C 4 /* I2C1-4 */
|
||||
# define STM32F7_NUSBOTGFS 1 /* USB OTG FS */
|
||||
# define STM32F7_NUSBOTGHS 1 /* USB OTG HS */
|
||||
# define STM32F7_NCAN 2 /* CAN1-2 */
|
||||
# define STM32F7_NSAI 2 /* SAI1-2 */
|
||||
# define STM32F7_NSPDIFRX 4 /* 4 SPDIFRX inputs */
|
||||
# define STM32F7_NSDMMC 1 /* SDMMC interface */
|
||||
# define STM32F7_NDCMI 1 /* Digital camera interface (DCMI) */
|
||||
# define STM32F7_NDMA 2 /* DMA1-2 */
|
||||
# define STM32F7_NDMA2D 1 /* DChrom-ART Accelerator™ (DMA2D) */
|
||||
# define STM32F7_NGPIO 11 /* 11 GPIO ports, GPIOA-K */
|
||||
# define STM32F7_NADC 3 /* 12-bit ADC1-3, 24 channels *except V series) */
|
||||
# define STM32F7_NDAC 2 /* 12-bit DAC1-2 */
|
||||
# define STM32F7_NCAPSENSE 0 /* No capacitive sensing channels */
|
||||
# define STM32F7_NCRC 1 /* CRC */
|
||||
|
||||
/* TBD FPU Configuration */
|
||||
|
||||
#if defined(CONFIG_ARCH_HAVE_FPU)
|
||||
#else
|
||||
# error STM32 F7 chip not identified
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ARCH_HAVE_DPFPU)
|
||||
#else
|
||||
#endif
|
||||
|
||||
/* Diversification based on Family and package */
|
||||
|
||||
#if defined(CONFIG_STM32F7_HAVE_FSMC)
|
||||
# define STM32F7_NFSMC 1 /* Have FSMC memory controller */
|
||||
#else
|
||||
# define STM32F7_NFSMC 0 /* No FSMC memory controller */
|
||||
#endif
|
||||
#if defined(CONFIG_STM32F7_HAVE_ETHRNET)
|
||||
# define STM32F7_NETHERNET 1 /* 100/100 Ethernet MAC */
|
||||
#else
|
||||
# define STM32F7_NETHERNET 0 /* No 100/100 Ethernet MAC */
|
||||
#endif
|
||||
#if defined(CONFIG_STM32F7_HAVE_RNG)
|
||||
# define STM32F7_NRNG 1 /* Random number generator (RNG) */
|
||||
#else
|
||||
# define STM32F7_NRNG 0 /* No Random number generator (RNG) */
|
||||
#endif
|
||||
#if defined(CONFIG_STM32F7_HAVE_SPI5) && defined(CONFIG_STM32F7_HAVE_SPI6)
|
||||
# define STM32F7_NSPI 6 /* SPI1-6 (Except V series) */
|
||||
#else
|
||||
# define STM32F7_NSPI 4 /* SPI1-4 V series */
|
||||
#endif
|
||||
#if defined(CONFIG_STM32F7_HAVE_SDMMC2)
|
||||
# define STM32F7_NSDMMC 2 /* 2 SDMMC interfaces */
|
||||
#else
|
||||
# define STM32F7_NSDMMC 1 /* 1 SDMMC interface */
|
||||
#endif
|
||||
#if defined(CONFIG_STM32F7_HAVE_CAN3)
|
||||
# define STM32F7_NCAN 3 /* CAN1-3 */
|
||||
#else
|
||||
# define STM32F7_NCAN 2 /* CAN1-2 */
|
||||
#endif
|
||||
#if defined(CONFIG_STM32F7_HAVE_DCMI)
|
||||
# define STM32F7_NDCMI 1 /* Digital camera interface (DCMI) */
|
||||
#else
|
||||
# define STM32F7_NDCMI 0 /* No Digital camera interface (DCMI) */
|
||||
#endif
|
||||
#if defined(CONFIG_STM32F7_HAVE_DSIHOST)
|
||||
# define STM32F7_NDSIHOST 1 /* Have MIPI DSI Host */
|
||||
#else
|
||||
# define STM32F7_NDSIHOST 0 /* No MIPI DSI Host */
|
||||
#endif
|
||||
#if defined (CONFIG_STM32F7_HAVE_LTDC)
|
||||
# define STM32F7_NLCDTFT 1 /* One LCD-TFT */
|
||||
#else
|
||||
# define STM32F7_NLCDTFT 0 /* No LCD-TFT */
|
||||
#endif
|
||||
#if defined(CONFIG_STM32F7_HAVE_DMA2D)
|
||||
# define STM32F7_NDMA2D 0 /* No DChrom-ART Accelerator™ (DMA2D) */
|
||||
#else
|
||||
# define STM32F7_NDMA2D 1 /* DChrom-ART Accelerator™ (DMA2D) */
|
||||
#endif
|
||||
#if defined(CONFIG_STM32F7_HAVE_JPEG)
|
||||
#define STM32F7_NJPEG 1 /* One JPEG Converter */
|
||||
#else
|
||||
#define STM32F7_NJPEG 0 /* No JPEG Converter */
|
||||
#endif
|
||||
#if defined(CONFIG_STM32F7_HAVE_CRYP)
|
||||
#define STM32F7_NCRYP 1 /* One CRYP engine */
|
||||
#else
|
||||
#define STM32F7_NCRYP 0 /* No CRYP engine */
|
||||
#endif
|
||||
#if defined(CONFIG_STM32F7_HAVE_HASH)
|
||||
#define STM32F7_NHASH 1 /* One HASH engine */
|
||||
#else
|
||||
#define STM32F7_NHASH 0 /* No HASH engine */
|
||||
#endif
|
||||
#if defined(CONFIG_STM32F7_HAVE_DFSDM)
|
||||
#define STM32F7_NDFSDM 4 /* One set of 4 Digital filters */
|
||||
#else
|
||||
#define STM32F7_NDFSDM 0 /* No Digital filters */
|
||||
#endif
|
||||
|
||||
/* NVIC priority levels *************************************************************/
|
||||
|
||||
@@ -57,7 +57,7 @@
|
||||
|
||||
/* Processor Exceptions (vectors 0-15) */
|
||||
|
||||
#define STM32_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
|
||||
#define STM32_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
|
||||
/* Vector 0: Reset stack pointer value */
|
||||
/* Vector 1: Reset (not handler as an IRQ) */
|
||||
#define STM32_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
|
||||
@@ -78,6 +78,8 @@
|
||||
|
||||
#if defined(CONFIG_STM32F7_STM32F74XX) || defined(CONFIG_STM32F7_STM32F75XX)
|
||||
# include <arch/stm32f7/stm32f74xx75xx_irq.h>
|
||||
#elif defined(CONFIG_STM32F7_STM32F76XX) || defined(CONFIG_STM32F7_STM32F77XX)
|
||||
# include <arch/stm32f7/stm32f76xx77xx_irq.h>
|
||||
#else
|
||||
# error "Unsupported STM32 F7 chip"
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,215 @@
|
||||
/****************************************************************************************************
|
||||
* arch/arm/include/stm32f7/stm32f76xx77xx_irq.h.h
|
||||
*
|
||||
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
|
||||
* Authors: Gregory Nutt <gnutt@nuttx.org>
|
||||
* David Sidrane <david_s5@nscdg.com>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
****************************************************************************************************/
|
||||
|
||||
/* This file should never be included directed but, rather, only indirectly through arch/irq.h */
|
||||
|
||||
#ifndef __ARCH_ARM_INCLUDE_STM32F7_STM32F76XX77XX_IRQ_H
|
||||
#define __ARCH_ARM_INCLUDE_STM32F7_STM32F76XX77XX_IRQ_H
|
||||
|
||||
/****************************************************************************************************
|
||||
* Included Files
|
||||
****************************************************************************************************/
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/****************************************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************************************/
|
||||
|
||||
/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to bits in the
|
||||
* NVIC. This does, however, waste several words of memory in the IRQ to handle mapping tables.
|
||||
*
|
||||
* Processor Exceptions (vectors 0-15). These common definitions can be found in the file
|
||||
* nuttx/arch/arm/include/stm32f7/irq.h which includes this file
|
||||
*
|
||||
* External interrupts (vectors >= 16)
|
||||
*/
|
||||
|
||||
#define STM32_IRQ_WWDG (STM32_IRQ_FIRST+0) /* 0: Window Watchdog interrupt */
|
||||
#define STM32_IRQ_PVD (STM32_IRQ_FIRST+1) /* 1: PVD through EXTI Line detection interrupt */
|
||||
#define STM32_IRQ_TAMPER (STM32_IRQ_FIRST+2) /* 2: Tamper and time stamp interrupts */
|
||||
#define STM32_IRQ_TIMESTAMP (STM32_IRQ_FIRST+2) /* 2: Tamper and time stamp interrupts */
|
||||
#define STM32_IRQ_RTC_WKUP (STM32_IRQ_FIRST+3) /* 3: RTC global interrupt */
|
||||
#define STM32_IRQ_FLASH (STM32_IRQ_FIRST+4) /* 4: Flash global interrupt */
|
||||
#define STM32_IRQ_RCC (STM32_IRQ_FIRST+5) /* 5: RCC global interrupt */
|
||||
#define STM32_IRQ_EXTI0 (STM32_IRQ_FIRST+6) /* 6: EXTI Line 0 interrupt */
|
||||
#define STM32_IRQ_EXTI1 (STM32_IRQ_FIRST+7) /* 7: EXTI Line 1 interrupt */
|
||||
#define STM32_IRQ_EXTI2 (STM32_IRQ_FIRST+8) /* 8: EXTI Line 2 interrupt */
|
||||
#define STM32_IRQ_EXTI3 (STM32_IRQ_FIRST+9) /* 9: EXTI Line 3 interrupt */
|
||||
#define STM32_IRQ_EXTI4 (STM32_IRQ_FIRST+10) /* 10: EXTI Line 4 interrupt */
|
||||
#define STM32_IRQ_DMA1S0 (STM32_IRQ_FIRST+11) /* 11: DMA1 Stream 0 global interrupt */
|
||||
#define STM32_IRQ_DMA1S1 (STM32_IRQ_FIRST+12) /* 12: DMA1 Stream 1 global interrupt */
|
||||
#define STM32_IRQ_DMA1S2 (STM32_IRQ_FIRST+13) /* 13: DMA1 Stream 2 global interrupt */
|
||||
#define STM32_IRQ_DMA1S3 (STM32_IRQ_FIRST+14) /* 14: DMA1 Stream 3 global interrupt */
|
||||
#define STM32_IRQ_DMA1S4 (STM32_IRQ_FIRST+15) /* 15: DMA1 Stream 4 global interrupt */
|
||||
#define STM32_IRQ_DMA1S5 (STM32_IRQ_FIRST+16) /* 16: DMA1 Stream 5 global interrupt */
|
||||
#define STM32_IRQ_DMA1S6 (STM32_IRQ_FIRST+17) /* 17: DMA1 Stream 6 global interrupt */
|
||||
#define STM32_IRQ_ADC (STM32_IRQ_FIRST+18) /* 18: ADC1, ADC2, and ADC3 global interrupt */
|
||||
#define STM32_IRQ_CAN1TX (STM32_IRQ_FIRST+19) /* 19: CAN1 TX interrupts */
|
||||
#define STM32_IRQ_CAN1RX0 (STM32_IRQ_FIRST+20) /* 20: CAN1 RX0 interrupts */
|
||||
#define STM32_IRQ_CAN1RX1 (STM32_IRQ_FIRST+21) /* 21: CAN1 RX1 interrupt */
|
||||
#define STM32_IRQ_CAN1SCE (STM32_IRQ_FIRST+22) /* 22: CAN1 SCE interrupt */
|
||||
#define STM32_IRQ_EXTI95 (STM32_IRQ_FIRST+23) /* 23: EXTI Line[9:5] interrupts */
|
||||
#define STM32_IRQ_TIM1BRK (STM32_IRQ_FIRST+24) /* 24: TIM1 Break interrupt */
|
||||
#define STM32_IRQ_TIM9 (STM32_IRQ_FIRST+24) /* 24: TIM9 global interrupt */
|
||||
#define STM32_IRQ_TIM1UP (STM32_IRQ_FIRST+25) /* 25: TIM1 Update interrupt */
|
||||
#define STM32_IRQ_TIM10 (STM32_IRQ_FIRST+25) /* 25: TIM10 global interrupt */
|
||||
#define STM32_IRQ_TIM1TRGCOM (STM32_IRQ_FIRST+26) /* 26: TIM1 Trigger and Commutation interrupts */
|
||||
#define STM32_IRQ_TIM11 (STM32_IRQ_FIRST+26) /* 26: TIM11 global interrupt */
|
||||
#define STM32_IRQ_TIM1CC (STM32_IRQ_FIRST+27) /* 27: TIM1 Capture Compare interrupt */
|
||||
#define STM32_IRQ_TIM2 (STM32_IRQ_FIRST+28) /* 28: TIM2 global interrupt */
|
||||
#define STM32_IRQ_TIM3 (STM32_IRQ_FIRST+29) /* 29: TIM3 global interrupt */
|
||||
#define STM32_IRQ_TIM4 (STM32_IRQ_FIRST+30) /* 30: TIM4 global interrupt */
|
||||
#define STM32_IRQ_I2C1EV (STM32_IRQ_FIRST+31) /* 31: I2C1 event interrupt */
|
||||
#define STM32_IRQ_I2C1ER (STM32_IRQ_FIRST+32) /* 32: I2C1 error interrupt */
|
||||
#define STM32_IRQ_I2C2EV (STM32_IRQ_FIRST+33) /* 33: I2C2 event interrupt */
|
||||
#define STM32_IRQ_I2C2ER (STM32_IRQ_FIRST+34) /* 34: I2C2 error interrupt */
|
||||
#define STM32_IRQ_SPI1 (STM32_IRQ_FIRST+35) /* 35: SPI1 global interrupt */
|
||||
#define STM32_IRQ_SPI2 (STM32_IRQ_FIRST+36) /* 36: SPI2 global interrupt */
|
||||
#define STM32_IRQ_USART1 (STM32_IRQ_FIRST+37) /* 37: USART1 global interrupt */
|
||||
#define STM32_IRQ_USART2 (STM32_IRQ_FIRST+38) /* 38: USART2 global interrupt */
|
||||
#define STM32_IRQ_USART3 (STM32_IRQ_FIRST+39) /* 39: USART3 global interrupt */
|
||||
#define STM32_IRQ_EXTI1510 (STM32_IRQ_FIRST+40) /* 40: EXTI Line[15:10] interrupts */
|
||||
#define STM32_IRQ_RTCALRM (STM32_IRQ_FIRST+41) /* 41: RTC alarm through EXTI line interrupt */
|
||||
#define STM32_IRQ_OTGFSWKUP (STM32_IRQ_FIRST+42) /* 42: USB On-The-Go FS Wakeup through EXTI line interrupt */
|
||||
#define STM32_IRQ_TIM8BRK (STM32_IRQ_FIRST+43) /* 43: TIM8 Break interrupt */
|
||||
#define STM32_IRQ_TIM12 (STM32_IRQ_FIRST+43) /* 43: TIM12 global interrupt */
|
||||
#define STM32_IRQ_TIM8UP (STM32_IRQ_FIRST+44) /* 44: TIM8 Update interrupt */
|
||||
#define STM32_IRQ_TIM13 (STM32_IRQ_FIRST+44) /* 44: TIM13 global interrupt */
|
||||
#define STM32_IRQ_TIM8TRGCOM (STM32_IRQ_FIRST+45) /* 45: TIM8 Trigger and Commutation interrupts */
|
||||
#define STM32_IRQ_TIM14 (STM32_IRQ_FIRST+45) /* 45: TIM14 global interrupt */
|
||||
#define STM32_IRQ_TIM8CC (STM32_IRQ_FIRST+46) /* 46: TIM8 Capture Compare interrupt */
|
||||
#define STM32_IRQ_DMA1S7 (STM32_IRQ_FIRST+47) /* 47: DMA1 Stream 7 global interrupt */
|
||||
#define STM32_IRQ_FSMC (STM32_IRQ_FIRST+48) /* 48: FSMC global interrupt */
|
||||
#define STM32_IRQ_SDMMC1 (STM32_IRQ_FIRST+49) /* 49: SDMMC1 global interrupt */
|
||||
#define STM32_IRQ_TIM5 (STM32_IRQ_FIRST+50) /* 50: TIM5 global interrupt */
|
||||
#define STM32_IRQ_SPI3 (STM32_IRQ_FIRST+51) /* 51: SPI3 global interrupt */
|
||||
#define STM32_IRQ_UART4 (STM32_IRQ_FIRST+52) /* 52: UART4 global interrupt */
|
||||
#define STM32_IRQ_UART5 (STM32_IRQ_FIRST+53) /* 53: UART5 global interrupt */
|
||||
#define STM32_IRQ_TIM6 (STM32_IRQ_FIRST+54) /* 54: TIM6 global interrupt */
|
||||
#define STM32_IRQ_DAC (STM32_IRQ_FIRST+54) /* 54: DAC1 and DAC2 underrun error interrupts */
|
||||
#define STM32_IRQ_TIM7 (STM32_IRQ_FIRST+55) /* 55: TIM7 global interrupt */
|
||||
#define STM32_IRQ_DMA2S0 (STM32_IRQ_FIRST+56) /* 56: DMA2 Stream 0 global interrupt */
|
||||
#define STM32_IRQ_DMA2S1 (STM32_IRQ_FIRST+57) /* 57: DMA2 Stream 1 global interrupt */
|
||||
#define STM32_IRQ_DMA2S2 (STM32_IRQ_FIRST+58) /* 58: DMA2 Stream 2 global interrupt */
|
||||
#define STM32_IRQ_DMA2S3 (STM32_IRQ_FIRST+59) /* 59: DMA2 Stream 3 global interrupt */
|
||||
#define STM32_IRQ_DMA2S4 (STM32_IRQ_FIRST+60) /* 60: DMA2 Stream 4 global interrupt */
|
||||
#define STM32_IRQ_ETH (STM32_IRQ_FIRST+61) /* 61: Ethernet global interrupt */
|
||||
#define STM32_IRQ_ETHWKUP (STM32_IRQ_FIRST+62) /* 62: Ethernet Wakeup through EXTI line interrupt */
|
||||
#define STM32_IRQ_CAN2TX (STM32_IRQ_FIRST+63) /* 63: CAN2 TX interrupts */
|
||||
#define STM32_IRQ_CAN2RX0 (STM32_IRQ_FIRST+64) /* 64: CAN2 RX0 interrupts */
|
||||
#define STM32_IRQ_CAN2RX1 (STM32_IRQ_FIRST+65) /* 65: CAN2 RX1 interrupt */
|
||||
#define STM32_IRQ_CAN2SCE (STM32_IRQ_FIRST+66) /* 66: CAN2 SCE interrupt */
|
||||
#define STM32_IRQ_OTGFS (STM32_IRQ_FIRST+67) /* 67: USB On The Go FS global interrupt */
|
||||
#define STM32_IRQ_DMA2S5 (STM32_IRQ_FIRST+68) /* 68: DMA2 Stream 5 global interrupt */
|
||||
#define STM32_IRQ_DMA2S6 (STM32_IRQ_FIRST+69) /* 69: DMA2 Stream 6 global interrupt */
|
||||
#define STM32_IRQ_DMA2S7 (STM32_IRQ_FIRST+70) /* 70: DMA2 Stream 7 global interrupt */
|
||||
#define STM32_IRQ_USART6 (STM32_IRQ_FIRST+71) /* 71: USART6 global interrupt */
|
||||
#define STM32_IRQ_I2C3EV (STM32_IRQ_FIRST+72) /* 72: I2C3 event interrupt */
|
||||
#define STM32_IRQ_I2C3ER (STM32_IRQ_FIRST+73) /* 73: I2C3 error interrupt */
|
||||
#define STM32_IRQ_OTGHSEP1OUT (STM32_IRQ_FIRST+74) /* 74: USB On The Go HS End Point 1 Out global interrupt */
|
||||
#define STM32_IRQ_OTGHSEP1IN (STM32_IRQ_FIRST+75) /* 75: USB On The Go HS End Point 1 In global interrupt */
|
||||
#define STM32_IRQ_OTGHSWKUP (STM32_IRQ_FIRST+76) /* 76: USB On The Go HS Wakeup through EXTI interrupt */
|
||||
#define STM32_IRQ_OTGHS (STM32_IRQ_FIRST+77) /* 77: USB On The Go HS global interrupt */
|
||||
#define STM32_IRQ_DCMI (STM32_IRQ_FIRST+78) /* 78: DCMI global interrupt */
|
||||
#define STM32_IRQ_CRYP (STM32_IRQ_FIRST+79) /* 79: CRYP crypto global interrupt */
|
||||
#define STM32_IRQ_HASH (STM32_IRQ_FIRST+80) /* 80: Hash and Rng global interrupt */
|
||||
#define STM32_IRQ_RNG (STM32_IRQ_FIRST+80) /* 80: Hash and Rng global interrupt */
|
||||
#define STM32_IRQ_FPU (STM32_IRQ_FIRST+81) /* 81: FPU global interrupt */
|
||||
#define STM32_IRQ_UART7 (STM32_IRQ_FIRST+82) /* 82: UART7 global interrupt */
|
||||
#define STM32_IRQ_UART8 (STM32_IRQ_FIRST+83) /* 83: UART8 global interrupt */
|
||||
#define STM32_IRQ_SPI4 (STM32_IRQ_FIRST+84) /* 84: SPI4 global interrupt */
|
||||
#define STM32_IRQ_SPI5 (STM32_IRQ_FIRST+85) /* 85: SPI5 global interrupt */
|
||||
#define STM32_IRQ_SPI6 (STM32_IRQ_FIRST+86) /* 86: SPI6 global interrupt */
|
||||
#define STM32_IRQ_SAI1 (STM32_IRQ_FIRST+87) /* 87: SAI1 global interrupt */
|
||||
#define STM32_IRQ_LTDCINT (STM32_IRQ_FIRST+88) /* 88: LCD-TFT global interrupt */
|
||||
#define STM32_IRQ_LTDCERRINT (STM32_IRQ_FIRST+89) /* 89: LCD-TFT global Error interrupt */
|
||||
#define STM32_IRQ_DMA2D (STM32_IRQ_FIRST+90) /* 90: DMA2D global interrupt */
|
||||
#define STM32_IRQ_SAI2 (STM32_IRQ_FIRST+91) /* 91: SAI2 global interrupt */
|
||||
#define STM32_IRQ_QUADSPI (STM32_IRQ_FIRST+92) /* 92: QuadSPI global interrupt */
|
||||
#define STM32_IRQ_LPTIMER1 (STM32_IRQ_FIRST+93) /* 93: LP Timer1 global interrupt */
|
||||
#define STM32_IRQ_HDMICEC (STM32_IRQ_FIRST+94) /* 94: HDMI-CEC global interrupt */
|
||||
#define STM32_IRQ_I2C4EV (STM32_IRQ_FIRST+95) /* 95: I2C4 event interrupt */
|
||||
#define STM32_IRQ_I2C4ER (STM32_IRQ_FIRST+96) /* 96: I2C4 Error interrupt */
|
||||
#define STM32_IRQ_SPDIFRX (STM32_IRQ_FIRST+97) /* 97: SPDIFRX global interrupt */
|
||||
#define STM32_IRQ_DSIHOST (STM32_IRQ_FIRST+98) /* 98: DSI host global interrupt */
|
||||
#define STM32_IRQ_DFSDM1FLT0 (STM32_IRQ_FIRST+99) /* 99: DFSDM1 Filter 0 global interrupt */
|
||||
#define STM32_IRQ_DFSDM1FLT1 (STM32_IRQ_FIRST+100) /* 100: DFSDM1 Filter 1 global interrupt */
|
||||
#define STM32_IRQ_DFSDM1FLT2 (STM32_IRQ_FIRST+101) /* 101: DFSDM1 Filter 2 global interrupt */
|
||||
#define STM32_IRQ_DFSDM1FLT3 (STM32_IRQ_FIRST+102) /* 102: DFSDM1 Filter 3 global interrupt */
|
||||
#define STM32_IRQ_SDMMC2 (STM32_IRQ_FIRST+103) /* 103: SDMMC2 global interrupt */
|
||||
#define STM32_IRQ_CAN3TX (STM32_IRQ_FIRST+104) /* 104: CAN3 TX interrupt */
|
||||
#define STM32_IRQ_CAN3RX0 (STM32_IRQ_FIRST+105) /* 105: CAN3 RX0 interrupt */
|
||||
#define STM32_IRQ_CAN3RX1 (STM32_IRQ_FIRST+106) /* 106: CAN3 RX1 interrupt */
|
||||
#define STM32_IRQ_CAN3SCE (STM32_IRQ_FIRST+107) /* 107: CAN3 SCE interrupt */
|
||||
#define STM32_IRQ_JPEG (STM32_IRQ_FIRST+108) /* 108: JPEG global interrupt */
|
||||
#define STM32_IRQ_MDIOS (STM32_IRQ_FIRST+109) /* 109: MDIO slave global interrupt */
|
||||
|
||||
#define NR_INTERRUPTS 110
|
||||
#define NR_VECTORS (STM32_IRQ_FIRST+NR_INTERRUPTS)
|
||||
|
||||
/* EXTI interrupts (Do not use IRQ numbers) */
|
||||
|
||||
#define NR_IRQS NR_VECTORS
|
||||
|
||||
/****************************************************************************************************
|
||||
* Public Types
|
||||
****************************************************************************************************/
|
||||
|
||||
/****************************************************************************************************
|
||||
* Public Data
|
||||
****************************************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#ifdef __cplusplus
|
||||
#define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
#endif
|
||||
|
||||
/****************************************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************************************/
|
||||
|
||||
#undef EXTERN
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif /* __ARCH_ARM_INCLUDE_STM32F7_STM32F76XX77XX_IRQ_H */
|
||||
@@ -57,7 +57,7 @@
|
||||
|
||||
/* Processor Exceptions (vectors 0-15) */
|
||||
|
||||
#define STM32L4_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
|
||||
#define STM32L4_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
|
||||
/* Vector 0: Reset stack pointer value */
|
||||
/* Vector 1: Reset (not handler as an IRQ) */
|
||||
#define STM32L4_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
|
||||
|
||||
@@ -162,7 +162,7 @@
|
||||
|
||||
/* Processor Exceptions (vectors 0-15) */
|
||||
|
||||
#define TIVA_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG) */
|
||||
#define TIVA_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
|
||||
/* Vector 0: Reset stack pointer value */
|
||||
/* Vector 1: Reset (not handler as an IRQ) */
|
||||
#define TIVA_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
|
||||
|
||||
+34
-32
@@ -77,7 +77,7 @@ volatile uint32_t *g_current_regs[1];
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#if defined(CONFIG_DEBUG_IRQ)
|
||||
#if defined(CONFIG_DEBUG_IRQ_INFO)
|
||||
static void a1x_dumpintc(const char *msg, int irq)
|
||||
{
|
||||
irqstate_t flags;
|
||||
@@ -85,40 +85,42 @@ static void a1x_dumpintc(const char *msg, int irq)
|
||||
/* Dump some relevant ARMv7 register contents */
|
||||
|
||||
flags = enter_critical_section();
|
||||
lldbg("ARMv7 (%s, irq=%d):\n", msg, irq);
|
||||
lldbg(" CPSR: %08x SCTLR: %08x\n", flags, cp15_rdsctlr());
|
||||
|
||||
irqinfo("ARMv7 (%s, irq=%d):\n", msg, irq);
|
||||
irqinfo(" CPSR: %08x SCTLR: %08x\n", flags, cp15_rdsctlr());
|
||||
|
||||
/* Dump all of the (readable) INTC register contents */
|
||||
|
||||
lldbg("INTC (%s, irq=%d):\n", msg, irq);
|
||||
lldbg(" VECTOR: %08x BASE: %08x PROTECT: %08x NMICTRL: %08x\n",
|
||||
getreg32(A1X_INTC_VECTOR), getreg32(A1X_INTC_BASEADDR),
|
||||
getreg32(A1X_INTC_PROTECT), getreg32(A1X_INTC_NMICTRL));
|
||||
lldbg(" IRQ PEND: %08x %08x %08x\n",
|
||||
getreg32(A1X_INTC_IRQ_PEND0), getreg32(A1X_INTC_IRQ_PEND1),
|
||||
getreg32(A1X_INTC_IRQ_PEND2));
|
||||
lldbg(" FIQ PEND: %08x %08x %08x\n",
|
||||
getreg32(A1X_INTC_FIQ_PEND0), getreg32(A1X_INTC_FIQ_PEND1),
|
||||
getreg32(A1X_INTC_FIQ_PEND2));
|
||||
lldbg(" SEL: %08x %08x %08x\n",
|
||||
getreg32(A1X_INTC_IRQ_SEL0), getreg32(A1X_INTC_IRQ_SEL1),
|
||||
getreg32(A1X_INTC_IRQ_SEL2));
|
||||
lldbg(" EN: %08x %08x %08x\n",
|
||||
getreg32(A1X_INTC_EN0), getreg32(A1X_INTC_EN1),
|
||||
getreg32(A1X_INTC_EN2));
|
||||
lldbg(" MASK: %08x %08x %08x\n",
|
||||
getreg32(A1X_INTC_MASK0), getreg32(A1X_INTC_MASK1),
|
||||
getreg32(A1X_INTC_MASK2));
|
||||
lldbg(" RESP: %08x %08x %08x\n",
|
||||
getreg32(A1X_INTC_RESP0), getreg32(A1X_INTC_RESP1),
|
||||
getreg32(A1X_INTC_RESP2));
|
||||
lldbg(" FF: %08x %08x %08x\n",
|
||||
getreg32(A1X_INTC_FF0), getreg32(A1X_INTC_FF1),
|
||||
getreg32(A1X_INTC_FF2));
|
||||
lldbg(" PRIO: %08x %08x %08x %08x %08x\n",
|
||||
getreg32(A1X_INTC_PRIO0), getreg32(A1X_INTC_PRIO1),
|
||||
getreg32(A1X_INTC_PRIO2), getreg32(A1X_INTC_PRIO3),
|
||||
getreg32(A1X_INTC_PRIO4));
|
||||
irqinfo("INTC (%s, irq=%d):\n", msg, irq);
|
||||
irqinfo(" VECTOR: %08x BASE: %08x PROTECT: %08x NMICTRL: %08x\n",
|
||||
getreg32(A1X_INTC_VECTOR), getreg32(A1X_INTC_BASEADDR),
|
||||
getreg32(A1X_INTC_PROTECT), getreg32(A1X_INTC_NMICTRL));
|
||||
irqinfo(" IRQ PEND: %08x %08x %08x\n",
|
||||
getreg32(A1X_INTC_IRQ_PEND0), getreg32(A1X_INTC_IRQ_PEND1),
|
||||
getreg32(A1X_INTC_IRQ_PEND2));
|
||||
irqinfo(" FIQ PEND: %08x %08x %08x\n",
|
||||
getreg32(A1X_INTC_FIQ_PEND0), getreg32(A1X_INTC_FIQ_PEND1),
|
||||
getreg32(A1X_INTC_FIQ_PEND2));
|
||||
irqinfo(" SEL: %08x %08x %08x\n",
|
||||
getreg32(A1X_INTC_IRQ_SEL0), getreg32(A1X_INTC_IRQ_SEL1),
|
||||
getreg32(A1X_INTC_IRQ_SEL2));
|
||||
irqinfo(" EN: %08x %08x %08x\n",
|
||||
getreg32(A1X_INTC_EN0), getreg32(A1X_INTC_EN1),
|
||||
getreg32(A1X_INTC_EN2));
|
||||
irqinfo(" MASK: %08x %08x %08x\n",
|
||||
getreg32(A1X_INTC_MASK0), getreg32(A1X_INTC_MASK1),
|
||||
getreg32(A1X_INTC_MASK2));
|
||||
irqinfo(" RESP: %08x %08x %08x\n",
|
||||
getreg32(A1X_INTC_RESP0), getreg32(A1X_INTC_RESP1),
|
||||
getreg32(A1X_INTC_RESP2));
|
||||
irqinfo(" FF: %08x %08x %08x\n",
|
||||
getreg32(A1X_INTC_FF0), getreg32(A1X_INTC_FF1),
|
||||
getreg32(A1X_INTC_FF2));
|
||||
irqinfo(" PRIO: %08x %08x %08x %08x %08x\n",
|
||||
getreg32(A1X_INTC_PRIO0), getreg32(A1X_INTC_PRIO1),
|
||||
getreg32(A1X_INTC_PRIO2), getreg32(A1X_INTC_PRIO3),
|
||||
getreg32(A1X_INTC_PRIO4));
|
||||
|
||||
leave_critical_section(flags);
|
||||
}
|
||||
#else
|
||||
|
||||
@@ -1156,7 +1156,7 @@ static int uart_interrupt(struct uart_dev_s *dev)
|
||||
/* Read the modem status register (MSR) to clear */
|
||||
|
||||
status = up_serialin(priv, A1X_UART_MSR_OFFSET);
|
||||
vdbg("MSR: %02x\n", status);
|
||||
_info("MSR: %02x\n", status);
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -1167,7 +1167,7 @@ static int uart_interrupt(struct uart_dev_s *dev)
|
||||
/* Read the line status register (LSR) to clear */
|
||||
|
||||
status = up_serialin(priv, A1X_UART_LSR_OFFSET);
|
||||
vdbg("LSR: %02x\n", status);
|
||||
_info("LSR: %02x\n", status);
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -1192,7 +1192,7 @@ static int uart_interrupt(struct uart_dev_s *dev)
|
||||
|
||||
default:
|
||||
{
|
||||
lldbg("Unexpected IIR: %02x\n", status);
|
||||
_err("ERROR: Unexpected IIR: %02x\n", status);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/arm/up_assert.c
|
||||
*
|
||||
* Copyright (C) 2007-2010, 2012-2015 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2007-2010, 2012-2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -39,17 +39,6 @@
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/* Output debug info if stack dump is selected -- even if debug is not
|
||||
* selected.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_ARCH_STACKDUMP
|
||||
# undef CONFIG_DEBUG
|
||||
# undef CONFIG_DEBUG_VERBOSE
|
||||
# define CONFIG_DEBUG 1
|
||||
# define CONFIG_DEBUG_VERBOSE 1
|
||||
#endif
|
||||
|
||||
#include <stdarg.h>
|
||||
#include <stdint.h>
|
||||
#include <stdlib.h>
|
||||
@@ -77,23 +66,6 @@
|
||||
# undef CONFIG_ARCH_USBDUMP
|
||||
#endif
|
||||
|
||||
/* The following is just intended to keep some ugliness out of the mainline
|
||||
* code. We are going to print the task name if:
|
||||
*
|
||||
* CONFIG_TASK_NAME_SIZE > 0 && <-- The task has a name
|
||||
* (defined(CONFIG_DEBUG) || <-- And the debug is enabled (lldbg used)
|
||||
* defined(CONFIG_ARCH_STACKDUMP) <-- Or lowsyslog() is used
|
||||
*/
|
||||
|
||||
#undef CONFIG_PRINT_TASKNAME
|
||||
#if CONFIG_TASK_NAME_SIZE > 0 && (defined(CONFIG_DEBUG) || defined(CONFIG_ARCH_STACKDUMP))
|
||||
# define CONFIG_PRINT_TASKNAME 1
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
@@ -127,7 +99,7 @@ static void up_stackdump(uint32_t sp, uint32_t stack_base)
|
||||
for (stack = sp & ~0x1f; stack < stack_base; stack += 32)
|
||||
{
|
||||
uint32_t *ptr = (uint32_t *)stack;
|
||||
lldbg("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
|
||||
_alert("%08x: %08x %08x %08x %08x %08x %08x %08x %08x\n",
|
||||
stack, ptr[0], ptr[1], ptr[2], ptr[3],
|
||||
ptr[4], ptr[5], ptr[6], ptr[7]);
|
||||
}
|
||||
@@ -154,12 +126,12 @@ static inline void up_registerdump(void)
|
||||
for (regs = REG_R0; regs <= REG_R15; regs += 8)
|
||||
{
|
||||
uint32_t *ptr = (uint32_t *)&CURRENT_REGS[regs];
|
||||
lldbg("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
|
||||
_alert("R%d: %08x %08x %08x %08x %08x %08x %08x %08x\n",
|
||||
regs, ptr[0], ptr[1], ptr[2], ptr[3],
|
||||
ptr[4], ptr[5], ptr[6], ptr[7]);
|
||||
}
|
||||
|
||||
lldbg("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
|
||||
_alert("CPSR: %08x\n", CURRENT_REGS[REG_CPSR]);
|
||||
}
|
||||
}
|
||||
#else
|
||||
@@ -179,7 +151,7 @@ static int usbtrace_syslog(FAR const char *fmt, ...)
|
||||
/* Let vsyslog do the real work */
|
||||
|
||||
va_start(ap, fmt);
|
||||
ret = lowvsyslog(LOG_INFO, fmt, ap);
|
||||
ret = vsyslog(LOG_EMERG, fmt, ap);
|
||||
va_end(ap);
|
||||
return ret;
|
||||
}
|
||||
@@ -228,12 +200,12 @@ static void up_dumpstate(void)
|
||||
|
||||
/* Show interrupt stack info */
|
||||
|
||||
lldbg("sp: %08x\n", sp);
|
||||
lldbg("IRQ stack:\n");
|
||||
lldbg(" base: %08x\n", istackbase);
|
||||
lldbg(" size: %08x\n", istacksize);
|
||||
_alert("sp: %08x\n", sp);
|
||||
_alert("IRQ stack:\n");
|
||||
_alert(" base: %08x\n", istackbase);
|
||||
_alert(" size: %08x\n", istacksize);
|
||||
#ifdef CONFIG_STACK_COLORATION
|
||||
lldbg(" used: %08x\n", up_check_intstack());
|
||||
_alert(" used: %08x\n", up_check_intstack());
|
||||
#endif
|
||||
|
||||
/* Does the current stack pointer lie within the interrupt
|
||||
@@ -251,24 +223,24 @@ static void up_dumpstate(void)
|
||||
*/
|
||||
|
||||
sp = g_intstackbase;
|
||||
lldbg("sp: %08x\n", sp);
|
||||
_alert("sp: %08x\n", sp);
|
||||
}
|
||||
|
||||
/* Show user stack info */
|
||||
|
||||
lldbg("User stack:\n");
|
||||
lldbg(" base: %08x\n", ustackbase);
|
||||
lldbg(" size: %08x\n", ustacksize);
|
||||
_alert("User stack:\n");
|
||||
_alert(" base: %08x\n", ustackbase);
|
||||
_alert(" size: %08x\n", ustacksize);
|
||||
#ifdef CONFIG_STACK_COLORATION
|
||||
lldbg(" used: %08x\n", up_check_tcbstack(rtcb));
|
||||
_alert(" used: %08x\n", up_check_tcbstack(rtcb));
|
||||
#endif
|
||||
|
||||
#else
|
||||
lldbg("sp: %08x\n", sp);
|
||||
lldbg("stack base: %08x\n", ustackbase);
|
||||
lldbg("stack size: %08x\n", ustacksize);
|
||||
_alert("sp: %08x\n", sp);
|
||||
_alert("stack base: %08x\n", ustackbase);
|
||||
_alert("stack size: %08x\n", ustacksize);
|
||||
#ifdef CONFIG_STACK_COLORATION
|
||||
lldbg("stack used: %08x\n", up_check_tcbstack(rtcb));
|
||||
_alert("stack used: %08x\n", up_check_tcbstack(rtcb));
|
||||
#endif
|
||||
#endif
|
||||
|
||||
@@ -279,7 +251,7 @@ static void up_dumpstate(void)
|
||||
if (sp > ustackbase || sp <= ustackbase - ustacksize)
|
||||
{
|
||||
#if !defined(CONFIG_ARCH_INTERRUPTSTACK) || CONFIG_ARCH_INTERRUPTSTACK < 4
|
||||
lldbg("ERROR: Stack pointer is not within allocated stack\n");
|
||||
_alert("ERROR: Stack pointer is not within allocated stack\n");
|
||||
#endif
|
||||
}
|
||||
else
|
||||
@@ -339,17 +311,17 @@ static void _up_assert(int errorcode)
|
||||
|
||||
void up_assert(const uint8_t *filename, int lineno)
|
||||
{
|
||||
#ifdef CONFIG_PRINT_TASKNAME
|
||||
#if CONFIG_TASK_NAME_SIZE > 0 && defined(CONFIG_DEBUG_ALERT)
|
||||
struct tcb_s *rtcb = this_task();
|
||||
#endif
|
||||
|
||||
board_autoled_on(LED_ASSERTION);
|
||||
|
||||
#ifdef CONFIG_PRINT_TASKNAME
|
||||
lldbg("Assertion failed at file:%s line: %d task: %s\n",
|
||||
#if CONFIG_TASK_NAME_SIZE > 0
|
||||
_alert("Assertion failed at file:%s line: %d task: %s\n",
|
||||
filename, lineno, rtcb->name);
|
||||
#else
|
||||
lldbg("Assertion failed at file:%s line: %d\n",
|
||||
_alert("Assertion failed at file:%s line: %d\n",
|
||||
filename, lineno);
|
||||
#endif
|
||||
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/arm/up_dataabort.c
|
||||
*
|
||||
* Copyright (C) 2007-2011, 2013 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2007-2011, 2013, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -39,17 +39,6 @@
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/* Output debug info if stack dump is selected -- even if debug is not
|
||||
* selected.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_ARCH_STACKDUMP
|
||||
# undef CONFIG_DEBUG
|
||||
# undef CONFIG_DEBUG_VERBOSE
|
||||
# define CONFIG_DEBUG 1
|
||||
# define CONFIG_DEBUG_VERBOSE 1
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
#include <debug.h>
|
||||
|
||||
@@ -63,18 +52,6 @@
|
||||
# include "arm.h"
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Pre-processor Definitions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Private Data
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Private Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
@@ -112,7 +89,6 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
|
||||
* for register dumps and possibly context switching.
|
||||
*/
|
||||
|
||||
|
||||
savestate = (uint32_t *)CURRENT_REGS;
|
||||
#endif
|
||||
CURRENT_REGS = regs;
|
||||
@@ -131,7 +107,7 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
|
||||
* fatal error.
|
||||
*/
|
||||
|
||||
pglldbg("FSR: %08x FAR: %08x\n", fsr, far);
|
||||
pginfo("FSR: %08x FAR: %08x\n", fsr, far);
|
||||
if ((fsr & FSR_MASK) != FSR_PAGE)
|
||||
{
|
||||
goto segfault;
|
||||
@@ -142,7 +118,7 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
|
||||
* (It has not yet been saved in the register context save area).
|
||||
*/
|
||||
|
||||
pgllvdbg("VBASE: %08x VEND: %08x\n", PG_PAGED_VBASE, PG_PAGED_VEND);
|
||||
pginfo("VBASE: %08x VEND: %08x\n", PG_PAGED_VBASE, PG_PAGED_VEND);
|
||||
if (far < PG_PAGED_VBASE || far >= PG_PAGED_VEND)
|
||||
{
|
||||
goto segfault;
|
||||
@@ -180,7 +156,7 @@ void up_dataabort(uint32_t *regs, uint32_t far, uint32_t fsr)
|
||||
|
||||
segfault:
|
||||
#endif
|
||||
lldbg("Data abort. PC: %08x FAR: %08x FSR: %08x\n", regs[REG_PC], far, fsr);
|
||||
_alert("Data abort. PC: %08x FAR: %08x FSR: %08x\n", regs[REG_PC], far, fsr);
|
||||
PANIC();
|
||||
}
|
||||
|
||||
@@ -196,7 +172,7 @@ void up_dataabort(uint32_t *regs)
|
||||
|
||||
/* Crash -- possibly showing diagnost debug information. */
|
||||
|
||||
lldbg("Data abort. PC: %08x\n", regs[REG_PC]);
|
||||
_alert("Data abort. PC: %08x\n", regs[REG_PC]);
|
||||
PANIC();
|
||||
}
|
||||
|
||||
|
||||
+12
-12
@@ -86,7 +86,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
|
||||
|
||||
if (ehdr->e_machine != EM_ARM)
|
||||
{
|
||||
bdbg("Not for ARM: e_machine=%04x\n", ehdr->e_machine);
|
||||
berr("ERROR: Not for ARM: e_machine=%04x\n", ehdr->e_machine);
|
||||
return -ENOEXEC;
|
||||
}
|
||||
|
||||
@@ -94,7 +94,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
|
||||
|
||||
if (ehdr->e_ident[EI_CLASS] != ELFCLASS32)
|
||||
{
|
||||
bdbg("Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
|
||||
berr("ERROR: Need 32-bit objects: e_ident[EI_CLASS]=%02x\n", ehdr->e_ident[EI_CLASS]);
|
||||
return -ENOEXEC;
|
||||
}
|
||||
|
||||
@@ -106,7 +106,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
|
||||
if (ehdr->e_ident[EI_DATA] != ELFDATA2LSB)
|
||||
#endif
|
||||
{
|
||||
bdbg("Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
|
||||
berr("ERROR: Wrong endian-ness: e_ident[EI_DATA]=%02x\n", ehdr->e_ident[EI_DATA]);
|
||||
return -ENOEXEC;
|
||||
}
|
||||
|
||||
@@ -114,7 +114,7 @@ bool up_checkarch(FAR const Elf32_Ehdr *ehdr)
|
||||
|
||||
if ((ehdr->e_entry & 3) != 0)
|
||||
{
|
||||
bdbg("Entry point is not properly aligned: %08x\n", ehdr->e_entry);
|
||||
berr("ERROR: Entry point is not properly aligned: %08x\n", ehdr->e_entry);
|
||||
return -ENOEXEC
|
||||
}
|
||||
|
||||
@@ -172,7 +172,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
|
||||
case R_ARM_CALL:
|
||||
case R_ARM_JUMP24:
|
||||
{
|
||||
bvdbg("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
|
||||
binfo("Performing PC24 [%d] link at addr %08lx [%08lx] to sym '%s' st_value=%08lx\n",
|
||||
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
|
||||
sym, (long)sym->st_value);
|
||||
|
||||
@@ -185,7 +185,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
|
||||
offset += sym->st_value - addr;
|
||||
if (offset & 3 || offset <= (int32_t) 0xfe000000 || offset >= (int32_t) 0x02000000)
|
||||
{
|
||||
bdbg(" ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
|
||||
berr("ERROR: PC24 [%d] relocation out of range, offset=%08lx\n",
|
||||
ELF32_R_TYPE(rel->r_info), offset);
|
||||
|
||||
return -EINVAL;
|
||||
@@ -201,7 +201,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
|
||||
case R_ARM_ABS32:
|
||||
case R_ARM_TARGET1: /* New ABI: TARGET1 always treated as ABS32 */
|
||||
{
|
||||
bvdbg("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
|
||||
binfo("Performing ABS32 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
|
||||
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
|
||||
|
||||
*(uint32_t *)addr += sym->st_value;
|
||||
@@ -210,7 +210,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
|
||||
|
||||
case R_ARM_V4BX:
|
||||
{
|
||||
bvdbg("Performing V4BX link at addr=%08lx [%08lx]\n",
|
||||
binfo("Performing V4BX link at addr=%08lx [%08lx]\n",
|
||||
(long)addr, (long)(*(uint32_t *)addr));
|
||||
|
||||
/* Preserve only Rm and the condition code */
|
||||
@@ -225,7 +225,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
|
||||
|
||||
case R_ARM_PREL31:
|
||||
{
|
||||
bvdbg("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
|
||||
binfo("Performing PREL31 link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
|
||||
(long)addr, (long)(*(uint32_t *)addr), sym, (long)sym->st_value);
|
||||
|
||||
offset = *(uint32_t *)addr + sym->st_value - addr;
|
||||
@@ -236,7 +236,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
|
||||
case R_ARM_MOVW_ABS_NC:
|
||||
case R_ARM_MOVT_ABS:
|
||||
{
|
||||
bvdbg("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
|
||||
binfo("Performing MOVx_ABS [%d] link at addr=%08lx [%08lx] to sym=%p st_value=%08lx\n",
|
||||
ELF32_R_TYPE(rel->r_info), (long)addr, (long)(*(uint32_t *)addr),
|
||||
sym, (long)sym->st_value);
|
||||
|
||||
@@ -256,7 +256,7 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
|
||||
break;
|
||||
|
||||
default:
|
||||
bdbg("Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
|
||||
berr("ERROR: Unsupported relocation: %d\n", ELF32_R_TYPE(rel->r_info));
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
@@ -266,6 +266,6 @@ int up_relocate(FAR const Elf32_Rel *rel, FAR const Elf32_Sym *sym,
|
||||
int up_relocateadd(FAR const Elf32_Rela *rel, FAR const Elf32_Sym *sym,
|
||||
uintptr_t addr)
|
||||
{
|
||||
bdbg("RELA relocation not supported\n");
|
||||
berr("ERROR: RELA relocation not supported\n");
|
||||
return -ENOSYS;
|
||||
}
|
||||
|
||||
@@ -208,7 +208,7 @@
|
||||
|
||||
/* This macro will modify r0, r1, r2 and r14 */
|
||||
|
||||
#ifdef CONFIG_DEBUG
|
||||
#ifdef CONFIG_DEBUG_FEATURES
|
||||
.macro showprogress, code
|
||||
mov r0, #\code
|
||||
bl up_lowputc
|
||||
|
||||
@@ -49,7 +49,7 @@
|
||||
|
||||
/* This macro will modify r0, r1, r2 and r14 */
|
||||
|
||||
#ifdef CONFIG_DEBUG
|
||||
#ifdef CONFIG_DEBUG_FEATURES
|
||||
.macro showprogress, code
|
||||
mov r0, #\code
|
||||
bl up_lowputc
|
||||
@@ -115,7 +115,7 @@ __start:
|
||||
bl up_earlyserialinit
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_DEBUG
|
||||
#ifdef CONFIG_DEBUG_FEATURES
|
||||
mov r0, #'C'
|
||||
bl up_putc
|
||||
mov r0, #'\n'
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
/****************************************************************************
|
||||
* arch/arm/src/arm/up_prefetchabort.c
|
||||
*
|
||||
* Copyright (C) 2007-2011, 2013 Gregory Nutt. All rights reserved.
|
||||
* Copyright (C) 2007-2011, 2013, 2016 Gregory Nutt. All rights reserved.
|
||||
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@@ -39,17 +39,6 @@
|
||||
|
||||
#include <nuttx/config.h>
|
||||
|
||||
/* Output debug info if stack dump is selected -- even if debug is not
|
||||
* selected.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_ARCH_STACKDUMP
|
||||
# undef CONFIG_DEBUG
|
||||
# undef CONFIG_DEBUG_VERBOSE
|
||||
# define CONFIG_DEBUG 1
|
||||
# define CONFIG_DEBUG_VERBOSE 1
|
||||
#endif
|
||||
|
||||
#include <stdint.h>
|
||||
#include <debug.h>
|
||||
|
||||
@@ -110,8 +99,8 @@ void up_prefetchabort(uint32_t *regs)
|
||||
* virtual addresses.
|
||||
*/
|
||||
|
||||
pglldbg("VADDR: %08x VBASE: %08x VEND: %08x\n",
|
||||
regs[REG_PC], PG_PAGED_VBASE, PG_PAGED_VEND);
|
||||
pginfo("VADDR: %08x VBASE: %08x VEND: %08x\n",
|
||||
regs[REG_PC], PG_PAGED_VBASE, PG_PAGED_VEND);
|
||||
|
||||
if (regs[REG_R15] >= PG_PAGED_VBASE && regs[REG_R15] < PG_PAGED_VEND)
|
||||
{
|
||||
@@ -148,7 +137,7 @@ void up_prefetchabort(uint32_t *regs)
|
||||
else
|
||||
#endif
|
||||
{
|
||||
lldbg("Prefetch abort. PC: %08x\n", regs[REG_PC]);
|
||||
_alert("Prefetch abort. PC: %08x\n", regs[REG_PC]);
|
||||
PANIC();
|
||||
}
|
||||
}
|
||||
|
||||
@@ -67,7 +67,7 @@ void up_release_pending(void)
|
||||
{
|
||||
struct tcb_s *rtcb = this_task();
|
||||
|
||||
slldbg("From TCB=%p\n", rtcb);
|
||||
sinfo("From TCB=%p\n", rtcb);
|
||||
|
||||
/* Merge the g_pendingtasks list into the ready-to-run task list */
|
||||
|
||||
|
||||
@@ -95,7 +95,7 @@ void up_reprioritize_rtr(struct tcb_s *tcb, uint8_t priority)
|
||||
struct tcb_s *rtcb = this_task();
|
||||
bool switch_needed;
|
||||
|
||||
slldbg("TCB=%p PRI=%d\n", tcb, priority);
|
||||
sinfo("TCB=%p PRI=%d\n", tcb, priority);
|
||||
|
||||
/* Remove the tcb task from the ready-to-run list.
|
||||
* sched_removereadytorun will return true if we just
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user