Add ATSAMA5D2/D4 Secure Fuse Controller (SFC) driver

This commit is contained in:
TimJTi
2023-04-27 17:59:04 +01:00
committed by Alan Carvalho de Assis
parent aa0cb3f76f
commit b4b9a180c0
8 changed files with 1344 additions and 6 deletions
+1
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@@ -814,6 +814,7 @@ config SAMA5_ARM
config SAMA5_FUSE
bool "Fuse Controller (FUSE)"
default n
depends on SAMA5_HAVE_FUSE
config SAMA5_MPDDRC
bool "MPDDR controller (MPDDRC)"
+4
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@@ -221,6 +221,10 @@ CHIP_CSRCS += sam_tickless.c
endif
endif
ifeq ($(CONFIG_SAMA5_SFC), y)
CHIP_CSRCS += sam_sfc.c
endif
ifeq ($(CONFIG_SAMA5_EBICS0_NAND),y)
CHIP_CSRCS += sam_nand.c sam_pmecc.c sam_gf512.c sam_gf1024.c
else
+67
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@@ -0,0 +1,67 @@
/****************************************************************************
* arch/arm/src/sama5/hardware/sam_sfc.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMA5_HARDWARE_SAM_SFC_H
#define __ARCH_ARM_SRC_SAMA5_HARDWARE_SAM_SFC_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include "hardware/sam_memorymap.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#if defined(ATSAMA5D2) || defined(ATSAMA5D4)
/* SFC Register Offsets *****************************************************/
#define SAM_SFC_KR_OFFSET (0x0000) /* Key register */
#define SAM_SFC_MR_OFFSET (0x0004) /* Mode register */
/* 0x008-0x00c reserved */
#define SAM_SFC_IER_OFFSET (0x0010) /* Interrupt enable register */
#define SAM_SFC_IDR_OFFSET (0x0014) /* Interrupr disable register */
#define SAM_SFC_IMR_OFFSET (0x0018) /* Interrupt mask register */
#define SAM_SFC_SR_OFFSET (0x001c) /* Status register */
#define SAM_SFC_DR_OFFSET(n) ((0x0020)+((n) << (2)))
#define SAM_SFC_SR_PGMC_SHIFT (0)
#define SAM_SFC_SR_PGMC ((1) << SAM_SFC_SR_PGMC_SHIFT)
/* Programming completed */
#define SAM_SFC_SR_PGMF_SHIFT (1)
#define SAM_SFC_SR_PGMF ((1) << SAM_SFC_SR_PGMF_SHIFT)
/* Programming failed */
#define SAM_SFC_KR (SAM_SFC_VBASE + SAM_SFC_KR_OFFSET)
#define SAM_SFC_MR (SAM_SFC_VBASE + SAM_SFC_MR_OFFSET)
#define SAM_SFC_MR_MASK (1)
#define SAM_SFC_IER (SAM_SFC_VBASE + SAM_SFC_IER_OFFSET)
#define SAM_SFC_IDR (SAM_SFC_VBASE + SAM_SFC_IDR_OFFSET)
#define SAM_SFC_IMR (SAM_SFC_VBASE + SAM_SFC_IMR_OFFSET)
#define SAM_SFC_SR (SAM_SFC_VBASE + SAM_SFC_SR_OFFSET)
#define SAM_SFC_DR(n) (SAM_SFC_VBASE + SAM_SFC_DR_OFFSET(n))
#define SAM_SFC_KEYCODE (0x00fb) /* Keycode to allow write */
#endif /* if defined(ATSAMA5D2) || defined(ATSAMA5D4) */
#endif /* __ARCH_ARM_SRC_SAMA5_HARDWARE_SAM_SFC_H */
File diff suppressed because it is too large Load Diff
+75
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@@ -0,0 +1,75 @@
/****************************************************************************
* arch/arm/src/sama5/sam_sfc.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_SAMA5_SAM_SFC_H
#define __ARCH_ARM_SRC_SAMA5_SAM_SFC_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <stdbool.h>
#include "chip.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Public Types
****************************************************************************/
/****************************************************************************
* Inline Functions
****************************************************************************/
#ifndef __ASSEMBLY__
/****************************************************************************
* Public Data
****************************************************************************/
#undef EXTERN
#if defined(__cplusplus)
#define EXTERN extern "C"
extern "C"
{
#else
#define EXTERN extern
#endif
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
int sama5_sfc_initialize(const char *devpath);
void sama5_sfc_unregister(void *handle);
#undef EXTERN
#if defined(__cplusplus)
}
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ARCH_ARM_SRC_SAMA5_SAM_SFC_H */
+4 -4
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@@ -170,8 +170,8 @@ static int efuse_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
case EFUSEIOC_READ_FIELD:
{
FAR struct efuse_param *param =
(FAR struct efuse_param *)((uintptr_t)arg);
FAR struct efuse_param_s *param =
(FAR struct efuse_param_s *)((uintptr_t)arg);
/* Read the efuse */
@@ -200,8 +200,8 @@ static int efuse_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
case EFUSEIOC_WRITE_FIELD:
{
FAR struct efuse_param *param =
(FAR struct efuse_param *)((uintptr_t)arg);
FAR struct efuse_param_s *param =
(FAR struct efuse_param_s *)((uintptr_t)arg);
/* Write the efuse */
+11 -2
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@@ -57,6 +57,15 @@
#define EFUSEIOC_WRITE_FIELD _EFUSEIOC(0x0002)
/* Command: EFUSEIOC_MASK
* Description: Masks fuse registers to prevent them from being read.
* Used by ATSAMA5D2 and ATSAMA5D4.
* Arguments: None
* Return: Zero (OK) for success.
*/
#define EFUSEIOC_MASK _EFUSEIOC(0x0003)
/****************************************************************************
* Public Types
****************************************************************************/
@@ -95,10 +104,10 @@ typedef struct efuse_desc_s efuse_desc_t;
* on.
*/
struct efuse_param
struct efuse_param_s
{
FAR const efuse_desc_t **field;
size_t size;
size_t size;
FAR uint8_t *data;
};
+247
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@@ -0,0 +1,247 @@
/****************************************************************************
* include/nuttx/efuse/sama5_sfc_fuses.h
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
#ifndef __INCLUDE_NUTTX_EFUSE_SAMA5_FUSES_H
#define __INCLUDE_NUTTX_EFUSE_SAMA5_FUSES_H
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
#if defined(ATSAMA5D2)
#define SAM_SFC_EFUSE_MAX_LEN 544 /* Max length of sfc area. */
#elif defined ATSAMA5D4
#define SAM_SFC_EFUSE_MAX_LEN 512 /* Max length of sfc area. */
#endif
/****************************************************************************
* Included Files
****************************************************************************/
/****************************************************************************
* Type Definitions
****************************************************************************/
#if defined(CONFIG_EFUSE) && defined(CONFIG_SAMA5_SFC)
/* enum of SFC blocks for SAMA5 */
enum
{
SFC_DR0 = 0,
SFC_DR1,
SFC_DR2,
SFC_DR3,
SFC_DR4,
SFC_DR5,
SFC_DR6,
SFC_DR7,
SFC_DR8,
SFC_DR9,
SFC_DR10,
SFC_DR11,
SFC_DR12,
SFC_DR13,
SFC_DR14,
#ifdef ATSAMA5D2
SFC_DR15,
SFC_BOOT,
SFC_JTAG,
SFC_SEC_BOOT,
#else
SFC_S,
SFC_MD,
SFC_SECURE_DEBUG,
SFC_JTAG_DIS,
#endif
SFC_DR_END,
};
/* Generic descriptions for the SAM SFC fuses, 32 bits wide.
* These can be replaced by user definitions in board code if required.
*/
static const efuse_desc_t SAMA5_SFC_DATA0[] =
{
{
0, 32
},
};
static const efuse_desc_t SAMA5_SFC_DATA1[] =
{
{
32, 32
},
};
static const efuse_desc_t SAMA5_SFC_DATA2[] =
{
{
64, 32
},
};
static const efuse_desc_t SAMA5_SFC_DATA3[] =
{
{
96, 32
},
};
static const efuse_desc_t SAMA5_SFC_DATA4[] =
{
{
128, 32
},
};
static const efuse_desc_t SAMA5_SFC_DATA5[] =
{
{
160, 32
},
};
static const efuse_desc_t SAMA5_SFC_DATA6[] =
{
{
192, 32
},
};
static const efuse_desc_t SAMA5_SFC_DATA7[] =
{
{
224, 32
},
};
static const efuse_desc_t SAMA5_SFC_DATA8[] =
{
{
256, 32
},
};
static const efuse_desc_t SAMA5_SFC_DATA9[] =
{
{
288, 32
},
};
static const efuse_desc_t SAMA5_SFC_DATA10[] =
{
{
320, 32
},
};
static const efuse_desc_t SAMA5_SFC_DATA11[] =
{
{
352, 32
},
};
static const efuse_desc_t SAMA5_SFC_DATA12[] =
{
{
384, 32
},
};
static const efuse_desc_t SAMA5_SFC_DATA13[] =
{
{
416, 32
},
};
static const efuse_desc_t SAMA5_SFC_DATA14[] =
{
{
448, 32
},
};
#ifdef ATSAMA5D2
static const efuse_desc_t SAMA5_SFC_DATA15[] =
{
{
480, 32
},
};
static const efuse_desc_t SAMA5_SFC_BOOT_CFG[] =
{
{
512, 30
},
};
static const efuse_desc_t SAMA5_SFC_JTAG_DIS[] =
{
{
542, 1
},
};
static const efuse_desc_t SAMA5_SFC_SECURE_DEBUG[] =
{
{
543, 1
},
};
#else
static const efuse_desc_t SAMA5_SFC_S[] =
{
{
480, 1
},
};
static const efuse_desc_t SAMA5_SFC_MD[] =
{
{
482, 1
},
};
static const efuse_desc_t SAMA5_SFC_SECURE_DEBUG[] =
{
{
510, 1
},
};
static const efuse_desc_t SAMA5_SFC_JTAG_DIS[] =
{
{
511, 1
},
};
#endif
#endif /* defined(CONFIG_EFUSE) && defined(CONFIG_SAMA5_SFC) */
#endif /* __INCLUDE_NUTTX_EFUSE_SAMA5_FUSES_H */